/*
 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * Redistributions of source code must retain the above copyright notice, this
 * list of conditions and the following disclaimer.
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 *
 * Neither the name of ARM nor the names of its contributors may be used
 * to endorse or promote products derived from this software without specific
 * prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <arch.h>
#include <asm_macros.S>
#include <tftf.h>

	.globl	tftf_vector

vector_base tftf_vector
	b	tftf_entrypoint
	b	.		/* Undef */
	b	.		/* Syscall */
	b	.		/* Prefetch abort */
	b	.		/* Data abort */
	b	.		/* Hyp trap */
	b	tftf_intr_handle/* IRQ */
	b	.		/* FIQ */

/* ----------------------------------------------------------------------------
 * The IRQ exception handler
 * ----------------------------------------------------------------------------
 */
func tftf_intr_handle
	push	{r0 - r3, lr}
#if ARM_ARCH_MAJOR == 7
	mrs	lr, spsr
	push	{lr}
#endif
	bl	tftf_irq_handler_dispatcher
#if ARM_ARCH_MAJOR == 8
	pop	{r0 - r3, lr}
	eret
#else
	pop	{lr}
	msr	spsr_cxsf, lr
	pop	{r0 - r3, lr}
	subs	pc, lr, #4
#endif
endfunc tftf_intr_handle