/*
 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * Redistributions of source code must retain the above copyright notice, this
 * list of conditions and the following disclaimer.
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 *
 * Neither the name of ARM nor the names of its contributors may be used
 * to endorse or promote products derived from this software without specific
 * prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
#ifndef __INTEL_P30_FLASH__
#define __INTEL_P30_FLASH__

#include <mmio.h>

/* READ Commands */
#define P30_CMD_READ_DEVICE_ID                    0x0090
#define P30_CMD_READ_STATUS_REGISTER              0x0070
#define P30_CMD_CLEAR_STATUS_REGISTER             0x0050
#define P30_CMD_READ_ARRAY                        0x00FF
#define P30_CMD_READ_CFI_QUERY                    0x0098

/* WRITE Commands */
#define P30_CMD_WORD_PROGRAM_SETUP                0x0040
#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP      0x0010
#define P30_CMD_BUFFERED_PROGRAM_SETUP            0x00E8
#define P30_CMD_BUFFERED_PROGRAM_CONFIRM          0x00D0
#define P30_CMD_BEFP_SETUP                        0x0080
#define P30_CMD_BEFP_CONFIRM                      0x00D0

/* ERASE Commands */
#define P30_CMD_BLOCK_ERASE_SETUP                 0x0020
#define P30_CMD_BLOCK_ERASE_CONFIRM               0x00D0

/* BLOCK LOCKING / UNLOCKING Commands */
#define P30_CMD_LOCK_BLOCK_SETUP                  0x0060
#define P30_CMD_LOCK_BLOCK                        0x0001
#define P30_CMD_UNLOCK_BLOCK                      0x00D0
#define P30_CMD_LOCK_DOWN_BLOCK                   0x002F

/* Device Id information */
#define P30_DEVICE_ID_LOCK_CONFIGURATION          0x02
#define P30_DEVICE_ID_BLOCK_LOCKED                (1 << 0)
#define P30_DEVICE_ID_BLOCK_LOCKED_DOWN           (1 << 1)

/* Status Register Bits */
#define P30_SR_BIT_WRITE                          ((1 << 23) | (1 << 7))
#define P30_SR_BIT_ERASE_SUSPEND                  ((1 << 22) | (1 << 6))
#define P30_SR_BIT_ERASE                          ((1 << 21) | (1 << 5))
#define P30_SR_BIT_PROGRAM                        ((1 << 20) | (1 << 4))
#define P30_SR_BIT_VPP                            ((1 << 19) | (1 << 3))
#define P30_SR_BIT_PROGRAM_SUSPEND                ((1 << 18) | (1 << 2))
#define P30_SR_BIT_BLOCK_LOCKED                   ((1 << 17) | (1 << 1))
#define P30_SR_BIT_BEFP                           ((1 << 16) | (1 << 0))

/* Each command must be sent simultaneously to both chips,
   i.e. at the lower 16 bits AND at the higher 16 bits */
#define P30_CREATE_NOR_ADDRESS(base, offset) ((base) + ((offset) << 2))
#define P30_CREATE_DUAL_CMD(cmd)             ((cmd << 16) | (cmd & LOW_16_BITS))
#define P30_SEND_NOR_COMMAND(base, offset, cmd) \
			mmio_write_32(P30_CREATE_NOR_ADDRESS(base, offset), \
					 P30_CREATE_DUAL_CMD(cmd))

/* On chip buffer size for buffered programming operations
   There are 2 chips, each chip can buffer up to 32 (16-bit)words.
   Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes */
#define P30_MAX_BUFFER_SIZE_IN_BYTES        128
#define P30_MAX_BUFFER_SIZE_IN_WORDS        (P30_MAX_BUFFER_SIZE_IN_BYTES / 4)

#endif /* __INTEL_P30_FLASH__ */