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/*
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __IRQ_H__
#define __IRQ_H__
#include <platform_def.h> /* For CACHE_WRITEBACK_GRANULE */
#include <stdint.h>
/*
* SGI sent by the timer management framework to notify CPUs when the system
* timer fires off
*/
#define IRQ_WAKE_SGI IRQ_NS_SGI_7
#ifndef __ASSEMBLY__
/* Prototype of a handler function for an IRQ */
typedef int (*irq_handler_t)(void *data);
/* Keep track of the IRQ handler registered for a given SPI */
typedef struct {
irq_handler_t handler;
} spi_desc;
/* Keep track of the IRQ handler registered for a spurious interrupt */
typedef irq_handler_t spurious_desc;
/*
* PPIs and SGIs are interrupts that are private to a GIC CPU interface. These
* interrupts are banked in the GIC Distributor. Therefore, each CPU can
* set up a different IRQ handler for a given PPI/SGI.
*
* So we define a data structure representing an IRQ handler aligned on the
* size of a cache line. This guarantees that in an array of these, each element
* is loaded in a separate cache line. This allows efficient concurrent
* manipulation of these elements on different CPUs.
*/
typedef struct {
irq_handler_t handler;
} __aligned(CACHE_WRITEBACK_GRANULE) irq_handler_banked_t;
typedef irq_handler_banked_t ppi_desc;
typedef irq_handler_banked_t sgi_desc;
void tftf_irq_setup(void);
/*
* Generic handler called upon reception of an IRQ.
*
* This function acknowledges the interrupt, calls the user-defined handler
* if one has been registered then marks the processing of the interrupt as
* complete.
*/
int tftf_irq_handler_dispatcher(void);
/*
* Enable interrupt #irq_num for the calling core.
*/
void tftf_irq_enable(unsigned int irq_num, uint8_t irq_priority);
/*
* Disable interrupt #irq_num for the calling core.
*/
void tftf_irq_disable(unsigned int irq_num);
/*
* Register an interrupt handler for a given interrupt number.
* Will fail if there is already an interrupt handler registered for the same
* interrupt.
*
* Return 0 on success, a negative value otherwise.
*/
int tftf_irq_register_handler(unsigned int num, irq_handler_t irq_handler);
/*
* Unregister an interrupt handler for a given interrupt number.
* Will fail if there is no interrupt handler registered for that interrupt.
*
* Return 0 on success, a negative value otherwise.
*/
int tftf_irq_unregister_handler(unsigned int irq_num);
#endif /* __ASSEMBLY__ */
#endif /* __IRQ_H__ */
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