diff options
author | Kumar Gala <kumar.gala@linaro.org> | 2017-01-28 14:54:40 -0600 |
---|---|---|
committer | Maureen Helm <maureen.helm@nxp.com> | 2017-02-10 14:47:41 -0600 |
commit | 3a7cc31e08096a5e8088093f3b0f164527534b61 (patch) | |
tree | 54fef0dc9536ea4ec3bd7c3cc75bc55802d6e364 | |
parent | 52cf45c62a1aae5bd3f9e4c61345eae5c9747374 (diff) |
arm: cmsis: cleanup use of _SCS_CPACR_CP1{0,1}_Pos define
_SCS_CPACR_CP10_Pos and _SCS_CPACR_CP11_Pos come from scs.h, we have
versions defined in cmsis.h we should be using instead.
Change-Id: Icd8db02000bbc9ef8b2cf89d359e008f62a7d5e9
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
-rw-r--r-- | include/arch/arm/cortex_m/cmsis.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/include/arch/arm/cortex_m/cmsis.h b/include/arch/arm/cortex_m/cmsis.h index 714bb6791..0ae08197a 100644 --- a/include/arch/arm/cortex_m/cmsis.h +++ b/include/arch/arm/cortex_m/cmsis.h @@ -22,19 +22,19 @@ extern "C" { /* CP10 Access Bits */ #define CPACR_CP10_Pos 20U -#define CPACR_CP10_Msk (3UL << _SCS_CPACR_CP10_Pos) -#define CPACR_CP10_NO_ACCESS (0UL << _SCS_CPACR_CP10_Pos) -#define CPACR_CP10_PRIV_ACCESS (1UL << _SCS_CPACR_CP10_Pos) -#define CPACR_CP10_RESERVED (2UL << _SCS_CPACR_CP10_Pos) -#define CPACR_CP10_FULL_ACCESS (3UL << _SCS_CPACR_CP10_Pos) +#define CPACR_CP10_Msk (3UL << CPACR_CP10_Pos) +#define CPACR_CP10_NO_ACCESS (0UL << CPACR_CP10_Pos) +#define CPACR_CP10_PRIV_ACCESS (1UL << CPACR_CP10_Pos) +#define CPACR_CP10_RESERVED (2UL << CPACR_CP10_Pos) +#define CPACR_CP10_FULL_ACCESS (3UL << CPACR_CP10_Pos) /* CP11 Access Bits */ #define CPACR_CP11_Pos 22U -#define CPACR_CP11_Msk (3UL << _SCS_CPACR_CP11_Pos) -#define CPACR_CP11_NO_ACCESS (0UL << _SCS_CPACR_CP11_Pos) -#define CPACR_CP11_PRIV_ACCESS (1UL << _SCS_CPACR_CP11_Pos) -#define CPACR_CP11_RESERVED (2UL << _SCS_CPACR_CP11_Pos) -#define CPACR_CP11_FULL_ACCESS (3UL << _SCS_CPACR_CP11_Pos) +#define CPACR_CP11_Msk (3UL << CPACR_CP11_Pos) +#define CPACR_CP11_NO_ACCESS (0UL << CPACR_CP11_Pos) +#define CPACR_CP11_PRIV_ACCESS (1UL << CPACR_CP11_Pos) +#define CPACR_CP11_RESERVED (2UL << CPACR_CP11_Pos) +#define CPACR_CP11_FULL_ACCESS (3UL << CPACR_CP11_Pos) #define SCB_UFSR (*((__IOM uint16_t *) &SCB->CFSR + 2)) #define SCB_BFSR (*((__IOM uint8_t *) &SCB->CFSR + 1)) |