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authorErwan Gouriou <erwan.gouriou@linaro.org>2017-01-30 11:55:39 +0100
committerMaureen Helm <maureen.helm@nxp.com>2017-02-10 14:47:41 -0600
commit726d4dc437e270c63ac77972a5b4f4b7a3703a36 (patch)
treed42caa0256f4bf8d582fd7057a8fa5f9d48a183b
parent3c389b54f06b1f2c7656b36dc94764d349ea69c7 (diff)
drivers: stm32: clean up after stm23cube based clock control
After activation of cube based driver support on L4 and F3 series, this commits performs the clean up of F3 and L4 relative code to native clock control drivers. Indirectly, it makes pwm driver supported de facto on F3 series Change-Id: Idac17103a9b5ef6eab540719343cc8f5865f15fa Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
-rw-r--r--drivers/flash/flash_stm32f3x.c9
-rw-r--r--drivers/flash/flash_stm32f3x.h4
-rw-r--r--drivers/gpio/gpio_stm32.c53
-rw-r--r--drivers/i2c/i2c_stm32lx.c14
-rw-r--r--drivers/i2c/i2c_stm32lx.h6
-rw-r--r--drivers/pinmux/stm32/pinmux_stm32.c4
-rw-r--r--drivers/pwm/pwm_stm32.c11
-rw-r--r--drivers/pwm/pwm_stm32.h2
-rw-r--r--drivers/serial/uart_stm32.c17
-rw-r--r--drivers/serial/uart_stm32.h4
10 files changed, 8 insertions, 116 deletions
diff --git a/drivers/flash/flash_stm32f3x.c b/drivers/flash/flash_stm32f3x.c
index 002aa8a6e..54b5fc38f 100644
--- a/drivers/flash/flash_stm32f3x.c
+++ b/drivers/flash/flash_stm32f3x.c
@@ -118,13 +118,8 @@ static int flash_stm32_init(struct device *dev)
struct device *clk = device_get_binding(STM32_CLOCK_CONTROL_NAME);
-#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
if (clock_control_on(clk, (clock_control_subsys_t *) &cfg->pclken) != 0)
return -ENODEV;
-#else
- if (clock_control_on(clk, cfg->clock_subsys) != 0)
- return -ENODEV;
-#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
return 0;
}
@@ -138,12 +133,8 @@ static const struct flash_driver_api flash_stm32_api = {
static const struct flash_stm32_dev_config flash_device_config = {
.base = (uint32_t *)FLASH_R_BASE,
-#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
.pclken = { .bus = STM32_CLOCK_BUS_APB1,
.enr = LL_AHB1_GRP1_PERIPH_FLASH},
-#else
- .clock_subsys = UINT_TO_POINTER(STM32F3X_CLOCK_SUBSYS_FLITF),
-#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
};
static struct flash_stm32_dev_data flash_device_data = {
diff --git a/drivers/flash/flash_stm32f3x.h b/drivers/flash/flash_stm32f3x.h
index 4fb44e165..c0257cc75 100644
--- a/drivers/flash/flash_stm32f3x.h
+++ b/drivers/flash/flash_stm32f3x.h
@@ -14,11 +14,7 @@
struct flash_stm32_dev_config {
uint32_t *base;
-#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
struct stm32_pclken pclken;
-#else
- clock_control_subsys_t clock_subsys;
-#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
};
struct flash_stm32_dev_data {
diff --git a/drivers/gpio/gpio_stm32.c b/drivers/gpio/gpio_stm32.c
index 845ece436..0de0ea2ba 100644
--- a/drivers/gpio/gpio_stm32.c
+++ b/drivers/gpio/gpio_stm32.c
@@ -266,12 +266,8 @@ GPIO_DEVICE_INIT("GPIOA", a, GPIOA_BASE, STM32_PORTA,
#ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPA
| STM32F10X_CLOCK_SUBSYS_AFIO
-#elif CONFIG_SOC_SERIES_STM32F3X
- STM32F3X_CLOCK_SUBSYS_IOPA
#elif CONFIG_SOC_SERIES_STM32F4X
STM32F4X_CLOCK_ENABLE_GPIOA
-#elif CONFIG_SOC_SERIES_STM32L4X
- STM32L4X_CLOCK_SUBSYS_GPIOA
#endif
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
);
@@ -285,12 +281,8 @@ GPIO_DEVICE_INIT("GPIOB", b, GPIOB_BASE, STM32_PORTB,
#ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPB
| STM32F10X_CLOCK_SUBSYS_AFIO
-#elif CONFIG_SOC_SERIES_STM32F3X
- STM32F3X_CLOCK_SUBSYS_IOPB
#elif CONFIG_SOC_SERIES_STM32F4X
STM32F4X_CLOCK_ENABLE_GPIOB
-#elif CONFIG_SOC_SERIES_STM32L4X
- STM32L4X_CLOCK_SUBSYS_GPIOB
#endif
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
);
@@ -304,12 +296,8 @@ GPIO_DEVICE_INIT("GPIOC", c, GPIOC_BASE, STM32_PORTC,
#ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPC
| STM32F10X_CLOCK_SUBSYS_AFIO
-#elif CONFIG_SOC_SERIES_STM32F3X
- STM32F3X_CLOCK_SUBSYS_IOPC
#elif CONFIG_SOC_SERIES_STM32F4X
STM32F4X_CLOCK_ENABLE_GPIOC
-#elif CONFIG_SOC_SERIES_STM32L4X
- STM32L4X_CLOCK_SUBSYS_GPIOC
#endif
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
);
@@ -323,12 +311,8 @@ GPIO_DEVICE_INIT("GPIOD", d, GPIOD_BASE, STM32_PORTD,
#ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPD
| STM32F10X_CLOCK_SUBSYS_AFIO
-#elif CONFIG_SOC_SERIES_STM32F3X
- STM32F3X_CLOCK_SUBSYS_IOPD
#elif CONFIG_SOC_SERIES_STM32F4X
STM32F4X_CLOCK_ENABLE_GPIOD
-#elif CONFIG_SOC_SERIES_STM32L4X
- STM32L4X_CLOCK_SUBSYS_GPIOD
#endif
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
);
@@ -342,12 +326,8 @@ GPIO_DEVICE_INIT("GPIOE", e, GPIOE_BASE, STM32_PORTE,
#ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPE
| STM32F10X_CLOCK_SUBSYS_AFIO
-#elif CONFIG_SOC_SERIES_STM32F3X
- STM32F3X_CLOCK_SUBSYS_IOPE
#elif CONFIG_SOC_SERIES_STM32F4X
STM32F4X_CLOCK_ENABLE_GPIOE
-#elif CONFIG_SOC_SERIES_STM32L4X
- STM32L4X_CLOCK_SUBSYS_GPIOE
#endif
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
);
@@ -355,42 +335,15 @@ GPIO_DEVICE_INIT("GPIOE", e, GPIOE_BASE, STM32_PORTE,
#ifdef CONFIG_GPIO_STM32_PORTF
GPIO_DEVICE_INIT("GPIOF", f, GPIOF_BASE, STM32_PORTF,
-#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
- STM32_PERIPH_GPIOF, STM32_CLOCK_BUS_GPIO
-#else
-#ifdef CONFIG_SOC_SERIES_STM32F3X
- STM32F3X_CLOCK_SUBSYS_IOPF
-#elif CONFIG_SOC_SERIES_STM32L4X
- STM32L4X_CLOCK_SUBSYS_GPIOF
-#endif
-#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
- );
+ STM32_PERIPH_GPIOF, STM32_CLOCK_BUS_GPIO);
#endif /* CONFIG_GPIO_STM32_PORTF */
#ifdef CONFIG_GPIO_STM32_PORTG
GPIO_DEVICE_INIT("GPIOG", g, GPIOG_BASE, STM32_PORTG,
-#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
- STM32_PERIPH_GPIOG, STM32_CLOCK_BUS_GPIO
-#else
-#ifdef CONFIG_SOC_SERIES_STM32F3X
- STM32F3X_CLOCK_SUBSYS_IOPG
-#elif CONFIG_SOC_SERIES_STM32L4X
- STM32L4X_CLOCK_SUBSYS_GPIOG
-#endif
-#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
- );
+ STM32_PERIPH_GPIOG, STM32_CLOCK_BUS_GPIO);
#endif /* CONFIG_GPIO_STM32_PORTG */
#ifdef CONFIG_GPIO_STM32_PORTH
GPIO_DEVICE_INIT("GPIOH", h, GPIOH_BASE, STM32_PORTH,
-#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
- STM32_PERIPH_GPIOH, STM32_CLOCK_BUS_GPIO
-#else
-#ifdef CONFIG_SOC_SERIES_STM32F3X
- STM32F3X_CLOCK_SUBSYS_IOPH
-#elif CONFIG_SOC_SERIES_STM32L4X
- STM32L4X_CLOCK_SUBSYS_GPIOH
-#endif
-#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
- );
+ STM32_PERIPH_GPIOH, STM32_CLOCK_BUS_GPIO);
#endif /* CONFIG_GPIO_STM32_PORTH */
diff --git a/drivers/i2c/i2c_stm32lx.c b/drivers/i2c/i2c_stm32lx.c
index 1903f998f..d422afb40 100644
--- a/drivers/i2c/i2c_stm32lx.c
+++ b/drivers/i2c/i2c_stm32lx.c
@@ -40,12 +40,8 @@ static int i2c_stm32lx_runtime_configure(struct device *dev, uint32_t config)
data->dev_config.raw = config;
-#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
clock_control_get_rate(data->clock,
(clock_control_subsys_t *)&cfg->pclken, &clock);
-#else
- clock_control_get_rate(data->clock, cfg->clock_subsys, &clock);
-#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
if (data->dev_config.bits.is_slave_read)
return -EINVAL;
@@ -413,12 +409,8 @@ static int i2c_stm32lx_init(struct device *dev)
__i2c_stm32lx_get_clock(dev);
/* enable clock */
-#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
clock_control_on(data->clock,
(clock_control_subsys_t *)&cfg->pclken);
-#else
- clock_control_on(data->clock, cfg->clock_subsys);
-#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
/* Reset config */
i2c->cr1.val = 0;
@@ -448,14 +440,8 @@ static void i2c_stm32lx_irq_config_func_0(struct device *port);
static const struct i2c_stm32lx_config i2c_stm32lx_cfg_0 = {
.base = (uint8_t *)I2C1_BASE,
-#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
.pclken = { .bus = STM32_CLOCK_BUS_APB1,
.enr = LL_APB1_GRP1_PERIPH_I2C1 },
-#else
-#ifdef CONFIG_SOC_SERIES_STM32L4X
- .clock_subsys = UINT_TO_POINTER(STM32L4X_CLOCK_SUBSYS_I2C1),
-#endif
-#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
#ifdef CONFIG_I2C_STM32LX_INTERRUPT
.irq_config_func = i2c_stm32lx_irq_config_func_0,
#endif
diff --git a/drivers/i2c/i2c_stm32lx.h b/drivers/i2c/i2c_stm32lx.h
index f8fc4b7d5..daeb773a4 100644
--- a/drivers/i2c/i2c_stm32lx.h
+++ b/drivers/i2c/i2c_stm32lx.h
@@ -183,12 +183,8 @@ typedef void (*irq_config_func_t)(struct device *port);
struct i2c_stm32lx_config {
void *base;
irq_config_func_t irq_config_func;
-#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
- struct stm32_pclken pclken;
-#else
/* clock subsystem driving this peripheral */
- clock_control_subsys_t clock_subsys;
-#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
+ struct stm32_pclken pclken;
};
/* driver data */
diff --git a/drivers/pinmux/stm32/pinmux_stm32.c b/drivers/pinmux/stm32/pinmux_stm32.c
index 325c76b07..0877df561 100644
--- a/drivers/pinmux/stm32/pinmux_stm32.c
+++ b/drivers/pinmux/stm32/pinmux_stm32.c
@@ -79,9 +79,7 @@ static int enable_port(uint32_t port, struct device *clk)
return clock_control_on(clk, (clock_control_subsys_t *) &pclken);
#else
-#if defined(CONFIG_SOC_SERIES_STM32F1X) || \
- defined(CONFIG_SOC_SERIES_STM32F3X) || \
- defined(CONFIG_SOC_SERIES_STM32L4X)
+#if defined(CONFIG_SOC_SERIES_STM32F1X)
clock_control_subsys_t subsys = stm32_get_port_clock(port);
return clock_control_on(clk, subsys);
diff --git a/drivers/pwm/pwm_stm32.c b/drivers/pwm/pwm_stm32.c
index 466c42189..dcf0134f1 100644
--- a/drivers/pwm/pwm_stm32.c
+++ b/drivers/pwm/pwm_stm32.c
@@ -27,9 +27,6 @@
#ifdef CONFIG_SOC_SERIES_STM32F1X
#define CLOCK_SUBSYS_TIM1 STM32F10X_CLOCK_SUBSYS_TIM1
#define CLOCK_SUBSYS_TIM2 STM32F10X_CLOCK_SUBSYS_TIM2
-#elif CONFIG_SOC_SERIES_STM32L4X
-#define CLOCK_SUBSYS_TIM1 STM32L4X_CLOCK_SUBSYS_TIM1
-#define CLOCK_SUBSYS_TIM2 STM32L4X_CLOCK_SUBSYS_TIM2
#endif
#define CHANNEL_LENGTH 4
@@ -86,19 +83,11 @@ static uint32_t __get_tim_clk(uint32_t bus_clk,
uint32_t tim_clk, apb_psc;
uint32_t subsys = POINTER_TO_UINT(sub_system);
-#ifdef CONFIG_SOC_SERIES_STM32L4X
- if (STM32L4X_CLOCK_BASE(subsys) == STM32L4X_CLOCK_APB2_BASE) {
- apb_psc = CONFIG_CLOCK_STM32L4X_APB2_PRESCALER;
- } else {
- apb_psc = CONFIG_CLOCK_STM32L4X_APB1_PRESCALER;
- }
-#elif CONFIG_SOC_SERIES_STM32F1X
if (subsys > STM32F10X_CLOCK_APB2_BASE) {
apb_psc = CONFIG_CLOCK_STM32F10X_APB2_PRESCALER;
} else {
apb_psc = CONFIG_CLOCK_STM32F10X_APB1_PRESCALER;
}
-#endif
if (apb_psc == RCC_HCLK_DIV1) {
tim_clk = bus_clk;
diff --git a/drivers/pwm/pwm_stm32.h b/drivers/pwm/pwm_stm32.h
index 5e539148d..779002ee8 100644
--- a/drivers/pwm/pwm_stm32.h
+++ b/drivers/pwm/pwm_stm32.h
@@ -22,7 +22,7 @@ struct pwm_stm32_config {
#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
struct stm32_pclken pclken;
#else
-#if defined(CONFIG_SOC_SERIES_STM32F1X) || defined(CONFIG_SOC_SERIES_STM32L4X)
+#if defined(CONFIG_SOC_SERIES_STM32F1X)
clock_control_subsys_t clock_subsys;
#elif defined(CONFIG_SOC_SERIES_STM32F4X)
struct stm32f4x_pclken pclken;
diff --git a/drivers/serial/uart_stm32.c b/drivers/serial/uart_stm32.c
index 585d978c6..886606c1b 100644
--- a/drivers/serial/uart_stm32.c
+++ b/drivers/serial/uart_stm32.c
@@ -291,10 +291,7 @@ static int uart_stm32_init(struct device *dev)
__uart_stm32_get_clock(dev);
/* enable clock */
-#if (defined(CONFIG_SOC_SERIES_STM32F1X) || \
- defined(CONFIG_SOC_SERIES_STM32F3X) || \
- defined(CONFIG_SOC_SERIES_STM32L4X)) && \
- !defined(CONFIG_CLOCK_CONTROL_STM32_CUBE)
+#if defined(CONFIG_SOC_SERIES_STM32F1X)
clock_control_on(data->clock, config->clock_subsys);
#elif defined(CONFIG_SOC_SERIES_STM32F4X) || \
defined(CONFIG_CLOCK_CONTROL_STM32_CUBE)
@@ -338,13 +335,9 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_1 = {
#else
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1),
-#elif CONFIG_SOC_SERIES_STM32F3X
- .clock_subsys = UINT_TO_POINTER(STM32F3X_CLOCK_SUBSYS_USART1),
#elif CONFIG_SOC_SERIES_STM32F4X
.pclken = { .bus = STM32F4X_CLOCK_BUS_APB2,
.enr = STM32F4X_CLOCK_ENABLE_USART1 },
-#elif CONFIG_SOC_SERIES_STM32L4X
- .clock_subsys = UINT_TO_POINTER(STM32L4X_CLOCK_SUBSYS_USART1),
#endif /* CONFIG_SOC_SERIES_STM32FX */
#endif /* CLOCK_CONTROL_STM32_CUBE */
};
@@ -406,13 +399,9 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_2 = {
#else
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2),
-#elif CONFIG_SOC_SERIES_STM32F3X
- .clock_subsys = UINT_TO_POINTER(STM32F3X_CLOCK_SUBSYS_USART2),
#elif CONFIG_SOC_SERIES_STM32F4X
.pclken = { .bus = STM32F4X_CLOCK_BUS_APB1,
.enr = STM32F4X_CLOCK_ENABLE_USART2 },
-#elif CONFIG_SOC_SERIES_STM32L4X
- .clock_subsys = UINT_TO_POINTER(STM32L4X_CLOCK_SUBSYS_USART2),
#endif /* CONFIG_SOC_SERIES_STM32FX */
#endif /* CLOCK_CONTROL_STM32_CUBE */
};
@@ -474,12 +463,8 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_3 = {
#else
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3),
-#elif CONFIG_SOC_SERIES_STM32F3X
- .clock_subsys = UINT_TO_POINTER(STM32F3X_CLOCK_SUBSYS_USART3),
#elif CONFIG_SOC_SERIES_STM32F4X
.clock_subsys = UINT_TO_POINTER(STM32F40X_CLOCK_SUBSYS_USART3),
-#elif CONFIG_SOC_SERIES_STM32L4X
- .clock_subsys = UINT_TO_POINTER(STM32L4X_CLOCK_SUBSYS_USART3),
#endif /* CONFIG_SOC_SERIES_STM32F4X */
#endif /* CLOCK_CONTROL_STM32_CUBE */
};
diff --git a/drivers/serial/uart_stm32.h b/drivers/serial/uart_stm32.h
index 83e41093f..160dc537e 100644
--- a/drivers/serial/uart_stm32.h
+++ b/drivers/serial/uart_stm32.h
@@ -19,9 +19,7 @@ struct uart_stm32_config {
#if defined(CONFIG_CLOCK_CONTROL_STM32_CUBE)
struct stm32_pclken pclken;
#else
-#if defined(CONFIG_SOC_SERIES_STM32F1X) || \
- defined(CONFIG_SOC_SERIES_STM32F3X) || \
- defined(CONFIG_SOC_SERIES_STM32L4X)
+#if defined(CONFIG_SOC_SERIES_STM32F1X)
clock_control_subsys_t clock_subsys;
#elif defined(CONFIG_SOC_SERIES_STM32F4X)
struct stm32f4x_pclken pclken;