diff options
Diffstat (limited to 'drivers/gpio/gpio_stm32.c')
| -rw-r--r-- | drivers/gpio/gpio_stm32.c | 53 |
1 files changed, 3 insertions, 50 deletions
diff --git a/drivers/gpio/gpio_stm32.c b/drivers/gpio/gpio_stm32.c index 845ece436..0de0ea2ba 100644 --- a/drivers/gpio/gpio_stm32.c +++ b/drivers/gpio/gpio_stm32.c @@ -266,12 +266,8 @@ GPIO_DEVICE_INIT("GPIOA", a, GPIOA_BASE, STM32_PORTA, #ifdef CONFIG_SOC_SERIES_STM32F1X STM32F10X_CLOCK_SUBSYS_IOPA | STM32F10X_CLOCK_SUBSYS_AFIO -#elif CONFIG_SOC_SERIES_STM32F3X - STM32F3X_CLOCK_SUBSYS_IOPA #elif CONFIG_SOC_SERIES_STM32F4X STM32F4X_CLOCK_ENABLE_GPIOA -#elif CONFIG_SOC_SERIES_STM32L4X - STM32L4X_CLOCK_SUBSYS_GPIOA #endif #endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */ ); @@ -285,12 +281,8 @@ GPIO_DEVICE_INIT("GPIOB", b, GPIOB_BASE, STM32_PORTB, #ifdef CONFIG_SOC_SERIES_STM32F1X STM32F10X_CLOCK_SUBSYS_IOPB | STM32F10X_CLOCK_SUBSYS_AFIO -#elif CONFIG_SOC_SERIES_STM32F3X - STM32F3X_CLOCK_SUBSYS_IOPB #elif CONFIG_SOC_SERIES_STM32F4X STM32F4X_CLOCK_ENABLE_GPIOB -#elif CONFIG_SOC_SERIES_STM32L4X - STM32L4X_CLOCK_SUBSYS_GPIOB #endif #endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */ ); @@ -304,12 +296,8 @@ GPIO_DEVICE_INIT("GPIOC", c, GPIOC_BASE, STM32_PORTC, #ifdef CONFIG_SOC_SERIES_STM32F1X STM32F10X_CLOCK_SUBSYS_IOPC | STM32F10X_CLOCK_SUBSYS_AFIO -#elif CONFIG_SOC_SERIES_STM32F3X - STM32F3X_CLOCK_SUBSYS_IOPC #elif CONFIG_SOC_SERIES_STM32F4X STM32F4X_CLOCK_ENABLE_GPIOC -#elif CONFIG_SOC_SERIES_STM32L4X - STM32L4X_CLOCK_SUBSYS_GPIOC #endif #endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */ ); @@ -323,12 +311,8 @@ GPIO_DEVICE_INIT("GPIOD", d, GPIOD_BASE, STM32_PORTD, #ifdef CONFIG_SOC_SERIES_STM32F1X STM32F10X_CLOCK_SUBSYS_IOPD | STM32F10X_CLOCK_SUBSYS_AFIO -#elif CONFIG_SOC_SERIES_STM32F3X - STM32F3X_CLOCK_SUBSYS_IOPD #elif CONFIG_SOC_SERIES_STM32F4X STM32F4X_CLOCK_ENABLE_GPIOD -#elif CONFIG_SOC_SERIES_STM32L4X - STM32L4X_CLOCK_SUBSYS_GPIOD #endif #endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */ ); @@ -342,12 +326,8 @@ GPIO_DEVICE_INIT("GPIOE", e, GPIOE_BASE, STM32_PORTE, #ifdef CONFIG_SOC_SERIES_STM32F1X STM32F10X_CLOCK_SUBSYS_IOPE | STM32F10X_CLOCK_SUBSYS_AFIO -#elif CONFIG_SOC_SERIES_STM32F3X - STM32F3X_CLOCK_SUBSYS_IOPE #elif CONFIG_SOC_SERIES_STM32F4X STM32F4X_CLOCK_ENABLE_GPIOE -#elif CONFIG_SOC_SERIES_STM32L4X - STM32L4X_CLOCK_SUBSYS_GPIOE #endif #endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */ ); @@ -355,42 +335,15 @@ GPIO_DEVICE_INIT("GPIOE", e, GPIOE_BASE, STM32_PORTE, #ifdef CONFIG_GPIO_STM32_PORTF GPIO_DEVICE_INIT("GPIOF", f, GPIOF_BASE, STM32_PORTF, -#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE - STM32_PERIPH_GPIOF, STM32_CLOCK_BUS_GPIO -#else -#ifdef CONFIG_SOC_SERIES_STM32F3X - STM32F3X_CLOCK_SUBSYS_IOPF -#elif CONFIG_SOC_SERIES_STM32L4X - STM32L4X_CLOCK_SUBSYS_GPIOF -#endif -#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */ - ); + STM32_PERIPH_GPIOF, STM32_CLOCK_BUS_GPIO); #endif /* CONFIG_GPIO_STM32_PORTF */ #ifdef CONFIG_GPIO_STM32_PORTG GPIO_DEVICE_INIT("GPIOG", g, GPIOG_BASE, STM32_PORTG, -#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE - STM32_PERIPH_GPIOG, STM32_CLOCK_BUS_GPIO -#else -#ifdef CONFIG_SOC_SERIES_STM32F3X - STM32F3X_CLOCK_SUBSYS_IOPG -#elif CONFIG_SOC_SERIES_STM32L4X - STM32L4X_CLOCK_SUBSYS_GPIOG -#endif -#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */ - ); + STM32_PERIPH_GPIOG, STM32_CLOCK_BUS_GPIO); #endif /* CONFIG_GPIO_STM32_PORTG */ #ifdef CONFIG_GPIO_STM32_PORTH GPIO_DEVICE_INIT("GPIOH", h, GPIOH_BASE, STM32_PORTH, -#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE - STM32_PERIPH_GPIOH, STM32_CLOCK_BUS_GPIO -#else -#ifdef CONFIG_SOC_SERIES_STM32F3X - STM32F3X_CLOCK_SUBSYS_IOPH -#elif CONFIG_SOC_SERIES_STM32L4X - STM32L4X_CLOCK_SUBSYS_GPIOH -#endif -#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */ - ); + STM32_PERIPH_GPIOH, STM32_CLOCK_BUS_GPIO); #endif /* CONFIG_GPIO_STM32_PORTH */ |