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authorRobert Marko <robimarko@gmail.com>2021-06-19 18:27:51 +0200
committerBjorn Andersson <bjorn.andersson@linaro.org>2021-06-21 11:21:11 -0500
commitabe66bb7a2f6e308f2fb059d60b1076df84306ad (patch)
tree9ab3e2e06f63b8ab645327e3156398104b74c6c0
parent77b7cfd0dc6842d7babe8def776e92b135db7faf (diff)
arm64: dts: ipq8074: Add QUP6 I2C nodeqcom-arm64-for-5.14-1
Add node to support the QUP6 I2C controller inside of IPQ8074. It is exactly the same as QUP2 and QUP3 controllers. Some routers like Xiaomi AX9000 and Netgear RBK850 use this bus. Signed-off-by: Robert Marko <robimarko@gmail.com> Link: https://lore.kernel.org/r/20210619162751.2336974-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
-rw-r--r--arch/arm64/boot/dts/qcom/ipq8074.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 7542d1eee62c..95d6cb8cd4c0 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -373,6 +373,21 @@
status = "disabled";
};
+ blsp1_i2c6: i2c@78ba000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x078ba000 0x600>;
+ interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+ <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ clock-frequency = <100000>;
+ dmas = <&blsp_dma 23>, <&blsp_dma 22>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
qpic_bam: dma-controller@7984000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x07984000 0x1a000>;