Merge tag 'gpio-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.12 kernel cycle.

  Core changes:

   - Return NULL from gpiod_get_optional() when GPIOLIB is disabled.
     This was a much discussed change. It affects use cases where people
     write drivers that might or might not be using GPIO resources. I
     have decided that this is the lesser evil right now.

   - Make gpiod_count() behave consistently across different hardware
     descriptions.

   - Fix the syntax around open drain/open source to not infer active
     high/low semantics.

  New drivers:

   - A new single-register fixed-direction framework driver for hardware
     that have lines controlled by a single register that just work in
     one direction (out or in), including IRQ support.

   - Support the Fintek F71889A GPIO SuperIO controller.

   - Support the National NI 169445 MMIO GPIO.

   - Support for the X-Gene derivative of the DWC GPIO controller

   - Support for the Rohm BD9571MWV-M PMIC GPIO controller.

   - Refactor the Gemini GPIO driver to a generic Faraday FTGPIO driver
     and replace both the Gemini and the Moxa ART custom drivers with
     this driver.

  Driver improvements:

   - A whole slew of drivers have their spinlocks chaned to raw
     spinlocks as they provide irqchips, and thus we are progressing on
     realtime compliance.

   - Use devm_irq_alloc_descs() in a slew of drivers, getting managed
     resources.

   - Support for the embedded PWM controller inside the MVEBU driver.

   - Debounce, open source and open drain support for the Aspeed driver.

   - Misc smaller fixes like spelling and syntax and whatnot"

* tag 'gpio-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (77 commits)
  gpio: f7188x: Add a missing break
  gpio: omap: return error if requested debounce time is not possible
  gpio: Add ROHM BD9571MWV-M PMIC GPIO driver
  gpio: gpio-wcove: fix GPIO IRQ status mask
  gpio: DT bindings, move tca9554 from pcf857x to pca953x
  gpio: move tca9554 from pcf857x to pca953x
  gpio: arizona: Correct check whether the pin is an input
  gpio: Add XRA1403 DTS binding documentation
  dt-bindings: add exar to vendor prefixes list
  gpio: gpio-wcove: fix irq pending status bit width
  gpio: dwapb: use dwapb_read instead of readl_relaxed
  gpio: aspeed: Add open-source and open-drain support
  gpio: aspeed: Add debounce support
  gpio: aspeed: dt: Add optional clocks property
  gpio: aspeed: dt: Fix description alignment in bindings document
  gpio: mvebu: Add limited PWM support
  gpio: Use unsigned int for interrupt numbers
  gpio: f7188x: Add F71889A GPIO support.
  gpio: core: Decouple open drain/source flag with active low/high
  gpio: arizona: Correct handling for reading input GPIOs
  ...

1 files changed, 14 insertions, 14 deletions

diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index 0a6bfd2b06e5..3d3d6b6645a7 100644
--- a/drivers/gpio/gpio-pl061.c
+++ b/drivers/gpio/gpio-pl061.c
@@ -50,7 +50,7 @@ struct pl061_context_save_regs {
 #endif
 
 struct pl061 {
-	spinlock_t		lock;
+	raw_spinlock_t		lock;
 
 	void __iomem		*base;
 	struct gpio_chip	gc;
@@ -74,11 +74,11 @@ static int pl061_direction_input(struct gpio_chip *gc, unsigned offset)
 	unsigned long flags;
 	unsigned char gpiodir;
 
-	spin_lock_irqsave(&pl061->lock, flags);
+	raw_spin_lock_irqsave(&pl061->lock, flags);
 	gpiodir = readb(pl061->base + GPIODIR);
 	gpiodir &= ~(BIT(offset));
 	writeb(gpiodir, pl061->base + GPIODIR);
-	spin_unlock_irqrestore(&pl061->lock, flags);
+	raw_spin_unlock_irqrestore(&pl061->lock, flags);
 
 	return 0;
 }
@@ -90,7 +90,7 @@ static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,
 	unsigned long flags;
 	unsigned char gpiodir;
 
-	spin_lock_irqsave(&pl061->lock, flags);
+	raw_spin_lock_irqsave(&pl061->lock, flags);
 	writeb(!!value << offset, pl061->base + (BIT(offset + 2)));
 	gpiodir = readb(pl061->base + GPIODIR);
 	gpiodir |= BIT(offset);
@@ -101,7 +101,7 @@ static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,
 	 * a gpio pin before configuring it in OUT mode.
 	 */
 	writeb(!!value << offset, pl061->base + (BIT(offset + 2)));
-	spin_unlock_irqrestore(&pl061->lock, flags);
+	raw_spin_unlock_irqrestore(&pl061->lock, flags);
 
 	return 0;
 }
@@ -143,7 +143,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
 	}
 
 
-	spin_lock_irqsave(&pl061->lock, flags);
+	raw_spin_lock_irqsave(&pl061->lock, flags);
 
 	gpioiev = readb(pl061->base + GPIOIEV);
 	gpiois = readb(pl061->base + GPIOIS);
@@ -203,7 +203,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
 	writeb(gpioibe, pl061->base + GPIOIBE);
 	writeb(gpioiev, pl061->base + GPIOIEV);
 
-	spin_unlock_irqrestore(&pl061->lock, flags);
+	raw_spin_unlock_irqrestore(&pl061->lock, flags);
 
 	return 0;
 }
@@ -235,10 +235,10 @@ static void pl061_irq_mask(struct irq_data *d)
 	u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);
 	u8 gpioie;
 
-	spin_lock(&pl061->lock);
+	raw_spin_lock(&pl061->lock);
 	gpioie = readb(pl061->base + GPIOIE) & ~mask;
 	writeb(gpioie, pl061->base + GPIOIE);
-	spin_unlock(&pl061->lock);
+	raw_spin_unlock(&pl061->lock);
 }
 
 static void pl061_irq_unmask(struct irq_data *d)
@@ -248,10 +248,10 @@ static void pl061_irq_unmask(struct irq_data *d)
 	u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);
 	u8 gpioie;
 
-	spin_lock(&pl061->lock);
+	raw_spin_lock(&pl061->lock);
 	gpioie = readb(pl061->base + GPIOIE) | mask;
 	writeb(gpioie, pl061->base + GPIOIE);
-	spin_unlock(&pl061->lock);
+	raw_spin_unlock(&pl061->lock);
 }
 
 /**
@@ -268,9 +268,9 @@ static void pl061_irq_ack(struct irq_data *d)
 	struct pl061 *pl061 = gpiochip_get_data(gc);
 	u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);
 
-	spin_lock(&pl061->lock);
+	raw_spin_lock(&pl061->lock);
 	writeb(mask, pl061->base + GPIOIC);
-	spin_unlock(&pl061->lock);
+	raw_spin_unlock(&pl061->lock);
 }
 
 static int pl061_irq_set_wake(struct irq_data *d, unsigned int state)
@@ -304,7 +304,7 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
 	if (IS_ERR(pl061->base))
 		return PTR_ERR(pl061->base);
 
-	spin_lock_init(&pl061->lock);
+	raw_spin_lock_init(&pl061->lock);
 	if (of_property_read_bool(dev->of_node, "gpio-ranges")) {
 		pl061->gc.request = gpiochip_generic_request;
 		pl061->gc.free = gpiochip_generic_free;