diff options
Diffstat (limited to 'Documentation/devicetree/bindings/clock/exynos5433-clock.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 7c1dccc4d72e..ecb9534c2ea6 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -37,6 +37,8 @@ Required Properties: - "samsung,exynos5433-cmu-atlas" - clock controller compatible for CMU_ATLAS which generates clocks for Cortex-A57 Quad-core processor, CoreSight and L2 cache controller. + - "samsung,exynos5433-cmu-mscl" - clock controller compatible for CMU_MSCL + which generates clocks for M2M (Memory to Memory) scaler and JPEG IPs. - reg: physical base address of the controller and length of memory mapped region. @@ -118,6 +120,11 @@ Required Properties: - oscclk - sclk_bus_pll_atlas + Input clocks for mscl clock controller: + - oscclk + - sclk_jpeg_mscl + - aclk_mscl_400 + Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. @@ -320,6 +327,19 @@ Example 2: Examples of clock controller nodes are listed below. clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_ATLAS>; }; + cmu_mscl: clock-controller@105d0000 { + compatible = "samsung,exynos5433-cmu-mscl"; + reg = <0x105d0000 0x0b10>; + #clock-cells = <1>; + + clock-names = "oscclk", + "sclk_jpeg_mscl", + "aclk_mscl_400"; + clocks = <&xxti>, + <&cmu_top CLK_SCLK_JPEG_MSCL>, + <&cmu_top CLK_ACLK_MSCL_400>; + }; + Example 3: UART controller node that consumes the clock generated by the clock controller. |