diff options
Diffstat (limited to 'drivers/staging/ccree/cc_crypto_ctx.h')
| -rw-r--r-- | drivers/staging/ccree/cc_crypto_ctx.h | 107 |
1 files changed, 48 insertions, 59 deletions
diff --git a/drivers/staging/ccree/cc_crypto_ctx.h b/drivers/staging/ccree/cc_crypto_ctx.h index 9e10b2670313..ac39d349060d 100644 --- a/drivers/staging/ccree/cc_crypto_ctx.h +++ b/drivers/staging/ccree/cc_crypto_ctx.h @@ -1,15 +1,15 @@ /* * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, see <http://www.gnu.org/licenses/>. */ @@ -18,18 +18,7 @@ #ifndef _CC_CRYPTO_CTX_H_ #define _CC_CRYPTO_CTX_H_ -#ifdef __KERNEL__ #include <linux/types.h> -#define INT32_MAX 0x7FFFFFFFL -#else -#include <stdint.h> -#endif - - -#ifndef max -#define max(a, b) ((a) > (b) ? (a) : (b)) -#define min(a, b) ((a) < (b) ? (a) : (b)) -#endif /* context size */ #ifndef CC_CTX_SIZE_LOG2 @@ -65,13 +54,13 @@ #define CC_AES_KEY_SIZE_MAX CC_AES_256_BIT_KEY_SIZE #define CC_AES_KEY_SIZE_WORDS_MAX (CC_AES_KEY_SIZE_MAX >> 2) -#define CC_MD5_DIGEST_SIZE 16 -#define CC_SHA1_DIGEST_SIZE 20 -#define CC_SHA224_DIGEST_SIZE 28 -#define CC_SHA256_DIGEST_SIZE 32 +#define CC_MD5_DIGEST_SIZE 16 +#define CC_SHA1_DIGEST_SIZE 20 +#define CC_SHA224_DIGEST_SIZE 28 +#define CC_SHA256_DIGEST_SIZE 32 #define CC_SHA256_DIGEST_SIZE_IN_WORDS 8 -#define CC_SHA384_DIGEST_SIZE 48 -#define CC_SHA512_DIGEST_SIZE 64 +#define CC_SHA384_DIGEST_SIZE 48 +#define CC_SHA512_DIGEST_SIZE 64 #define CC_SHA1_BLOCK_SIZE 64 #define CC_SHA1_BLOCK_SIZE_IN_WORDS 16 @@ -94,9 +83,9 @@ #define CC_HMAC_BLOCK_SIZE_MAX CC_HASH_BLOCK_SIZE_MAX -#define CC_MULTI2_SYSTEM_KEY_SIZE 32 -#define CC_MULTI2_DATA_KEY_SIZE 8 -#define CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE (CC_MULTI2_SYSTEM_KEY_SIZE + CC_MULTI2_DATA_KEY_SIZE) +#define CC_MULTI2_SYSTEM_KEY_SIZE 32 +#define CC_MULTI2_DATA_KEY_SIZE 8 +#define CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE (CC_MULTI2_SYSTEM_KEY_SIZE + CC_MULTI2_DATA_KEY_SIZE) #define CC_MULTI2_BLOCK_SIZE 8 #define CC_MULTI2_IV_SIZE 8 #define CC_MULTI2_MIN_NUM_ROUNDS 8 @@ -113,7 +102,7 @@ enum drv_engine_type { DRV_ENGINE_HASH = 3, DRV_ENGINE_RC4 = 4, DRV_ENGINE_DOUT = 5, - DRV_ENGINE_RESERVE32B = INT32_MAX, + DRV_ENGINE_RESERVE32B = S32_MAX, }; enum drv_crypto_alg { @@ -126,7 +115,7 @@ enum drv_crypto_alg { DRV_CRYPTO_ALG_AEAD = 5, DRV_CRYPTO_ALG_BYPASS = 6, DRV_CRYPTO_ALG_NUM = 7, - DRV_CRYPTO_ALG_RESERVE32B = INT32_MAX + DRV_CRYPTO_ALG_RESERVE32B = S32_MAX }; enum drv_crypto_direction { @@ -134,7 +123,7 @@ enum drv_crypto_direction { DRV_CRYPTO_DIRECTION_ENCRYPT = 0, DRV_CRYPTO_DIRECTION_DECRYPT = 1, DRV_CRYPTO_DIRECTION_DECRYPT_ENCRYPT = 3, - DRV_CRYPTO_DIRECTION_RESERVE32B = INT32_MAX + DRV_CRYPTO_DIRECTION_RESERVE32B = S32_MAX }; enum drv_cipher_mode { @@ -152,7 +141,7 @@ enum drv_cipher_mode { DRV_CIPHER_GCTR = 12, DRV_CIPHER_ESSIV = 13, DRV_CIPHER_BITLOCKER = 14, - DRV_CIPHER_RESERVE32B = INT32_MAX + DRV_CIPHER_RESERVE32B = S32_MAX }; enum drv_hash_mode { @@ -163,11 +152,11 @@ enum drv_hash_mode { DRV_HASH_SHA512 = 3, DRV_HASH_SHA384 = 4, DRV_HASH_MD5 = 5, - DRV_HASH_CBC_MAC = 6, + DRV_HASH_CBC_MAC = 6, DRV_HASH_XCBC_MAC = 7, DRV_HASH_CMAC = 8, DRV_HASH_MODE_NUM = 9, - DRV_HASH_RESERVE32B = INT32_MAX + DRV_HASH_RESERVE32B = S32_MAX }; enum drv_hash_hw_mode { @@ -178,7 +167,7 @@ enum drv_hash_hw_mode { DRV_HASH_HW_SHA512 = 4, DRV_HASH_HW_SHA384 = 12, DRV_HASH_HW_GHASH = 6, - DRV_HASH_HW_RESERVE32B = INT32_MAX + DRV_HASH_HW_RESERVE32B = S32_MAX }; enum drv_multi2_mode { @@ -186,7 +175,7 @@ enum drv_multi2_mode { DRV_MULTI2_ECB = 0, DRV_MULTI2_CBC = 1, DRV_MULTI2_OFB = 2, - DRV_MULTI2_RESERVE32B = INT32_MAX + DRV_MULTI2_RESERVE32B = S32_MAX }; @@ -201,13 +190,13 @@ enum drv_crypto_key_type { DRV_APPLET_KEY = 4, /* NA */ DRV_PLATFORM_KEY = 5, /* 0x101 */ DRV_CUSTOMER_KEY = 6, /* 0x110 */ - DRV_END_OF_KEYS = INT32_MAX, + DRV_END_OF_KEYS = S32_MAX, }; enum drv_crypto_padding_type { DRV_PADDING_NONE = 0, DRV_PADDING_PKCS7 = 1, - DRV_PADDING_RESERVE32B = INT32_MAX + DRV_PADDING_RESERVE32B = S32_MAX }; /*******************************************************************/ @@ -223,9 +212,9 @@ struct drv_ctx_generic { struct drv_ctx_hash { enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HASH */ enum drv_hash_mode mode; - uint8_t digest[CC_DIGEST_SIZE_MAX]; + u8 digest[CC_DIGEST_SIZE_MAX]; /* reserve to end of allocated context size */ - uint8_t reserved[CC_CTX_SIZE - 2 * sizeof(uint32_t) - + u8 reserved[CC_CTX_SIZE - 2 * sizeof(u32) - CC_DIGEST_SIZE_MAX]; }; @@ -234,11 +223,11 @@ struct drv_ctx_hash { struct drv_ctx_hmac { enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HMAC */ enum drv_hash_mode mode; - uint8_t digest[CC_DIGEST_SIZE_MAX]; - uint32_t k0[CC_HMAC_BLOCK_SIZE_MAX/sizeof(uint32_t)]; - uint32_t k0_size; + u8 digest[CC_DIGEST_SIZE_MAX]; + u32 k0[CC_HMAC_BLOCK_SIZE_MAX/sizeof(u32)]; + u32 k0_size; /* reserve to end of allocated context size */ - uint8_t reserved[CC_CTX_SIZE - 3 * sizeof(uint32_t) - + u8 reserved[CC_CTX_SIZE - 3 * sizeof(u32) - CC_DIGEST_SIZE_MAX - CC_HMAC_BLOCK_SIZE_MAX]; }; @@ -248,19 +237,19 @@ struct drv_ctx_cipher { enum drv_crypto_direction direction; enum drv_crypto_key_type crypto_key_type; enum drv_crypto_padding_type padding_type; - uint32_t key_size; /* numeric value in bytes */ - uint32_t data_unit_size; /* required for XTS */ + u32 key_size; /* numeric value in bytes */ + u32 data_unit_size; /* required for XTS */ /* block_state is the AES engine block state. * It is used by the host to pass IV or counter at initialization. * It is used by SeP for intermediate block chaining state and for * returning MAC algorithms results. */ - uint8_t block_state[CC_AES_BLOCK_SIZE]; - uint8_t key[CC_AES_KEY_SIZE_MAX]; - uint8_t xex_key[CC_AES_KEY_SIZE_MAX]; + u8 block_state[CC_AES_BLOCK_SIZE]; + u8 key[CC_AES_KEY_SIZE_MAX]; + u8 xex_key[CC_AES_KEY_SIZE_MAX]; /* reserve to end of allocated context size */ - uint32_t reserved[CC_DRV_CTX_SIZE_WORDS - 7 - - CC_AES_BLOCK_SIZE/sizeof(uint32_t) - 2 * - (CC_AES_KEY_SIZE_MAX/sizeof(uint32_t))]; + u32 reserved[CC_DRV_CTX_SIZE_WORDS - 7 - + CC_AES_BLOCK_SIZE/sizeof(u32) - 2 * + (CC_AES_KEY_SIZE_MAX/sizeof(u32))]; }; /* authentication and encryption with associated data class */ @@ -268,20 +257,20 @@ struct drv_ctx_aead { enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_AES */ enum drv_cipher_mode mode; enum drv_crypto_direction direction; - uint32_t key_size; /* numeric value in bytes */ - uint32_t nonce_size; /* nonce size (octets) */ - uint32_t header_size; /* finit additional data size (octets) */ - uint32_t text_size; /* finit text data size (octets) */ - uint32_t tag_size; /* mac size, element of {4, 6, 8, 10, 12, 14, 16} */ + u32 key_size; /* numeric value in bytes */ + u32 nonce_size; /* nonce size (octets) */ + u32 header_size; /* finit additional data size (octets) */ + u32 text_size; /* finit text data size (octets) */ + u32 tag_size; /* mac size, element of {4, 6, 8, 10, 12, 14, 16} */ /* block_state1/2 is the AES engine block state */ - uint8_t block_state[CC_AES_BLOCK_SIZE]; - uint8_t mac_state[CC_AES_BLOCK_SIZE]; /* MAC result */ - uint8_t nonce[CC_AES_BLOCK_SIZE]; /* nonce buffer */ - uint8_t key[CC_AES_KEY_SIZE_MAX]; + u8 block_state[CC_AES_BLOCK_SIZE]; + u8 mac_state[CC_AES_BLOCK_SIZE]; /* MAC result */ + u8 nonce[CC_AES_BLOCK_SIZE]; /* nonce buffer */ + u8 key[CC_AES_KEY_SIZE_MAX]; /* reserve to end of allocated context size */ - uint32_t reserved[CC_DRV_CTX_SIZE_WORDS - 8 - - 3 * (CC_AES_BLOCK_SIZE/sizeof(uint32_t)) - - CC_AES_KEY_SIZE_MAX/sizeof(uint32_t)]; + u32 reserved[CC_DRV_CTX_SIZE_WORDS - 8 - + 3 * (CC_AES_BLOCK_SIZE/sizeof(u32)) - + CC_AES_KEY_SIZE_MAX/sizeof(u32)]; }; /*******************************************************************/ |