From d39af90265feb40ec198c4ca8268724645b4b50e Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Mon, 11 Apr 2016 21:14:17 +0300 Subject: xtensa: add alternative kernel memory layouts MMUv3 is able to support low memory bigger than 128MB. Implement 256MB and 512MB KSEG layouts: - add Kconfig selector for KSEG layout; - add KSEG base address, size and alignment definitions to arch/xtensa/include/asm/kmem_layout.h; - use new definitions in TLB initialization; - add build time memory map consistency checks. See Documentation/xtensa/mmu.txt for the details of new memory layouts. Signed-off-by: Max Filippov --- Documentation/xtensa/mmu.txt | 124 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 124 insertions(+) (limited to 'Documentation/xtensa') diff --git a/Documentation/xtensa/mmu.txt b/Documentation/xtensa/mmu.txt index 0312fe66475c..867c0f837e28 100644 --- a/Documentation/xtensa/mmu.txt +++ b/Documentation/xtensa/mmu.txt @@ -62,3 +62,127 @@ limitations apply: 6. The IO area covers the entire 256MB segment of parent-bus-address; the "ranges" triplet length field is ignored + + +MMUv3 address space layouts. +============================ + +Default MMUv2-compatible layout. + + Symbol VADDR Size ++------------------+ +| Userspace | 0x00000000 TASK_SIZE ++------------------+ 0x40000000 ++------------------+ +| Page table | 0x80000000 ++------------------+ 0x80400000 ++------------------+ +| KMAP area | PKMAP_BASE PTRS_PER_PTE * +| | DCACHE_N_COLORS * +| | PAGE_SIZE +| | (4MB * DCACHE_N_COLORS) ++------------------+ +| Atomic KMAP area | FIXADDR_START KM_TYPE_NR * +| | NR_CPUS * +| | DCACHE_N_COLORS * +| | PAGE_SIZE ++------------------+ FIXADDR_TOP 0xbffff000 ++------------------+ +| VMALLOC area | VMALLOC_START 0xc0000000 128MB - 64KB ++------------------+ VMALLOC_END +| Cache aliasing | TLBTEMP_BASE_1 0xc7ff0000 DCACHE_WAY_SIZE +| remap area 1 | ++------------------+ +| Cache aliasing | TLBTEMP_BASE_2 DCACHE_WAY_SIZE +| remap area 2 | ++------------------+ ++------------------+ +| Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xd0000000 128MB ++------------------+ +| Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xd8000000 128MB ++------------------+ +| Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB ++------------------+ +| Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB ++------------------+ + + +256MB cached + 256MB uncached layout. + + Symbol VADDR Size ++------------------+ +| Userspace | 0x00000000 TASK_SIZE ++------------------+ 0x40000000 ++------------------+ +| Page table | 0x80000000 ++------------------+ 0x80400000 ++------------------+ +| KMAP area | PKMAP_BASE PTRS_PER_PTE * +| | DCACHE_N_COLORS * +| | PAGE_SIZE +| | (4MB * DCACHE_N_COLORS) ++------------------+ +| Atomic KMAP area | FIXADDR_START KM_TYPE_NR * +| | NR_CPUS * +| | DCACHE_N_COLORS * +| | PAGE_SIZE ++------------------+ FIXADDR_TOP 0x9ffff000 ++------------------+ +| VMALLOC area | VMALLOC_START 0xa0000000 128MB - 64KB ++------------------+ VMALLOC_END +| Cache aliasing | TLBTEMP_BASE_1 0xa7ff0000 DCACHE_WAY_SIZE +| remap area 1 | ++------------------+ +| Cache aliasing | TLBTEMP_BASE_2 DCACHE_WAY_SIZE +| remap area 2 | ++------------------+ ++------------------+ +| Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xb0000000 256MB ++------------------+ +| Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xc0000000 256MB ++------------------+ ++------------------+ +| Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB ++------------------+ +| Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB ++------------------+ + + +512MB cached + 512MB uncached layout. + + Symbol VADDR Size ++------------------+ +| Userspace | 0x00000000 TASK_SIZE ++------------------+ 0x40000000 ++------------------+ +| Page table | 0x80000000 ++------------------+ 0x80400000 ++------------------+ +| KMAP area | PKMAP_BASE PTRS_PER_PTE * +| | DCACHE_N_COLORS * +| | PAGE_SIZE +| | (4MB * DCACHE_N_COLORS) ++------------------+ +| Atomic KMAP area | FIXADDR_START KM_TYPE_NR * +| | NR_CPUS * +| | DCACHE_N_COLORS * +| | PAGE_SIZE ++------------------+ FIXADDR_TOP 0x8ffff000 ++------------------+ +| VMALLOC area | VMALLOC_START 0x90000000 128MB - 64KB ++------------------+ VMALLOC_END +| Cache aliasing | TLBTEMP_BASE_1 0x97ff0000 DCACHE_WAY_SIZE +| remap area 1 | ++------------------+ +| Cache aliasing | TLBTEMP_BASE_2 DCACHE_WAY_SIZE +| remap area 2 | ++------------------+ ++------------------+ +| Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xa0000000 512MB ++------------------+ +| Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xc0000000 512MB ++------------------+ +| Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB ++------------------+ +| Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB ++------------------+ -- cgit v1.2.3