diff options
| author | Philippe Langlais <philippe.langlais@linaro.org> | 2011-03-28 11:08:15 +0200 |
|---|---|---|
| committer | Philippe Langlais <philippe.langlais@linaro.org> | 2012-03-19 08:49:54 +0100 |
| commit | eb8f27728513ff9ad6c213a54e216c445b05ca02 (patch) | |
| tree | 50e6ae6b7051f50fb05bac68382f7b96259ec568 /arch/arm/mm/proc-v7.S | |
| parent | 9423083982e0f586f88414651b97ca95c9709e9f (diff) | |
Add clean and flush_dcache_all to ARM cache API
This patch adds functions to flush and clean the entire data cache.
Since the existing flush/clean range functions take more time to
flush/clean the entire data cache, they cannot be used.
Whenever the range of data to be flushed/cleaned from the data cache
is more than some threshold value, it is better to do the entire data
flush/clean, this will reduce the time taken and effectively
increases the performance of the system.
ST-Ericsson ID: IR275682 ER275397
Change-Id: I8d7e6004232301cc2c9922738fa728cdc833cfde
Signed-off-by: Johan Mossberg <johan.xx.mossberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/7161
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
Reviewed-by: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
Conflicts:
arch/arm/mm/cache-v7.S
Diffstat (limited to 'arch/arm/mm/proc-v7.S')
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index f1c8486f7501..a6ba8ccbf520 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -172,7 +172,7 @@ __v7_ca15mp_setup: __v7_setup: adr r12, __v7_setup_stack @ the local stack stmia r12, {r0-r5, r7, r9, r11, lr} - bl v7_flush_dcache_all + bl __v7_flush_dcache_all ldmia r12, {r0-r5, r7, r9, r11, lr} mrc p15, 0, r0, c0, c0, 0 @ read main ID register |