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-rw-r--r--gcc/config/pa/pa.c60
1 files changed, 30 insertions, 30 deletions
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 715700e2d1dc..411ea9cbb0d8 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -118,7 +118,8 @@ static void set_reg_plus_d (int, int, HOST_WIDE_INT, int);
static rtx pa_function_value (const_tree, const_tree, bool);
static rtx pa_libcall_value (machine_mode, const_rtx);
static bool pa_function_value_regno_p (const unsigned int);
-static void pa_output_function_prologue (FILE *);
+static void pa_output_function_prologue (FILE *) ATTRIBUTE_UNUSED;
+static void pa_linux_output_function_prologue (FILE *) ATTRIBUTE_UNUSED;
static void update_total_code_bytes (unsigned int);
static void pa_output_function_epilogue (FILE *);
static int pa_adjust_cost (rtx_insn *, int, rtx_insn *, int, unsigned int);
@@ -263,8 +264,6 @@ static size_t n_deferred_plabels = 0;
#undef TARGET_ASM_INTEGER
#define TARGET_ASM_INTEGER pa_assemble_integer
-#undef TARGET_ASM_FUNCTION_PROLOGUE
-#define TARGET_ASM_FUNCTION_PROLOGUE pa_output_function_prologue
#undef TARGET_ASM_FUNCTION_EPILOGUE
#define TARGET_ASM_FUNCTION_EPILOGUE pa_output_function_epilogue
@@ -3842,16 +3841,10 @@ pa_compute_frame_size (poly_int64 size, int *fregs_live)
& ~(PREFERRED_STACK_BOUNDARY / BITS_PER_UNIT - 1));
}
-/* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
- of memory. If any fpu reg is used in the function, we allocate
- such a block here, at the bottom of the frame, just in case it's needed.
+/* Output function label, and associated .PROC and .CALLINFO statements. */
- If this function is a leaf procedure, then we may choose not
- to do a "save" insn. The decision about whether or not
- to do this is made in regclass.c. */
-
-static void
-pa_output_function_prologue (FILE *file)
+void
+pa_output_function_label (FILE *file)
{
/* The function's label and associated .PROC must never be
separated and must be output *after* any profiling declarations
@@ -3897,7 +3890,22 @@ pa_output_function_prologue (FILE *file)
fprintf (file, ",ENTRY_FR=%d", fr_saved + 11);
fputs ("\n\t.ENTRY\n", file);
+}
+/* Output function prologue. */
+
+static void
+pa_output_function_prologue (FILE *file)
+{
+ pa_output_function_label (file);
+ remove_useless_addtr_insns (0);
+}
+
+/* The label is output by ASM_DECLARE_FUNCTION_NAME on linux. */
+
+static void
+pa_linux_output_function_prologue (FILE *file ATTRIBUTE_UNUSED)
+{
remove_useless_addtr_insns (0);
}
@@ -4569,10 +4577,6 @@ output_deferred_profile_counters (void)
void
hppa_profile_hook (int label_no)
{
- /* We use SImode for the address of the function in both 32 and
- 64-bit code to avoid having to provide DImode versions of the
- lcla2 and load_offset_label_address insn patterns. */
- rtx reg = gen_reg_rtx (SImode);
rtx_code_label *label_rtx = gen_label_rtx ();
int reg_parm_stack_space = REG_PARM_STACK_SPACE (NULL_TREE);
rtx arg_bytes, begin_label_rtx, mcount, sym;
@@ -4604,18 +4608,13 @@ hppa_profile_hook (int label_no)
if (!use_mcount_pcrel_call)
{
/* The address of the function is loaded into %r25 with an instruction-
- relative sequence that avoids the use of relocations. The sequence
- is split so that the load_offset_label_address instruction can
- occupy the delay slot of the call to _mcount. */
+ relative sequence that avoids the use of relocations. We use SImode
+ for the address of the function in both 32 and 64-bit code to avoid
+ having to provide DImode versions of the lcla2 pattern. */
if (TARGET_PA_20)
- emit_insn (gen_lcla2 (reg, label_rtx));
+ emit_insn (gen_lcla2 (gen_rtx_REG (SImode, 25), label_rtx));
else
- emit_insn (gen_lcla1 (reg, label_rtx));
-
- emit_insn (gen_load_offset_label_address (gen_rtx_REG (SImode, 25),
- reg,
- begin_label_rtx,
- label_rtx));
+ emit_insn (gen_lcla1 (gen_rtx_REG (SImode, 25), label_rtx));
}
if (!NO_DEFERRED_PROFILE_COUNTERS)
@@ -10039,10 +10038,11 @@ pa_can_change_mode_class (machine_mode from, machine_mode to,
/* There is no way to load QImode or HImode values directly from memory
to a FP register. SImode loads to the FP registers are not zero
extended. On the 64-bit target, this conflicts with the definition
- of LOAD_EXTEND_OP. Thus, we can't allow changing between modes with
- different sizes in the floating-point registers. */
+ of LOAD_EXTEND_OP. Thus, we reject all mode changes in the FP registers
+ except for DImode to SImode on the 64-bit target. It is handled by
+ register renaming in pa_print_operand. */
if (MAYBE_FP_REG_CLASS_P (rclass))
- return false;
+ return TARGET_64BIT && from == DImode && to == SImode;
/* TARGET_HARD_REGNO_MODE_OK places modes with sizes larger than a word
in specific sets of registers. Thus, we cannot allow changing
@@ -10234,7 +10234,7 @@ pa_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
}
#ifdef HAVE_ENABLE_EXECUTE_STACK
-  emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"),
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"),
LCT_NORMAL, VOIDmode, XEXP (m_tramp, 0), Pmode);
#endif
}