diff options
| author | Christoffer Dall <cdall@cs.columbia.edu> | 2011-04-07 03:21:48 +0200 |
|---|---|---|
| committer | Christoffer Dall <cdall@cs.columbia.edu> | 2011-04-07 03:21:48 +0200 |
| commit | 824cce012a9d8d9bf4a4a32b4d01284d175e3499 (patch) | |
| tree | ed65d27930929c7baf8752bdc58b8144adf0516b | |
| parent | fc5362f4bc94a7693579635be0cf2ab8d697630a (diff) | |
First shot at SMC hypervisor API
SMC API is this:
- r7: monitor call number
- r0-r3: arguments
- r0-r1: return value
- r4-r11: preserved
SMC Permissions:
- All calls except switching to non-secure mode, requires VTTBR.VMID == 0,
otherwise the calls are essentially no-ops.
SMC API numbers are this:
- 0xffffffff: Switch to non-secure mode, SCR is: 0x31
(controlled by hypervisor to let SMC pass through hyp mode)
- 0xfffffff0: Read HTTBR (same order as mrrc r0,r1)
- 0xfffffff1: Write HTTBR (same order as mcrr r0,r1)
- 0xfffffff2: Read HTCR
- 0xfffffff3: Write HTCR
- 0xfffffff4: Read HMAIR0
- 0xfffffff5: Write HMAIR0
- 0xfffffff6: Read HMAIR1
- 0xfffffff7: Write HMAIR1
- 0xfffffff8: Read HSCTLR
- 0xfffffff9: Write HSCTLR
| -rw-r--r-- | boot.S | 5 | ||||
| -rw-r--r-- | monitor.S | 89 |
2 files changed, 94 insertions, 0 deletions
@@ -50,6 +50,11 @@ _start: 2: mov r0, #0xf0000000 mcr p15, 0, r0, c12, c0, 1 @ Monitor vector base address + mov r7, #0xffffffff + smc #0 @ Change to NS-mode + + @TEST + mov r7, #0xfffffff0 smc #0 @ Change to NS-mode @ @@ -24,8 +24,97 @@ @ Secure Monitor Call @ 1: + cmp r7, #0xffffffff + beq _non_sec + + @ Check smc number and VMID + bic r12, r7, #0xf + cmp r12, #0xfffffff0 + movnes pc, lr + and r12, r7, #0xf + cmp r12, #0x9 + movgts pc, lr + + @ Check the VMID is 0 + mrrc p15, 6, r12, r13, c2 + lsr r13, r13, #16 + and r13, r13, #0xff + cmp r13, #0 + movnes pc, lr + + @ Jump to the right function + and r12, r7, #0xf + adr r13, _hyp_funcs + add r13, r13, r12, lsl #2 + ldr pc, [r13] + + @ + @ Jump table for the SMC hypervisor API calls + @ +_hyp_funcs: + .long _read_httbr + .long _write_httbr + .long _read_htcr + .long _write_htcr + .long _read_hmair0 + .long _write_hmair0 + .long _read_hmair1 + .long _write_hmair1 + .long _read_hsctlr + .long _write_hsctlr + + @ + @ Switch to non-secure mode + @ +_non_sec: mrc p15, 0, r0, c1, c1, 0 @ Secure configuration register bic r0, r0, #0x7f orr r0, r0, #0x31 mcr p15, 0, r0, c1, c1, 0 movs pc, lr + + @ + @ Read/Write HTTBR + @ +_read_httbr: + mrrc p15, 4, r0, r1, c2 + movs pc, lr +_write_httbr: + mcrr p15, 4, r0, r1, c2 + movs pc, lr + + @ + @ Read/Write HTCR + @ +_read_htcr: + mrc p15, 4, r0, c2, c0, 2 + movs pc, lr +_write_htcr: + mcr p15, 4, r0, c2, c0, 2 + movs pc, lr + + @ + @ Read/Write HMAIR0/1 + @ +_read_hmair0: + mrc p15, 4, r0, c10, c2, 0 + movs pc, lr +_write_hmair0: + mcr p15, 4, r0, c10, c2, 0 + movs pc, lr +_read_hmair1: + mrc p15, 4, r0, c10, c2, 1 + movs pc, lr +_write_hmair1: + mcr p15, 4, r0, c10, c2, 1 + movs pc, lr + + @ + @ Read/Write HSCTLR + @ +_read_hsctlr: + mrc p15, 4, r0, c1, c0, 0 + movs pc, lr +_write_hsctlr: + mcr p15, 4, r0, c1, c0, 0 + movs pc, lr |