From 0918dcafc2291b67ab7bfa32b05cde28183be866 Mon Sep 17 00:00:00 2001
From: Peter Maydell <peter.maydell@linaro.org>
Date: Tue, 15 Feb 2011 14:05:45 +0000
Subject: Add patterns for Neon shifts, zip and unzip.

---
 arm.risu | 62 +++++++++++++++++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 55 insertions(+), 7 deletions(-)

(limited to 'arm.risu')

diff --git a/arm.risu b/arm.risu
index b60a670..7abcc0c 100644
--- a/arm.risu
+++ b/arm.risu
@@ -202,21 +202,69 @@ VSRI_a A1 1111 0011 1 d imm:6 vd:4 0100 l 0 m 1 vm:4 { ($l == 1) || (($imm & 0xc
 # Q=1
 VSRI_b A1 1111 0011 1 d imm:6 vd:3 0 0100 l 1 m 1 vm:3 0 { ($l == 1) || (($imm & 0xca) != 0); }
 
-# VSHRN, VQSHRN
+# Various shifts
 
-# VQSHRN, VQSHRUN
-#VQSHRN A1 1111 001 u 1 d imm:6 vd:4 100 op 0 0 m 1 vm:4 { (($imm & 0xc8) != 0); }
+# Q=0
+VQRSHL_a A1 1111 001 u 0 d sz:2 vn:4 vd:4 0101 n 0 m 1 vm:4
+# Q=1
+VQRSHL_b A1 1111 001 u 0 d sz:2 vn:3 0 vd:3 0 0101 n 1 m 1 vm:3 0
+
+# VQRSHRN, VQRSHRUN, VRSHRN (VRSHRN is the U=0 op=0 case)
+VQRSHRN A1 1111 001 u 1 d imm:6 vd:4 100 op 0 1 m 1 vm:3 0 { (($imm & 0xc8) != 0); }
+
+# Q=0
+VQSHL_a A1 1111 001 u 0 d sz:2 vn:4 vd:4 0100 n 0 m 1 vm:4
+# Q=1
+VQSHL_b A1 1111 001 u 0 d sz:2 vn:3 0 vd:3 0 0100 n 1 m 1 vm:3 0
+
+# VQSHRN, VQSHRUN, VSHRN (VSHRN is the U=0 op=0 case)
+VQSHRN A1 1111 001 u 1 d imm:6 vd:4 100 op 0 0 m 1 vm:3 0 { (($imm & 0xc8) != 0); }
 
-# VQRSHRN, VQRSHRUN
-#VQRSHRN A1 1111 001 u 1 d imm:6 vd:4 100 op 0 1 m 1 vm:4
+# q=0
+VRSHL_a A1 1111 001 u 0 d sz:2 vn:4 vd:4 0101 n 0 m 0 vm:4
+# q=1
+VRSHL_b A1 1111 001 u 0 d sz:2 vn:3 0 vd:3 0 0101 n 1 m 0 vm:3 0
 
-# VSHRN -- this is the U=0 op=0 case from VQSHRN/VQSHRUN
-#VSHRN A1 1111 0010 1 d imm:6 vd:4 1000 00 m 1 vm:3 0 { (($imm & 0xc8) != 0); }
+# VRSHR; q=0
+VRSHR_a A1 1111 001 u 1 d imm:6 vd:4 0010 l 0 m 1 vm:4 { ($l == 1) || (($imm & 0xca) != 0); }
+# q=1
+VRSHR_b A1 1111 001 u 1 d imm:6 vd:3 0 0010 l 1 m 1 vm:3 0 { ($l == 1) || (($imm & 0xca) != 0); }
+
+# VRSRA; q=0
+VRSRA_a A1 1111 001 u 1 d imm:6 vd:4 0011 l 0 m 1 vm:4 { ($l == 1) || (($imm & 0xca) != 0); }
+# q=1
+VRSRA_b A1 1111 001 u 1 d imm:6 vd:3 0 0011 l 1 m 1 vm:3 0 { ($l == 1) || (($imm & 0xca) != 0); }
+
+# VSHL (imm); q = 0
+VSHL_a A1 1111 0010 1 d imm:6 vd:4 0101 l 0 m 1 vm:4 { ($l == 1) || (($imm & 0xca) != 0); }
+# q=1
+VSHL_b A1 1111 0010 1 d imm:6 vd:3 0 0101 l 1 m 1 vm:3 0 { ($l == 1) || (($imm & 0xca) != 0); }
+
+# VSHL (reg): q=0
+VSHL_c A1 1111 001 u 0 d sz:2 vn:4 vd:4 0100 n 0 m 0 vm:4
+# q=1
+VSHL_d A1 1111 001 u 0 d sz:2 vn:3 0 vd:3 0 0100 n 1 m 0 vm:3 0
 
 # This includes VMOVL (when shift is 0)
 VSHLL A1 1111 001 u 1 d imm:6 vd:3 0 1010 0 0 m 1 vm:4 { (($imm & 0xc8) != 0); }
 VSHLL A2 1111 0011 1 d 11 sz:2 10 vd:3 0 0011 00 m 0 vm:4 { ($sz != 3); }
 
+# VSHR (q=0)
+VSHR_a A1 1111 001 u 1 d imm:6 vd:4 0000 l 0 m 1 vm:4  { ($l == 1) || (($imm & 0xca) != 0); }
+# q=1
+VSHR_b A1 1111 001 u 1 d imm:6 vd:3 0 0000 l 1 m 1 vm:3 0  { ($l == 1) || (($imm & 0xca) != 0); }
+
 # VQMOVN, VQMOVUN
 # includes VMOVN when op=00
 VQMOVN A1 1111 0011 1 d 11 sz:2 10 vd:4 0010 op:2 m 0 vm:3 0 { ($sz != 3); }
+
+# VUZP : Q=0 case (sz 11 or 10 undefs; d == m is UNKNOWN results)
+VUZP_a A1 1111 0011 1 d 11 0 sz 10 vd:4 0001 0 0 m 0 vm:4 { ($d != $m) || ($vd != $vm); }
+# Q=1 case (sz 11, vd<0> or vm<0> 1 undefs; d == m is UNKNOWN results)
+VUZP_b A1 1111 0011 1 d 11 sz:2 10 vd:3 0 0001 0 1 m 0 vm:3 0 { ($sz != 3) && (($d != $m) || ($vd != $vm)); }
+
+# VZIP : Q=0 case (sz 11 or 10 undefs; d == m is UNKNOWN results)
+VZIP_a A1 1111 0011 1 d 11 0 sz 10 vd:4 0001 1 0 m 0 vm:4 { ($d != $m) || ($vd != $vm); }
+# Q=1 case (sz 11, vd<0> or vm<0> 1 undefs; d == m is UNKNOWN results)
+VZIP_b A1 1111 0011 1 d 11 sz:2 10 vd:3 0 0001 1 1 m 0 vm:3 0 { ($sz != 3) && (($d != $m) || ($vd != $vm)); }
+
-- 
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