Summary:kernel: modify for LT9611 HDMI,4K

[IssueID]: redmineID87303
[Module]: kernel

Change-Id: Ie32c93c42f8b04e15e7f1b6990e6f62cf7a3bf47

9 files changed, 254 insertions, 40 deletions

diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-lt9611-4k-video.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-lt9611-4k-video.dtsi
new file mode 100644
index 0000000000000..801f3f53d019b
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/dsi-panel-lt9611-4k-video.dtsi
@@ -0,0 +1,67 @@
+/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+&mdss_mdp {
+	dsi_lt9611_4k_video: qcom,mdss_dsi_lt9611_4k_video {
+		qcom,mdss-dsi-panel-name = "lt9611 4k video mode dsi panel";
+		qcom,mdss-dsi-panel-type = "dsi_video_mode";
+		qcom,mdss-dsi-color-order = "rgb_swap_rgb";
+		qcom,mdss-dsi-lane-map = "lane_map_0123";
+		qcom,mdss-dsi-virtual-channel-id = <0>;
+		qcom,mdss-dsi-stream = <0>;
+		qcom,mdss-dsi-bpp = <24>;
+		qcom,mdss-dsi-underflow-color = <0xff>;
+		qcom,mdss-dsi-border-color = <0>;
+		qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
+		qcom,mdss-dsi-bllp-eof-power-mode;
+		qcom,mdss-dsi-bllp-power-mode;
+		qcom,mdss-dsi-lane-0-state;
+		qcom,mdss-dsi-lane-1-state;
+		qcom,mdss-dsi-lane-2-state;
+		qcom,mdss-dsi-lane-3-state;
+		qcom,mdss-dsi-dma-trigger = "trigger_sw";
+		qcom,mdss-dsi-mdp-trigger = "none";
+		qcom,mdss-dsi-reset-sequence = <1 20>, <0 2>, <1 20>;
+		qcom,mdss-dsi-post-init-delay = <1>;
+		qcom,mdss-dsi-force-clock-lane-hs;
+		qcom,mdss-pan-physical-width-dimension = <208>;
+		qcom,mdss-pan-physical-height-dimension = <117>;
+		qcom,mdss-dsi-display-timings {
+			timing@0{
+				qcom,mdss-dsi-panel-framerate = <30>;
+				qcom,mdss-dsi-panel-width = <1920>;
+				qcom,mdss-dsi-panel-height = <2160>;
+				qcom,mdss-dsi-h-front-porch = <88>;
+				qcom,mdss-dsi-h-back-porch = <148>;
+				qcom,mdss-dsi-h-pulse-width = <44>;
+				qcom,mdss-dsi-h-sync-skew = <0>;
+				qcom,mdss-dsi-v-back-porch = <72>;
+				qcom,mdss-dsi-v-front-porch = <8>;
+				qcom,mdss-dsi-v-pulse-width = <10>;
+				qcom,mdss-dsi-h-left-border = <0>;
+				qcom,mdss-dsi-h-right-border = <0>;
+				qcom,mdss-dsi-v-top-border = <0>;
+				qcom,mdss-dsi-v-bottom-border = <0>;
+				qcom,mdss-dsi-on-command = [
+					05 01 00 00 78 00 02 11 00
+					05 01 00 00 78 00 02 29 00];
+				qcom,mdss-dsi-off-command = [
+					05 01 00 00 78 00 02 28 00
+					05 01 00 00 78 00 02 10 00];
+
+				qcom,mdss-dsi-on-command-state = "dsi_hs_mode";
+				qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
+				qcom,mdss-dsi-h-sync-pulse = <0>;
+			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dtsi b/arch/arm64/boot/dts/qcom/sdm845-mtp.dtsi
index a6f8212426c5e..db522acb107b0 100755
--- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dtsi
@@ -201,6 +201,17 @@
 	
 };
 
+&dsi_lt9611_4k_video {
+	qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>;
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-bl-min-level = <1>;
+	qcom,mdss-dsi-bl-max-level = <255>;
+	//qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
+	//qcom,panel-mode-gpio = <&tlmm 52 0>;
+	qcom,platform-reset-gpio = <&tlmm 88 0>;
+
+};
+
 &dsi_sim_vid {
 	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
diff --git a/arch/arm64/boot/dts/qcom/sdm845-sde-display.dtsi b/arch/arm64/boot/dts/qcom/sdm845-sde-display.dtsi
index 4af5f3c5fe5c0..c7fb312a02538 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-sde-display.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-sde-display.dtsi
@@ -32,6 +32,7 @@
 #include "dsi-panel-lt8912-1080p-video.dtsi"
 #include "dsi-panel-lt8912-dualmipi-1080p-video.dtsi"
 #include "dsi-panel-lt9611-1080p-video.dtsi"
+#include "dsi-panel-lt9611-4k-video.dtsi"
 #include <dt-bindings/clock/mdss-10nm-pll-clk.h>
 
 &soc {
@@ -585,6 +586,26 @@
 		vddio-supply = <&pm8998_l14>;
 	};
 
+	dsi_lt9611_4k_video_display: qcom,dsi-display@21 {
+		compatible = "qcom,dsi-display";
+		label = "dsi_lt9611_4k_video_display";
+		qcom,display-type = "primary";
+
+		qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
+		qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
+		clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
+			<&mdss_dsi0_pll PCLK_MUX_0_CLK>;
+		clock-names = "src_byte_clk", "src_pixel_clk";
+
+		pinctrl-names = "panel_active", "panel_suspend";
+		pinctrl-0 = <&sde_dsi_active>;
+		pinctrl-1 = <&sde_dsi_suspend>;
+		qcom,platform-reset-gpio = <&tlmm 88 0>;
+
+		qcom,dsi-panel = <&dsi_lt9611_4k_video>;
+		vddio-supply = <&pm8998_l14>;
+	};
+
 	sde_wb: qcom,wb-display@0 {
 		compatible = "qcom,wb-display";
 		cell-index = <0>;
@@ -721,6 +742,20 @@
 	};
 };
 
+&dsi_lt9611_4k_video {
+	qcom,mdss-dsi-t-clk-post = <0x0d>;
+	qcom,mdss-dsi-t-clk-pre = <0x2f>;
+	qcom,mdss-dsi-display-timings {
+		timing@0{
+			qcom,mdss-dsi-panel-phy-timings = [00 1e 08 08 24 22 08
+				08 05 02 04 00];
+			qcom,mdss-dsi-panel-clockrate = <891000000>;
+			qcom,display-topology = <2 0 2>;
+			qcom,default-topology-index = <0>;
+		};
+	};
+};
+
 &dsi_nt35597_truly_dsc_video {
 	qcom,mdss-dsi-t-clk-post = <0x0b>;
 	qcom,mdss-dsi-t-clk-pre = <0x23>;
diff --git a/arch/arm64/boot/dts/qcom/sdm845-sde-pll.dtsi b/arch/arm64/boot/dts/qcom/sdm845-sde-pll.dtsi
index 967865b3ec10d..8d97d5a805c6c 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-sde-pll.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-sde-pll.dtsi
@@ -23,8 +23,10 @@
 		clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>;
 		clock-names = "iface_clk";
 		clock-rate = <0>;
+		/*
 		qcom,dsi-pll-ssc-en;
 		qcom,dsi-pll-ssc-mode = "down-spread";
+		*/
 		gdsc-supply = <&mdss_core_gdsc>;
 		qcom,platform-supply-entries {
 			#address-cells = <1>;
@@ -52,8 +54,10 @@
 		clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>;
 		clock-names = "iface_clk";
 		clock-rate = <0>;
+		/*
 		qcom,dsi-pll-ssc-en;
 		qcom,dsi-pll-ssc-mode = "down-spread";
+		*/
 		gdsc-supply = <&mdss_core_gdsc>;
 		qcom,platform-supply-entries {
 			#address-cells = <1>;
diff --git a/drivers/gpu/drm/bridge/lt9611/Makefile b/drivers/gpu/drm/bridge/lt9611/Makefile
index b3b3cc6b24a93..1a3325b979b8b 100644
--- a/drivers/gpu/drm/bridge/lt9611/Makefile
+++ b/drivers/gpu/drm/bridge/lt9611/Makefile
@@ -1,2 +1,2 @@
-obj-$(CONFIG_DRM_I2C_LT9611) += lt9611_1080p_simple.o
+obj-$(CONFIG_DRM_I2C_LT9611) += lt9611.o
 obj-$(CONFIG_DRM_I2C_LT9611) += pericom-pi3hdx1204-redriver.o
diff --git a/drivers/gpu/drm/bridge/lt9611/lt9611_1080p_simple.c b/drivers/gpu/drm/bridge/lt9611/lt9611.c
index 1b87994ee22e6..6b616df7bc347 100644
--- a/drivers/gpu/drm/bridge/lt9611/lt9611_1080p_simple.c
+++ b/drivers/gpu/drm/bridge/lt9611/lt9611.c
@@ -27,6 +27,7 @@
 #include <linux/platform_device.h>
 #include <linux/regulator/consumer.h>
 #include <video/lt9611.h>
+#include <linux/workqueue.h>
 
 #define CFG_HPD_INTERRUPTS	BIT(0)
 #define CFG_EDID_INTERRUPTS	BIT(1)
@@ -35,6 +36,7 @@
 
 #define EDID_SEG_SIZE	0x100
 #define AUDIO_DATA_SIZE	32
+#define DISPLAY_4K_VERTICAL_ACTIVE 0x870
 
 typedef enum {
 	MIPI_1LANE = 1,
@@ -99,15 +101,19 @@ struct lt9611 {
 	int receiver_enable_gpio;
 
 	u8 pcr_m;
-//just for debug now
 	u8 edid_buf[EDID_SEG_SIZE];
-//	u8 audio_spkr_data[AUDIO_DATA_SIZE];
+
+	bool IsDisplayOn ;
+	struct delayed_work on_work;
+
 
 };
 
 static struct lt9611 *this_lt9611 = NULL;
-#define LT9611_PATTERN_TEST	(1)
+#define LT9611_PATTERN_TEST	(0)
 static void LT9611_pattern(struct lt9611 *pdata);
+static int lt9611_i2s_init(struct lt9611 *pdata);
+
 
 static struct lt9611_video_cfg video_tab[] = {
 	{ 8,   96,  40,	640,  33, 2,  10, 480,	0, 0, 0,  25000	},//video_640x480_60Hz
@@ -130,7 +136,6 @@ static int i2c_write_byte(struct i2c_client *client, u8 addr, u8 reg, u8 val)
 		return -EINVAL;
 	}
 
-//	client->addr = addr;
 	msg.addr = addr;
 	msg.flags = 0;
 	msg.len = 2;
@@ -154,8 +159,6 @@ static int i2c_read(struct i2c_client *client, u8 addr, u8 reg, char *buf, u32 s
 		return -EINVAL;
 	}
 
-//	client->addr = addr;
-
 	msg[0].addr = addr;
 	msg[0].flags = 0;
 	msg[0].len = 1;
@@ -249,7 +252,7 @@ static int lt9611_mipi_input_analog(struct lt9611 *pdata)
 	lt9611_write(pdata, 0x08, 0x3f);   //20180420 PortB EQ
 	lt9611_write(pdata, 0x0a, 0xfe);   //port A ldo voltage set
 	lt9611_write(pdata, 0x0b, 0xbf);   //enable port A lprx
-	lt9611_write(pdata, 0x11, 0x20);   //port B rx current
+	lt9611_write(pdata, 0x11, 0x20);   //port B rx current 
 	lt9611_write(pdata, 0x12, 0x3f);   //20180420 PortB EQ
 	lt9611_write(pdata, 0x13, 0x3f);   //20180420 PortB EQ
 	lt9611_write(pdata, 0x15, 0xfe);   //port B ldo voltage set
@@ -272,13 +275,11 @@ static int lt9611_mipi_input_digital(struct lt9611 *pdata)
 	lt9611_write(pdata, 0xff, 0x82);
 	lt9611_write(pdata, 0x4f, 0x80);   //[7] = Select ad_txpll_d_clk.
 	lt9611_write(pdata, 0x50, 0x10);
-//	lt9611_write(pdata, 0x50, 0x14);   //signal port from portB
 
 	lt9611_write(pdata, 0xff, 0x83);
 	lt9611_write(pdata, 0x00, lanes);
 	lt9611_write(pdata, 0x02, 0x0a);    //settle
 
-//	lt9611_write(pdata, 0x03, 0x40);    //signal port from portB
 	lt9611_write(pdata, 0x06, 0x0a);    //settle
 	lt9611_write(pdata, 0x0a, ports);
 
@@ -369,8 +370,6 @@ static int lt9611_pll_setup(struct lt9611 *pdata)
 	lt9611_write(pdata, 0x25, 0x80); //pre-divider
 	lt9611_write(pdata, 0x26, 0x55);
 	lt9611_write(pdata, 0x2c, 0x37);
-//	lt9611_write(pdata, 0x2d, 0x99); //txpll_divx_set&da_txpll_freq_set
-//	lt9611_write(pdata, 0x2e, 0x01);
 	lt9611_write(pdata, 0x2f, 0x01);
 	lt9611_write(pdata, 0x26, 0x55);
 	lt9611_write(pdata, 0x27, 0x66);
@@ -458,7 +457,6 @@ static int lt9611_pcr_setup(struct lt9611 *pdata)
 
 	/* stage 1 */
 	lt9611_write(pdata, 0x21, 0x4a); //bit[3:0] step[11:8]
-	//lt9611_write(pdata, 0x22, 0x40);//step[7:0]
 
 	lt9611_write(pdata, 0x24, 0x31);        //bit[7:4]v/h/de mode; line for clk stb[11:8]
 	lt9611_write(pdata, 0x25, 0x30);        //line for clk stb[7:0]
@@ -875,45 +873,45 @@ static int lt9611_gpio_init(struct lt9611 *pdata)
 
 	ret = gpio_request(pdata->reset_gpio, "lt9611-reset-gpio");
 	if (!ret) {
-		printk(KERN_ERR "%s: reset gpio request success!\n", __func__);
+		printk(KERN_INFO "%s: reset gpio request success!\n", __func__);
 		gpio_direction_output(pdata->reset_gpio, 1);
 		msleep(10);
 	}
 
 	ret = gpio_request(pdata->irq_gpio, "lt9611-irq-gpio");
 	if (!ret) {
-		printk(KERN_ERR "%s: irq gpio request success!\n", __func__);
+		printk(KERN_INFO "%s: irq gpio request success!\n", __func__);
 		gpio_direction_input(pdata->irq_gpio);
 	}
 /*
 	ret = gpio_request(pdata->receiver_enable_gpio, "lt9611-receiver-enable-gpio");
 	if (!ret) {
-		printk(KERN_ERR "%s: receiver enable gpio request success!\n", __func__);
+		printk(KERN_INFO "%s: receiver enable gpio request success!\n", __func__);
 		gpio_direction_output(pdata->receiver_enable_gpio, 1);
 	}
 
 	ret = gpio_request(pdata->pwr_sys3v3_gpio, "lt9611-pwr-sys3v3-gpio");
 	if (!ret) {
-		printk(KERN_ERR "%s: pwr sys3v3 gpio request success!\n", __func__);
+		printk(KERN_INFO "%s: pwr sys3v3 gpio request success!\n", __func__);
 		gpio_direction_output(pdata->pwr_sys3v3_gpio, 1);
 	}
 */
 	ret = gpio_request(pdata->pwr_sys5v0_gpio, "lt9611-pwr-sys5v0-gpio");
 	if (!ret) {
-		printk(KERN_ERR "%s: pwr sys5v0 gpio request success!\n", __func__);
+		printk(KERN_INFO "%s: pwr sys5v0 gpio request success!\n", __func__);
 		gpio_direction_output(pdata->pwr_sys5v0_gpio, 1);
 	}
 
 	ret = gpio_request(pdata->pwr_sys1v8_gpio, "lt9611-pwr-sys1v8-gpio");
 	if (!ret) {
-		printk(KERN_ERR "%s: pwr sys1v8 gpio request success!\n", __func__);
+		printk(KERN_INFO "%s: pwr sys1v8 gpio request success!\n", __func__);
 		gpio_direction_output(pdata->pwr_sys1v8_gpio, 1);
 		msleep(10);
 	}
 /*
 	ret = gpio_request(pdata->pwr_enable_gpio, "lt9611-pwr-enable-gpio");
 	if (!ret) {
-		printk(KERN_ERR "%s: pwr enable gpio request success!\n", __func__);
+		printk(KERN_INFO "%s: pwr enable gpio request success!\n", __func__);
 		gpio_direction_output(pdata->pwr_enable_gpio, 1);
 		msleep(10);
 	}
@@ -927,7 +925,7 @@ static int lt9611_gpio_deinit(struct lt9611 *pdata)
 //	gpio_direction_output(pdata->pwr_enable_gpio, 0);
 	gpio_direction_output(pdata->pwr_sys5v0_gpio, 0);
 //	gpio_direction_output(pdata->pwr_sys3v3_gpio, 0);
-	gpio_direction_output(pdata->pwr_sys1v8_gpio, 0);
+//	gpio_direction_output(pdata->pwr_sys1v8_gpio, 0);
 	gpio_direction_output(pdata->reset_gpio, 0);
 
 	gpio_free(pdata->reset_gpio);
@@ -936,14 +934,16 @@ static int lt9611_gpio_deinit(struct lt9611 *pdata)
 //	gpio_free(pdata->pwr_enable_gpio);
 	gpio_free(pdata->pwr_sys5v0_gpio);
 //	gpio_free(pdata->pwr_sys3v3_gpio);
-	gpio_free(pdata->pwr_sys1v8_gpio);
+//	gpio_free(pdata->pwr_sys1v8_gpio);
 
 	return 0;
 }
 
 static irqreturn_t lt9611_interrupt_thread(int irq, void *dev_id)
 {
-#if 1
+
+
+#if 0
 	struct lt9611 *pdata = (struct lt9611*)dev_id;
 	u8 irq_flag0, irq_flag3;
 
@@ -986,7 +986,6 @@ static irqreturn_t lt9611_interrupt_thread(int irq, void *dev_id)
 
 static int lt9611_enable_interrupts(struct lt9611 *pdata, int interrupts)
 {
-#if 1
 	u8 reg_val, init_reg_val;
 
 	if (interrupts & CFG_VID_CHK_INTERRUPTS) {
@@ -1016,10 +1015,34 @@ static int lt9611_enable_interrupts(struct lt9611 *pdata, int interrupts)
 		lt9611_write(pdata, 0x07, 0xff); //clear
 		lt9611_write(pdata, 0x07, 0x3f);
 	}
-#endif
 	return 0;
 }
 
+static void lt9611_on_work_fn (struct work_struct *work)
+{
+	int ret ;
+
+	ret = lt9611_gpio_init(this_lt9611);
+	msleep(500);
+
+	lt9611_reset(this_lt9611);
+
+	ret = lt9611_read_device_rev(this_lt9611);
+	lt9611_system_init(this_lt9611);
+	lt9611_mipi_input_analog(this_lt9611);
+	lt9611_mipi_input_digital(this_lt9611);
+	lt9611_mipi_video_setup(this_lt9611);
+	lt9611_pll_setup(this_lt9611);
+	lt9611_pcr_setup(this_lt9611);
+	lt9611_pcr_start(this_lt9611);
+	lt9611_hdmi_tx_digital(this_lt9611);
+	lt9611_hdmi_tx_phy(this_lt9611);
+
+	mdelay(100);
+	lt9611_hdmi_output_enable(this_lt9611);
+	lt9611_i2s_init(this_lt9611);
+}
+
 static int lt9611_video_on(struct lt9611 *pdata)
 {
 	int ret = 0;
@@ -1074,7 +1097,7 @@ static int lt9611_irq_init(struct lt9611 *pdata)
 		printk(KERN_ERR "%s: requset irq failed\n", __func__);
 	}
 
-//	lt9611_enable_interrupts(pdata, CFG_HPD_INTERRUPTS);
+	lt9611_enable_interrupts(pdata, CFG_HPD_INTERRUPTS);
 	return ret;
 }
 
@@ -1141,10 +1164,29 @@ static ssize_t lt9611_debug_store(struct device *dev,
 
 static DEVICE_ATTR(lt9611_debug, 0600, lt9611_debug_show, lt9611_debug_store);
 
+void lt9611_on(int index)
+{
+	if(!this_lt9611->IsDisplayOn)
+	{
+		schedule_delayed_work(&this_lt9611->on_work, msecs_to_jiffies(0));
+		this_lt9611->IsDisplayOn = true;
+	}
+}
+
+void lt9611_off(int index)
+{
+	if(this_lt9611->IsDisplayOn)
+	{
+		lt9611_gpio_deinit(this_lt9611);
+		this_lt9611->IsDisplayOn = false;
+	}
+}
+
 static int lt9611_probe(struct i2c_client *client, const struct i2c_device_id *id)
 {
 	struct lt9611 *pdata;
 	int ret = 0;
+	uint16_t pReferredTiming;
 
 	printk(KERN_ERR "%s: i2c addr = 0x%02x enter!\n", __func__, client->addr);
 	if (!client->dev.of_node) {
@@ -1174,9 +1216,10 @@ static int lt9611_probe(struct i2c_client *client, const struct i2c_device_id *i
 		goto err_dt_parse;
 	}
 
-	pdata->video_format_id = VIDEO_1920x1080_60HZ;
+	pdata->video_format_id = VIDEO_3840x2160_30HZ;
 	pdata->mipi_lane_counts = MIPI_4LANE;
-	pdata->mipi_port_counts = MIPI_1PORT;
+	pdata->mipi_port_counts = MIPI_2PORT;
+
 
 	lt9611_reset(pdata);
 
@@ -1193,7 +1236,21 @@ static int lt9611_probe(struct i2c_client *client, const struct i2c_device_id *i
 
 	lt9611_system_init(pdata);
 	lt9611_read_edid(pdata);
-//	lt9611_dump_edid(pdata);
+
+	pReferredTiming = pdata->edid_buf[0x3b] + ((pdata->edid_buf[0x3d] & 0xF0)<<4);
+	if(pReferredTiming == DISPLAY_4K_VERTICAL_ACTIVE)
+	{
+		pdata->video_format_id = VIDEO_3840x2160_30HZ;
+		pdata->mipi_port_counts = MIPI_2PORT;
+		printk(KERN_INFO "%s lt9611 preferred display 3840*2160\n",__func__);
+	}
+	else
+	{
+		pdata->video_format_id = VIDEO_1920x1080_60HZ;
+		pdata->mipi_port_counts = MIPI_1PORT;
+		 printk(KERN_INFO "%s lt9611 preferred display 1920*1080\n",__func__);
+	}
+	pdata->mipi_lane_counts = MIPI_4LANE;
 
 	lt9611_mipi_input_analog(pdata);
 	lt9611_mipi_input_digital(pdata);
@@ -1208,12 +1265,15 @@ static int lt9611_probe(struct i2c_client *client, const struct i2c_device_id *i
 	lt9611_hdmi_output_enable(pdata);
 	lt9611_i2s_init(pdata);
 
+	INIT_DELAYED_WORK(&pdata->on_work, lt9611_on_work_fn);
+
+	pdata->IsDisplayOn = true;
+
 	ret = device_create_file(&client->dev, &dev_attr_lt9611_debug);
 	if (ret) {
 		printk(KERN_ERR "%s: create debug sysfs fail!\n", __func__);
 		goto err_i2c_prog;
 	}
-
 	ret = lt9611_irq_init(pdata);
 	if (ret) {
 		goto err_irq;
@@ -1314,7 +1374,6 @@ static void LT9611_System_Init(struct lt9611 *pdata)
 	lt9611_write(pdata,0x1c,0x78);
 	lt9611_write(pdata,0xcb,0x69); //Timer 1
 	lt9611_write(pdata,0xcc,0x78);
-
 	/*power consumption for work*/
 	lt9611_write(pdata,0xff,0x80);
 	lt9611_write(pdata,0x04,0xf0);
@@ -1343,7 +1402,6 @@ static void LT9611_PLL(struct lt9611 *pdata, struct video_timing *video_format)
 	lt9611_write(pdata,0x26,0x55);
 	lt9611_write(pdata,0x27,0x66);
 	lt9611_write(pdata,0x28,0x88);
-
 	if(pclk > 150000) {
 		lt9611_write(pdata,0x2d,0x88);
 	} else if (pclk > 70000) {
@@ -1351,17 +1409,14 @@ static void LT9611_PLL(struct lt9611 *pdata, struct video_timing *video_format)
 	} else {
 		lt9611_write(pdata,0x2d,0xaa);
 	}
-
 	pclk = pclk / 2;
 	lt9611_write(pdata,0xff,0x82);
 	lt9611_write(pdata,0xe3,pclk / 65536);
 	pclk = pclk % 65536;
 	lt9611_write(pdata,0xe4,pclk / 256);
 	lt9611_write(pdata,0xe5,pclk % 256);
-
 	lt9611_write(pdata,0xde,0x20);
 	lt9611_write(pdata,0xde,0xe0);
-
 	lt9611_write(pdata,0xff,0x80);
 	lt9611_write(pdata,0x11,0x5a);
 	lt9611_write(pdata,0x11,0xfa);
@@ -1369,7 +1424,6 @@ static void LT9611_PLL(struct lt9611 *pdata, struct video_timing *video_format)
 	lt9611_write(pdata,0x18,0xfc);
 	lt9611_write(pdata,0x16,0xf1);
 	lt9611_write(pdata,0x16,0xf3);
-
 	/* pll lock status */
 	for(i = 0; i < 6 ; i++) {
 		lt9611_write(pdata,0xff,0x80);
@@ -1501,7 +1555,6 @@ static void LT9611_pattern(struct lt9611 *pdata)
 	//Video_Format = video_3840x2160_30Hz_vic;
 	//video = &video_3840x2160_30Hz;
 	//video = &video_1024x600_60Hz;
-
 	LT9611_System_Init(pdata);
 	LT9611_pattern_en(pdata);
 
@@ -1512,6 +1565,5 @@ static void LT9611_pattern(struct lt9611 *pdata)
 
 	LT9611_HDMI_TX_Digital(pdata);
 	LT9611_HDMI_TX_Phy(pdata);
-
 	LT9611_HDMI_Out_Enable(pdata);
 }
diff --git a/drivers/gpu/drm/bridge/lt9611/lt9611.h b/drivers/gpu/drm/bridge/lt9611/lt9611.h
new file mode 100644
index 0000000000000..bc6f5f1b78240
--- /dev/null
+++ b/drivers/gpu/drm/bridge/lt9611/lt9611.h
@@ -0,0 +1,8 @@
+#ifndef __LT9611_H
+#define __LT9611_H
+
+void lt9611_on(int index);
+void lt9611_off(int index);
+
+#endif
+
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c b/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c
index 92e08e057195a..4426f2dee74af 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c
@@ -33,6 +33,15 @@
 
 #include "sde_dbg.h"
 
+#ifdef CONFIG_DRM_I2C_LT8912
+#include "../../bridge/lt8912/lt8912.h"
+#endif
+
+
+#ifdef CONFIG_DRM_I2C_LT9611
+#include "../../bridge/lt9611/lt9611.h"
+#endif
+
 #define DSI_CTRL_DEFAULT_LABEL "MDSS DSI CTRL"
 
 #define DSI_CTRL_TX_TO_MS     200
@@ -3209,6 +3218,21 @@ int dsi_ctrl_set_vid_engine_state(struct dsi_ctrl *dsi_ctrl,
 	pr_debug("[DSI_%d] Set video engine state = %d\n", dsi_ctrl->cell_index,
 		 state);
 	dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_VID_ENGINE, state);
+
+#ifdef CONFIG_DRM_I2C_LT8912
+	if (on)
+		lt8912_on(dsi_ctrl->cell_index);
+	else
+		lt8912_off(dsi_ctrl->cell_index);
+#endif
+
+#ifdef CONFIG_DRM_I2C_LT9611
+	if (on)
+		lt9611_on(dsi_ctrl->cell_index);
+	else
+		lt9611_off(dsi_ctrl->cell_index);
+#endif
+
 error:
 	mutex_unlock(&dsi_ctrl->ctrl_lock);
 	return rc;
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw_cmn.c b/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw_cmn.c
index 6dde4548b71a9..c24cff20aa998 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw_cmn.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw_cmn.c
@@ -240,6 +240,19 @@ void dsi_ctrl_hw_cmn_set_timing_db(struct dsi_ctrl_hw *ctrl,
 	SDE_EVT32(ctrl->index, enable);
 }
 
+static u32 dsi_ctrl_calc_hs_timeout(struct dsi_mode_info *mode)
+{
+	u32 esc_clk_rate = 19200000;
+	u32 esc_ticks_per_frame = (esc_clk_rate + mode->refresh_rate - 1) / mode->refresh_rate;
+	u32 hs_timeout_h = 0, hs_timeout_l;
+
+	while ((hs_timeout_l = esc_ticks_per_frame >> hs_timeout_h) > 65536) {
+		hs_timeout_h++;
+	}
+
+	return (hs_timeout_h << 16) | hs_timeout_l;
+}
+
 /**
  * set_video_timing() - set up the timing for video frame
  * @ctrl:          Pointer to controller host hardware.
@@ -309,7 +322,7 @@ void dsi_ctrl_hw_cmn_set_video_timing(struct dsi_ctrl_hw *ctrl,
 	DSI_W32(ctrl, DSI_VIDEO_MODE_VSYNC_VPOS, reg);
 
 	/* TODO: HS TIMER value? */
-	DSI_W32(ctrl, DSI_HS_TIMER_CTRL, 0x3FD08);
+	DSI_W32(ctrl, DSI_HS_TIMER_CTRL, dsi_ctrl_calc_hs_timeout(mode));
 	DSI_W32(ctrl, DSI_MISR_VIDEO_CTRL, 0x10100);
 	DSI_W32(ctrl, DSI_DSI_TIMING_FLUSH, 0x1);
 	pr_debug("[DSI_%d] ctrl video parameters updated\n", ctrl->index);
@@ -392,7 +405,7 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl,
 	}
 
 	/* HS Timer value */
-	DSI_W32(ctrl, DSI_HS_TIMER_CTRL, 0x3FD08);
+	DSI_W32(ctrl, DSI_HS_TIMER_CTRL, dsi_ctrl_calc_hs_timeout(mode));
 
 	stream_ctrl = (stride_final + 1) << 16;
 	stream_ctrl |= (vc_id & 0x3) << 8;