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authorTaniya Das <tdas@codeaurora.org>2019-02-11 13:09:28 +0530
committerVinod Koul <vkoul@kernel.org>2019-02-26 00:06:37 +0530
commit05f259c76f40ac926c88e1f8e555523afaa17100 (patch)
tree744879af7e91bbb0999c0874e78162418ba93c35
parentbbeb37c4afc6e38cccc53286e859ee2f644b9e87 (diff)
FROMGIT: clk: qcom: gcc-qcs404: Add cfg_offset for blsp1_uart3 clock
The CFG/M/N/D registers are at an offset of 0x20 from the CMD register only for blsp1_uart3 clock, so add it for uart3 only. (cherry picked from commit 9d575719ca9b8e177391addb2855be3911dc0d93 https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git) Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Anu Ramanathan <anur@codeaurora.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@linaro.org> Change-Id: Ic89a05e0efb10a8c144229b0fbad506d8a0526a2
-rw-r--r--drivers/clk/qcom/gcc-qcs404.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
index d4ccf5297baf..5c958a574b38 100644
--- a/drivers/clk/qcom/gcc-qcs404.c
+++ b/drivers/clk/qcom/gcc-qcs404.c
@@ -679,6 +679,7 @@ static struct clk_rcg2 blsp1_uart3_apps_clk_src = {
.cmd_rcgr = 0x4014,
.mnd_width = 16,
.hid_width = 5,
+ .cfg_off = 0x20,
.parent_map = gcc_parent_map_0,
.freq_tbl = ftbl_blsp1_uart0_apps_clk_src,
.clkr.hw.init = &(struct clk_init_data){