diff options
-rw-r--r-- | arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts index a33c98910a15..b1d1d4c45c5d 100644 --- a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts @@ -306,8 +306,90 @@ }; }; +ðernet { + status = "okay"; + + snps,reset-gpio = <&tlmm 79 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 11000 70000>; + + pinctrl-names = "default"; + pinctrl-0 = <ðernet_defaults>; + + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii"; + mdio { + #address-cells = <0x1>; + #size-cells = <0x0>; + + compatible = "snps,dwmac-mdio"; + + /* Microchip KSZ9031RNX PHY */ + rgmii_phy: phy@0 { + reg = <0x0>; + device_type = "ethernet-phy"; + //compatible = "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + &tlmm { gpio-reserved-ranges = <0 4>; + + ethernet_defaults: ethernet-defaults { + int { + pins = "gpio124"; + function = "rgmii_int"; + bias-disable; + drive-strength = <8>; + }; + mdc { + pins = "gpio7"; + function = "rgmii_mdc"; + bias-pull-up; + }; + mdio { + pins = "gpio75"; + function = "rgmii_mdio"; + bias-pull-up; + }; + tx { + pins = "gpio122", "gpio4", "gpio5", "gpio6"; + function = "rgmii_tx"; + bias-pull-up; + drive-strength = <16>; + }; + rx { + pins = "gpio117", "gpio118", "gpio119", "gpio120"; + function = "rgmii_rx"; + bias-disable; + drive-strength = <2>; + }; + tx-ctl { + pins = "gpio121"; + function = "rgmii_ctl"; + bias-pull-up; + drive-strength = <16>; + }; + rx-ctl { + pins = "gpio116"; + function = "rgmii_ctl"; + bias-disable; + drive-strength = <2>; + }; + tx-ck { + pins = "gpio63"; + function = "rgmii_ck"; + bias-pull-up; + drive-strength = <16>; + }; + rx-ck { + pins = "gpio115"; + function = "rgmii_ck"; + bias-disable; + drive-strength = <2>; + }; + }; }; &uart2 { |