diff options
Diffstat (limited to 'target-i386/translate.c')
| -rw-r--r-- | target-i386/translate.c | 917 |
1 files changed, 502 insertions, 415 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c index 2b11333..eb0cabc 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -740,9 +740,15 @@ static void gen_check_io(DisasContext *s, int ot, target_ulong cur_eip, state_saved = 1; tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); switch (ot) { - case 0: gen_helper_check_iob(cpu_tmp2_i32); break; - case 1: gen_helper_check_iow(cpu_tmp2_i32); break; - case 2: gen_helper_check_iol(cpu_tmp2_i32); break; + case 0: + gen_helper_check_iob(cpu_env, cpu_tmp2_i32); + break; + case 1: + gen_helper_check_iow(cpu_env, cpu_tmp2_i32); + break; + case 2: + gen_helper_check_iol(cpu_env, cpu_tmp2_i32); + break; } } if(s->flags & HF_SVMI_MASK) { @@ -754,7 +760,8 @@ static void gen_check_io(DisasContext *s, int ot, target_ulong cur_eip, svm_flags |= (1 << (4 + ot)); next_eip = s->pc - s->cs_base; tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_svm_check_io(cpu_tmp2_i32, tcg_const_i32(svm_flags), + gen_helper_svm_check_io(cpu_env, cpu_tmp2_i32, + tcg_const_i32(svm_flags), tcg_const_i32(next_eip - cur_eip)); } } @@ -811,14 +818,14 @@ static void gen_op_update_neg_cc(void) /* compute eflags.C to reg */ static void gen_compute_eflags_c(TCGv reg) { - gen_helper_cc_compute_c(cpu_tmp2_i32, cpu_cc_op); + gen_helper_cc_compute_c(cpu_tmp2_i32, cpu_env, cpu_cc_op); tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32); } /* compute all eflags to cc_src */ static void gen_compute_eflags(TCGv reg) { - gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_cc_op); + gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_env, cpu_cc_op); tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32); } @@ -1266,14 +1273,30 @@ GEN_REPZ2(cmps) static void gen_helper_fp_arith_ST0_FT0(int op) { switch (op) { - case 0: gen_helper_fadd_ST0_FT0(); break; - case 1: gen_helper_fmul_ST0_FT0(); break; - case 2: gen_helper_fcom_ST0_FT0(); break; - case 3: gen_helper_fcom_ST0_FT0(); break; - case 4: gen_helper_fsub_ST0_FT0(); break; - case 5: gen_helper_fsubr_ST0_FT0(); break; - case 6: gen_helper_fdiv_ST0_FT0(); break; - case 7: gen_helper_fdivr_ST0_FT0(); break; + case 0: + gen_helper_fadd_ST0_FT0(cpu_env); + break; + case 1: + gen_helper_fmul_ST0_FT0(cpu_env); + break; + case 2: + gen_helper_fcom_ST0_FT0(cpu_env); + break; + case 3: + gen_helper_fcom_ST0_FT0(cpu_env); + break; + case 4: + gen_helper_fsub_ST0_FT0(cpu_env); + break; + case 5: + gen_helper_fsubr_ST0_FT0(cpu_env); + break; + case 6: + gen_helper_fdiv_ST0_FT0(cpu_env); + break; + case 7: + gen_helper_fdivr_ST0_FT0(cpu_env); + break; } } @@ -1282,12 +1305,24 @@ static void gen_helper_fp_arith_STN_ST0(int op, int opreg) { TCGv_i32 tmp = tcg_const_i32(opreg); switch (op) { - case 0: gen_helper_fadd_STN_ST0(tmp); break; - case 1: gen_helper_fmul_STN_ST0(tmp); break; - case 4: gen_helper_fsubr_STN_ST0(tmp); break; - case 5: gen_helper_fsub_STN_ST0(tmp); break; - case 6: gen_helper_fdivr_STN_ST0(tmp); break; - case 7: gen_helper_fdiv_STN_ST0(tmp); break; + case 0: + gen_helper_fadd_STN_ST0(cpu_env, tmp); + break; + case 1: + gen_helper_fmul_STN_ST0(cpu_env, tmp); + break; + case 4: + gen_helper_fsubr_STN_ST0(cpu_env, tmp); + break; + case 5: + gen_helper_fsub_STN_ST0(cpu_env, tmp); + break; + case 6: + gen_helper_fdivr_STN_ST0(cpu_env, tmp); + break; + case 7: + gen_helper_fdiv_STN_ST0(cpu_env, tmp); + break; } } @@ -1745,20 +1780,36 @@ static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1, if (is_right) { switch (ot) { - case 0: gen_helper_rcrb(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 1: gen_helper_rcrw(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 2: gen_helper_rcrl(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 0: + gen_helper_rcrb(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 1: + gen_helper_rcrw(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 2: + gen_helper_rcrl(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #ifdef TARGET_X86_64 - case 3: gen_helper_rcrq(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 3: + gen_helper_rcrq(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #endif } } else { switch (ot) { - case 0: gen_helper_rclb(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 1: gen_helper_rclw(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 2: gen_helper_rcll(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 0: + gen_helper_rclb(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 1: + gen_helper_rclw(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 2: + gen_helper_rcll(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #ifdef TARGET_X86_64 - case 3: gen_helper_rclq(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 3: + gen_helper_rclq(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #endif } } @@ -1992,7 +2043,7 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ if (base == 4) { havesib = 1; - code = ldub_code(s->pc++); + code = cpu_ldub_code(cpu_single_env, s->pc++); scale = (code >> 6) & 3; index = ((code >> 3) & 7) | REX_X(s); base = (code & 7); @@ -2003,7 +2054,7 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ case 0: if ((base & 7) == 5) { base = -1; - disp = (int32_t)ldl_code(s->pc); + disp = (int32_t)cpu_ldl_code(cpu_single_env, s->pc); s->pc += 4; if (CODE64(s) && !havesib) { disp += s->pc + s->rip_offset; @@ -2013,11 +2064,11 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ } break; case 1: - disp = (int8_t)ldub_code(s->pc++); + disp = (int8_t)cpu_ldub_code(cpu_single_env, s->pc++); break; default: case 2: - disp = (int32_t)ldl_code(s->pc); + disp = (int32_t)cpu_ldl_code(cpu_single_env, s->pc); s->pc += 4; break; } @@ -2080,7 +2131,7 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ switch (mod) { case 0: if (rm == 6) { - disp = lduw_code(s->pc); + disp = cpu_lduw_code(cpu_single_env, s->pc); s->pc += 2; gen_op_movl_A0_im(disp); rm = 0; /* avoid SS override */ @@ -2090,11 +2141,11 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ } break; case 1: - disp = (int8_t)ldub_code(s->pc++); + disp = (int8_t)cpu_ldub_code(cpu_single_env, s->pc++); break; default: case 2: - disp = lduw_code(s->pc); + disp = cpu_lduw_code(cpu_single_env, s->pc); s->pc += 2; break; } @@ -2164,7 +2215,7 @@ static void gen_nop_modrm(DisasContext *s, int modrm) base = rm; if (base == 4) { - code = ldub_code(s->pc++); + code = cpu_ldub_code(cpu_single_env, s->pc++); base = (code & 7); } @@ -2260,16 +2311,16 @@ static inline uint32_t insn_get(DisasContext *s, int ot) switch(ot) { case OT_BYTE: - ret = ldub_code(s->pc); + ret = cpu_ldub_code(cpu_single_env, s->pc); s->pc++; break; case OT_WORD: - ret = lduw_code(s->pc); + ret = cpu_lduw_code(cpu_single_env, s->pc); s->pc += 2; break; default: case OT_LONG: - ret = ldl_code(s->pc); + ret = cpu_ldl_code(cpu_single_env, s->pc); s->pc += 4; break; } @@ -2392,7 +2443,7 @@ static void gen_movl_seg_T0(DisasContext *s, int seg_reg, target_ulong cur_eip) gen_op_set_cc_op(s->cc_op); gen_jmp_im(cur_eip); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_load_seg(tcg_const_i32(seg_reg), cpu_tmp2_i32); + gen_helper_load_seg(cpu_env, tcg_const_i32(seg_reg), cpu_tmp2_i32); /* abort translation because the addseg value may change or because ss32 may change. For R_SS, translation must always stop as a special handling must be done to disable hardware @@ -2421,7 +2472,7 @@ gen_svm_check_intercept_param(DisasContext *s, target_ulong pc_start, if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_svm_check_intercept_param(tcg_const_i32(type), + gen_helper_svm_check_intercept_param(cpu_env, tcg_const_i32(type), tcg_const_i64(param)); } @@ -2629,7 +2680,7 @@ static void gen_enter(DisasContext *s, int esp_addend, int level) gen_op_st_T0_A0(ot + s->mem_index); if (level) { /* XXX: must save state */ - gen_helper_enter64_level(tcg_const_i32(level), + gen_helper_enter64_level(cpu_env, tcg_const_i32(level), tcg_const_i32((ot == OT_QUAD)), cpu_T[1]); } @@ -2654,7 +2705,7 @@ static void gen_enter(DisasContext *s, int esp_addend, int level) gen_op_st_T0_A0(ot + s->mem_index); if (level) { /* XXX: must save state */ - gen_helper_enter_level(tcg_const_i32(level), + gen_helper_enter_level(cpu_env, tcg_const_i32(level), tcg_const_i32(s->dflag), cpu_T[1]); } @@ -2691,7 +2742,7 @@ static void gen_debug(DisasContext *s, target_ulong cur_eip) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(cur_eip); - gen_helper_debug(); + gen_helper_debug(cpu_env); s->is_jmp = DISAS_TB_JUMP; } @@ -2702,15 +2753,15 @@ static void gen_eob(DisasContext *s) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); if (s->tb->flags & HF_INHIBIT_IRQ_MASK) { - gen_helper_reset_inhibit_irq(); + gen_helper_reset_inhibit_irq(cpu_env); } if (s->tb->flags & HF_RF_MASK) { - gen_helper_reset_rf(); + gen_helper_reset_rf(cpu_env); } if (s->singlestep_enabled) { - gen_helper_debug(); + gen_helper_debug(cpu_env); } else if (s->tf) { - gen_helper_single_step(); + gen_helper_single_step(cpu_env); } else { tcg_gen_exit_tb(0); } @@ -2796,13 +2847,16 @@ static inline void gen_op_movq_env_0(int d_offset) tcg_gen_st_i64(cpu_tmp1_i64, cpu_env, d_offset); } -typedef void (*SSEFunc_i_p)(TCGv_i32 val, TCGv_ptr reg); -typedef void (*SSEFunc_l_p)(TCGv_i64 val, TCGv_ptr reg); -typedef void (*SSEFunc_0_pi)(TCGv_ptr reg, TCGv_i32 val); -typedef void (*SSEFunc_0_pl)(TCGv_ptr reg, TCGv_i64 val); -typedef void (*SSEFunc_0_pp)(TCGv_ptr reg_a, TCGv_ptr reg_b); +typedef void (*SSEFunc_i_ep)(TCGv_i32 val, TCGv_ptr env, TCGv_ptr reg); +typedef void (*SSEFunc_l_ep)(TCGv_i64 val, TCGv_ptr env, TCGv_ptr reg); +typedef void (*SSEFunc_0_epi)(TCGv_ptr env, TCGv_ptr reg, TCGv_i32 val); +typedef void (*SSEFunc_0_epl)(TCGv_ptr env, TCGv_ptr reg, TCGv_i64 val); +typedef void (*SSEFunc_0_epp)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr reg_b); +typedef void (*SSEFunc_0_eppi)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr reg_b, + TCGv_i32 val); typedef void (*SSEFunc_0_ppi)(TCGv_ptr reg_a, TCGv_ptr reg_b, TCGv_i32 val); -typedef void (*SSEFunc_0_ppt)(TCGv_ptr reg_a, TCGv_ptr reg_b, TCGv val); +typedef void (*SSEFunc_0_eppt)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr reg_b, + TCGv val); #define SSE_SPECIAL ((void *)1) #define SSE_DUMMY ((void *)2) @@ -2811,7 +2865,7 @@ typedef void (*SSEFunc_0_ppt)(TCGv_ptr reg_a, TCGv_ptr reg_b, TCGv val); #define SSE_FOP(x) { gen_helper_ ## x ## ps, gen_helper_ ## x ## pd, \ gen_helper_ ## x ## ss, gen_helper_ ## x ## sd, } -static const SSEFunc_0_pp sse_op_table1[256][4] = { +static const SSEFunc_0_epp sse_op_table1[256][4] = { /* 3DNow! extensions */ [0x0e] = { SSE_DUMMY }, /* femms */ [0x0f] = { SSE_DUMMY }, /* pf... */ @@ -2852,8 +2906,8 @@ static const SSEFunc_0_pp sse_op_table1[256][4] = { [0x5f] = SSE_FOP(max), [0xc2] = SSE_FOP(cmpeq), - [0xc6] = { (SSEFunc_0_pp)gen_helper_shufps, - (SSEFunc_0_pp)gen_helper_shufpd }, /* XXX: casts */ + [0xc6] = { (SSEFunc_0_epp)gen_helper_shufps, + (SSEFunc_0_epp)gen_helper_shufpd }, /* XXX: casts */ [0x38] = { SSE_SPECIAL, SSE_SPECIAL, NULL, SSE_SPECIAL }, /* SSSE3/SSE4 */ [0x3a] = { SSE_SPECIAL, SSE_SPECIAL }, /* SSSE3/SSE4 */ @@ -2875,10 +2929,10 @@ static const SSEFunc_0_pp sse_op_table1[256][4] = { [0x6d] = { NULL, gen_helper_punpckhqdq_xmm }, [0x6e] = { SSE_SPECIAL, SSE_SPECIAL }, /* movd mm, ea */ [0x6f] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* movq, movdqa, , movqdu */ - [0x70] = { (SSEFunc_0_pp)gen_helper_pshufw_mmx, - (SSEFunc_0_pp)gen_helper_pshufd_xmm, - (SSEFunc_0_pp)gen_helper_pshufhw_xmm, - (SSEFunc_0_pp)gen_helper_pshuflw_xmm }, /* XXX: casts */ + [0x70] = { (SSEFunc_0_epp)gen_helper_pshufw_mmx, + (SSEFunc_0_epp)gen_helper_pshufd_xmm, + (SSEFunc_0_epp)gen_helper_pshufhw_xmm, + (SSEFunc_0_epp)gen_helper_pshuflw_xmm }, /* XXX: casts */ [0x71] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftw */ [0x72] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftd */ [0x73] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftq */ @@ -2933,8 +2987,8 @@ static const SSEFunc_0_pp sse_op_table1[256][4] = { [0xf4] = MMX_OP2(pmuludq), [0xf5] = MMX_OP2(pmaddwd), [0xf6] = MMX_OP2(psadbw), - [0xf7] = { (SSEFunc_0_pp)gen_helper_maskmov_mmx, - (SSEFunc_0_pp)gen_helper_maskmov_xmm }, /* XXX: casts */ + [0xf7] = { (SSEFunc_0_epp)gen_helper_maskmov_mmx, + (SSEFunc_0_epp)gen_helper_maskmov_xmm }, /* XXX: casts */ [0xf8] = MMX_OP2(psubb), [0xf9] = MMX_OP2(psubw), [0xfa] = MMX_OP2(psubl), @@ -2944,7 +2998,7 @@ static const SSEFunc_0_pp sse_op_table1[256][4] = { [0xfe] = MMX_OP2(paddl), }; -static const SSEFunc_0_pp sse_op_table2[3 * 8][2] = { +static const SSEFunc_0_epp sse_op_table2[3 * 8][2] = { [0 + 2] = MMX_OP2(psrlw), [0 + 4] = MMX_OP2(psraw), [0 + 6] = MMX_OP2(psllw), @@ -2957,19 +3011,19 @@ static const SSEFunc_0_pp sse_op_table2[3 * 8][2] = { [16 + 7] = { NULL, gen_helper_pslldq_xmm }, }; -static const SSEFunc_0_pi sse_op_table3ai[] = { +static const SSEFunc_0_epi sse_op_table3ai[] = { gen_helper_cvtsi2ss, gen_helper_cvtsi2sd }; #ifdef TARGET_X86_64 -static const SSEFunc_0_pl sse_op_table3aq[] = { +static const SSEFunc_0_epl sse_op_table3aq[] = { gen_helper_cvtsq2ss, gen_helper_cvtsq2sd }; #endif -static const SSEFunc_i_p sse_op_table3bi[] = { +static const SSEFunc_i_ep sse_op_table3bi[] = { gen_helper_cvttss2si, gen_helper_cvtss2si, gen_helper_cvttsd2si, @@ -2977,7 +3031,7 @@ static const SSEFunc_i_p sse_op_table3bi[] = { }; #ifdef TARGET_X86_64 -static const SSEFunc_l_p sse_op_table3bq[] = { +static const SSEFunc_l_ep sse_op_table3bq[] = { gen_helper_cvttss2sq, gen_helper_cvtss2sq, gen_helper_cvttsd2sq, @@ -2985,7 +3039,7 @@ static const SSEFunc_l_p sse_op_table3bq[] = { }; #endif -static const SSEFunc_0_pp sse_op_table4[8][4] = { +static const SSEFunc_0_epp sse_op_table4[8][4] = { SSE_FOP(cmpeq), SSE_FOP(cmplt), SSE_FOP(cmple), @@ -2996,7 +3050,7 @@ static const SSEFunc_0_pp sse_op_table4[8][4] = { SSE_FOP(cmpord), }; -static const SSEFunc_0_pp sse_op_table5[256] = { +static const SSEFunc_0_epp sse_op_table5[256] = { [0x0c] = gen_helper_pi2fw, [0x0d] = gen_helper_pi2fd, [0x1c] = gen_helper_pf2iw, @@ -3023,13 +3077,13 @@ static const SSEFunc_0_pp sse_op_table5[256] = { [0xbf] = gen_helper_pavgb_mmx /* pavgusb */ }; -struct SSEOpHelper_pp { - SSEFunc_0_pp op[2]; +struct SSEOpHelper_epp { + SSEFunc_0_epp op[2]; uint32_t ext_mask; }; -struct SSEOpHelper_ppi { - SSEFunc_0_ppi op[2]; +struct SSEOpHelper_eppi { + SSEFunc_0_eppi op[2]; uint32_t ext_mask; }; @@ -3038,7 +3092,7 @@ struct SSEOpHelper_ppi { #define SSE42_OP(x) { { NULL, gen_helper_ ## x ## _xmm }, CPUID_EXT_SSE42 } #define SSE41_SPECIAL { { NULL, SSE_SPECIAL }, CPUID_EXT_SSE41 } -static const struct SSEOpHelper_pp sse_op_table6[256] = { +static const struct SSEOpHelper_epp sse_op_table6[256] = { [0x00] = SSSE3_OP(pshufb), [0x01] = SSSE3_OP(phaddw), [0x02] = SSSE3_OP(phaddd), @@ -3087,7 +3141,7 @@ static const struct SSEOpHelper_pp sse_op_table6[256] = { [0x41] = SSE41_OP(phminposuw), }; -static const struct SSEOpHelper_ppi sse_op_table7[256] = { +static const struct SSEOpHelper_eppi sse_op_table7[256] = { [0x08] = SSE41_OP(roundps), [0x09] = SSE41_OP(roundpd), [0x0a] = SSE41_OP(roundss), @@ -3116,9 +3170,10 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) { int b1, op1_offset, op2_offset, is_xmm, val, ot; int modrm, mod, rm, reg, reg_addr, offset_addr; - SSEFunc_0_pp sse_fn_pp; + SSEFunc_0_epp sse_fn_epp; + SSEFunc_0_eppi sse_fn_eppi; SSEFunc_0_ppi sse_fn_ppi; - SSEFunc_0_ppt sse_fn_ppt; + SSEFunc_0_eppt sse_fn_eppt; b &= 0xff; if (s->prefix & PREFIX_DATA) @@ -3129,8 +3184,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) b1 = 3; else b1 = 0; - sse_fn_pp = sse_op_table1[b][b1]; - if (!sse_fn_pp) { + sse_fn_epp = sse_op_table1[b][b1]; + if (!sse_fn_epp) { goto illegal_op; } if ((b <= 0x5f && b >= 0x10) || b == 0xc6 || b == 0xc2) { @@ -3160,26 +3215,26 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (!(s->cpuid_ext2_features & CPUID_EXT2_3DNOW)) goto illegal_op; /* femms */ - gen_helper_emms(); + gen_helper_emms(cpu_env); return; } if (b == 0x77) { /* emms */ - gen_helper_emms(); + gen_helper_emms(cpu_env); return; } /* prepare MMX state (XXX: optimize by storing fptt and fptags in the static cpu state) */ if (!is_xmm) { - gen_helper_enter_mmx(); + gen_helper_enter_mmx(cpu_env); } - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7); if (is_xmm) reg |= rex_r; mod = (modrm >> 6) & 3; - if (sse_fn_pp == SSE_SPECIAL) { + if (sse_fn_epp == SSE_SPECIAL) { b |= (b1 << 8); switch(b) { case 0x0e7: /* movntq */ @@ -3378,16 +3433,18 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (b1 == 1 && reg != 0) goto illegal_op; - field_length = ldub_code(s->pc++) & 0x3F; - bit_index = ldub_code(s->pc++) & 0x3F; + field_length = cpu_ldub_code(cpu_single_env, s->pc++) & 0x3F; + bit_index = cpu_ldub_code(cpu_single_env, s->pc++) & 0x3F; tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[reg])); if (b1 == 1) - gen_helper_extrq_i(cpu_ptr0, tcg_const_i32(bit_index), - tcg_const_i32(field_length)); + gen_helper_extrq_i(cpu_env, cpu_ptr0, + tcg_const_i32(bit_index), + tcg_const_i32(field_length)); else - gen_helper_insertq_i(cpu_ptr0, tcg_const_i32(bit_index), - tcg_const_i32(field_length)); + gen_helper_insertq_i(cpu_env, cpu_ptr0, + tcg_const_i32(bit_index), + tcg_const_i32(field_length)); } break; case 0x7e: /* movd ea, mm */ @@ -3502,7 +3559,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (b1 >= 2) { goto illegal_op; } - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (is_xmm) { gen_op_movl_T0_im(val); tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0))); @@ -3516,8 +3573,9 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,mmx_t0.MMX_L(1))); op1_offset = offsetof(CPUX86State,mmx_t0); } - sse_fn_pp = sse_op_table2[((b - 1) & 3) * 8 + (((modrm >> 3)) & 7)][b1]; - if (!sse_fn_pp) { + sse_fn_epp = sse_op_table2[((b - 1) & 3) * 8 + + (((modrm >> 3)) & 7)][b1]; + if (!sse_fn_epp) { goto illegal_op; } if (is_xmm) { @@ -3529,13 +3587,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) } tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op2_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op1_offset); - sse_fn_pp(cpu_ptr0, cpu_ptr1); + sse_fn_epp(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0x050: /* movmskps */ rm = (modrm & 7) | REX_B(s); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm])); - gen_helper_movmskps(cpu_tmp2_i32, cpu_ptr0); + gen_helper_movmskps(cpu_tmp2_i32, cpu_env, cpu_ptr0); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_mov_reg_T0(OT_LONG, reg); break; @@ -3543,13 +3601,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) rm = (modrm & 7) | REX_B(s); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm])); - gen_helper_movmskpd(cpu_tmp2_i32, cpu_ptr0); + gen_helper_movmskpd(cpu_tmp2_i32, cpu_env, cpu_ptr0); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_mov_reg_T0(OT_LONG, reg); break; case 0x02a: /* cvtpi2ps */ case 0x12a: /* cvtpi2pd */ - gen_helper_enter_mmx(); + gen_helper_enter_mmx(cpu_env); if (mod != 3) { gen_lea_modrm(s, modrm, ®_addr, &offset_addr); op2_offset = offsetof(CPUX86State,mmx_t0); @@ -3563,11 +3621,11 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); switch(b >> 8) { case 0x0: - gen_helper_cvtpi2ps(cpu_ptr0, cpu_ptr1); + gen_helper_cvtpi2ps(cpu_env, cpu_ptr0, cpu_ptr1); break; default: case 0x1: - gen_helper_cvtpi2pd(cpu_ptr0, cpu_ptr1); + gen_helper_cvtpi2pd(cpu_env, cpu_ptr0, cpu_ptr1); break; } break; @@ -3578,13 +3636,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) op1_offset = offsetof(CPUX86State,xmm_regs[reg]); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); if (ot == OT_LONG) { - SSEFunc_0_pi sse_fn_pi = sse_op_table3ai[(b >> 8) & 1]; + SSEFunc_0_epi sse_fn_epi = sse_op_table3ai[(b >> 8) & 1]; tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - sse_fn_pi(cpu_ptr0, cpu_tmp2_i32); + sse_fn_epi(cpu_env, cpu_ptr0, cpu_tmp2_i32); } else { #ifdef TARGET_X86_64 - SSEFunc_0_pl sse_fn_pl = sse_op_table3aq[(b >> 8) & 1]; - sse_fn_pl(cpu_ptr0, cpu_T[0]); + SSEFunc_0_epl sse_fn_epl = sse_op_table3aq[(b >> 8) & 1]; + sse_fn_epl(cpu_env, cpu_ptr0, cpu_T[0]); #else goto illegal_op; #endif @@ -3594,7 +3652,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) case 0x12c: /* cvttpd2pi */ case 0x02d: /* cvtps2pi */ case 0x12d: /* cvtpd2pi */ - gen_helper_enter_mmx(); + gen_helper_enter_mmx(cpu_env); if (mod != 3) { gen_lea_modrm(s, modrm, ®_addr, &offset_addr); op2_offset = offsetof(CPUX86State,xmm_t0); @@ -3608,16 +3666,16 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); switch(b) { case 0x02c: - gen_helper_cvttps2pi(cpu_ptr0, cpu_ptr1); + gen_helper_cvttps2pi(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0x12c: - gen_helper_cvttpd2pi(cpu_ptr0, cpu_ptr1); + gen_helper_cvttpd2pi(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0x02d: - gen_helper_cvtps2pi(cpu_ptr0, cpu_ptr1); + gen_helper_cvtps2pi(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0x12d: - gen_helper_cvtpd2pi(cpu_ptr0, cpu_ptr1); + gen_helper_cvtpd2pi(cpu_env, cpu_ptr0, cpu_ptr1); break; } break; @@ -3641,15 +3699,15 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) } tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op2_offset); if (ot == OT_LONG) { - SSEFunc_i_p sse_fn_i_p = + SSEFunc_i_ep sse_fn_i_ep = sse_op_table3bi[((b >> 7) & 2) | (b & 1)]; - sse_fn_i_p(cpu_tmp2_i32, cpu_ptr0); + sse_fn_i_ep(cpu_tmp2_i32, cpu_env, cpu_ptr0); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); } else { #ifdef TARGET_X86_64 - SSEFunc_l_p sse_fn_l_p = + SSEFunc_l_ep sse_fn_l_ep = sse_op_table3bq[((b >> 7) & 2) | (b & 1)]; - sse_fn_l_p(cpu_T[0], cpu_ptr0); + sse_fn_l_ep(cpu_T[0], cpu_env, cpu_ptr0); #else goto illegal_op; #endif @@ -3660,7 +3718,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) case 0x1c4: s->rip_offset = 1; gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (b1) { val &= 7; tcg_gen_st16_tl(cpu_T[0], cpu_env, @@ -3676,7 +3734,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (mod != 3) goto illegal_op; ot = (s->dflag == 2) ? OT_QUAD : OT_LONG; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (b1) { val &= 7; rm = (modrm & 7) | REX_B(s); @@ -3703,14 +3761,14 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) } break; case 0x2d6: /* movq2dq */ - gen_helper_enter_mmx(); + gen_helper_enter_mmx(cpu_env); rm = (modrm & 7); gen_op_movq(offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)), offsetof(CPUX86State,fpregs[rm].mmx)); gen_op_movq_env_0(offsetof(CPUX86State,xmm_regs[reg].XMM_Q(1))); break; case 0x3d6: /* movdq2q */ - gen_helper_enter_mmx(); + gen_helper_enter_mmx(cpu_env); rm = (modrm & 7) | REX_B(s); gen_op_movq(offsetof(CPUX86State,fpregs[reg & 7].mmx), offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0))); @@ -3722,11 +3780,11 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (b1) { rm = (modrm & 7) | REX_B(s); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm])); - gen_helper_pmovmskb_xmm(cpu_tmp2_i32, cpu_ptr0); + gen_helper_pmovmskb_xmm(cpu_tmp2_i32, cpu_env, cpu_ptr0); } else { rm = (modrm & 7); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,fpregs[rm].mmx)); - gen_helper_pmovmskb_mmx(cpu_tmp2_i32, cpu_ptr0); + gen_helper_pmovmskb_mmx(cpu_tmp2_i32, cpu_env, cpu_ptr0); } tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); reg = ((modrm >> 3) & 7) | rex_r; @@ -3737,7 +3795,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) goto crc32; case 0x038: b = modrm; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); rm = modrm & 7; reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; @@ -3745,8 +3803,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) goto illegal_op; } - sse_fn_pp = sse_op_table6[b].op[b1]; - if (!sse_fn_pp) { + sse_fn_epp = sse_op_table6[b].op[b1]; + if (!sse_fn_epp) { goto illegal_op; } if (!(s->cpuid_ext_features & sse_op_table6[b].ext_mask)) @@ -3797,13 +3855,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) gen_ldq_env_A0(s->mem_index, op2_offset); } } - if (sse_fn_pp == SSE_SPECIAL) { + if (sse_fn_epp == SSE_SPECIAL) { goto illegal_op; } tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); - sse_fn_pp(cpu_ptr0, cpu_ptr1); + sse_fn_epp(cpu_env, cpu_ptr0, cpu_ptr1); if (b == 0x17) s->cc_op = CC_OP_EFLAGS; @@ -3811,7 +3869,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) case 0x338: /* crc32 */ crc32: b = modrm; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; if (b != 0xf0 && b != 0xf1) @@ -3841,7 +3899,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) case 0x03a: case 0x13a: b = modrm; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); rm = modrm & 7; reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; @@ -3849,20 +3907,20 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) goto illegal_op; } - sse_fn_ppi = sse_op_table7[b].op[b1]; - if (!sse_fn_ppi) { + sse_fn_eppi = sse_op_table7[b].op[b1]; + if (!sse_fn_eppi) { goto illegal_op; } if (!(s->cpuid_ext_features & sse_op_table7[b].ext_mask)) goto illegal_op; - if (sse_fn_ppi == SSE_SPECIAL) { + if (sse_fn_eppi == SSE_SPECIAL) { ot = (s->dflag == 2) ? OT_QUAD : OT_LONG; rm = (modrm & 7) | REX_B(s); if (mod != 3) gen_lea_modrm(s, modrm, ®_addr, &offset_addr); reg = ((modrm >> 3) & 7) | rex_r; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); switch (b) { case 0x14: /* pextrb */ tcg_gen_ld8u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, @@ -4005,7 +4063,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) gen_ldq_env_A0(s->mem_index, op2_offset); } } - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if ((b & 0xfc) == 0x60) { /* pcmpXstrX */ s->cc_op = CC_OP_EFLAGS; @@ -4017,7 +4075,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); - sse_fn_ppi(cpu_ptr0, cpu_ptr1, tcg_const_i32(val)); + sse_fn_eppi(cpu_env, cpu_ptr0, cpu_ptr1, tcg_const_i32(val)); break; default: goto illegal_op; @@ -4071,34 +4129,34 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) case 0x0f: /* 3DNow! data insns */ if (!(s->cpuid_ext2_features & CPUID_EXT2_3DNOW)) goto illegal_op; - val = ldub_code(s->pc++); - sse_fn_pp = sse_op_table5[val]; - if (!sse_fn_pp) { + val = cpu_ldub_code(cpu_single_env, s->pc++); + sse_fn_epp = sse_op_table5[val]; + if (!sse_fn_epp) { goto illegal_op; } tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); - sse_fn_pp(cpu_ptr0, cpu_ptr1); + sse_fn_epp(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0x70: /* pshufx insn */ case 0xc6: /* pshufx insn */ - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); /* XXX: introduce a new table? */ - sse_fn_ppi = (SSEFunc_0_ppi)sse_fn_pp; + sse_fn_ppi = (SSEFunc_0_ppi)sse_fn_epp; sse_fn_ppi(cpu_ptr0, cpu_ptr1, tcg_const_i32(val)); break; case 0xc2: /* compare insns */ - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (val >= 8) goto illegal_op; - sse_fn_pp = sse_op_table4[val][b1]; + sse_fn_epp = sse_op_table4[val][b1]; tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); - sse_fn_pp(cpu_ptr0, cpu_ptr1); + sse_fn_epp(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0xf7: /* maskmov : we must prepare A0 */ @@ -4119,13 +4177,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); /* XXX: introduce a new table? */ - sse_fn_ppt = (SSEFunc_0_ppt)sse_fn_pp; - sse_fn_ppt(cpu_ptr0, cpu_ptr1, cpu_A0); + sse_fn_eppt = (SSEFunc_0_eppt)sse_fn_epp; + sse_fn_eppt(cpu_env, cpu_ptr0, cpu_ptr1, cpu_A0); break; default: tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); - sse_fn_pp(cpu_ptr0, cpu_ptr1); + sse_fn_epp(cpu_env, cpu_ptr0, cpu_ptr1); break; } if (b == 0x2e || b == 0x2f) { @@ -4160,7 +4218,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) #endif s->rip_offset = 0; /* for relative ip address */ next_byte: - b = ldub_code(s->pc); + b = cpu_ldub_code(cpu_single_env, s->pc); s->pc++; /* check prefixes */ #ifdef TARGET_X86_64 @@ -4275,7 +4333,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x0f: /**************************/ /* extended op code */ - b = ldub_code(s->pc++) | 0x100; + b = cpu_ldub_code(cpu_single_env, s->pc++) | 0x100; goto reswitch; /**************************/ @@ -4300,7 +4358,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(f) { case 0: /* OP Ev, Gv */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -4322,7 +4380,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op(s, op, ot, opreg); break; case 1: /* OP Gv, Ev */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; reg = ((modrm >> 3) & 7) | rex_r; rm = (modrm & 7) | REX_B(s); @@ -4359,7 +4417,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); op = (modrm >> 3) & 7; @@ -4408,7 +4466,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); op = (modrm >> 3) & 7; @@ -4506,7 +4564,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) break; #ifdef TARGET_X86_64 case OT_QUAD: - gen_helper_mulq_EAX_T0(cpu_T[0]); + gen_helper_mulq_EAX_T0(cpu_env, cpu_T[0]); s->cc_op = CC_OP_MULQ; break; #endif @@ -4576,7 +4634,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) break; #ifdef TARGET_X86_64 case OT_QUAD: - gen_helper_imulq_EAX_T0(cpu_T[0]); + gen_helper_imulq_EAX_T0(cpu_env, cpu_T[0]); s->cc_op = CC_OP_MULQ; break; #endif @@ -4586,21 +4644,21 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(ot) { case OT_BYTE: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divb_AL(cpu_T[0]); + gen_helper_divb_AL(cpu_env, cpu_T[0]); break; case OT_WORD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divw_AX(cpu_T[0]); + gen_helper_divw_AX(cpu_env, cpu_T[0]); break; default: case OT_LONG: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divl_EAX(cpu_T[0]); + gen_helper_divl_EAX(cpu_env, cpu_T[0]); break; #ifdef TARGET_X86_64 case OT_QUAD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divq_EAX(cpu_T[0]); + gen_helper_divq_EAX(cpu_env, cpu_T[0]); break; #endif } @@ -4609,21 +4667,21 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(ot) { case OT_BYTE: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivb_AL(cpu_T[0]); + gen_helper_idivb_AL(cpu_env, cpu_T[0]); break; case OT_WORD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivw_AX(cpu_T[0]); + gen_helper_idivw_AX(cpu_env, cpu_T[0]); break; default: case OT_LONG: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivl_EAX(cpu_T[0]); + gen_helper_idivl_EAX(cpu_env, cpu_T[0]); break; #ifdef TARGET_X86_64 case OT_QUAD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivq_EAX(cpu_T[0]); + gen_helper_idivq_EAX(cpu_env, cpu_T[0]); break; #endif } @@ -4640,7 +4698,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); op = (modrm >> 3) & 7; @@ -4701,13 +4759,13 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_lcall_protected(cpu_tmp2_i32, cpu_T[1], - tcg_const_i32(dflag), + gen_helper_lcall_protected(cpu_env, cpu_tmp2_i32, cpu_T[1], + tcg_const_i32(dflag), tcg_const_i32(s->pc - pc_start)); } else { tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_lcall_real(cpu_tmp2_i32, cpu_T[1], - tcg_const_i32(dflag), + gen_helper_lcall_real(cpu_env, cpu_tmp2_i32, cpu_T[1], + tcg_const_i32(dflag), tcg_const_i32(s->pc - s->cs_base)); } gen_eob(s); @@ -4728,7 +4786,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_ljmp_protected(cpu_tmp2_i32, cpu_T[1], + gen_helper_ljmp_protected(cpu_env, cpu_tmp2_i32, cpu_T[1], tcg_const_i32(s->pc - pc_start)); } else { gen_op_movl_seg_T0_vm(R_CS); @@ -4752,7 +4810,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0); @@ -4817,7 +4875,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x69: /* imul Gv, Ev, I */ case 0x6b: ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; if (b == 0x69) s->rip_offset = insn_const_size(ot); @@ -4836,7 +4894,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) #ifdef TARGET_X86_64 if (ot == OT_QUAD) { - gen_helper_imulq_T0_T1(cpu_T[0], cpu_T[0], cpu_T[1]); + gen_helper_imulq_T0_T1(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); } else #endif if (ot == OT_LONG) { @@ -4881,7 +4939,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; if (mod == 3) { @@ -4912,7 +4970,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; t0 = tcg_temp_local_new(); @@ -4960,7 +5018,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x1c7: /* cmpxchg8b */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; if ((mod == 3) || ((modrm & 0x38) != 0x8)) goto illegal_op; @@ -4972,7 +5030,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_lea_modrm(s, modrm, ®_addr, &offset_addr); - gen_helper_cmpxchg16b(cpu_A0); + gen_helper_cmpxchg16b(cpu_env, cpu_A0); } else #endif { @@ -4982,7 +5040,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_lea_modrm(s, modrm, ®_addr, &offset_addr); - gen_helper_cmpxchg8b(cpu_A0); + gen_helper_cmpxchg8b(cpu_env, cpu_A0); } s->cc_op = CC_OP_EFLAGS; break; @@ -5034,7 +5092,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { ot = dflag + OT_WORD; } - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; gen_pop_T0(s); if (mod == 3) { @@ -5053,9 +5111,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0xc8: /* enter */ { int level; - val = lduw_code(s->pc); + val = cpu_lduw_code(cpu_single_env, s->pc); s->pc += 2; - level = ldub_code(s->pc++); + level = cpu_ldub_code(cpu_single_env, s->pc++); gen_enter(s, val, level); } break; @@ -5108,7 +5166,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* If several instructions disable interrupts, only the _first_ does it */ if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK)) - gen_helper_set_inhibit_irq(); + gen_helper_set_inhibit_irq(cpu_env); s->tf = 0; } if (s->is_jmp) { @@ -5135,7 +5193,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; /* generate a generic store */ @@ -5147,7 +5205,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; if (mod != 3) { s->rip_offset = insn_const_size(ot); @@ -5166,14 +5224,14 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = OT_WORD + dflag; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0); gen_op_mov_reg_T0(ot, reg); break; case 0x8e: /* mov seg, Gv */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = (modrm >> 3) & 7; if (reg >= 6 || reg == R_CS) goto illegal_op; @@ -5184,7 +5242,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* If several instructions disable interrupts, only the _first_ does it */ if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK)) - gen_helper_set_inhibit_irq(); + gen_helper_set_inhibit_irq(cpu_env); s->tf = 0; } if (s->is_jmp) { @@ -5193,7 +5251,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x8c: /* mov Gv, seg */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = (modrm >> 3) & 7; mod = (modrm >> 6) & 3; if (reg >= 6) @@ -5216,7 +5274,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) d_ot = dflag + OT_WORD; /* ot is the size of source */ ot = (b & 1) + OT_BYTE; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -5253,7 +5311,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x8d: /* lea */ ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; if (mod == 3) goto illegal_op; @@ -5280,7 +5338,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = dflag + OT_WORD; #ifdef TARGET_X86_64 if (s->aflag == 2) { - offset_addr = ldq_code(s->pc); + offset_addr = cpu_ldq_code(cpu_single_env, s->pc); s->pc += 8; gen_op_movq_A0_im(offset_addr); } else @@ -5336,7 +5394,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (dflag == 2) { uint64_t tmp; /* 64 bit case */ - tmp = ldq_code(s->pc); + tmp = cpu_ldq_code(cpu_single_env, s->pc); s->pc += 8; reg = (b & 7) | REX_B(s); gen_movtl_T0_im(tmp); @@ -5364,7 +5422,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; if (mod == 3) { @@ -5407,7 +5465,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) op = R_GS; do_lxx: ot = dflag ? OT_LONG : OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; if (mod == 3) @@ -5439,7 +5497,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; @@ -5458,7 +5516,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_shift(s, op, ot, opreg, OR_ECX); } else { if (shift == 2) { - shift = ldub_code(s->pc++); + shift = cpu_ldub_code(cpu_single_env, s->pc++); } gen_shifti(s, op, ot, opreg, shift); } @@ -5492,7 +5550,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) shift = 0; do_shiftd: ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); reg = ((modrm >> 3) & 7) | rex_r; @@ -5505,7 +5563,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_mov_TN_reg(ot, 1, reg); if (shift) { - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); tcg_gen_movi_tl(cpu_T3, val); } else { tcg_gen_mov_tl(cpu_T3, cpu_regs[R_ECX]); @@ -5522,7 +5580,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP07_PREX, pc_start - s->cs_base); break; } - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; rm = modrm & 7; op = ((b & 7) << 3) | ((modrm >> 3) & 7); @@ -5542,30 +5600,30 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0: gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_flds_FT0(cpu_tmp2_i32); + gen_helper_flds_FT0(cpu_env, cpu_tmp2_i32); break; case 1: gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_fildl_FT0(cpu_tmp2_i32); + gen_helper_fildl_FT0(cpu_env, cpu_tmp2_i32); break; case 2: tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); - gen_helper_fldl_FT0(cpu_tmp1_i64); + gen_helper_fldl_FT0(cpu_env, cpu_tmp1_i64); break; case 3: default: gen_op_lds_T0_A0(OT_WORD + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_fildl_FT0(cpu_tmp2_i32); + gen_helper_fildl_FT0(cpu_env, cpu_tmp2_i32); break; } gen_helper_fp_arith_ST0_FT0(op1); if (op1 == 3) { /* fcomp needs pop */ - gen_helper_fpop(); + gen_helper_fpop(cpu_env); } } break; @@ -5581,23 +5639,23 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0: gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_flds_ST0(cpu_tmp2_i32); + gen_helper_flds_ST0(cpu_env, cpu_tmp2_i32); break; case 1: gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_fildl_ST0(cpu_tmp2_i32); + gen_helper_fildl_ST0(cpu_env, cpu_tmp2_i32); break; case 2: tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); - gen_helper_fldl_ST0(cpu_tmp1_i64); + gen_helper_fldl_ST0(cpu_env, cpu_tmp1_i64); break; case 3: default: gen_op_lds_T0_A0(OT_WORD + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_fildl_ST0(cpu_tmp2_i32); + gen_helper_fildl_ST0(cpu_env, cpu_tmp2_i32); break; } break; @@ -5605,50 +5663,50 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* XXX: the corresponding CPUID bit must be tested ! */ switch(op >> 4) { case 1: - gen_helper_fisttl_ST0(cpu_tmp2_i32); + gen_helper_fisttl_ST0(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_LONG + s->mem_index); break; case 2: - gen_helper_fisttll_ST0(cpu_tmp1_i64); + gen_helper_fisttll_ST0(cpu_tmp1_i64, cpu_env); tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); break; case 3: default: - gen_helper_fistt_ST0(cpu_tmp2_i32); + gen_helper_fistt_ST0(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_WORD + s->mem_index); break; } - gen_helper_fpop(); + gen_helper_fpop(cpu_env); break; default: switch(op >> 4) { case 0: - gen_helper_fsts_ST0(cpu_tmp2_i32); + gen_helper_fsts_ST0(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_LONG + s->mem_index); break; case 1: - gen_helper_fistl_ST0(cpu_tmp2_i32); + gen_helper_fistl_ST0(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_LONG + s->mem_index); break; case 2: - gen_helper_fstl_ST0(cpu_tmp1_i64); + gen_helper_fstl_ST0(cpu_tmp1_i64, cpu_env); tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); break; case 3: default: - gen_helper_fist_ST0(cpu_tmp2_i32); + gen_helper_fist_ST0(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_WORD + s->mem_index); break; } if ((op & 7) == 3) - gen_helper_fpop(); + gen_helper_fpop(cpu_env); break; } break; @@ -5656,22 +5714,21 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fldenv( - cpu_A0, tcg_const_i32(s->dflag)); + gen_helper_fldenv(cpu_env, cpu_A0, tcg_const_i32(s->dflag)); break; case 0x0d: /* fldcw mem */ gen_op_ld_T0_A0(OT_WORD + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_fldcw(cpu_tmp2_i32); + gen_helper_fldcw(cpu_env, cpu_tmp2_i32); break; case 0x0e: /* fnstenv mem */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fstenv(cpu_A0, tcg_const_i32(s->dflag)); + gen_helper_fstenv(cpu_env, cpu_A0, tcg_const_i32(s->dflag)); break; case 0x0f: /* fnstcw mem */ - gen_helper_fnstcw(cpu_tmp2_i32); + gen_helper_fnstcw(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_WORD + s->mem_index); break; @@ -5679,29 +5736,29 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fldt_ST0(cpu_A0); + gen_helper_fldt_ST0(cpu_env, cpu_A0); break; case 0x1f: /* fstpt mem */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fstt_ST0(cpu_A0); - gen_helper_fpop(); + gen_helper_fstt_ST0(cpu_env, cpu_A0); + gen_helper_fpop(cpu_env); break; case 0x2c: /* frstor mem */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_frstor(cpu_A0, tcg_const_i32(s->dflag)); + gen_helper_frstor(cpu_env, cpu_A0, tcg_const_i32(s->dflag)); break; case 0x2e: /* fnsave mem */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fsave(cpu_A0, tcg_const_i32(s->dflag)); + gen_helper_fsave(cpu_env, cpu_A0, tcg_const_i32(s->dflag)); break; case 0x2f: /* fnstsw mem */ - gen_helper_fnstsw(cpu_tmp2_i32); + gen_helper_fnstsw(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_WORD + s->mem_index); break; @@ -5709,25 +5766,25 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fbld_ST0(cpu_A0); + gen_helper_fbld_ST0(cpu_env, cpu_A0); break; case 0x3e: /* fbstp */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fbst_ST0(cpu_A0); - gen_helper_fpop(); + gen_helper_fbst_ST0(cpu_env, cpu_A0); + gen_helper_fpop(cpu_env); break; case 0x3d: /* fildll */ tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); - gen_helper_fildll_ST0(cpu_tmp1_i64); + gen_helper_fildll_ST0(cpu_env, cpu_tmp1_i64); break; case 0x3f: /* fistpll */ - gen_helper_fistll_ST0(cpu_tmp1_i64); + gen_helper_fistll_ST0(cpu_tmp1_i64, cpu_env); tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); - gen_helper_fpop(); + gen_helper_fpop(cpu_env); break; default: goto illegal_op; @@ -5738,13 +5795,14 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(op) { case 0x08: /* fld sti */ - gen_helper_fpush(); - gen_helper_fmov_ST0_STN(tcg_const_i32((opreg + 1) & 7)); + gen_helper_fpush(cpu_env); + gen_helper_fmov_ST0_STN(cpu_env, + tcg_const_i32((opreg + 1) & 7)); break; case 0x09: /* fxchg sti */ case 0x29: /* fxchg4 sti, undocumented op */ case 0x39: /* fxchg7 sti, undocumented op */ - gen_helper_fxchg_ST0_STN(tcg_const_i32(opreg)); + gen_helper_fxchg_ST0_STN(cpu_env, tcg_const_i32(opreg)); break; case 0x0a: /* grp d9/2 */ switch(rm) { @@ -5753,7 +5811,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fwait(); + gen_helper_fwait(cpu_env); break; default: goto illegal_op; @@ -5762,17 +5820,17 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x0c: /* grp d9/4 */ switch(rm) { case 0: /* fchs */ - gen_helper_fchs_ST0(); + gen_helper_fchs_ST0(cpu_env); break; case 1: /* fabs */ - gen_helper_fabs_ST0(); + gen_helper_fabs_ST0(cpu_env); break; case 4: /* ftst */ - gen_helper_fldz_FT0(); - gen_helper_fcom_ST0_FT0(); + gen_helper_fldz_FT0(cpu_env); + gen_helper_fcom_ST0_FT0(cpu_env); break; case 5: /* fxam */ - gen_helper_fxam_ST0(); + gen_helper_fxam_ST0(cpu_env); break; default: goto illegal_op; @@ -5782,32 +5840,32 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) { switch(rm) { case 0: - gen_helper_fpush(); - gen_helper_fld1_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fld1_ST0(cpu_env); break; case 1: - gen_helper_fpush(); - gen_helper_fldl2t_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldl2t_ST0(cpu_env); break; case 2: - gen_helper_fpush(); - gen_helper_fldl2e_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldl2e_ST0(cpu_env); break; case 3: - gen_helper_fpush(); - gen_helper_fldpi_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldpi_ST0(cpu_env); break; case 4: - gen_helper_fpush(); - gen_helper_fldlg2_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldlg2_ST0(cpu_env); break; case 5: - gen_helper_fpush(); - gen_helper_fldln2_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldln2_ST0(cpu_env); break; case 6: - gen_helper_fpush(); - gen_helper_fldz_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldz_ST0(cpu_env); break; default: goto illegal_op; @@ -5817,58 +5875,58 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x0e: /* grp d9/6 */ switch(rm) { case 0: /* f2xm1 */ - gen_helper_f2xm1(); + gen_helper_f2xm1(cpu_env); break; case 1: /* fyl2x */ - gen_helper_fyl2x(); + gen_helper_fyl2x(cpu_env); break; case 2: /* fptan */ - gen_helper_fptan(); + gen_helper_fptan(cpu_env); break; case 3: /* fpatan */ - gen_helper_fpatan(); + gen_helper_fpatan(cpu_env); break; case 4: /* fxtract */ - gen_helper_fxtract(); + gen_helper_fxtract(cpu_env); break; case 5: /* fprem1 */ - gen_helper_fprem1(); + gen_helper_fprem1(cpu_env); break; case 6: /* fdecstp */ - gen_helper_fdecstp(); + gen_helper_fdecstp(cpu_env); break; default: case 7: /* fincstp */ - gen_helper_fincstp(); + gen_helper_fincstp(cpu_env); break; } break; case 0x0f: /* grp d9/7 */ switch(rm) { case 0: /* fprem */ - gen_helper_fprem(); + gen_helper_fprem(cpu_env); break; case 1: /* fyl2xp1 */ - gen_helper_fyl2xp1(); + gen_helper_fyl2xp1(cpu_env); break; case 2: /* fsqrt */ - gen_helper_fsqrt(); + gen_helper_fsqrt(cpu_env); break; case 3: /* fsincos */ - gen_helper_fsincos(); + gen_helper_fsincos(cpu_env); break; case 5: /* fscale */ - gen_helper_fscale(); + gen_helper_fscale(cpu_env); break; case 4: /* frndint */ - gen_helper_frndint(); + gen_helper_frndint(cpu_env); break; case 6: /* fsin */ - gen_helper_fsin(); + gen_helper_fsin(cpu_env); break; default: case 7: /* fcos */ - gen_helper_fcos(); + gen_helper_fcos(cpu_env); break; } break; @@ -5882,32 +5940,32 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (op >= 0x20) { gen_helper_fp_arith_STN_ST0(op1, opreg); if (op >= 0x30) - gen_helper_fpop(); + gen_helper_fpop(cpu_env); } else { - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); gen_helper_fp_arith_ST0_FT0(op1); } } break; case 0x02: /* fcom */ case 0x22: /* fcom2, undocumented op */ - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fcom_ST0_FT0(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fcom_ST0_FT0(cpu_env); break; case 0x03: /* fcomp */ case 0x23: /* fcomp3, undocumented op */ case 0x32: /* fcomp5, undocumented op */ - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fcom_ST0_FT0(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fcom_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); break; case 0x15: /* da/5 */ switch(rm) { case 1: /* fucompp */ - gen_helper_fmov_FT0_STN(tcg_const_i32(1)); - gen_helper_fucom_ST0_FT0(); - gen_helper_fpop(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(1)); + gen_helper_fucom_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); + gen_helper_fpop(cpu_env); break; default: goto illegal_op; @@ -5920,10 +5978,10 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 1: /* fdisi (287 only, just do nop here) */ break; case 2: /* fclex */ - gen_helper_fclex(); + gen_helper_fclex(cpu_env); break; case 3: /* fninit */ - gen_helper_fninit(); + gen_helper_fninit(cpu_env); break; case 4: /* fsetpm (287 only, just do nop here) */ break; @@ -5934,59 +5992,59 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x1d: /* fucomi */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fucomi_ST0_FT0(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fucomi_ST0_FT0(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x1e: /* fcomi */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fcomi_ST0_FT0(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fcomi_ST0_FT0(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x28: /* ffree sti */ - gen_helper_ffree_STN(tcg_const_i32(opreg)); + gen_helper_ffree_STN(cpu_env, tcg_const_i32(opreg)); break; case 0x2a: /* fst sti */ - gen_helper_fmov_STN_ST0(tcg_const_i32(opreg)); + gen_helper_fmov_STN_ST0(cpu_env, tcg_const_i32(opreg)); break; case 0x2b: /* fstp sti */ case 0x0b: /* fstp1 sti, undocumented op */ case 0x3a: /* fstp8 sti, undocumented op */ case 0x3b: /* fstp9 sti, undocumented op */ - gen_helper_fmov_STN_ST0(tcg_const_i32(opreg)); - gen_helper_fpop(); + gen_helper_fmov_STN_ST0(cpu_env, tcg_const_i32(opreg)); + gen_helper_fpop(cpu_env); break; case 0x2c: /* fucom st(i) */ - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fucom_ST0_FT0(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fucom_ST0_FT0(cpu_env); break; case 0x2d: /* fucomp st(i) */ - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fucom_ST0_FT0(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fucom_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); break; case 0x33: /* de/3 */ switch(rm) { case 1: /* fcompp */ - gen_helper_fmov_FT0_STN(tcg_const_i32(1)); - gen_helper_fcom_ST0_FT0(); - gen_helper_fpop(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(1)); + gen_helper_fcom_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); + gen_helper_fpop(cpu_env); break; default: goto illegal_op; } break; case 0x38: /* ffreep sti, undocumented op */ - gen_helper_ffree_STN(tcg_const_i32(opreg)); - gen_helper_fpop(); + gen_helper_ffree_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fpop(cpu_env); break; case 0x3c: /* df/4 */ switch(rm) { case 0: - gen_helper_fnstsw(cpu_tmp2_i32); + gen_helper_fnstsw(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_mov_reg_T0(OT_WORD, R_EAX); break; @@ -5997,17 +6055,17 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x3d: /* fucomip */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fucomi_ST0_FT0(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fucomi_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x3e: /* fcomip */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fcomi_ST0_FT0(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fcomi_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x10 ... 0x13: /* fcmovxx */ @@ -6023,7 +6081,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) op1 = fcmov_cc[op & 3] | (((op >> 3) & 1) ^ 1); l1 = gen_new_label(); gen_jcc1(s, s->cc_op, op1, l1); - gen_helper_fmov_ST0_STN(tcg_const_i32(opreg)); + gen_helper_fmov_ST0_STN(cpu_env, tcg_const_i32(opreg)); gen_set_label(l1); } break; @@ -6153,7 +6211,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag ? OT_LONG : OT_WORD; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); gen_op_movl_T0_im(val); gen_check_io(s, ot, pc_start - s->cs_base, SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); @@ -6173,7 +6231,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag ? OT_LONG : OT_WORD; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); gen_op_movl_T0_im(val); gen_check_io(s, ot, pc_start - s->cs_base, svm_is_rep(prefixes)); @@ -6235,7 +6293,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /************************/ /* control */ case 0xc2: /* ret im */ - val = ldsw_code(s->pc); + val = cpu_ldsw_code(cpu_single_env, s->pc); s->pc += 2; gen_pop_T0(s); if (CODE64(s) && s->dflag) @@ -6255,14 +6313,14 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_eob(s); break; case 0xca: /* lret im */ - val = ldsw_code(s->pc); + val = cpu_ldsw_code(cpu_single_env, s->pc); s->pc += 2; do_lret: if (s->pe && !s->vm86) { if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_lret_protected(tcg_const_i32(s->dflag), + gen_helper_lret_protected(cpu_env, tcg_const_i32(s->dflag), tcg_const_i32(val)); } else { gen_stack_A0(s); @@ -6289,20 +6347,20 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_svm_check_intercept(s, pc_start, SVM_EXIT_IRET); if (!s->pe) { /* real mode */ - gen_helper_iret_real(tcg_const_i32(s->dflag)); + gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag)); s->cc_op = CC_OP_EFLAGS; } else if (s->vm86) { if (s->iopl != 3) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { - gen_helper_iret_real(tcg_const_i32(s->dflag)); + gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag)); s->cc_op = CC_OP_EFLAGS; } } else { if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_iret_protected(tcg_const_i32(s->dflag), + gen_helper_iret_protected(cpu_env, tcg_const_i32(s->dflag), tcg_const_i32(s->pc - s->cs_base)); s->cc_op = CC_OP_EFLAGS; } @@ -6390,7 +6448,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) break; case 0x190 ... 0x19f: /* setcc Gv */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); gen_setcc(s, b); gen_ldst_modrm(s, modrm, OT_BYTE, OR_TMP0, 1); break; @@ -6400,7 +6458,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) TCGv t0; ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; t0 = tcg_temp_local_new(); @@ -6440,7 +6498,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_read_eflags(cpu_T[0]); + gen_helper_read_eflags(cpu_T[0], cpu_env); gen_push_T0(s); } break; @@ -6452,28 +6510,46 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_pop_T0(s); if (s->cpl == 0) { if (s->dflag) { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK))); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | AC_MASK | + ID_MASK | NT_MASK | + IF_MASK | + IOPL_MASK))); } else { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff)); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | AC_MASK | + ID_MASK | NT_MASK | + IF_MASK | IOPL_MASK) + & 0xffff)); } } else { if (s->cpl <= s->iopl) { if (s->dflag) { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK))); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | + AC_MASK | + ID_MASK | + NT_MASK | + IF_MASK))); } else { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff)); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | + AC_MASK | + ID_MASK | + NT_MASK | + IF_MASK) + & 0xffff)); } } else { if (s->dflag) { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK))); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | AC_MASK | + ID_MASK | NT_MASK))); } else { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff)); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | AC_MASK | + ID_MASK | NT_MASK) + & 0xffff)); } } } @@ -6540,7 +6616,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* bit operations */ case 0x1ba: /* bt/bts/btr/btc Gv, im */ ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); op = (modrm >> 3) & 7; mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -6552,7 +6628,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_mov_TN_reg(ot, 0, rm); } /* load shift */ - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); gen_op_movl_T1_im(val); if (op < 4) goto illegal_op; @@ -6571,7 +6647,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) op = 3; do_btx: ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -6632,7 +6708,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) TCGv t0; ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; gen_ldst_modrm(s,modrm, ot, OR_TMP0, 0); gen_extu(ot, cpu_T[0]); @@ -6674,7 +6750,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_daa(); + gen_helper_daa(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x2f: /* das */ @@ -6682,7 +6758,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_das(); + gen_helper_das(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x37: /* aaa */ @@ -6690,7 +6766,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_aaa(); + gen_helper_aaa(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x3f: /* aas */ @@ -6698,25 +6774,25 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_aas(); + gen_helper_aas(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0xd4: /* aam */ if (CODE64(s)) goto illegal_op; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (val == 0) { gen_exception(s, EXCP00_DIVZ, pc_start - s->cs_base); } else { - gen_helper_aam(tcg_const_i32(val)); + gen_helper_aam(cpu_env, tcg_const_i32(val)); s->cc_op = CC_OP_LOGICB; } break; case 0xd5: /* aad */ if (CODE64(s)) goto illegal_op; - val = ldub_code(s->pc++); - gen_helper_aad(tcg_const_i32(val)); + val = cpu_ldub_code(cpu_single_env, s->pc++); + gen_helper_aad(cpu_env, tcg_const_i32(val)); s->cc_op = CC_OP_LOGICB; break; /************************/ @@ -6742,14 +6818,14 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fwait(); + gen_helper_fwait(cpu_env); } break; case 0xcc: /* int3 */ gen_interrupt(s, EXCP03_INT3, pc_start - s->cs_base, s->pc - s->cs_base); break; case 0xcd: /* int N */ - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (s->vm86 && s->iopl != 3) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { @@ -6762,7 +6838,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_into(tcg_const_i32(s->pc - pc_start)); + gen_helper_into(cpu_env, tcg_const_i32(s->pc - pc_start)); break; #ifdef WANT_ICEBP case 0xf1: /* icebp (undocumented, exits to external debugger) */ @@ -6779,13 +6855,13 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0xfa: /* cli */ if (!s->vm86) { if (s->cpl <= s->iopl) { - gen_helper_cli(); + gen_helper_cli(cpu_env); } else { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } } else { if (s->iopl == 3) { - gen_helper_cli(); + gen_helper_cli(cpu_env); } else { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } @@ -6795,12 +6871,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (!s->vm86) { if (s->cpl <= s->iopl) { gen_sti: - gen_helper_sti(); + gen_helper_sti(cpu_env); /* interruptions are enabled only the first insn after sti */ /* If several instructions disable interrupts, only the _first_ does it */ if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK)) - gen_helper_set_inhibit_irq(); + gen_helper_set_inhibit_irq(cpu_env); /* give a chance to handle pending irqs */ gen_jmp_im(s->pc - s->cs_base); gen_eob(s); @@ -6819,7 +6895,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (CODE64(s)) goto illegal_op; ot = dflag ? OT_LONG : OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = (modrm >> 3) & 7; mod = (modrm >> 6) & 3; if (mod == 3) @@ -6828,10 +6904,11 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_lea_modrm(s, modrm, ®_addr, &offset_addr); gen_jmp_im(pc_start - s->cs_base); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - if (ot == OT_WORD) - gen_helper_boundw(cpu_A0, cpu_tmp2_i32); - else - gen_helper_boundl(cpu_A0, cpu_tmp2_i32); + if (ot == OT_WORD) { + gen_helper_boundw(cpu_env, cpu_A0, cpu_tmp2_i32); + } else { + gen_helper_boundl(cpu_env, cpu_A0, cpu_tmp2_i32); + } break; case 0x1c8 ... 0x1cf: /* bswap reg */ reg = (b & 7) | REX_B(s); @@ -6919,9 +6996,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); if (b & 2) { - gen_helper_rdmsr(); + gen_helper_rdmsr(cpu_env); } else { - gen_helper_wrmsr(); + gen_helper_wrmsr(cpu_env); } } break; @@ -6931,7 +7008,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_jmp_im(pc_start - s->cs_base); if (use_icount) gen_io_start(); - gen_helper_rdtsc(); + gen_helper_rdtsc(cpu_env); if (use_icount) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); @@ -6941,7 +7018,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_rdpmc(); + gen_helper_rdpmc(cpu_env); break; case 0x134: /* sysenter */ /* For Intel SYSENTER is valid on 64-bit */ @@ -6952,7 +7029,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - gen_helper_sysenter(); + gen_helper_sysenter(cpu_env); gen_eob(s); } break; @@ -6965,7 +7042,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - gen_helper_sysexit(tcg_const_i32(dflag)); + gen_helper_sysexit(cpu_env, tcg_const_i32(dflag)); gen_eob(s); } break; @@ -6974,7 +7051,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* XXX: is it usable in real mode ? */ gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - gen_helper_syscall(tcg_const_i32(s->pc - pc_start)); + gen_helper_syscall(cpu_env, tcg_const_i32(s->pc - pc_start)); gen_eob(s); break; case 0x107: /* sysret */ @@ -6983,7 +7060,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - gen_helper_sysret(tcg_const_i32(s->dflag)); + gen_helper_sysret(cpu_env, tcg_const_i32(s->dflag)); /* condition codes are modified only in long mode */ if (s->lma) s->cc_op = CC_OP_EFLAGS; @@ -6995,7 +7072,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_cpuid(); + gen_helper_cpuid(cpu_env); break; case 0xf4: /* hlt */ if (s->cpl != 0) { @@ -7004,12 +7081,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_hlt(tcg_const_i32(s->pc - pc_start)); + gen_helper_hlt(cpu_env, tcg_const_i32(s->pc - pc_start)); s->is_jmp = DISAS_TB_JUMP; } break; case 0x100: - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; switch(op) { @@ -7033,7 +7110,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); gen_jmp_im(pc_start - s->cs_base); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_lldt(cpu_tmp2_i32); + gen_helper_lldt(cpu_env, cpu_tmp2_i32); } break; case 1: /* str */ @@ -7056,7 +7133,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); gen_jmp_im(pc_start - s->cs_base); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_ltr(cpu_tmp2_i32); + gen_helper_ltr(cpu_env, cpu_tmp2_i32); } break; case 4: /* verr */ @@ -7066,10 +7143,11 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - if (op == 4) - gen_helper_verr(cpu_T[0]); - else - gen_helper_verw(cpu_T[0]); + if (op == 4) { + gen_helper_verr(cpu_env, cpu_T[0]); + } else { + gen_helper_verw(cpu_env, cpu_T[0]); + } s->cc_op = CC_OP_EFLAGS; break; default: @@ -7077,7 +7155,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x101: - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; rm = modrm & 7; @@ -7116,7 +7194,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_andl_A0_ffff(); } gen_add_A0_ds_seg(s); - gen_helper_monitor(cpu_A0); + gen_helper_monitor(cpu_env, cpu_A0); break; case 1: /* mwait */ if (!(s->cpuid_ext_features & CPUID_EXT_MONITOR) || @@ -7124,7 +7202,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - gen_helper_mwait(tcg_const_i32(s->pc - pc_start)); + gen_helper_mwait(cpu_env, tcg_const_i32(s->pc - pc_start)); gen_eob(s); break; default: @@ -7156,7 +7234,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_vmrun(tcg_const_i32(s->aflag), + gen_helper_vmrun(cpu_env, tcg_const_i32(s->aflag), tcg_const_i32(s->pc - pc_start)); tcg_gen_exit_tb(0); s->is_jmp = DISAS_TB_JUMP; @@ -7165,7 +7243,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 1: /* VMMCALL */ if (!(s->flags & HF_SVME_MASK)) goto illegal_op; - gen_helper_vmmcall(); + gen_helper_vmmcall(cpu_env); break; case 2: /* VMLOAD */ if (!(s->flags & HF_SVME_MASK) || !s->pe) @@ -7174,7 +7252,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_vmload(tcg_const_i32(s->aflag)); + gen_helper_vmload(cpu_env, tcg_const_i32(s->aflag)); } break; case 3: /* VMSAVE */ @@ -7184,7 +7262,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_vmsave(tcg_const_i32(s->aflag)); + gen_helper_vmsave(cpu_env, tcg_const_i32(s->aflag)); } break; case 4: /* STGI */ @@ -7196,7 +7274,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_stgi(); + gen_helper_stgi(cpu_env); } break; case 5: /* CLGI */ @@ -7206,7 +7284,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_clgi(); + gen_helper_clgi(cpu_env); } break; case 6: /* SKINIT */ @@ -7214,7 +7292,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) !(s->cpuid_ext3_features & CPUID_EXT3_SKINIT)) || !s->pe) goto illegal_op; - gen_helper_skinit(); + gen_helper_skinit(cpu_env); break; case 7: /* INVLPGA */ if (!(s->flags & HF_SVME_MASK) || !s->pe) @@ -7223,7 +7301,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_invlpga(tcg_const_i32(s->aflag)); + gen_helper_invlpga(cpu_env, tcg_const_i32(s->aflag)); } break; default: @@ -7264,7 +7342,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0); gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); - gen_helper_lmsw(cpu_T[0]); + gen_helper_lmsw(cpu_env, cpu_T[0]); gen_jmp_im(s->pc - s->cs_base); gen_eob(s); } @@ -7278,7 +7356,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); gen_lea_modrm(s, modrm, ®_addr, &offset_addr); - gen_helper_invlpg(cpu_A0); + gen_helper_invlpg(cpu_env, cpu_A0); gen_jmp_im(s->pc - s->cs_base); gen_eob(s); } @@ -7313,7 +7391,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_jmp_im(pc_start - s->cs_base); if (use_icount) gen_io_start(); - gen_helper_rdtscp(); + gen_helper_rdtscp(cpu_env); if (use_icount) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); @@ -7344,7 +7422,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* d_ot is the size of destination */ d_ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -7376,7 +7454,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) t1 = tcg_temp_local_new(); t2 = tcg_temp_local_new(); ot = OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = (modrm >> 3) & 7; mod = (modrm >> 6) & 3; rm = modrm & 7; @@ -7424,16 +7502,17 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (!s->pe || s->vm86) goto illegal_op; ot = dflag ? OT_LONG : OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); t0 = tcg_temp_local_new(); if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - if (b == 0x102) - gen_helper_lar(t0, cpu_T[0]); - else - gen_helper_lsl(t0, cpu_T[0]); + if (b == 0x102) { + gen_helper_lar(t0, cpu_env, cpu_T[0]); + } else { + gen_helper_lsl(t0, cpu_env, cpu_T[0]); + } tcg_gen_andi_tl(cpu_tmp0, cpu_cc_src, CC_Z); label1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1); @@ -7444,7 +7523,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x118: - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; switch(op) { @@ -7463,7 +7542,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x119 ... 0x11f: /* nop (multi byte) */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); gen_nop_modrm(s, modrm); break; case 0x120: /* mov reg, crN */ @@ -7471,9 +7550,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cpl != 0) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { - modrm = ldub_code(s->pc++); - if ((modrm & 0xc0) != 0xc0) - goto illegal_op; + modrm = cpu_ldub_code(cpu_single_env, s->pc++); + /* Ignore the mod bits (assume (modrm&0xc0)==0xc0). + * AMD documentation (24594.pdf) and testing of + * intel 386 and 486 processors all show that the mod bits + * are assumed to be 1's, regardless of actual values. + */ rm = (modrm & 7) | REX_B(s); reg = ((modrm >> 3) & 7) | rex_r; if (CODE64(s)) @@ -7495,11 +7577,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_jmp_im(pc_start - s->cs_base); if (b & 2) { gen_op_mov_TN_reg(ot, 0, rm); - gen_helper_write_crN(tcg_const_i32(reg), cpu_T[0]); + gen_helper_write_crN(cpu_env, tcg_const_i32(reg), + cpu_T[0]); gen_jmp_im(s->pc - s->cs_base); gen_eob(s); } else { - gen_helper_read_crN(cpu_T[0], tcg_const_i32(reg)); + gen_helper_read_crN(cpu_T[0], cpu_env, tcg_const_i32(reg)); gen_op_mov_reg_T0(ot, rm); } break; @@ -7513,9 +7596,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cpl != 0) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { - modrm = ldub_code(s->pc++); - if ((modrm & 0xc0) != 0xc0) - goto illegal_op; + modrm = cpu_ldub_code(cpu_single_env, s->pc++); + /* Ignore the mod bits (assume (modrm&0xc0)==0xc0). + * AMD documentation (24594.pdf) and testing of + * intel 386 and 486 processors all show that the mod bits + * are assumed to be 1's, regardless of actual values. + */ rm = (modrm & 7) | REX_B(s); reg = ((modrm >> 3) & 7) | rex_r; if (CODE64(s)) @@ -7528,7 +7614,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (b & 2) { gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_DR0 + reg); gen_op_mov_TN_reg(ot, 0, rm); - gen_helper_movl_drN_T0(tcg_const_i32(reg), cpu_T[0]); + gen_helper_movl_drN_T0(cpu_env, tcg_const_i32(reg), cpu_T[0]); gen_jmp_im(s->pc - s->cs_base); gen_eob(s); } else { @@ -7543,7 +7629,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0); - gen_helper_clts(); + gen_helper_clts(cpu_env); /* abort block because static cpu state changed */ gen_jmp_im(s->pc - s->cs_base); gen_eob(s); @@ -7554,7 +7640,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (!(s->cpuid_features & CPUID_SSE2)) goto illegal_op; ot = s->dflag == 2 ? OT_QUAD : OT_LONG; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; if (mod == 3) goto illegal_op; @@ -7563,7 +7649,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_ldst_modrm(s, modrm, ot, reg, 1); break; case 0x1ae: - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; switch(op) { @@ -7579,7 +7665,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fxsave(cpu_A0, tcg_const_i32((s->dflag == 2))); + gen_helper_fxsave(cpu_env, cpu_A0, tcg_const_i32((s->dflag == 2))); break; case 1: /* fxrstor */ if (mod == 3 || !(s->cpuid_features & CPUID_FXSR) || @@ -7593,7 +7679,8 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fxrstor(cpu_A0, tcg_const_i32((s->dflag == 2))); + gen_helper_fxrstor(cpu_env, cpu_A0, + tcg_const_i32((s->dflag == 2))); break; case 2: /* ldmxcsr */ case 3: /* stmxcsr */ @@ -7608,7 +7695,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (op == 2) { gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_ldmxcsr(cpu_tmp2_i32); + gen_helper_ldmxcsr(cpu_env, cpu_tmp2_i32); } else { tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, mxcsr)); gen_op_st_T0_A0(OT_LONG + s->mem_index); @@ -7637,7 +7724,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x10d: /* 3DNow! prefetch(w) */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; if (mod == 3) goto illegal_op; @@ -7650,7 +7737,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; gen_update_cc_op(s); gen_jmp_im(s->pc - s->cs_base); - gen_helper_rsm(); + gen_helper_rsm(cpu_env); gen_eob(s); break; case 0x1b8: /* SSE4.2 popcnt */ @@ -7660,7 +7747,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (!(s->cpuid_ext_features & CPUID_EXT_POPCNT)) goto illegal_op; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7); if (s->prefix & PREFIX_DATA) @@ -7671,7 +7758,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_QUAD; gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0); - gen_helper_popcnt(cpu_T[0], cpu_T[0], tcg_const_i32(ot)); + gen_helper_popcnt(cpu_T[0], cpu_env, cpu_T[0], tcg_const_i32(ot)); gen_op_mov_reg_T0(ot, reg); s->cc_op = CC_OP_EFLAGS; |