onsuccess: #201: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O1-build/201/

Results :
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe bootstrap_O1:
  | 1

check_regression status : 0

5 files changed, 13 insertions, 13 deletions

diff --git a/notify/jira/comment-template.txt b/notify/jira/comment-template.txt
index dbdd46d..d8dbb33 100644
--- a/notify/jira/comment-template.txt
+++ b/notify/jira/comment-template.txt
@@ -1,3 +1,3 @@
 [GNU-692]
 Success
-Details: https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O1-build/200/artifact/artifacts/notify/mail-body.txt/*view*/
+Details: https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O1-build/201/artifact/artifacts/notify/mail-body.txt/*view*/
diff --git a/notify/jira/comments.txt b/notify/jira/comments.txt
index dbdd46d..d8dbb33 100644
--- a/notify/jira/comments.txt
+++ b/notify/jira/comments.txt
@@ -1,3 +1,3 @@
 [GNU-692]
 Success
-Details: https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O1-build/200/artifact/artifacts/notify/mail-body.txt/*view*/
+Details: https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O1-build/201/artifact/artifacts/notify/mail-body.txt/*view*/
diff --git a/notify/mail-body.txt b/notify/mail-body.txt
index 3c4f19e..c399e58 100644
--- a/notify/mail-body.txt
+++ b/notify/mail-body.txt
@@ -2,13 +2,13 @@ Dear contributor, our automatic CI has detected problems related to your patch(e
 
 In bootstrap_build master-arm-bootstrap_O1 after:
 
-  | 57 commits in gcc
-  | d4ec3d5a04a LoongArch: Fix unintentionally breakage in r14-3665
-  | fba0f47e461 RISC-V: Emit .note.GNU-stack for non-linux target as well
-  | a7b048c0f42 RISC-V: Support FP SGNJ autovec for VLS mode
-  | 72b639760a8 LoongArch: Add Loongson ASX directive builtin function support.
-  | bfcccf06fbf LoongArch: Add Loongson ASX base instruction support.
-  | ... and 52 more commits in gcc
+  | 31 commits in gcc
+  | a4829dda636 xtensa: Optimize boolean evaluation when SImode EQ/NE to zero if TARGET_MINMAX
+  | 57d1c9c1fe5 riscv: xtheadbb: Fix xtheadbb-li-rotr test for rv32
+  | 9ee40b9a7be RISC-V: Keep vlmax vector operators in simple form until split1 pass
+  | 4abcc5009c1 RISC-V: Part-3: Output .variant_cc directive for vector function
+  | fdd59c0f73e RISC-V: Part-2: Save/Restore vector registers which need to be preversed
+  | ... and 26 more commits in gcc
 
 Results changed to
 # reset_artifacts:
@@ -32,6 +32,6 @@ CI config tcwg_bootstrap_build/master-arm-bootstrap_O1
 -----------------8<--------------------------8<--------------------------8<--------------------------
 The information below can be used to reproduce a debug environment:
 
-Current build   : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O1-build/200/artifact/artifacts
-Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O1-build/199/artifact/artifacts
+Current build   : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O1-build/201/artifact/artifacts
+Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O1-build/200/artifact/artifacts
 
diff --git a/notify/mail-recipients.txt b/notify/mail-recipients.txt
index f218d77..595c516 100644
--- a/notify/mail-recipients.txt
+++ b/notify/mail-recipients.txt
@@ -1 +1 @@
-cc:baird@adacore.com,cc:kliemann@adacore.com,cc:oliva@adacore.com,cc:ebotcazou@adacore.com,xry111@xry111.site,bcc:tcwg-validation@linaro.org,poulhies@adacore.com,cc:yangyujie@loongson.cn,jakub@redhat.com,philipp.tomsich@vrull.eu,cc:gcc-regression@gcc.gnu.org,dkm@kataplop.net,cc:lacambre@adacore.com,kito.cheng@sifive.com,cc:dmking@adacore.com,christophe.lyon@linaro.org,cc:merzougue@adacore.com,cc:tobias@codesourcery.com,cc:juzhe.zhong@rivai.ai,lehua.ding@rivai.ai,cc:bernstein@adacore.com,chenglulu@loongson.cn,cc:thiago.bauermann@linaro.org,thomas@codesourcery.com,cc:trojanek@adacore.com,pan2.li@intel.com,cc:duff@adacore.com,cc:desplanques@adacore.com,hongtao.liu@intel.com,cc:christoph.muellner@vrull.eu,cc:miranda@adacore.com,cc:tromey@adacore.com,richard.sandiford@arm.com,claziss@gmail.com,jwakely@redhat.com
+vineetg@rivosinc.com,bcc:tcwg-validation@linaro.org,jakub@redhat.com,philipp.tomsich@vrull.eu,polacek@redhat.com,research_trasio@irq.a4lg.com,cc:gcc-regression@gcc.gnu.org,jason@redhat.com,cc:jjsuwa_sys3175@yahoo.co.jp,kito.cheng@sifive.com,tobias@codesourcery.com,jlaw@ventanamicro.com,lehua.ding@rivai.ai,apinski@marvell.com,jcmvbkbc@gmail.com,gccadmin@gcc.gnu.org,szabolcs.nagy@arm.com,ewlu@rivosinc.com,cc:christoph.muellner@vrull.eu,ppalka@redhat.com
diff --git a/notify/mail-subject.txt b/notify/mail-subject.txt
index 9e8181f..9a475a1 100644
--- a/notify/mail-subject.txt
+++ b/notify/mail-subject.txt
@@ -1 +1 @@
-[Linaro-TCWG-CI] 57 commits in gcc: Success on arm
+[Linaro-TCWG-CI] 31 commits in gcc: Success on arm