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| author | Craig Topper <craig.topper@intel.com> | 2018-09-29 17:49:42 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-09-29 17:49:42 +0000 |
| commit | 1193048504de23133b75a10c1fe2f79e64cc1d01 (patch) | |
| tree | 24b70a32b56833d6b39412063c25e9c2a924852c /clang/test | |
| parent | 8e47557fca62b6cecd6c6fb89392138df61517ad (diff) | |
[X86] Add more of the icc unaligned load/store to/from 128 bit vector intrinsics
Summary:
This patch adds
_mm_loadu_si32
_mm_loadu_si16
_mm_storeu_si64
_mm_storeu_si32
_mm_storeu_si16
We already had _mm_load_si64.
Reviewers: spatel, RKSimon
Reviewed By: RKSimon
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D52665
Diffstat (limited to 'clang/test')
| -rw-r--r-- | clang/test/CodeGen/sse2-builtins.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/clang/test/CodeGen/sse2-builtins.c b/clang/test/CodeGen/sse2-builtins.c index ac22f5b1c85..005bdfd9174 100644 --- a/clang/test/CodeGen/sse2-builtins.c +++ b/clang/test/CodeGen/sse2-builtins.c @@ -721,6 +721,30 @@ __m128i test_mm_loadu_si64(void const* A) { return _mm_loadu_si64(A); } +__m128i test_mm_loadu_si32(void const* A) { + // CHECK-LABEL: test_mm_loadu_si32 + // CHECK: load i32, i32* %{{.*}}, align 1{{$}} + // CHECK: insertelement <4 x i32> undef, i32 %{{.*}}, i32 0 + // CHECK: insertelement <4 x i32> %{{.*}}, i32 0, i32 1 + // CHECK: insertelement <4 x i32> %{{.*}}, i32 0, i32 2 + // CHECK: insertelement <4 x i32> %{{.*}}, i32 0, i32 3 + return _mm_loadu_si32(A); +} + +__m128i test_mm_loadu_si16(void const* A) { + // CHECK-LABEL: test_mm_loadu_si16 + // CHECK: load i16, i16* %{{.*}}, align 1{{$}} + // CHECK: insertelement <8 x i16> undef, i16 %{{.*}}, i32 0 + // CHECK: insertelement <8 x i16> %{{.*}}, i16 0, i32 1 + // CHECK: insertelement <8 x i16> %{{.*}}, i16 0, i32 2 + // CHECK: insertelement <8 x i16> %{{.*}}, i16 0, i32 3 + // CHECK: insertelement <8 x i16> %{{.*}}, i16 0, i32 4 + // CHECK: insertelement <8 x i16> %{{.*}}, i16 0, i32 5 + // CHECK: insertelement <8 x i16> %{{.*}}, i16 0, i32 6 + // CHECK: insertelement <8 x i16> %{{.*}}, i16 0, i32 7 + return _mm_loadu_si16(A); +} + __m128i test_mm_madd_epi16(__m128i A, __m128i B) { // CHECK-LABEL: test_mm_madd_epi16 // CHECK: call <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16> %{{.*}}, <8 x i16> %{{.*}}) @@ -1351,6 +1375,30 @@ void test_mm_storeu_si128(__m128i* A, __m128i B) { _mm_storeu_si128(A, B); } +void test_mm_storeu_si64(void* A, __m128i B) { + // CHECK-LABEL: test_mm_storeu_si64 + // CHECK: [[EXT:%.*]] = extractelement <2 x i64> %{{.*}}, i32 0 + // CHECK: store i64 [[EXT]], i64* %{{.*}}, align 1{{$}} + // CHECK-NEXT: ret void + _mm_storeu_si64(A, B); +} + +void test_mm_storeu_si32(void* A, __m128i B) { + // CHECK-LABEL: test_mm_storeu_si32 + // CHECK: [[EXT:%.*]] = extractelement <4 x i32> %{{.*}}, i32 0 + // CHECK: store i32 [[EXT]], i32* %{{.*}}, align 1{{$}} + // CHECK-NEXT: ret void + _mm_storeu_si32(A, B); +} + +void test_mm_storeu_si16(void* A, __m128i B) { + // CHECK-LABEL: test_mm_storeu_si16 + // CHECK: [[EXT:%.*]] = extractelement <8 x i16> %{{.*}}, i32 0 + // CHECK: store i16 [[EXT]], i16* %{{.*}}, align 1{{$}} + // CHECK-NEXT: ret void + _mm_storeu_si16(A, B); +} + void test_mm_stream_pd(double *A, __m128d B) { // CHECK-LABEL: test_mm_stream_pd // CHECK: store <2 x double> %{{.*}}, <2 x double>* %{{.*}}, align 16, !nontemporal |