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-rw-r--r--big-little/secure_world/flat_pagetable.s50
1 files changed, 25 insertions, 25 deletions
diff --git a/big-little/secure_world/flat_pagetable.s b/big-little/secure_world/flat_pagetable.s
index 5038f85..2db7f95 100644
--- a/big-little/secure_world/flat_pagetable.s
+++ b/big-little/secure_world/flat_pagetable.s
@@ -1,31 +1,31 @@
;
; Copyright (c) 2012, ARM Limited. All rights reserved.
- ;
+ ;
; Redistribution and use in source and binary forms, with
; or without modification, are permitted provided that the
; following conditions are met:
- ;
+ ;
; Redistributions of source code must retain the above
- ; copyright notice, this list of conditions and the
+ ; copyright notice, this list of conditions and the
; following disclaimer.
;
; Redistributions in binary form must reproduce the
- ; above copyright notice, this list of conditions and
- ; the following disclaimer in the documentation
+ ; above copyright notice, this list of conditions and
+ ; the following disclaimer in the documentation
; and/or other materials provided with the distribution.
- ;
+ ;
; Neither the name of ARM nor the names of its
; contributors may be used to endorse or promote products
; derived from this software without specific prior written
- ; permission.
- ;
+ ; permission.
+ ;
PRESERVE8
AREA PageTable, DATA, READONLY, ALIGN=14
EXPORT flat_pagetables
GBLL CONFIG_SMP_CPU3_AMP
CONFIG_SMP_CPU3_AMP SETL {FALSE}
-
+
; Definitions for section descriptors
NGLOBAL EQU (1<<17)
SHARED EQU (1<<16)
@@ -45,7 +45,7 @@ SECURITY EQU 0
; Select WBWA for both Inner and Outer cache
MEMORY EQU (TEX1 :OR: CACHE :OR: BUFFER :OR: SECTION :OR: AP0 :OR: AP1 :OR: SECURITY)
S_RO_MEMORY EQU (TEX1 :OR: CACHE :OR: BUFFER :OR: SECTION :OR: AP0 :OR: AP1 :OR: APX)
-S_RW_MEMORY EQU (TEX1 :OR: CACHE :OR: BUFFER :OR: SECTION :OR: AP0 :OR: AP1)
+S_RW_MEMORY EQU (TEX1 :OR: CACHE :OR: BUFFER :OR: SECTION :OR: AP0 :OR: AP1)
; Select WBWA Inner cache, WBnWA Outer cache
;MEMORY EQU (TEX3 | TEX2 | TEX1 | BUFFER | SECTION | AP0 | AP1 | SECURITY)
@@ -58,61 +58,61 @@ DEVICE EQU (BUFFER :OR: SHARED :OR: SECTION :OR: AP0 :OR: AP1 :OR: XN
NO_MEMORY EQU (SECTION)
SHARED_MEMORY EQU (MEMORY :OR: SHARED)
SHARED_S_RO_MEMORY EQU (S_RO_MEMORY :OR: SHARED)
-SHARED_S_RW_MEMORY EQU (S_RW_MEMORY :OR: SHARED)
+SHARED_S_RW_MEMORY EQU (S_RW_MEMORY :OR: SHARED)
SHARED_NC_MEMORY EQU (NC_MEMORY :OR: SHARED)
SHARED_SO_MEMORY EQU (SO_MEMORY :OR: SHARED)
SHARED_DEVICE EQU (DEVICE :OR: SHARED)
-
+
; first-level descriptors - all of them are 1MB sections
flat_pagetables
GBLA count16
GBLA ramstart
-count16 SETA 0
+count16 SETA 0
ramstart SETA 0
-
+
; NOT FOR RELEASE
- WHILE count16 < ramstart+0x40
+ WHILE count16 < ramstart+0x40
; 0-64MB Secure ROM/NOR Flash
DCD (count16<<20) :OR: SHARED_DEVICE
-count16 SETA count16 + 1
+count16 SETA count16 + 1
WEND
WHILE count16 < ramstart+0x80
; 64-128MB Secure RAM
DCD (count16<<20) :OR: SHARED_S_RW_MEMORY
-count16 SETA count16 + 1
+count16 SETA count16 + 1
WEND
WHILE count16 < ramstart+0x800
; 128-2048MB Peripheral space
DCD (count16<<20) :OR: SHARED_DEVICE
-count16 SETA count16 + 1
+count16 SETA count16 + 1
WEND
- WHILE count16 < ramstart+0x810
+ WHILE count16 < ramstart+0x810
; 0-16MB Shared Memory
DCD (count16<<20) :OR: SHARED_MEMORY
-count16 SETA count16 + 1
+count16 SETA count16 + 1
WEND
-
+
WHILE count16 < ramstart+0x81f
; 16-31MB Strongly Ordered
DCD (count16<<20) :OR: SHARED_SO_MEMORY
-count16 SETA count16 + 1
+count16 SETA count16 + 1
WEND
WHILE count16 < ramstart+0x820
; 31-32MB Shared Noncached Normal Memory
DCD (count16<<20) :OR: SHARED_NC_MEMORY
-count16 SETA count16 + 1
+count16 SETA count16 + 1
WEND
-
+
WHILE count16 < ramstart+0x1000
; rest of memory is RAM
DCD (count16<<20) :OR: SHARED_MEMORY
-count16 SETA count16 + 1
+count16 SETA count16 + 1
WEND
END