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;
; Copyright (c) 2012, ARM Limited. All rights reserved.
;
; Redistribution and use in source and binary forms, with
; or without modification, are permitted provided that the
; following conditions are met:
;
; Redistributions of source code must retain the above
; copyright notice, this list of conditions and the
; following disclaimer.
;
; Redistributions in binary form must reproduce the
; above copyright notice, this list of conditions and
; the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; Neither the name of ARM nor the names of its
; contributors may be used to endorse or promote products
; derived from this software without specific prior written
; permission.
;
AREA test, CODE
ENTRY
[ FM_BETA
IMPORT warm_reset
IMPORT ve_reset_type
MRC p15, 0, r0, c0, c0, 5
ANDS r0, r0, #0xf
LDR r2, =ve_reset_type
ADD r2, r2, r0, lsl #2
LDR r1, [r2]
CMP r1, #0
MOVEQ r1, #1
STREQ r1, [r2]
LDREQ PC, =0x80000000
LDRNE PC, =warm_reset
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MRC p15, 0, r0, c0, c0, 5
UBFX r1, r0, #0, #8
UBFX r2, r0, #8, #8
ADD r3, r1, r2, lsl #2
LSL r3, #3
LDR r4, =0x60000040
LDR r4, [r4, r3]
CMP r4, #0
BXNE r4
LDR pc, =0x80000000
]
END
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