diff options
author | Dan Handley <dan.handley@arm.com> | 2014-05-14 12:38:32 +0100 |
---|---|---|
committer | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-05-23 12:15:54 +0100 |
commit | c6bc071020baebc660fc94390b50bc240e34c0a3 (patch) | |
tree | ec62f78721bb7f491e7b7cf19f3d6a39b97ad65f /plat/fvp | |
parent | f53d0fce3f8e13529d823c22ce61dc0e0fdf0ffd (diff) |
Remove extern keyword from function declarations
Function declarations implicitly have external linkage so do not
need the extern keyword.
Change-Id: Ia0549786796d8bf5956487e8996450a0b3d79f32
Diffstat (limited to 'plat/fvp')
-rw-r--r-- | plat/fvp/drivers/pwrc/fvp_pwrc.h | 16 | ||||
-rw-r--r-- | plat/fvp/platform.h | 144 |
2 files changed, 80 insertions, 80 deletions
diff --git a/plat/fvp/drivers/pwrc/fvp_pwrc.h b/plat/fvp/drivers/pwrc/fvp_pwrc.h index f600a24..ad1ea85 100644 --- a/plat/fvp/drivers/pwrc/fvp_pwrc.h +++ b/plat/fvp/drivers/pwrc/fvp_pwrc.h @@ -63,14 +63,14 @@ /******************************************************************************* * Function & variable prototypes ******************************************************************************/ -extern int fvp_pwrc_setup(void); -extern void fvp_pwrc_write_pcoffr(unsigned long); -extern void fvp_pwrc_write_ppoffr(unsigned long); -extern void fvp_pwrc_write_pponr(unsigned long); -extern void fvp_pwrc_set_wen(unsigned long); -extern void fvp_pwrc_clr_wen(unsigned long); -extern unsigned int fvp_pwrc_read_psysr(unsigned long); -extern unsigned int fvp_pwrc_get_cpu_wkr(unsigned long); +int fvp_pwrc_setup(void); +void fvp_pwrc_write_pcoffr(unsigned long); +void fvp_pwrc_write_ppoffr(unsigned long); +void fvp_pwrc_write_pponr(unsigned long); +void fvp_pwrc_set_wen(unsigned long); +void fvp_pwrc_clr_wen(unsigned long); +unsigned int fvp_pwrc_read_psysr(unsigned long); +unsigned int fvp_pwrc_get_cpu_wkr(unsigned long); #endif /*__ASSEMBLY__*/ diff --git a/plat/fvp/platform.h b/plat/fvp/platform.h index 786988c..36a3b33 100644 --- a/plat/fvp/platform.h +++ b/plat/fvp/platform.h @@ -423,77 +423,77 @@ typedef struct bl2_to_bl31_params_mem { /******************************************************************************* * Function and variable prototypes ******************************************************************************/ -extern unsigned long *bl1_normal_ram_base; -extern unsigned long *bl1_normal_ram_len; -extern unsigned long *bl1_normal_ram_limit; -extern unsigned long *bl1_normal_ram_zi_base; -extern unsigned long *bl1_normal_ram_zi_len; - -extern unsigned long *bl1_coherent_ram_base; -extern unsigned long *bl1_coherent_ram_len; -extern unsigned long *bl1_coherent_ram_limit; -extern unsigned long *bl1_coherent_ram_zi_base; -extern unsigned long *bl1_coherent_ram_zi_len; -extern unsigned long warm_boot_entrypoint; - -extern void bl1_plat_arch_setup(void); -extern void bl2_plat_arch_setup(void); -extern void bl31_plat_arch_setup(void); -extern int platform_setup_pm(const struct plat_pm_ops **); -extern unsigned int platform_get_core_pos(unsigned long mpidr); -extern void enable_mmu_el1(void); -extern void enable_mmu_el3(void); -extern void configure_mmu_el1(unsigned long total_base, - unsigned long total_size, - unsigned long ro_start, - unsigned long ro_limit, - unsigned long coh_start, - unsigned long coh_limit); -extern void configure_mmu_el3(unsigned long total_base, - unsigned long total_size, - unsigned long ro_start, - unsigned long ro_limit, - unsigned long coh_start, - unsigned long coh_limit); -extern unsigned long platform_get_cfgvar(unsigned int); -extern int platform_config_setup(void); -extern void plat_report_exception(unsigned long); -extern unsigned long plat_get_ns_image_entrypoint(void); -extern unsigned long platform_get_stack(unsigned long mpidr); -extern uint64_t plat_get_syscnt_freq(void); +unsigned long *bl1_normal_ram_base; +unsigned long *bl1_normal_ram_len; +unsigned long *bl1_normal_ram_limit; +unsigned long *bl1_normal_ram_zi_base; +unsigned long *bl1_normal_ram_zi_len; + +unsigned long *bl1_coherent_ram_base; +unsigned long *bl1_coherent_ram_len; +unsigned long *bl1_coherent_ram_limit; +unsigned long *bl1_coherent_ram_zi_base; +unsigned long *bl1_coherent_ram_zi_len; +unsigned long warm_boot_entrypoint; + +void bl1_plat_arch_setup(void); +void bl2_plat_arch_setup(void); +void bl31_plat_arch_setup(void); +int platform_setup_pm(const struct plat_pm_ops **); +unsigned int platform_get_core_pos(unsigned long mpidr); +void enable_mmu_el1(void); +void enable_mmu_el3(void); +void configure_mmu_el1(unsigned long total_base, + unsigned long total_size, + unsigned long ro_start, + unsigned long ro_limit, + unsigned long coh_start, + unsigned long coh_limit); +void configure_mmu_el3(unsigned long total_base, + unsigned long total_size, + unsigned long ro_start, + unsigned long ro_limit, + unsigned long coh_start, + unsigned long coh_limit); +unsigned long platform_get_cfgvar(unsigned int); +int platform_config_setup(void); +void plat_report_exception(unsigned long); +unsigned long plat_get_ns_image_entrypoint(void); +unsigned long platform_get_stack(unsigned long mpidr); +uint64_t plat_get_syscnt_freq(void); #if RESET_TO_BL31 -extern void plat_get_entry_point_info(unsigned long target_security, - struct entry_point_info *target_entry_info); +void plat_get_entry_point_info(unsigned long target_security, + el_change_info_t *target_entry_info); #endif - -extern void fvp_cci_setup(void); +void fvp_cci_setup(void); /* Declarations for plat_gic.c */ -extern uint32_t ic_get_pending_interrupt_id(void); -extern uint32_t ic_get_pending_interrupt_type(void); -extern uint32_t ic_acknowledge_interrupt(void); -extern uint32_t ic_get_interrupt_type(uint32_t id); -extern void ic_end_of_interrupt(uint32_t id); -extern void gic_cpuif_deactivate(unsigned int); -extern void gic_cpuif_setup(unsigned int); -extern void gic_pcpu_distif_setup(unsigned int); -extern void gic_setup(void); -extern uint32_t plat_interrupt_type_to_line(uint32_t type, +uint32_t ic_get_pending_interrupt_id(void); +uint32_t ic_get_pending_interrupt_type(void); +uint32_t ic_acknowledge_interrupt(void); +uint32_t ic_get_interrupt_type(uint32_t id); +void ic_end_of_interrupt(uint32_t id); +void gic_cpuif_deactivate(unsigned int); +void gic_cpuif_setup(unsigned int); +void gic_pcpu_distif_setup(unsigned int); +void gic_setup(void); +uint32_t plat_interrupt_type_to_line(uint32_t type, uint32_t security_state); /* Declarations for plat_topology.c */ -extern int plat_setup_topology(void); -extern int plat_get_max_afflvl(void); -extern unsigned int plat_get_aff_count(unsigned int, unsigned long); -extern unsigned int plat_get_aff_state(unsigned int, unsigned long); +int plat_setup_topology(void); +int plat_get_max_afflvl(void); +unsigned int plat_get_aff_count(unsigned int, unsigned long); +unsigned int plat_get_aff_state(unsigned int, unsigned long); /* Declarations for plat_io_storage.c */ -extern void io_setup(void); -extern int plat_get_image_source(const char *image_name, - uintptr_t *dev_handle, uintptr_t *image_spec); +void io_setup(void); +int plat_get_image_source(const char *image_name, + uintptr_t *dev_handle, + uintptr_t *image_spec); /* Declarations for plat_security.c */ -extern void plat_security_setup(void); +void plat_security_setup(void); /* * Before calling this function BL2 is loaded in memory and its entrypoint @@ -501,8 +501,8 @@ extern void plat_security_setup(void); * the entrypoint of BL2 and set SPSR and security state. * On FVP we are only setting the security state, entrypoint */ -extern void bl1_plat_set_bl2_ep_info(struct image_info *image, - struct entry_point_info *ep); +void bl1_plat_set_bl2_ep_info(struct image_info *image, + struct entry_point_info *ep); /* * Before calling this function BL31 is loaded in memory and its entrypoint @@ -510,8 +510,8 @@ extern void bl1_plat_set_bl2_ep_info(struct image_info *image, * the entrypoint of BL31 and set SPSR and security state. * On FVP we are only setting the security state, entrypoint */ -extern void bl2_plat_set_bl31_ep_info(struct image_info *image, - struct entry_point_info *ep); +void bl2_plat_set_bl31_ep_info(struct image_info *image, + struct entry_point_info *ep); /* * Before calling this function BL32 is loaded in memory and its entrypoint @@ -519,8 +519,8 @@ extern void bl2_plat_set_bl31_ep_info(struct image_info *image, * the entrypoint of BL32 and set SPSR and security state. * On FVP we are only setting the security state, entrypoint */ -extern void bl2_plat_set_bl32_ep_info(struct image_info *image, - struct entry_point_info *ep); +void bl2_plat_set_bl32_ep_info(struct image_info *image, + struct entry_point_info *ep); /* * Before calling this function BL33 is loaded in memory and its entrypoint @@ -528,20 +528,20 @@ extern void bl2_plat_set_bl32_ep_info(struct image_info *image, * the entrypoint of BL33 and set SPSR and security state. * On FVP we are only setting the security state, entrypoint */ -extern void bl2_plat_set_bl33_ep_info(struct image_info *image, - struct entry_point_info *ep); +void bl2_plat_set_bl33_ep_info(struct image_info *image, + struct entry_point_info *ep); /* Gets the memory layout for BL32 */ -extern void bl2_plat_get_bl32_meminfo(struct meminfo *mem_info); +void bl2_plat_get_bl32_meminfo(struct meminfo *mem_info); /* Gets the memory layout for BL33 */ -extern void bl2_plat_get_bl33_meminfo(struct meminfo *mem_info); +void bl2_plat_get_bl33_meminfo(struct meminfo *mem_info); /* Sets the entrypoint for BL32 */ -extern void fvp_set_bl32_ep_info(struct entry_point_info *bl32_ep_info); +void fvp_set_bl32_ep_info(struct entry_point_info *bl32_ep_info); /* Sets the entrypoint for BL33 */ -extern void fvp_set_bl33_ep_info(struct entry_point_info *bl33_ep_info); +void fvp_set_bl33_ep_info(struct entry_point_info *bl33_ep_info); #endif /*__ASSEMBLY__*/ |