Moved the MdePkg to OldMdePkg so that new code in MdePkg does not break existing builds. Also updated the SPD and FPD files UiNames

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2616 6f19259b-4bc3-4df7-8a09-765794883524

2 files changed, 0 insertions, 1422 deletions

diff --git a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa
deleted file mode 100644
index cd46cc692..000000000
--- a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa
+++ /dev/null
@@ -1,56 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>

-<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">

-  <MsaHeader>

-    <ModuleName>BasePciExpressLib</ModuleName>

-    <ModuleType>BASE</ModuleType>

-    <GuidValue>287e50f4-a188-4699-b907-3e4080ca5688</GuidValue>

-    <Version>1.0</Version>

-    <Abstract>Component description file for Base PCI Express Library.</Abstract>

-    <Description>PCI Express Library that uses the 256 MB PCI Express MMIO window to perform

-      PCI Configuration cycles.  Layers on top of an I/O Library instance.</Description>

-    <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>

-    <License>All rights reserved. This program and the accompanying materials

-      are licensed and made available under the terms and conditions of the BSD License

-      which accompanies this distribution.  The full text of the license may be found at

-      http://opensource.org/licenses/bsd-license.php

-      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>

-    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>

-  </MsaHeader>

-  <ModuleDefinitions>

-    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>

-    <BinaryModule>false</BinaryModule>

-    <OutputFileBasename>BasePciExpressLib</OutputFileBasename>

-  </ModuleDefinitions>

-  <LibraryClassDefinitions>

-    <LibraryClass Usage="ALWAYS_PRODUCED">

-      <Keyword>PciExpressLib</Keyword>

-    </LibraryClass>

-    <LibraryClass Usage="ALWAYS_CONSUMED">

-      <Keyword>IoLib</Keyword>

-    </LibraryClass>

-    <LibraryClass Usage="ALWAYS_CONSUMED">

-      <Keyword>DebugLib</Keyword>

-    </LibraryClass>

-    <LibraryClass Usage="ALWAYS_CONSUMED">

-      <Keyword>PcdLib</Keyword>

-    </LibraryClass>    

-  </LibraryClassDefinitions>

-  <SourceFiles>

-    <Filename>PciLib.c</Filename>

-  </SourceFiles>

-  <PackageDependencies>

-    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>

-  </PackageDependencies>

-  <Externs>

-    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>

-    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>

-  </Externs>

-  <PcdCoded>

-    <PcdEntry PcdItemType="DYNAMIC">

-      <C_Name>PcdPciExpressBaseAddress</C_Name>

-          <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>

-      <HelpText>The base address of PCI Express MMIO window.</HelpText>

-    </PcdEntry>

-  </PcdCoded>

-</ModuleSurfaceArea>
\ No newline at end of file
diff --git a/MdePkg/Library/BasePciExpressLib/PciLib.c b/MdePkg/Library/BasePciExpressLib/PciLib.c
deleted file mode 100644
index 9cdac2109..000000000
--- a/MdePkg/Library/BasePciExpressLib/PciLib.c
+++ /dev/null
@@ -1,1366 +0,0 @@
-/** @file

-  PCI Library.

-

-  Functions in this library instance make use of MMIO functions in IoLib to

-  access memory mapped PCI configuration space.

-

-  All assertions for I/O operations are handled in MMIO functions in the IoLib

-  Library.

-

-  Copyright (c) 2006, Intel Corporation<BR>

-  All rights reserved. This program and the accompanying materials

-  are licensed and made available under the terms and conditions of the BSD License

-  which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php

-

-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-

-  Module Name:  PciLib.c

-

-**/

-

-/**

-  Assert the validity of a PCI address. A valid PCI address should contain 1's

-  only in the low 28 bits.

-

-  @param  A The address to validate.

-

-**/

-#define ASSERT_INVALID_PCI_ADDRESS(A) \

-  ASSERT (((A) & ~0xfffffff) == 0)

-

-

-/**

-  Gets the base address of PCI Express.

-  

-  This internal functions retrieves PCI Express Base Address via a PCD entry

-  PcdPciExpressBaseAddress.

-  

-  @return The base address of PCI Express.

-

-**/

-STATIC

-volatile VOID*

-GetPciExpressBaseAddress (

-  VOID

-  )

-{

-  return (VOID*)(UINTN) PcdGet64 (PcdPciExpressBaseAddress);

-}

-

-/**

-  Reads an 8-bit PCI configuration register.

-

-  Reads and returns the 8-bit PCI configuration register specified by Address.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-

-  @return The read value from the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciExpressRead8 (

-  IN      UINTN                     Address

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioRead8 ((UINTN) GetPciExpressBaseAddress () + Address);

-}

-

-/**

-  Writes an 8-bit PCI configuration register.

-

-  Writes the 8-bit PCI configuration register specified by Address with the

-  value specified by Value. Value is returned. This function must guarantee

-  that all PCI read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  Value   The value to write.

-

-  @return The value written to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciExpressWrite8 (

-  IN      UINTN                     Address,

-  IN      UINT8                     Value

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioWrite8 ((UINTN) GetPciExpressBaseAddress () + Address, Value);

-}

-

-/**

-  Performs a bitwise inclusive OR of an 8-bit PCI configuration register with

-  an 8-bit value.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise inclusive OR between the read result and the value specified by

-  OrData, and writes the result to the 8-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  OrData  The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciExpressOr8 (

-  IN      UINTN                     Address,

-  IN      UINT8                     OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioOr8 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);

-}

-

-/**

-  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit

-  value.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 8-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciExpressAnd8 (

-  IN      UINTN                     Address,

-  IN      UINT8                     AndData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioAnd8 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);

-}

-

-/**

-  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit

-  value, followed a  bitwise inclusive OR with another 8-bit value.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData,

-  performs a bitwise inclusive OR between the result of the AND operation and

-  the value specified by OrData, and writes the result to the 8-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-  @param  OrData  The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciExpressAndThenOr8 (

-  IN      UINTN                     Address,

-  IN      UINT8                     AndData,

-  IN      UINT8                     OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioAndThenOr8 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           AndData,

-           OrData

-           );

-}

-

-/**

-  Reads a bit field of a PCI configuration register.

-

-  Reads the bit field in an 8-bit PCI configuration register. The bit field is

-  specified by the StartBit and the EndBit. The value of the bit field is

-  returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If StartBit is greater than 7, then ASSERT().

-  If EndBit is greater than 7, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to read.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..7.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..7.

-

-  @return The value of the bit field read from the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciExpressBitFieldRead8 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldRead8 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit

-           );

-}

-

-/**

-  Writes a bit field to a PCI configuration register.

-

-  Writes Value to the bit field of the PCI configuration register. The bit

-  field is specified by the StartBit and the EndBit. All other bits in the

-  destination PCI configuration register are preserved. The new value of the

-  8-bit register is returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If StartBit is greater than 7, then ASSERT().

-  If EndBit is greater than 7, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..7.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..7.

-  @param  Value     New value of the bit field.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciExpressBitFieldWrite8 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT8                     Value

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldWrite8 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           Value

-           );

-}

-

-/**

-  Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and

-  writes the result back to the bit field in the 8-bit port.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise inclusive OR between the read result and the value specified by

-  OrData, and writes the result to the 8-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized. Extra left bits in OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If StartBit is greater than 7, then ASSERT().

-  If EndBit is greater than 7, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..7.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..7.

-  @param  OrData    The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciExpressBitFieldOr8 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT8                     OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldOr8 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           OrData

-           );

-}

-

-/**

-  Reads a bit field in an 8-bit PCI configuration register, performs a bitwise

-  AND, and writes the result back to the bit field in the 8-bit register.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 8-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized. Extra left bits in AndData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If StartBit is greater than 7, then ASSERT().

-  If EndBit is greater than 7, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..7.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..7.

-  @param  AndData   The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciExpressBitFieldAnd8 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT8                     AndData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldAnd8 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           AndData

-           );

-}

-

-/**

-  Reads a bit field in an 8-bit port, performs a bitwise AND followed by a

-  bitwise inclusive OR, and writes the result back to the bit field in the

-  8-bit port.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise AND followed by a bitwise inclusive OR between the read result and

-  the value specified by AndData, and writes the result to the 8-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized. Extra left bits in both AndData and

-  OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If StartBit is greater than 7, then ASSERT().

-  If EndBit is greater than 7, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..7.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..7.

-  @param  AndData   The value to AND with the PCI configuration register.

-  @param  OrData    The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciExpressBitFieldAndThenOr8 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT8                     AndData,

-  IN      UINT8                     OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldAndThenOr8 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           AndData,

-           OrData

-           );

-}

-

-/**

-  Reads a 16-bit PCI configuration register.

-

-  Reads and returns the 16-bit PCI configuration register specified by Address.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-

-  @return The read value from the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciExpressRead16 (

-  IN      UINTN                     Address

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioRead16 ((UINTN) GetPciExpressBaseAddress () + Address);

-}

-

-/**

-  Writes a 16-bit PCI configuration register.

-

-  Writes the 16-bit PCI configuration register specified by Address with the

-  value specified by Value. Value is returned. This function must guarantee

-  that all PCI read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  Value   The value to write.

-

-  @return The value written to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciExpressWrite16 (

-  IN      UINTN                     Address,

-  IN      UINT16                    Value

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioWrite16 ((UINTN) GetPciExpressBaseAddress () + Address, Value);

-}

-

-/**

-  Performs a bitwise inclusive OR of a 16-bit PCI configuration register with

-  a 16-bit value.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise inclusive OR between the read result and the value specified by

-  OrData, and writes the result to the 16-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  OrData  The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciExpressOr16 (

-  IN      UINTN                     Address,

-  IN      UINT16                    OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioOr16 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);

-}

-

-/**

-  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit

-  value.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 16-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciExpressAnd16 (

-  IN      UINTN                     Address,

-  IN      UINT16                    AndData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioAnd16 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);

-}

-

-/**

-  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit

-  value, followed a  bitwise inclusive OR with another 16-bit value.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData,

-  performs a bitwise inclusive OR between the result of the AND operation and

-  the value specified by OrData, and writes the result to the 16-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-  @param  OrData  The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciExpressAndThenOr16 (

-  IN      UINTN                     Address,

-  IN      UINT16                    AndData,

-  IN      UINT16                    OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioAndThenOr16 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           AndData,

-           OrData

-           );

-}

-

-/**

-  Reads a bit field of a PCI configuration register.

-

-  Reads the bit field in a 16-bit PCI configuration register. The bit field is

-  specified by the StartBit and the EndBit. The value of the bit field is

-  returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-  If StartBit is greater than 15, then ASSERT().

-  If EndBit is greater than 15, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to read.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..15.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..15.

-

-  @return The value of the bit field read from the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciExpressBitFieldRead16 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldRead16 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit

-           );

-}

-

-/**

-  Writes a bit field to a PCI configuration register.

-

-  Writes Value to the bit field of the PCI configuration register. The bit

-  field is specified by the StartBit and the EndBit. All other bits in the

-  destination PCI configuration register are preserved. The new value of the

-  16-bit register is returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-  If StartBit is greater than 15, then ASSERT().

-  If EndBit is greater than 15, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..15.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..15.

-  @param  Value     New value of the bit field.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciExpressBitFieldWrite16 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT16                    Value

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldWrite16 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           Value

-           );

-}

-

-/**

-  Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and

-  writes the result back to the bit field in the 16-bit port.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise inclusive OR between the read result and the value specified by

-  OrData, and writes the result to the 16-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized. Extra left bits in OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-  If StartBit is greater than 15, then ASSERT().

-  If EndBit is greater than 15, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..15.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..15.

-  @param  OrData    The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciExpressBitFieldOr16 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT16                    OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldOr16 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           OrData

-           );

-}

-

-/**

-  Reads a bit field in a 16-bit PCI configuration register, performs a bitwise

-  AND, and writes the result back to the bit field in the 16-bit register.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 16-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized. Extra left bits in AndData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-  If StartBit is greater than 15, then ASSERT().

-  If EndBit is greater than 15, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..15.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..15.

-  @param  AndData   The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciExpressBitFieldAnd16 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT16                    AndData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldAnd16 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           AndData

-           );

-}

-

-/**

-  Reads a bit field in a 16-bit port, performs a bitwise AND followed by a

-  bitwise inclusive OR, and writes the result back to the bit field in the

-  16-bit port.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise AND followed by a bitwise inclusive OR between the read result and

-  the value specified by AndData, and writes the result to the 16-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized. Extra left bits in both AndData and

-  OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-  If StartBit is greater than 15, then ASSERT().

-  If EndBit is greater than 15, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..15.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..15.

-  @param  AndData   The value to AND with the PCI configuration register.

-  @param  OrData    The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciExpressBitFieldAndThenOr16 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT16                    AndData,

-  IN      UINT16                    OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldAndThenOr16 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           AndData,

-           OrData

-           );

-}

-

-/**

-  Reads a 32-bit PCI configuration register.

-

-  Reads and returns the 32-bit PCI configuration register specified by Address.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-

-  @return The read value from the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciExpressRead32 (

-  IN      UINTN                     Address

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioRead32 ((UINTN) GetPciExpressBaseAddress () + Address);

-}

-

-/**

-  Writes a 32-bit PCI configuration register.

-

-  Writes the 32-bit PCI configuration register specified by Address with the

-  value specified by Value. Value is returned. This function must guarantee

-  that all PCI read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  Value   The value to write.

-

-  @return The value written to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciExpressWrite32 (

-  IN      UINTN                     Address,

-  IN      UINT32                    Value

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioWrite32 ((UINTN) GetPciExpressBaseAddress () + Address, Value);

-}

-

-/**

-  Performs a bitwise inclusive OR of a 32-bit PCI configuration register with

-  a 32-bit value.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise inclusive OR between the read result and the value specified by

-  OrData, and writes the result to the 32-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  OrData  The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciExpressOr32 (

-  IN      UINTN                     Address,

-  IN      UINT32                    OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioOr32 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);

-}

-

-/**

-  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit

-  value.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 32-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciExpressAnd32 (

-  IN      UINTN                     Address,

-  IN      UINT32                    AndData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioAnd32 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);

-}

-

-/**

-  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit

-  value, followed a  bitwise inclusive OR with another 32-bit value.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData,

-  performs a bitwise inclusive OR between the result of the AND operation and

-  the value specified by OrData, and writes the result to the 32-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-

-  @param  Address Address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-  @param  OrData  The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciExpressAndThenOr32 (

-  IN      UINTN                     Address,

-  IN      UINT32                    AndData,

-  IN      UINT32                    OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioAndThenOr32 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           AndData,

-           OrData

-           );

-}

-

-/**

-  Reads a bit field of a PCI configuration register.

-

-  Reads the bit field in a 32-bit PCI configuration register. The bit field is

-  specified by the StartBit and the EndBit. The value of the bit field is

-  returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-  If StartBit is greater than 31, then ASSERT().

-  If EndBit is greater than 31, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to read.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..31.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..31.

-

-  @return The value of the bit field read from the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciExpressBitFieldRead32 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldRead32 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit

-           );

-}

-

-/**

-  Writes a bit field to a PCI configuration register.

-

-  Writes Value to the bit field of the PCI configuration register. The bit

-  field is specified by the StartBit and the EndBit. All other bits in the

-  destination PCI configuration register are preserved. The new value of the

-  32-bit register is returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-  If StartBit is greater than 31, then ASSERT().

-  If EndBit is greater than 31, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..31.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..31.

-  @param  Value     New value of the bit field.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciExpressBitFieldWrite32 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT32                    Value

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldWrite32 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           Value

-           );

-}

-

-/**

-  Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and

-  writes the result back to the bit field in the 32-bit port.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise inclusive OR between the read result and the value specified by

-  OrData, and writes the result to the 32-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized. Extra left bits in OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-  If StartBit is greater than 31, then ASSERT().

-  If EndBit is greater than 31, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..31.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..31.

-  @param  OrData    The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciExpressBitFieldOr32 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT32                    OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldOr32 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           OrData

-           );

-}

-

-/**

-  Reads a bit field in a 32-bit PCI configuration register, performs a bitwise

-  AND, and writes the result back to the bit field in the 32-bit register.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 32-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized. Extra left bits in AndData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-  If StartBit is greater than 31, then ASSERT().

-  If EndBit is greater than 31, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..31.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..31.

-  @param  AndData   The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciExpressBitFieldAnd32 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT32                    AndData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldAnd32 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           AndData

-           );

-}

-

-/**

-  Reads a bit field in a 32-bit port, performs a bitwise AND followed by a

-  bitwise inclusive OR, and writes the result back to the bit field in the

-  32-bit port.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise AND followed by a bitwise inclusive OR between the read result and

-  the value specified by AndData, and writes the result to the 32-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized. Extra left bits in both AndData and

-  OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-  If StartBit is greater than 31, then ASSERT().

-  If EndBit is greater than 31, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..31.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..31.

-  @param  AndData   The value to AND with the PCI configuration register.

-  @param  OrData    The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciExpressBitFieldAndThenOr32 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT32                    AndData,

-  IN      UINT32                    OrData

-  )

-{

-  ASSERT_INVALID_PCI_ADDRESS (Address);

-  return MmioBitFieldAndThenOr32 (

-           (UINTN) GetPciExpressBaseAddress () + Address,

-           StartBit,

-           EndBit,

-           AndData,

-           OrData

-           );

-}

-

-/**

-  Reads a range of PCI configuration registers into a caller supplied buffer.

-

-  Reads the range of PCI configuration registers specified by StartAddress and

-  Size into the buffer specified by Buffer. This function only allows the PCI

-  configuration registers from a single PCI function to be read. Size is

-  returned. When possible 32-bit PCI configuration read cycles are used to read

-  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit

-  and 16-bit PCI configuration read cycles may be used at the beginning and the

-  end of the range.

-

-  If StartAddress > 0x0FFFFFFF, then ASSERT().

-  If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().

-  If Size > 0 and Buffer is NULL, then ASSERT().

-

-  @param  StartAddress  Starting address that encodes the PCI Bus, Device,

-                        Function and Register.

-  @param  Size          Size in bytes of the transfer.

-  @param  Buffer        Pointer to a buffer receiving the data read.

-

-  @return Size

-

-**/

-UINTN

-EFIAPI

-PciExpressReadBuffer (

-  IN      UINTN                     StartAddress,

-  IN      UINTN                     Size,

-  OUT     VOID                      *Buffer

-  )

-{

-  UINTN                             ReturnValue;

-

-  ASSERT_INVALID_PCI_ADDRESS (StartAddress);

-  ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);

-

-  if (Size == 0) {

-    return Size;

-  }

-

-  ASSERT (Buffer != NULL);

-

-  //

-  // Save Size for return

-  //

-  ReturnValue = Size;

-

-  if ((StartAddress & 1) != 0) {

-    //

-    // Read a byte if StartAddress is byte aligned

-    //

-    *(volatile UINT8 *)Buffer = PciExpressRead8 (StartAddress);

-    StartAddress += sizeof (UINT8);

-    Size -= sizeof (UINT8);

-    Buffer = (UINT8*)Buffer + 1;

-  }

-

-  if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {

-    //

-    // Read a word if StartAddress is word aligned

-    //

-    *(volatile UINT16 *)Buffer = PciExpressRead16 (StartAddress);

-    StartAddress += sizeof (UINT16);

-    Size -= sizeof (UINT16);

-    Buffer = (UINT16*)Buffer + 1;

-  }

-

-  while (Size >= sizeof (UINT32)) {

-    //

-    // Read as many double words as possible

-    //

-    *(volatile UINT32 *)Buffer = PciExpressRead32 (StartAddress);

-    StartAddress += sizeof (UINT32);

-    Size -= sizeof (UINT32);

-    Buffer = (UINT32*)Buffer + 1;

-  }

-

-  if (Size >= sizeof (UINT16)) {

-    //

-    // Read the last remaining word if exist

-    //

-    *(volatile UINT16 *)Buffer = PciExpressRead16 (StartAddress);

-    StartAddress += sizeof (UINT16);

-    Size -= sizeof (UINT16);

-    Buffer = (UINT16*)Buffer + 1;

-  }

-

-  if (Size >= sizeof (UINT8)) {

-    //

-    // Read the last remaining byte if exist

-    //

-    *(volatile UINT8 *)Buffer = PciExpressRead8 (StartAddress);

-  }

-

-  return ReturnValue;

-}

-

-/**

-  Copies the data in a caller supplied buffer to a specified range of PCI

-  configuration space.

-

-  Writes the range of PCI configuration registers specified by StartAddress and

-  Size from the buffer specified by Buffer. This function only allows the PCI

-  configuration registers from a single PCI function to be written. Size is

-  returned. When possible 32-bit PCI configuration write cycles are used to

-  write from StartAdress to StartAddress + Size. Due to alignment restrictions,

-  8-bit and 16-bit PCI configuration write cycles may be used at the beginning

-  and the end of the range.

-

-  If StartAddress > 0x0FFFFFFF, then ASSERT().

-  If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().

-  If Size > 0 and Buffer is NULL, then ASSERT().

-

-  @param  StartAddress  Starting address that encodes the PCI Bus, Device,

-                        Function and Register.

-  @param  Size          Size in bytes of the transfer.

-  @param  Buffer        Pointer to a buffer containing the data to write.

-

-  @return Size

-

-**/

-UINTN

-EFIAPI

-PciExpressWriteBuffer (

-  IN      UINTN                     StartAddress,

-  IN      UINTN                     Size,

-  IN      VOID                      *Buffer

-  )

-{

-  UINTN                             ReturnValue;

-

-  ASSERT_INVALID_PCI_ADDRESS (StartAddress);

-  ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);

-

-  if (Size == 0) {

-    return 0;

-  }

-

-  ASSERT (Buffer != NULL);

-

-  //

-  // Save Size for return

-  //

-  ReturnValue = Size;

-

-  if ((StartAddress & 1) != 0) {

-    //

-    // Write a byte if StartAddress is byte aligned

-    //

-    PciExpressWrite8 (StartAddress, *(UINT8*)Buffer);

-    StartAddress += sizeof (UINT8);

-    Size -= sizeof (UINT8);

-    Buffer = (UINT8*)Buffer + 1;

-  }

-

-  if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {

-    //

-    // Write a word if StartAddress is word aligned

-    //

-    PciExpressWrite16 (StartAddress, *(UINT16*)Buffer);

-    StartAddress += sizeof (UINT16);

-    Size -= sizeof (UINT16);

-    Buffer = (UINT16*)Buffer + 1;

-  }

-

-  while (Size >= sizeof (UINT32)) {

-    //

-    // Write as many double words as possible

-    //

-    PciExpressWrite32 (StartAddress, *(UINT32*)Buffer);

-    StartAddress += sizeof (UINT32);

-    Size -= sizeof (UINT32);

-    Buffer = (UINT32*)Buffer + 1;

-  }

-

-  if (Size >= sizeof (UINT16)) {

-    //

-    // Write the last remaining word if exist

-    //

-    PciExpressWrite16 (StartAddress, *(UINT16*)Buffer);

-    StartAddress += sizeof (UINT16);

-    Size -= sizeof (UINT16);

-    Buffer = (UINT16*)Buffer + 1;

-  }

-

-  if (Size >= sizeof (UINT8)) {

-    //

-    // Write the last remaining byte if exist

-    //

-    PciExpressWrite8 (StartAddress, *(UINT8*)Buffer);

-  }

-

-  return ReturnValue;

-}