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author | Stephen Rothwell <sfr@canb.auug.org.au> | 2015-05-18 15:36:03 +1000 |
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committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2015-05-18 15:36:03 +1000 |
commit | 114f8d42acdac5bd646f2bf92e0b61b26d4b1420 (patch) | |
tree | 027cf654334f4ea96b97cc012b1ea296c10fb893 /Documentation | |
parent | 67af992b38b8a08cb7bc7bdd2968971814223fc7 (diff) | |
parent | 17258abbb56b31dfbe2b9839125149b98c5bdcf7 (diff) |
Merge remote-tracking branch 'spi/for-next'
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-ath79.txt | 24 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi_pl022.txt | 2 |
2 files changed, 25 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-ath79.txt b/Documentation/devicetree/bindings/spi/spi-ath79.txt new file mode 100644 index 000000000000..f1ad9c367532 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-ath79.txt @@ -0,0 +1,24 @@ +Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller + +Required properties: +- compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback. +- reg: Base address and size of the controllers memory area +- clocks: phandle to the AHB clock. +- clock-names: has to be "ahb". +- #address-cells: <1>, as required by generic SPI binding. +- #size-cells: <0>, also as required by generic SPI binding. + +Child nodes as per the generic SPI binding. + +Example: + + spi@1F000000 { + compatible = "qca,ar9132-spi", "qca,ar7100-spi"; + reg = <0x1F000000 0x10>; + + clocks = <&pll 2>; + clock-names = "ahb"; + + #address-cells = <1>; + #size-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/spi/spi_pl022.txt b/Documentation/devicetree/bindings/spi/spi_pl022.txt index 22ed6797216d..4d1673ca8cf8 100644 --- a/Documentation/devicetree/bindings/spi/spi_pl022.txt +++ b/Documentation/devicetree/bindings/spi/spi_pl022.txt @@ -4,9 +4,9 @@ Required properties: - compatible : "arm,pl022", "arm,primecell" - reg : Offset and length of the register set for the device - interrupts : Should contain SPI controller interrupt +- num-cs : total number of chipselects Optional properties: -- num-cs : total number of chipselects - cs-gpios : should specify GPIOs used for chipselects. The gpios will be referred to as reg = <index> in the SPI child nodes. If unspecified, a single SPI device without a chip select can be used. |