diff options
author | Kevin Hilman <khilman@linaro.org> | 2015-09-14 14:21:39 -0700 |
---|---|---|
committer | Kevin Hilman <khilman@linaro.org> | 2015-09-14 14:21:39 -0700 |
commit | f249a14dd1b6b341e7b5e29b64c0edae6e13b7f5 (patch) | |
tree | e5b53c75e42b5ac0d9b8feac65ce4b7a1b2a17bd /drivers/gpu/drm/i915/intel_dp.c | |
parent | 48cf795880b441a6c59cd840d0475fac7fdffd87 (diff) | |
parent | 0c5c1f1a4f991ee015da85cce6d2d9f9c9380b4f (diff) |
Merge tag 'v4.1.7' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable into linux-linaro-lsk-v4.1lsk-v4.1-15.09
This is the 4.1.7 stable release
* tag 'v4.1.7' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable: (165 commits)
Linux 4.1.7
ARM: 8405/1: VDSO: fix regression with toolchains lacking ld.bfd executable
x86/idle: Restore trace_cpu_idle to mwait_idle() calls
x86/apic: Fix fallout from x2apic cleanup
x86/xen: make CONFIG_XEN depend on CONFIG_X86_LOCAL_APIC
arm64: perf: fix unassigned cpu_pmu->plat_device when probing PMU PPIs
arm64: KVM: Fix host crash when injecting a fault into a 32bit guest
fnic: Use the local variable instead of I/O flag to acquire io_req_lock in fnic_queuecommand() to avoid deadloack
Add factory recertified Crucial M500s to blacklist
can: pcan_usb: don't provide CAN FD bittimings by non-FD adapters
SCSI: Fix NULL pointer dereference in runtime PM
genirq: Introduce irq_chip_set_type_parent() helper
genirq: Don't return ENOSYS in irq_chip_retrigger_hierarchy
ARM: OMAP: wakeupgen: Restore the irq_set_type() mechanism
irqchip/crossbar: Restore set_wake functionality
irqchip/crossbar: Restore the mask on suspend behaviour
irqchip/crossbar: Restore the irq_set_type() mechanism
9p: ensure err is initialized to 0 in p9_client_read/write
drm/i915: Avoid TP3 on CHV
drm/i915: remove HBR2 from chv supported list
...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 29 |
1 files changed, 22 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d714a4b5711e..b1fe32b119ef 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1150,6 +1150,19 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates) return (intel_dp_max_link_bw(intel_dp) >> 3) + 1; } +static bool intel_dp_source_supports_hbr2(struct drm_device *dev) +{ + /* WaDisableHBR2:skl */ + if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) + return false; + + if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) || + (INTEL_INFO(dev)->gen >= 9)) + return true; + else + return false; +} + static int intel_dp_source_rates(struct drm_device *dev, const int **source_rates) { @@ -1163,11 +1176,8 @@ intel_dp_source_rates(struct drm_device *dev, const int **source_rates) *source_rates = default_rates; - if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) - /* WaDisableHBR2:skl */ - return (DP_LINK_BW_2_7 >> 3) + 1; - else if (INTEL_INFO(dev)->gen >= 8 || - (IS_HASWELL(dev) && !IS_HSW_ULX(dev))) + /* This depends on the fact that 5.4 is last value in the array */ + if (intel_dp_source_supports_hbr2(dev)) return (DP_LINK_BW_5_4 >> 3) + 1; else return (DP_LINK_BW_2_7 >> 3) + 1; @@ -3783,10 +3793,15 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) } } - /* Training Pattern 3 support, both source and sink */ + /* Training Pattern 3 support, Intel platforms that support HBR2 alone + * have support for TP3 hence that check is used along with dpcd check + * to ensure TP3 can be enabled. + * SKL < B0: due it's WaDisableHBR2 is the only exception where TP3 is + * supported but still not enabled. + */ if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 && intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED && - (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)) { + intel_dp_source_supports_hbr2(dev)) { intel_dp->use_tps3 = true; DRM_DEBUG_KMS("Displayport TPS3 supported\n"); } else |