diff options
Diffstat (limited to 'arch/arm64/boot/dts/arm/juno.dts')
| -rw-r--r-- | arch/arm64/boot/dts/arm/juno.dts | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts index 133ee59de2d7..366b0848cf2b 100644 --- a/arch/arm64/boot/dts/arm/juno.dts +++ b/arch/arm64/boot/dts/arm/juno.dts @@ -34,12 +34,40 @@ #address-cells = <2>; #size-cells = <0>; + cpu-map { + cluster0 { + core0 { + cpu = <&A57_0>; + }; + core1 { + cpu = <&A57_1>; + }; + }; + + cluster1 { + core0 { + cpu = <&A53_0>; + }; + core1 { + cpu = <&A53_1>; + }; + core2 { + cpu = <&A53_2>; + }; + core3 { + cpu = <&A53_3>; + }; + }; + }; + A57_0: cpu@0 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x0 0x0>; device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A57_L2>; + clocks = <&scpi_dvfs 0>; + clock-names = "vbig"; }; A57_1: cpu@1 { @@ -48,6 +76,8 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A57_L2>; + clocks = <&scpi_dvfs 0>; + clock-names = "vbig"; }; A53_0: cpu@100 { @@ -56,6 +86,8 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + clock-names = "vlittle"; }; A53_1: cpu@101 { @@ -64,6 +96,8 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + clock-names = "vlittle"; }; A53_2: cpu@102 { @@ -72,6 +106,8 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + clock-names = "vlittle"; }; A53_3: cpu@103 { @@ -80,6 +116,8 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + clock-names = "vlittle"; }; A57_L2: l2-cache0 { @@ -128,6 +166,41 @@ <GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>; }; + mailbox: mhu@2b1f0000 { + compatible = "arm,mhu"; + reg = <0x0 0x2b1f0000 0x0 0x10000>, /* MHU registers */ + <0x0 0x2e000000 0x0 0x10000>; /* Payload area */ + interrupts = <0 36 4>, /* low priority interrupt */ + <0 35 4>; /* high priority interrupt */ + #mbox-cells = <1>; + mbox-names = "cpu_to_scp_low", "cpu_to_scp_high"; + mboxes = <&mailbox 0 &mailbox 1>; + }; + + clocks { + compatible = "arm,scpi-clks"; + + scpi_dvfs: scpi_clocks@0 { + compatible = "arm,scpi-clk-indexed"; + #clock-cells = <1>; + clock-indices = <0>, <1>, <2>; + clock-output-names = "vbig", "vlittle", "vgpu"; + }; + + scpi_clk: scpi_clocks@3 { + compatible = "arm,scpi-clk-range"; + #clock-cells = <1>; + clock-indices = <3>, <4>; + frequency-range = <23000000 210000000>; + clock-output-names = "pxlclk0", "pxlclk1"; + }; + + }; + + cpufreq { + compatible = "arm,scpi-cpufreq"; + }; + /include/ "juno-clocks.dtsi" dma@7ff00000 { |