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| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-07-18 15:42:50 +0100 |
|---|---|---|
| committer | Ryan Harkin <ryan.harkin@linaro.org> | 2017-08-08 12:35:29 +0100 |
| commit | 569b4abec93271722bfc51a95027eb0a9d3447c1 (patch) | |
| tree | fd066e26b9ede26bd45d700bdd0bf434d734183c /lib/xlat_tables_v2/xlat_tables_internal.c | |
| parent | 69ee4ebe2546ca7a93cd0456e6b62f3138b0aedb (diff) | |
Revision C of the Base FVP has the same memory map as earlier revisions,
but has the following differences:
- Implements CCI550 instead of CCI400,
- Has a single instantiation of SMMUv3,
- CPU MPIDs are shifted left by one level, and has MT bit set in them.
The correct interconnect to program is chosen at run time based on the
FVP revision. Therefore, this patch implements FVP functions for
interconnect programming, rather than depending on ARM generic ones. The
macros used have been renamed to reflect this change.
Additionally, this patch initializes SMMUv3 as part of FVP early
platform setup.
New ARM config flags are introduced for feature queries at run time.
Change-Id: Ic7b7f080953a51fceaf62ce7daa6de0573801f09
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'lib/xlat_tables_v2/xlat_tables_internal.c')
0 files changed, 0 insertions, 0 deletions