diff options
| author | Amit Daniel Kachhap <amit.kachhap@arm.com> | 2018-07-27 18:49:26 +0530 |
|---|---|---|
| committer | Amit Daniel Kachhap <amit.kachhap@arm.com> | 2018-07-30 14:07:42 +0530 |
| commit | 9b2769768c6f813d9d1a659a38a767273026af97 (patch) | |
| tree | 496a9eec6a74411acf03ef527a7778f9d08d4bb0 | |
| parent | a1f6745d7b18775a6390e6a4c418715f6a649efc (diff) | |
clk: scmi: Fix the rounding of clock ratelatest-armlt-20180817latest-armlt-18.07
This fix rounds the clock rate properly by using quotient and not
remainder in the calculation. This issue was found while testing HDMI
in the Juno platform.
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
| -rw-r--r-- | drivers/clk/clk-scmi.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index 488c21376b55..ffe391b671b8 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -38,7 +38,6 @@ static unsigned long scmi_clk_recalc_rate(struct clk_hw *hw, static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { - int step; u64 fmin, fmax, ftmp; struct scmi_clk *clk = to_scmi_clk(hw); @@ -60,9 +59,9 @@ static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate, ftmp = rate - fmin; ftmp += clk->info->range.step_size - 1; /* to round up */ - step = do_div(ftmp, clk->info->range.step_size); + do_div(ftmp, clk->info->range.step_size); - return step * clk->info->range.step_size + fmin; + return ftmp * clk->info->range.step_size + fmin; } static int scmi_clk_set_rate(struct clk_hw *hw, unsigned long rate, |