diff options
Diffstat (limited to 'arch/arm64/boot/dts/arm/juno-r1.dts')
| -rw-r--r-- | arch/arm64/boot/dts/arm/juno-r1.dts | 36 |
1 files changed, 30 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts index 88c83d1d7076..8b2501e73cbe 100644 --- a/arch/arm64/boot/dts/arm/juno-r1.dts +++ b/arch/arm64/boot/dts/arm/juno-r1.dts @@ -96,7 +96,7 @@ d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&A57_L2>; - clocks = <&scpi_dvfs 0>; + clocks = <&scmi_dvfs 0>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <1024>; }; @@ -113,7 +113,7 @@ d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&A57_L2>; - clocks = <&scpi_dvfs 0>; + clocks = <&scmi_dvfs 0>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <1024>; }; @@ -130,7 +130,7 @@ d-cache-line-size = <64>; d-cache-sets = <128>; next-level-cache = <&A53_L2>; - clocks = <&scpi_dvfs 1>; + clocks = <&scmi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <578>; }; @@ -147,7 +147,7 @@ d-cache-line-size = <64>; d-cache-sets = <128>; next-level-cache = <&A53_L2>; - clocks = <&scpi_dvfs 1>; + clocks = <&scmi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <578>; }; @@ -164,7 +164,7 @@ d-cache-line-size = <64>; d-cache-sets = <128>; next-level-cache = <&A53_L2>; - clocks = <&scpi_dvfs 1>; + clocks = <&scmi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <578>; }; @@ -181,7 +181,7 @@ d-cache-line-size = <64>; d-cache-sets = <128>; next-level-cache = <&A53_L2>; - clocks = <&scpi_dvfs 1>; + clocks = <&scmi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; capacity-dmips-mhz = <578>; }; @@ -281,3 +281,27 @@ &stm_out_port { remote-endpoint = <&csys1_funnel_in_port0>; }; + +&cpu_debug0 { + cpu = <&A57_0>; +}; + +&cpu_debug1 { + cpu = <&A57_1>; +}; + +&cpu_debug2 { + cpu = <&A53_0>; +}; + +&cpu_debug3 { + cpu = <&A53_1>; +}; + +&cpu_debug4 { + cpu = <&A53_2>; +}; + +&cpu_debug5 { + cpu = <&A53_3>; +}; |