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+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __WARP7_DEF_H__
+#define __WARP7_DEF_H__
+
+#include <platform_def.h>
+
+/*******************************************************************************
+ * Warp7 memory map related constants
+ ******************************************************************************/
+/* Following covers AIPS Peripherals and ARM Peripherals */
+#define DEVICE0_BASE 0x30000000
+#define DEVICE0_SIZE 0x01400000
+
+/* Peripherals like GPIO live in the AIPS range */
+#define AIPS1_BASE 0x30000000 /* AIPS1 */
+#define AIPS2_BASE 0x30400000 /* AIPS2 */
+#define AIPS3_BASE 0x30800000 /* AIPS3 */
+#define AIPS4_BASE 0x30c00000 /* AIPS4 */
+/*******************************************************************************
+ * GIC-400 & interrupt handling related constants
+ ******************************************************************************/
+#define GICD_BASE 0x31001000
+#define GICC_BASE 0x31002000
+/* Warp7 doesn't support GIC Redistributor, it's a GICv3 feature */
+#define GICR_BASE 0
+
+/*******************************************************************************
+ * UART related constants
+ ******************************************************************************/
+/* SoC UART0 */
+#define PLAT_WARP7_BOOT_UART_BASE 0x30860000
+#define PLAT_WARP7_BOOT_UART_CLK_IN_HZ 24000000
+#define PLAT_WARP7_BOOT_UART_BAUDRATE 115200
+
+#define PLAT_ARM_UART_BASE PLAT_WARP7_BOOT_UART_BASE
+#define PLAT_ARM_UART_CLK_IN_HZ PLAT_WARP7_BOOT_UART_CLK_IN_HZ
+
+/*******************************************************************************
+ * timer related constants
+ ******************************************************************************/
+#define GPT1_BASE_ADDR (AIPS1_BASE + 0x2d0000)
+
+#endif /* __WARP7_DEF_H__ */