diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-01-08 08:58:56 +0200 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-03-06 12:22:40 +0300 |
| commit | 72fa1e4e84e88e6b6fe494074169a141e992e745 (patch) | |
| tree | a769fd964146027766a0bebb47624a5fd193221d | |
| parent | ee4feba8addbe72bc390e1bce001a623133d96e0 (diff) | |
arm64: dts: qcom: add device tree for DB845c working in dual DSI modetracking-qcomlt-lt9611-4k
While we are testing the DB845c working in dual DSI mode (which is
required for the 4k support), create a separate device tree using this
configuration.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845-db845c-dual-dsi.dts | 48 |
2 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 31aa54f0428c..d5b714f7c5fc 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -158,6 +158,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c-dual-dsi.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c-navigation-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyln.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyp.dtb diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-dual-dsi.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c-dual-dsi.dts new file mode 100644 index 000000000000..4a366dedc841 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-dual-dsi.dts @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023, Linaro Ltd. + */ + +#include "sdm845-db845c.dts" + +&dsi0 { + qcom,dual-dsi-mode; + qcom,master-dsi; +}; + +&dsi1 { + vdda-supply = <&vreg_l26a_1p2>; + + qcom,dual-dsi-mode; + + /* DSI1 is slave, so use DSI0 clocks */ + assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; + + status = "okay"; + + ports { + port@1 { + endpoint { + remote-endpoint = <<9611_b>; + data-lanes = <0 1 2 3>; + }; + }; + }; +}; + +&dsi1_phy { + vdds-supply = <&vreg_l1a_0p875>; + status = "okay"; +}; + +<9611_codec { + ports { + port@1 { + reg = <1>; + + lt9611_b: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; + }; +}; |