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author | Loic Poulain <loic.poulain@linaro.org> | 2020-11-09 18:20:47 +0100 |
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committer | Loic Poulain <loic.poulain@linaro.org> | 2020-11-10 10:26:54 +0100 |
commit | 88fe7e3cc99438c1760f3e0f2da061fdaab4a924 (patch) | |
tree | 24b6e6625d5a38a3ad6ac9b4127f0dd80684e8c1 | |
parent | 612749ba309a65a1bc792d10a594680d0d00f599 (diff) |
Add dummy udev rule for setting up PCIe data path
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
-rw-r--r-- | 42-mhi.rules | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/42-mhi.rules b/42-mhi.rules index 1a13508..0807756 100644 --- a/42-mhi.rules +++ b/42-mhi.rules @@ -1,2 +1,13 @@ # TODO build tool path -ACTION=="add", SUBSYSTEM=="mhi_uci", KERNEL=="mhi_0000:02:00.0_QMI", RUN+="/bin/mhi-qmi-connect --udev" +#ACTION=="add", SUBSYSTEM=="mhi_uci", KERNEL=="mhi_0000:02:00.0_QMI", RUN+="/bin/mhi-qmi-connect --udev" + +# There are two paths for submitting QMI commands, the legacy path using MHI UCI /dev/mhi_xxx_QMI +# and QRTR path. Today, QMI over QRTR is recommended because it's bus agnostic and can be +# used in embedded or PCIe case. (QRTR over smem, QRTR over MHI....). +# However in case of PCIe we still need to open the MHI UCI device so that modem configures the +# data path to PCIe endpoint. This dummy rule is only here to keep the QMI channel open and let +# the modem know that we want to use PCIe. + +# QCOM SDX55 PCIe MHI QMI +ACTION=="add", SUBSYSTEM=="mhi_uci", ATTRS{vendor}=="0x17cb", ATTRS{device}=="0x0306", KERNEL=="mhi*QMI", RUN+="/bin/cat $env{DEVNAME}" + |