aboutsummaryrefslogtreecommitdiff
path: root/platform/ext/target/nuvoton/m2354/device/source/iar/startup_cmsdk_m2354_s.s
blob: 01327f8d19edecb084219197c5fa46f2ab66e56e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
;/*
; * Copyright (c) 2016-2021 ARM Limited
; * Copyright (c) 2020 Nuvoton Technology Corp. All rights reserved.
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
; * you may not use this file except in compliance with the License.
; * You may obtain a copy of the License at
; *
; *     http://www.apache.org/licenses/LICENSE-2.0
; *
; * Unless required by applicable law or agreed to in writing, software
; * distributed under the License is distributed on an "AS IS" BASIS,
; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; * See the License for the specific language governing permissions and
; * limitations under the License.
; */
;
; This file is derivative of ../armclang/startup_cmsdk_mps2_an521_s.s

;/*
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;*/


; <h> Stack Configuration
;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>

                MODULE   ?cstartup

                ;; Forward declaration of sections.
                SECTION  ARM_LIB_STACK:DATA:NOROOT(3)

                SECTION  .intvec:CODE:NOROOT(2)

                EXTERN   __iar_program_start
                EXTERN   SystemInit
                EXTERN   SCU_IRQHandler
                PUBLIC   __vector_table
                PUBLIC   __Vectors
                PUBLIC   __Vectors_End
                PUBLIC   __Vectors_Size

                DATA

__vector_table      ;Core Interrupts
                DCD     sfe(ARM_LIB_STACK)        ; Top of Stack
                DCD     Reset_Handler             ; Reset Handler
                DCD     NMI_Handler               ; NMI Handler
                DCD     HardFault_Handler         ; Hard Fault Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     SVC_Handler               ; SVCall Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     PendSV_Handler            ; PendSV Handler
                DCD     SysTick_Handler           ; SysTick Handler

                ; Interrupts
                DCD     BOD_IRQHandler		       ; 0
                DCD     IRC_IRQHandler             ; 1
                DCD     PWRWU_IRQHandler           ; 2
                DCD     SRAM_IRQHandler            ; 3
                DCD     CLKFAIL_IRQHandler         ; 4
                DCD     DEFAULT_IRQHandler         ; 5
                DCD     RTC_IRQHandler             ; 6
                DCD     TAMPER_IRQHandler          ; 7
                DCD     WDT_IRQHandler             ; 8
                DCD     WWDT_IRQHandler            ; 9
                DCD     EINT0_IRQHandler           ; 10
                DCD     EINT1_IRQHandler           ; 11
                DCD     EINT2_IRQHandler           ; 12
                DCD     EINT3_IRQHandler           ; 13
                DCD     EINT4_IRQHandler           ; 14
                DCD     EINT5_IRQHandler           ; 15
                DCD     GPA_IRQHandler             ; 16
                DCD     GPB_IRQHandler             ; 17
                DCD     GPC_IRQHandler             ; 18
                DCD     GPD_IRQHandler             ; 19
                DCD     GPE_IRQHandler             ; 20
                DCD     GPF_IRQHandler             ; 21
                DCD     QSPI0_IRQHandler           ; 22
                DCD     SPI0_IRQHandler            ; 23
                DCD     BRAKE0_IRQHandler          ; 24
                DCD     EPWM0_P0_IRQHandler        ; 25
                DCD     EPWM0_P1_IRQHandler        ; 26
                DCD     EPWM0_P2_IRQHandler        ; 27
                DCD     BRAKE1_IRQHandler          ; 28
                DCD     EPWM1_P0_IRQHandler        ; 29
                DCD     EPWM1_P1_IRQHandler        ; 30
                DCD     EPWM1_P2_IRQHandler        ; 31
                DCD     TFM_TIMER0_IRQ_Handler     ; 32
                DCD     TMR1_IRQHandler            ; 33
                DCD     TIMER1_Handler             ; 34
                DCD     TMR3_IRQHandler            ; 35
                DCD     UART0_IRQHandler           ; 36
                DCD     UART1_IRQHandler           ; 37
                DCD     I2C0_IRQHandler            ; 38
                DCD     I2C1_IRQHandler            ; 39
                DCD     PDMA0_IRQHandler           ; 40
                DCD     DAC_IRQHandler             ; 41
                DCD     EADC0_IRQHandler           ; 42
                DCD     EADC1_IRQHandler           ; 43
                DCD     ACMP01_IRQHandler          ; 44
                DCD     DEFAULT_IRQHandler         ; 45
                DCD     EADC2_IRQHandler           ; 46
                DCD     EADC3_IRQHandler           ; 47
                DCD     UART2_IRQHandler           ; 48
                DCD     UART3_IRQHandler           ; 49
                DCD     DEFAULT_IRQHandler         ; 50
                DCD     SPI1_IRQHandler            ; 51
                DCD     SPI2_IRQHandler            ; 52
                DCD     USBD_IRQHandler            ; 53
                DCD     USBH_IRQHandler            ; 54
                DCD     USBOTG_IRQHandler          ; 55
                DCD     CAN0_IRQHandler            ; 56
                DCD     DEFAULT_IRQHandler         ; 57
                DCD     SC0_IRQHandler             ; 58
                DCD     SC1_IRQHandler             ; 59
                DCD     SC2_IRQHandler             ; 60
                DCD     DEFAULT_IRQHandler         ; 61
                DCD     SPI3_IRQHandler            ; 62
                DCD     DEFAULT_IRQHandler         ; 63
                DCD     SDH0_IRQHandler            ; 64
                DCD     DEFAULT_IRQHandler         ; 65
                DCD     DEFAULT_IRQHandler         ; 66
                DCD     DEFAULT_IRQHandler         ; 67
                DCD     I2S0_IRQHandler            ; 68
                DCD     DEFAULT_IRQHandler         ; 69
                DCD     OPA0_IRQHandler            ; 70
                DCD     CRPT_IRQHandler            ; 71
                DCD     GPG_IRQHandler             ; 72
                DCD     EINT6_IRQHandler           ; 73
                DCD     UART4_IRQHandler           ; 74
                DCD     UART5_IRQHandler           ; 75
                DCD     USCI0_IRQHandler           ; 76
                DCD     USCI1_IRQHandler           ; 77
                DCD     BPWM0_IRQHandler           ; 78
                DCD     BPWM1_IRQHandler           ; 79
                DCD     DEFAULT_IRQHandler         ; 80
                DCD     DEFAULT_IRQHandler         ; 81
                DCD     I2C2_IRQHandler            ; 82
                DCD     DEFAULT_IRQHandler         ; 83
                DCD     QEI0_IRQHandler            ; 84
                DCD     QEI1_IRQHandler            ; 85
                DCD     ECAP0_IRQHandler           ; 86
                DCD     ECAP1_IRQHandler           ; 87
                DCD     GPH_IRQHandler             ; 88
                DCD     EINT7_IRQHandler           ; 89
                DCD     DEFAULT_IRQHandler         ; 90
                DCD     DEFAULT_IRQHandler         ; 91
                DCD     DEFAULT_IRQHandler         ; 92
                DCD     DEFAULT_IRQHandler         ; 93
                DCD     DEFAULT_IRQHandler         ; 94
                DCD     DEFAULT_IRQHandler         ; 95
                DCD     DEFAULT_IRQHandler         ; 96
                DCD     DEFAULT_IRQHandler         ; 97
                DCD     PDMA1_IRQHandler           ; 98
                DCD     SCU_IRQHandler             ; 99
                DCD     DEFAULT_IRQHandler         ; 100
                DCD     TRNG_IRQHandler            ; 101
__Vectors_End

__Vectors       EQU     __vector_table
__Vectors_Size  EQU     __Vectors_End - __Vectors

; Reset Handler

                PUBWEAK  Reset_Handler
                SECTION  .text:CODE:REORDER:NOROOT(2)
Reset_Handler
                CPSID   i              ; Disable IRQs
                LDR     R0, =SystemInit
                BLX     R0
                LDR     R0, =__iar_program_start
                BX      R0

; Dummy Exception Handlers (infinite loops which can be modified)
Default_Handler2 MACRO handler_name
                PUBWEAK  handler_name
handler_name
                B       .
                ENDM

                Default_Handler2 NMI_Handler
                Default_Handler2 HardFault_Handler
                Default_Handler2 SVC_Handler
                Default_Handler2 PendSV_Handler
                Default_Handler2 SysTick_Handler

Default_Handler
; Interrupts
                PUBWEAK  BOD_IRQHandler	            ; 0
                PUBWEAK  IRC_IRQHandler             ; 1
                PUBWEAK  PWRWU_IRQHandler           ; 2
                PUBWEAK  SRAM_IRQHandler            ; 3
                PUBWEAK  CLKFAIL_IRQHandler         ; 4
               ;PUBWEAK  0                          ; 5
                PUBWEAK  RTC_IRQHandler             ; 6
                PUBWEAK  TAMPER_IRQHandler          ; 7
                PUBWEAK  WDT_IRQHandler             ; 8
                PUBWEAK  WWDT_IRQHandler            ; 9
                PUBWEAK  EINT0_IRQHandler           ; 10
                PUBWEAK  EINT1_IRQHandler           ; 11
                PUBWEAK  EINT2_IRQHandler           ; 12
                PUBWEAK  EINT3_IRQHandler           ; 13
                PUBWEAK  EINT4_IRQHandler           ; 14
                PUBWEAK  EINT5_IRQHandler           ; 15
                PUBWEAK  GPA_IRQHandler             ; 16
                PUBWEAK  GPB_IRQHandler             ; 17
                PUBWEAK  GPC_IRQHandler             ; 18
                PUBWEAK  GPD_IRQHandler             ; 19
                PUBWEAK  GPE_IRQHandler             ; 20
                PUBWEAK  GPF_IRQHandler             ; 21
                PUBWEAK  QSPI0_IRQHandler           ; 22
                PUBWEAK  SPI0_IRQHandler            ; 23
                PUBWEAK  BRAKE0_IRQHandler          ; 24
                PUBWEAK  EPWM0_P0_IRQHandler        ; 25
                PUBWEAK  EPWM0_P1_IRQHandler        ; 26
                PUBWEAK  EPWM0_P2_IRQHandler        ; 27
                PUBWEAK  BRAKE1_IRQHandler          ; 28
                PUBWEAK  EPWM1_P0_IRQHandler        ; 29
                PUBWEAK  EPWM1_P1_IRQHandler        ; 30
                PUBWEAK  EPWM1_P2_IRQHandler        ; 31
                PUBWEAK  TFM_TIMER0_IRQ_Handler     ; 32
                PUBWEAK  TMR1_IRQHandler            ; 33
                PUBWEAK  TIMER1_Handler             ; 34
                PUBWEAK  TMR3_IRQHandler            ; 35
                PUBWEAK  UART0_IRQHandler           ; 36
                PUBWEAK  UART1_IRQHandler           ; 37
                PUBWEAK  I2C0_IRQHandler            ; 38
                PUBWEAK  I2C1_IRQHandler            ; 39
                PUBWEAK  PDMA0_IRQHandler           ; 40
                PUBWEAK  DAC_IRQHandler             ; 41
                PUBWEAK  EADC0_IRQHandler           ; 42
                PUBWEAK  EADC1_IRQHandler           ; 43
                PUBWEAK  ACMP01_IRQHandler          ; 44
               ;PUBWEAK  0                          ; 45
                PUBWEAK  EADC2_IRQHandler           ; 46
                PUBWEAK  EADC3_IRQHandler           ; 47
                PUBWEAK  UART2_IRQHandler           ; 48
                PUBWEAK  UART3_IRQHandler           ; 49
               ;PUBWEAK  0                          ; 50
                PUBWEAK  SPI1_IRQHandler            ; 51
                PUBWEAK  SPI2_IRQHandler            ; 52
                PUBWEAK  USBD_IRQHandler            ; 53
                PUBWEAK  USBH_IRQHandler            ; 54
                PUBWEAK  USBOTG_IRQHandler          ; 55
                PUBWEAK  CAN0_IRQHandler            ; 56
                PUBWEAK  CAN1_IRQHandler            ; 57
                PUBWEAK  SC0_IRQHandler             ; 58
                PUBWEAK  SC1_IRQHandler             ; 59
                PUBWEAK  SC2_IRQHandler             ; 60
                PUBWEAK  SC3_IRQHandler             ; 61
                PUBWEAK  SPI3_IRQHandler            ; 62
               ;PUBWEAK  0                          ; 63
                PUBWEAK  SDH0_IRQHandler            ; 64
               ;PUBWEAK  0                          ; 65
               ;PUBWEAK  0                          ; 66
               ;PUBWEAK  0                          ; 67
                PUBWEAK  I2S0_IRQHandler            ; 68
               ;PUBWEAK  0                          ; 69
                PUBWEAK  OPA0_IRQHandler            ; 70
                PUBWEAK  CRPT_IRQHandler            ; 71
                PUBWEAK  GPG_IRQHandler             ; 72
                PUBWEAK  EINT6_IRQHandler           ; 73
                PUBWEAK  UART4_IRQHandler           ; 74
                PUBWEAK  UART5_IRQHandler           ; 75
                PUBWEAK  USCI0_IRQHandler           ; 76
                PUBWEAK  USCI1_IRQHandler           ; 77
                PUBWEAK  BPWM0_IRQHandler           ; 78
                PUBWEAK  BPWM1_IRQHandler           ; 79
               ;PUBWEAK  0                          ; 80
               ;PUBWEAK  0                          ; 81
                PUBWEAK  I2C2_IRQHandler            ; 82
               ;PUBWEAK  0                          ; 83
                PUBWEAK  QEI0_IRQHandler            ; 84
                PUBWEAK  QEI1_IRQHandler            ; 85
                PUBWEAK  ECAP0_IRQHandler           ; 86
                PUBWEAK  ECAP1_IRQHandler           ; 87
                PUBWEAK  GPH_IRQHandler             ; 88
                PUBWEAK  EINT7_IRQHandler           ; 89
                PUBWEAK  SDH1_IRQHandler            ; 90
               ;PUBWEAK  0                          ; 91
               ;PUBWEAK  USBH_IRQHandler            ; 92
               ;PUBWEAK  0                          ; 93
               ;PUBWEAK  0                          ; 94
               ;PUBWEAK  0                          ; 95
               ;PUBWEAK  0                          ; 96
               ;PUBWEAK  0                          ; 97
                PUBWEAK  PDMA1_IRQHandler           ; 98
               ;PUBWEAK  SCU_IRQHandler             ; 99
                PUBWEAK  DEFAULT_IRQHandler         ; 100
                PUBWEAK  TRNG_IRQHandler            ; 101

; Interrupts
BOD_IRQHandler		       ; 0
IRC_IRQHandler             ; 1
PWRWU_IRQHandler           ; 2
SRAM_IRQHandler            ; 3
CLKFAIL_IRQHandler         ; 4
;0                         ; 5
RTC_IRQHandler             ; 6
TAMPER_IRQHandler          ; 7
WDT_IRQHandler             ; 8
WWDT_IRQHandler            ; 9
EINT0_IRQHandler           ; 10
EINT1_IRQHandler           ; 11
EINT2_IRQHandler           ; 12
EINT3_IRQHandler           ; 13
EINT4_IRQHandler           ; 14
EINT5_IRQHandler           ; 15
GPA_IRQHandler             ; 16
GPB_IRQHandler             ; 17
GPC_IRQHandler             ; 18
GPD_IRQHandler             ; 19
GPE_IRQHandler             ; 20
GPF_IRQHandler             ; 21
QSPI0_IRQHandler           ; 22
SPI0_IRQHandler            ; 23
BRAKE0_IRQHandler          ; 24
EPWM0_P0_IRQHandler        ; 25
EPWM0_P1_IRQHandler        ; 26
EPWM0_P2_IRQHandler        ; 27
BRAKE1_IRQHandler          ; 28
EPWM1_P0_IRQHandler        ; 29
EPWM1_P1_IRQHandler        ; 30
EPWM1_P2_IRQHandler        ; 31
TFM_TIMER0_IRQ_Handler     ; 32
TMR1_IRQHandler            ; 33
TIMER1_Handler             ; 34
TMR3_IRQHandler            ; 35
UART0_IRQHandler           ; 36
UART1_IRQHandler           ; 37
I2C0_IRQHandler            ; 38
I2C1_IRQHandler            ; 39
PDMA0_IRQHandler           ; 40
DAC_IRQHandler             ; 41
EADC0_IRQHandler           ; 42
EADC1_IRQHandler           ; 43
ACMP01_IRQHandler          ; 44
;0                         ; 45
EADC2_IRQHandler           ; 46
EADC3_IRQHandler           ; 47
UART2_IRQHandler           ; 48
UART3_IRQHandler           ; 49
;0                         ; 50
SPI1_IRQHandler            ; 51
SPI2_IRQHandler            ; 52
USBD_IRQHandler            ; 53
USBH_IRQHandler            ; 54
USBOTG_IRQHandler          ; 55
CAN0_IRQHandler            ; 56
CAN1_IRQHandler            ; 57
SC0_IRQHandler             ; 58
SC1_IRQHandler             ; 59
SC2_IRQHandler             ; 60
SC3_IRQHandler             ; 61
SPI3_IRQHandler            ; 62
;0                         ; 63
SDH0_IRQHandler            ; 64
;0                         ; 65
;0                         ; 66
;0                         ; 67
I2S0_IRQHandler            ; 68
;0                         ; 69
OPA0_IRQHandler            ; 70
CRPT_IRQHandler            ; 71
GPG_IRQHandler             ; 72
EINT6_IRQHandler           ; 73
UART4_IRQHandler           ; 74
UART5_IRQHandler           ; 75
USCI0_IRQHandler           ; 76
USCI1_IRQHandler           ; 77
BPWM0_IRQHandler           ; 78
BPWM1_IRQHandler           ; 79
;0                         ; 80
;0                         ; 81
I2C2_IRQHandler            ; 82
;0                         ; 83
QEI0_IRQHandler            ; 84
QEI1_IRQHandler            ; 85
ECAP0_IRQHandler           ; 86
ECAP1_IRQHandler           ; 87
GPH_IRQHandler             ; 88
EINT7_IRQHandler           ; 89
SDH1_IRQHandler            ; 90
;0                         ; 91
;USBH_IRQHandler           ; 92
;0                         ; 93
;0                         ; 94
;0                         ; 95
;0                         ; 96
;0                         ; 97
PDMA1_IRQHandler           ; 98
;SCU_IRQHandler            ; 99
;0                         ; 100
TRNG_IRQHandler            ; 101
DEFAULT_IRQHandler
                B       .

                END