diff options
Diffstat (limited to 'include/configs')
95 files changed, 2260 insertions, 453 deletions
diff --git a/include/configs/HWW1U1A.h b/include/configs/HWW1U1A.h index 01597b965b..f08d78b91c 100644 --- a/include/configs/HWW1U1A.h +++ b/include/configs/HWW1U1A.h @@ -422,7 +422,7 @@ const char *hww1u1a_get_ps1(void); #define CONFIG_MD5 #define CONFIG_SHA1 #define CONFIG_CMD_MD5SUM -#define CONFIG_CMD_SHA1 +#define CONFIG_CMD_SHA1SUM #define CONFIG_CMD_ASKENV #define CONFIG_CMD_SETEXPR diff --git a/include/configs/MBX.h b/include/configs/MBX.h index cb5b023b58..79780bd1a3 100644 --- a/include/configs/MBX.h +++ b/include/configs/MBX.h @@ -87,7 +87,6 @@ * Command line configuration. */ #define CONFIG_CMD_NET -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_PCMCIA #define CONFIG_CMD_IDE diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 619a8002a7..84ba78f9e9 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -38,7 +38,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_NFS -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SAVEENV diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index f2d33668d8..08fc4e8427 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -181,7 +181,7 @@ /* DDR Setup */ #define CONFIG_FSL_DDR3 -#define CONFIG_DDR_RAW_TIMING +#define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52 diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index e057b1f945..e632d1bd37 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -310,9 +310,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_OF_BOARD_SETUP #define CONFIG_OF_STDOUT_VIA_ALIAS -#define CONFIG_SYS_64BIT_VSPRINTF -#define CONFIG_SYS_64BIT_STRTOUL - /* new uImage format support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ diff --git a/include/configs/P2020COME.h b/include/configs/P2020COME.h index 365322c6a5..28122ecc11 100644 --- a/include/configs/P2020COME.h +++ b/include/configs/P2020COME.h @@ -416,8 +416,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #endif /* Misc Extra Settings */ -#define CONFIG_SYS_64BIT_VSPRINTF 1 -#define CONFIG_SYS_64BIT_STRTOUL 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_DATE 1 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index da98f8f027..fe39d4e6e6 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -96,6 +96,11 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (512 * 1097) +#elif defined(CONFIG_NAND) +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE \ @@ -186,10 +191,11 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE #endif -#define CONFIG_SYS_BR0_PRELIM \ +#define CONFIG_SYS_FLASH_BR_PRELIM \ (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) -#define CONFIG_SYS_OR0_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \ - | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR) +#define CONFIG_SYS_FLASH_OR_PRELIM \ + ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \ + | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR) #define CONFIG_FSL_CPLD #define CPLD_BASE 0xffdf0000 /* CPLD registers */ @@ -221,6 +227,53 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_RAMBOOT #endif +#define CONFIG_NAND_FSL_ELBC +/* Nand Flash */ +#ifdef CONFIG_NAND_FSL_ELBC +#define CONFIG_SYS_NAND_BASE 0xffa00000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull +#else +#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#endif + +#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_CMD_NAND +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) + +/* NAND flash config */ +#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ + | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ + | BR_PS_8 /* Port Size = 8 bit */ \ + | BR_MS_FCM /* MSEL = FCM */ \ + | BR_V) /* valid */ +#define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \ + | OR_FCM_PGS /* Large Page*/ \ + | OR_FCM_CSCT \ + | OR_FCM_CST \ + | OR_FCM_CHT \ + | OR_FCM_SCY_1 \ + | OR_FCM_TRLX \ + | OR_FCM_EHTR) + +#ifdef CONFIG_NAND +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ +#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ +#else +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ +#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ +#endif +#else +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ +#endif /* CONFIG_NAND_FSL_ELBC */ + #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} diff --git a/include/configs/adp-ag102.h b/include/configs/adp-ag102.h new file mode 100644 index 0000000000..a4628e4343 --- /dev/null +++ b/include/configs/adp-ag102.h @@ -0,0 +1,375 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/ag102.h> + +/* + * CPU and Board Configuration Options + */ +#define CONFIG_ADP_AG102 + +#define CONFIG_USE_INTERRUPT + +#define CONFIG_SKIP_LOWLEVEL_INIT + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_MEM_REMAP +#endif + +#ifdef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x04200000 +#else +#define CONFIG_SYS_TEXT_BASE 0x00000000 +#endif + +/* + * Timer + */ + +/* + * According to the discussion in u-boot mailing list before, + * CONFIG_SYS_HZ at 1000 is mandatory. + */ +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_CLK_FREQ (66000000 * 2) +#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ + +/* + * Use Externel CLOCK or PCLK + */ +#undef CONFIG_FTRTC010_EXTCLK + +#ifndef CONFIG_FTRTC010_EXTCLK +#define CONFIG_FTRTC010_PCLK +#endif + +#ifdef CONFIG_FTRTC010_EXTCLK +#define TIMER_CLOCK 32768 /* CONFIG_FTRTC010_EXTCLK */ +#else +#define TIMER_CLOCK CONFIG_SYS_HZ /* CONFIG_FTRTC010_PCLK */ +#endif + +#define TIMER_LOAD_VAL 0xffffffff + +/* + * Real Time Clock + */ +#define CONFIG_RTC_FTRTC010 + +/* + * Real Time Clock Divider + * RTC_DIV_COUNT (OSC_CLK/OSC_5MHZ) + */ +#define OSC_5MHZ (5*1000000) +#define OSC_CLK (2*OSC_5MHZ) +#define RTC_DIV_COUNT (OSC_CLK/OSC_5MHZ) + +/* + * Serial console configuration + */ + +/* FTUART is a high speed NS 16C550A compatible UART */ +#define CONFIG_BAUDRATE 38400 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_COM1 CONFIG_FTUART010_01_BASE +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_CLK 33000000 /* AG102 */ + +/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * Ethernet + */ +#define CONFIG_NET_MULTI +#define CONFIG_PHY_MAX_ADDR 32 /* this comes from <linux/phy.h> */ +#define CONFIG_SYS_DISCOVER_PHY +#define CONFIG_FTGMAC100 +#define CONFIG_FTGMAC100_EGIGA + +#define CONFIG_BOOTDELAY 3 + +/* + * SD (MMC) controller + */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_FTSDC010 +#define CONFIG_FTSDC010_NUMBER 1 +#define CONFIG_FTSDC010_SDIO +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE +#define CONFIG_CMD_PING +#define CONFIG_CMD_IDE +#define CONFIG_CMD_FAT +#define CONFIG_CMD_ELF + +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS + +/* + * PCI + */ +#define CONFIG_PCI +#define CONFIG_FTPCI100 +#define CONFIG_FTPCI100_MEM_BASE 0xa0000000 +#define CONFIG_FTPCI100_IO_SIZE FTPCI100_BASE_IO_SIZE(256) /* 256M */ +#define CONFIG_FTPCI100_MEM_SIZE FTPCI100_MEM_SIZE(128) /* 128M */ +#define CONFIG_FTPCI100_MEM_BASE_SIZE1 0x50 + +#define CONFIG_PCI_MEM_BUS 0xa0000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x01000000 /* 256M */ + +#define CONFIG_PCI_IO_BUS 0x90000000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0x00100000 /* 1M */ + +/* + * USB + */ +#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI) +#if defined(CONFIG_FTPCI100) +#define __io /* enable outl & inl */ +#define CONFIG_CMD_USB +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 5 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_EHCI +#define CONFIG_PCI_EHCI_DEVICE 0 +#define CONFIG_USB_EHCI_PCI +#define CONFIG_PREBOOT "usb start;" +#endif /* #if defiend(CONFIG_FTPCI100) */ +#endif /* #if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI) */ + +/* + * IDE/ATA stuff + */ +#define __io +#define CONFIG_IDE_AHB +#define CONFIG_IDE_FTIDE020 + +#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ +#undef CONFIG_IDE_LED /* no led for ide supported */ +#define CONFIG_IDE_RESET 1 /* reset for ide supported */ +#define CONFIG_IDE_PREINIT 1 /* preinit for ide */ + +/* max: 2 IDE busses */ +#define CONFIG_SYS_IDE_MAXBUS 1 /* origin: 2 */ +/* max: 2 drives per IDE bus */ +#define CONFIG_SYS_IDE_MAXDEVICE 1 /* origin: (MAXBUS * 2) */ + +#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_FTIDE020S_BASE +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0000 + +#define CONFIG_SYS_ATA_DATA_OFFSET 0x0000 /* for data I/O */ +#define CONFIG_SYS_ATA_REG_OFFSET 0x0000 /* for normal regs access */ +#define CONFIG_SYS_ATA_ALT_OFFSET 0x0000 /* for alternate regs */ + +#define CONFIG_MAC_PARTITION +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_VFAT + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "NDS32 # " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 + +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) + +/* + * size in bytes reserved for initial data +*/ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * AHB Controller configuration + */ +#define CONFIG_FTAHBC020S + +#ifdef CONFIG_FTAHBC020S +#include <faraday/ftahbc020s.h> + +/* Address of PHYS_SDRAM_0 before memory remap is at 0x(100)00000 */ +#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE 0x100 + +/* + * CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6: this define is used in lowlevel_init.S, + * hence we cannot use FTAHBC020S_BSR_SIZE(2048) since it will use ffs() wrote + * in C language. + */ +#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6 \ + (FTAHBC020S_SLAVE_BSR_BASE(CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE) | \ + FTAHBC020S_SLAVE_BSR_SIZE(0xb)) +#endif + +/* + * Watchdog + */ +#define CONFIG_FTWDT010_WATCHDOG + +/* + * PCU Power Control Unit configuration + */ +#define CONFIG_ANDES_PCU + +#ifdef CONFIG_ANDES_PCU +#include <andestech/andes_pcu.h> + +#endif + +/* + * DDR DRAM controller configuration + */ +#define CONFIG_DWCDDR21MCTL + +#ifdef CONFIG_DWCDDR21MCTL +#include <synopsys/dwcddr21mctl.h> +/* DCR: + * 2GB: 0x000025d2, 2GB (1Gb x8 2 ranks) Micron/innoDisk/Transcend + * 1GB: 0x000021d2, 1GB (1Gb x8 1 rank) Micron/Transcend/innoDisk + * 512MB: 0x000025cc, Micron 512MB (512Mb x16 2 ranks) + * 512MB: 0x000021ca, Trenscend/innoDisk 512MB (512Mb x8 1 rank) + * 256MB: 0x000020d4, Micron 256MB (1Gb x16 1 ranks) + */ +#define CONFIG_SYS_DWCDDR21MCTL_CCR 0x00020004 +#define CONFIG_SYS_DWCDDR21MCTL_CCR2 (DWCDDR21MCTL_CCR_DTT(0x1) | \ + DWCDDR21MCTL_CCR_DFTLM(0x4) | \ + DWCDDR21MCTL_CCR_HOSTEN(0x1)) + +/* 0x04: 0x000020d4 */ +#define CONFIG_SYS_DWCDDR21MCTL_DCR 0x000020ca + +/* 0x08: 0x0000000f */ +#define CONFIG_SYS_DWCDDR21MCTL_IOCR 0x0000000f + +/* 0x10: 0x00034812 */ +#define CONFIG_SYS_DWCDDR21MCTL_DRR (DWCDDR21MCTL_DRR_TRFC(0x12) | \ + DWCDDR21MCTL_DRR_TRFPRD(0x0348)) +/* 0x24 */ +#define CONFIG_SYS_DWCDDR21MCTL_DLLCR0 DWCDDR21MCTL_DLLCR_PHASE(0x0) + +/* 0x4c: 0x00000040 */ +#define CONFIG_SYS_DWCDDR21MCTL_RSLR0 0x00000040 + +/* 0x5c: 0x000055CF */ +#define CONFIG_SYS_DWCDDR21MCTL_RDGR0 0x000055cf + +/* 0xa4: 0x00100000 */ +#define CONFIG_SYS_DWCDDR21MCTL_DTAR (DWCDDR21MCTL_DTAR_DTBANK(0x0) | \ + DWCDDR21MCTL_DTAR_DTROW(0x0100) | \ + DWCDDR21MCTL_DTAR_DTCOL(0x0)) +/* 0x1f0: 0x00000852 */ +#define CONFIG_SYS_DWCDDR21MCTL_MR (DWCDDR21MCTL_MR_WR(0x4) | \ + DWCDDR21MCTL_MR_CL(0x5) | \ + DWCDDR21MCTL_MR_BL(0x2)) +#endif + +/* + * Physical Memory Map + */ +#if defined(CONFIG_MEM_REMAP) || defined(CONFIG_SKIP_LOWLEVEL_INIT) +#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ +#if defined(CONFIG_MEM_REMAP) +#define PHYS_SDRAM_0_AT_INIT 0x80000000 /* SDRAM Bank #1 before remap*/ +#endif +#else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */ +#define PHYS_SDRAM_0 0x80000000 /* SDRAM Bank #1 */ +#endif + +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_0_SIZE 0x10000000 /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 + +#ifdef CONFIG_MEM_REMAP +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xA0000 - \ + GENERATED_GBL_DATA_SIZE) +#else +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) +#endif /* CONFIG_MEM_REMAP */ + +/* + * Load address and memory test area should agree with + * board/faraday/a320/config.mk + * Be careful not to overwrite U-boot itself. + */ +#define CONFIG_SYS_LOAD_ADDR 0x0CF00000 + +/* memtest works on 63 MB in DRAM */ +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + 0x03F00000) + +/* + * Static memory controller configuration + */ + +/* + * FLASH and environment organization + */ +#define CONFIG_SYS_NO_FLASH + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 4096 + +#endif /* __CONFIG_H */ diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index b0dd2f0af6..827a6159f2 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -146,7 +146,7 @@ #define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING +#undef CONFIG_CMD_PING #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ @@ -174,7 +174,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ @@ -326,7 +325,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index b5f75d1e8d..6766ee23d3 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -145,7 +145,7 @@ #define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING +#undef CONFIG_CMD_PING #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ @@ -173,8 +173,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ - #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" @@ -326,7 +324,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 83992461f9..f424e5a5bd 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -283,8 +283,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 - -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 6a02188108..159857d32f 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -107,7 +107,6 @@ #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_LOADS #define CONFIG_CMD_PING diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index 99856ebfdf..71faf1cc9f 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -37,7 +37,7 @@ #define CONFIG_HOSTNAME cam_enc_4xx -#define BOARD_LATE_INIT +#define CONFIG_BOARD_LATE_INIT #define CONFIG_CAM_ENC_LED_MASK 0x0fc00000 /* Memory Info */ diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index fe91c10409..b28bd8e313 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -156,6 +156,7 @@ #define CONFIG_DRIVER_OMAP34XX_I2C #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_I2C_MULTI_BUS /* * TWL4030 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 77dd0a2d1e..8ed37a58c2 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -33,6 +33,15 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif +#ifdef CONFIG_SRIOBOOT_SLAVE +/* Set 1M boot space */ +#define CONFIG_SYS_SRIOBOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000) +#define CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS \ + (0x300000000ull | CONFIG_SYS_SRIOBOOT_SLAVE_ADDR) +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CONFIG_SYS_NO_FLASH +#endif + /* High Level Configuration Options */ #define CONFIG_BOOKE #define CONFIG_E500 /* BOOKE e500 family */ @@ -68,7 +77,9 @@ #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_SYS_NO_FLASH +#ifndef CONFIG_SRIOBOOT_SLAVE #define CONFIG_ENV_IS_NOWHERE +#endif #else #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -97,6 +108,12 @@ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_SRIOBOOT_SLAVE) +#define CONFIG_ENV_IS_IN_REMOTE +#define CONFIG_ENV_ADDR 0xffe20000 +#define CONFIG_ENV_SIZE 0x2000 +#elif defined(CONFIG_ENV_IS_NOWHERE) +#define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) @@ -373,6 +390,54 @@ #define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ /* + * SRIOBOOT - MASTER + */ +#ifdef CONFIG_SRIOBOOT_MASTER +/* master port for srioboot*/ +#define CONFIG_SRIOBOOT_MASTER_PORT 0 +/* #define CONFIG_SRIOBOOT_MASTER_PORT 1 */ +/* + * for slave u-boot IMAGE instored in master memory space, + * PHYS must be aligned based on the SIZE + */ +#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 0xfef080000ull +#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 0xfff80000ull +#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE 0x80000 /* 512K */ +#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 0xfef080000ull +#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 0x3fff80000ull +/* + * for slave UCODE instored in master memory space, + * PHYS must be aligned based on the SIZE + */ +#define CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS 0xfef020000ull +#define CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS 0x3ffe00000ull +#define CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE 0x10000 /* 64K */ +/* + * for slave ENV instored in master memory space, + * PHYS must be aligned based on the SIZE + */ +#define CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS 0xfef060000ull +#define CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS 0x3ffe20000ull +#define CONFIG_SRIOBOOT_SLAVE_ENV_SIZE 0x20000 /* 128K */ +/* slave core release by master*/ +#define CONFIG_SRIOBOOT_SLAVE_HOLDOFF +#define CONFIG_SRIOBOOT_SLAVE_BRR_OFFSET 0xe00e4 +#define CONFIG_SRIOBOOT_SLAVE_RELEASE_MASK 0x00000001 /* release core 0 */ +#endif + +/* + * SRIOBOOT - SLAVE + */ +#ifdef CONFIG_SRIOBOOT_SLAVE +/* slave port for srioboot */ +#define CONFIG_SRIOBOOT_SLAVE_PORT0 +/* #define CONFIG_SRIOBOOT_SLAVE_PORT1 */ +#define CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR 0xFFE00000 +#define CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS \ + (0x300000000ull | CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR) +#endif + +/* * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI @@ -492,6 +557,16 @@ #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND #define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_SRIOBOOT_SLAVE) +/* + * Slave has no ucode locally, it can fetch this from remote. When implementing + * in two corenet boards, slave's ucode could be stored in master's memory + * space, the address can be mapped from slave TLB->slave LAW-> + * slave SRIO outbound window->master inbound window->master LAW-> + * the ucode address in master's NOR flash. + */ +#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEF000000 diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h index 4532e4f4fd..781878ef39 100644 --- a/include/configs/da830evm.h +++ b/include/configs/da830evm.h @@ -111,7 +111,6 @@ #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_PAGE_2K -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #define CONFIG_SYS_CLE_MASK 0x10 #define CONFIG_SYS_ALE_MASK 0x8 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ diff --git a/include/configs/debris.h b/include/configs/debris.h index 60c7c4058f..303630d7d7 100644 --- a/include/configs/debris.h +++ b/include/configs/debris.h @@ -148,7 +148,7 @@ #define CONFIG_CMD_ELF #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_KGBD +#define CONFIG_CMD_KGDB #define CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h new file mode 100644 index 0000000000..9f15ffb0fd --- /dev/null +++ b/include/configs/devkit3250.h @@ -0,0 +1,117 @@ +/* + * Embest/Timll DevKit3250 board configuration file + * + * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __CONFIG_DEVKIT3250_H__ +#define __CONFIG_DEVKIT3250_H__ + +/* SoC and board defines */ +#include <asm/sizes.h> +#include <asm/arch/cpu.h> + +/* + * Define DevKit3250 machine type by hand until it lands in mach-types + */ +#define MACH_TYPE_DEVKIT3250 3697 +#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250 + +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F + +/* + * Memory configurations + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_STACKSIZE SZ_32K +#define CONFIG_SYS_MALLOC_LEN SZ_1M +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE +#define CONFIG_SYS_SDRAM_SIZE SZ_64M +#define CONFIG_SYS_TEXT_BASE 0x83FA0000 +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M) + +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K) + +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \ + - GENERATED_GBL_DATA_SIZE) + +/* + * Serial Driver + */ +#define CONFIG_SYS_LPC32XX_UART 2 /* UART2 */ +#define CONFIG_BAUDRATE 115200 + +/* + * NOR Flash + */ +#define CONFIG_CMD_FLASH +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 71 +#define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE +#define CONFIG_SYS_FLASH_SIZE SZ_4M +#define CONFIG_SYS_FLASH_CFI + +/* + * U-Boot General Configurations + */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_VERSION_VARIABLE +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DOS_PARTITION + +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE SZ_128K + +/* + * U-Boot Commands + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_CACHE + +/* + * Boot Linux + */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_BOOTARGS "console=ttyS2,115200n8" +#define CONFIG_LOADADDR 0x80008000 + +/* + * Include SoC specific configuration + */ +#include <asm/arch/config.h> + +#endif /* __CONFIG_DEVKIT3250_H__*/ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index eb7c376780..248a5b2fa3 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -324,7 +324,7 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/ diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index d5173349c4..1f660235f0 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -119,7 +119,6 @@ #ifdef CONFIG_VIDEO #define CONFIG_CMD_BMP #endif -#define CONFIG_CMD_DFL #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 146819712d..2cd20279be 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -34,10 +34,12 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvsion-10g -#define CONFIG_IDENT_STRING " dlvision-10g 0.02" +#define CONFIG_IDENT_STRING " dlvision-10g 0.03" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R +#define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ @@ -80,6 +82,7 @@ * Commands additional to the ones defined in amcc-common.h */ #define CONFIG_CMD_CACHE +#define CONFIG_CMD_DTT #undef CONFIG_CMD_EEPROM /* @@ -115,7 +118,7 @@ /* Temp sensor/hwmon/dtt */ #define CONFIG_DTT_LM63 1 /* National LM63 */ -#define CONFIG_DTT_SENSORS { 0x4c, 0x4e } /* Sensor addresses */ +#define CONFIG_DTT_SENSORS { 0x4c, 0x4e, 0x18 } /* Sensor addresses */ #define CONFIG_DTT_PWM_LOOKUPTABLE \ { { 46, 10 }, { 48, 14 }, { 50, 19 }, { 52, 23 },\ { 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } } diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index 0f2f9a2743..76f9eeaed8 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -148,4 +148,6 @@ */ #define CONFIG_DISPLAY_CPUINFO +#define CONFIG_OF_LIBFDT + #endif /* _CONFIG_DREAMPLUG_H */ diff --git a/include/configs/ea20.h b/include/configs/ea20.h index e059b30826..88b085d4a7 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -31,7 +31,7 @@ #define CONFIG_SYS_USE_NAND #define CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_BOARD_EARLY_INIT_F -#define BOARD_LATE_INIT +#define CONFIG_BOARD_LATE_INIT #define CONFIG_VIDEO #define CONFIG_PREBOOT @@ -203,7 +203,6 @@ #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* SPI Flash */ diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index eb05e2a0b0..21c471adf6 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -288,8 +288,6 @@ #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 -#define CONFIG_SYS_64BIT_VSPRINTF 1 - /* Status LED's */ #define CONFIG_STATUS_LED 1 diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index f19360d501..221d3e055d 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -325,7 +325,6 @@ #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SNTP -#undef CONFIG_CMD_DCR #undef CONFIG_CMD_XIMG /* Where do the internal registers live? */ diff --git a/include/configs/flea3.h b/include/configs/flea3.h index f046a587be..dd7c73f3c7 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -48,8 +48,6 @@ /* Set TEXT at the beginning of the NOR flash */ #define CONFIG_SYS_TEXT_BASE 0xA0000000 -#define CONFIG_SYS_64BIT_VSPRINTF - /* This is required to setup the ESDC controller */ #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h index 3c59ff4922..9efbb8e34c 100644 --- a/include/configs/gdppc440etx.h +++ b/include/configs/gdppc440etx.h @@ -50,6 +50,10 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f*/ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ +#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ +#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ +#define CONFIG_AUTOBOOT_STOP_STR " " + /* * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index 462cc7e16c..efff3098a5 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -70,7 +70,6 @@ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ #include <config_cmd_default.h> #define CONFIG_CMD_I2C -#define CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #define CONFIG_CMD_USB #define CONFIG_CMD_EXT2 diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index 0859371387..6d2d4fb91d 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -127,7 +127,6 @@ #define CFG_DAVINCI_STD_NAND_LAYOUT #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_PAGE_2K -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ /* Max number of NAND devices */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, } diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h new file mode 100644 index 0000000000..85856f290e --- /dev/null +++ b/include/configs/ib62x0.h @@ -0,0 +1,152 @@ +/* + * Copyright (C) 2011-2012 + * Gerald Kerma <dreagle@doukki.net> + * Luka Perkov <uboot@lukaperkov.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _CONFIG_IB62x0_H +#define _CONFIG_IB62x0_H + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING " RaidSonic ICY BOX IB-NAS62x0" + +/* + * High level configuration options + */ +#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD /* SOC Family Name */ +#define CONFIG_KW88F6281 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + +/* + * Machine type + */ +#define CONFIG_MACH_TYPE MACH_TYPE_NAS6210 + +/* + * Compression configuration + */ +#define CONFIG_BZIP2 +#define CONFIG_LZMA +#define CONFIG_LZO + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* declare no flash (NOR/SPI) */ +#define CONFIG_SYS_MVFS +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_IDE +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +#undef CONFIG_SYS_PROMPT +#define CONFIG_SYS_PROMPT "ib62x0 => " + +/* + * Environment variables configuration + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x20000 +#else +#define CONFIG_ENV_IS_NOWHERE +#endif +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_OFFSET 0x80000 + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND \ + "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ + "ubi part root; " \ + "ubifsmount root; " \ + "ubifsload 0x800000 ${kernel}; " \ + "ubifsload 0x1100000 ${initrd}; " \ + "bootm 0x800000 0x1100000" + +#define CONFIG_MTDPARTS \ + "mtdparts=orion_nand:" \ + "0x80000@0x0(uboot)," \ + "0x20000@0x80000(uboot_env)," \ + "-@0xa0000(root)\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=console=ttyS0,115200\0" \ + "mtdids=nand0=orion_nand\0" \ + "mtdparts="CONFIG_MTDPARTS \ + "kernel=/boot/uImage\0" \ + "initrd=/boot/uInitrd\0" \ + "bootargs_root=ubi.mtd=2 root=ubi0:root rootfstype=ubifs\0" + +/* + * Ethernet driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ +#define CONFIG_PHY_BASE_ADR 0 +#undef CONFIG_RESET_PHY_R +#endif /* CONFIG_CMD_NET */ + +/* + * SATA driver configuration + */ +#ifdef CONFIG_CMD_IDE +#define __io +#define CONFIG_IDE_PREINIT +#define CONFIG_DOS_PARTITION +#define CONFIG_MVSATA_IDE_USE_PORT0 +#define CONFIG_MVSATA_IDE_USE_PORT1 +#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET +#endif /* CONFIG_CMD_IDE */ + +/* + * RTC driver configuration + */ +#ifdef CONFIG_CMD_DATE +#define CONFIG_RTC_MV +#endif /* CONFIG_CMD_DATE */ + +/* + * File system + */ +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS + +#endif /* _CONFIG_IB62x0_H */ diff --git a/include/configs/igep0030.h b/include/configs/igep0030.h deleted file mode 100644 index bf39ba56d7..0000000000 --- a/include/configs/igep0030.h +++ /dev/null @@ -1,261 +0,0 @@ -/* - * (C) Copyright 2010 - * ISEE 2007 SL, <www.iseebcn.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H -#include <asm/sizes.h> - -/* - * High Level Configuration Options - */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP34XX 1 /* which is a 34XX */ -#define CONFIG_OMAP3_IGEP0030 1 /* working with IGEP0030 */ - -#define CONFIG_SDRC /* The chip has SDRC controller */ - -#include <asm/arch/cpu.h> -#include <asm/arch/omap3.h> - -/* - * Display CPU and Board information - */ -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -#define CONFIG_MISC_INIT_R - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_REVISION_TAG 1 - -#define CONFIG_OF_LIBFDT 1 - -/* - * NS16550 Configuration - */ - -#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK - -/* select serial console configuration */ -#define CONFIG_CONS_INDEX 3 -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_OMAP_HSMMC 1 -#define CONFIG_DOS_PARTITION 1 - -/* USB */ -#define CONFIG_MUSB_UDC 1 -#define CONFIG_USB_OMAP3 1 -#define CONFIG_TWL4030_USB 1 - -/* USB device configuration */ -#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 - -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "IGEP" - -/* commands to include */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ -#define CONFIG_CMD_ONENAND /* ONENAND support */ -#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ -#define CONFIG_MTD_DEVICE - -#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ -#undef CONFIG_CMD_NFS /* nfs */ -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_IMLS /* List all found images */ - -#define CONFIG_SYS_NO_FLASH -#define CONFIG_HARD_I2C 1 -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_BUS 0 -#define CONFIG_SYS_I2C_BUS_SELECT 1 -#define CONFIG_DRIVER_OMAP34XX_I2C 1 - -/* - * TWL4030 - */ -#define CONFIG_TWL4030_POWER 1 - -#define CONFIG_BOOTDELAY 3 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "usbtty=cdc_acm\0" \ - "loadaddr=0x82000000\0" \ - "usbtty=cdc_acm\0" \ - "console=ttyS2,115200n8\0" \ - "mpurate=500\0" \ - "vram=12M\0" \ - "dvimode=1024x768MR-16@60\0" \ - "defaultdisplay=dvi\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext3 rootwait\0" \ - "nandroot=/dev/mtdblock4 rw\0" \ - "nandrootfstype=jffs2\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "mpurate=${mpurate} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapfb.debug=y " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "nandargs=setenv bootargs console=${console} " \ - "mpurate=${mpurate} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapfb.debug=y " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=${nandroot} " \ - "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ - "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "nandboot=echo Booting from onenand ...; " \ - "run nandargs; " \ - "onenand read ${loadaddr} 280000 400000; " \ - "bootm ${loadaddr}\0" \ - -#define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run nandboot; " \ - "fi; " \ - "fi; " \ - "else run nandboot; fi" - -#define CONFIG_AUTO_COMPLETE 1 - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_SYS_PROMPT "U-Boot # " -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ - /* works on */ -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ - /* load address */ - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) - -/* - * OMAP3 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000 - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/* - * Physical Memory Map - * - */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */ -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/* - * FLASH and environment organization - */ - -#define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */ - -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP - -#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ - -#define CONFIG_ENV_IS_IN_ONENAND 1 -#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ -#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -#endif /* __CONFIG_H */ diff --git a/include/configs/igep0020.h b/include/configs/igep00x0.h index c2fcdffdae..a99f332a85 100644 --- a/include/configs/igep0020.h +++ b/include/configs/igep00x0.h @@ -1,5 +1,7 @@ /* - * (C) Copyright 2010 + * Common configuration settings for IGEP technology based boards + * + * (C) Copyright 2012 * ISEE 2007 SL, <www.iseebcn.com> * * This program is free software; you can redistribute it and/or @@ -18,8 +20,9 @@ * MA 02111-1307 USA */ -#ifndef __CONFIG_H -#define __CONFIG_H +#ifndef __IGEP00X0_H +#define __IGEP00X0_H + #include <asm/sizes.h> /* @@ -27,7 +30,6 @@ */ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ -#define CONFIG_OMAP3_IGEP0020 1 /* working with IGEP0020 */ #define CONFIG_SDRC /* The chip has SDRC controller */ @@ -72,7 +74,8 @@ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ + 115200} #define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 #define CONFIG_OMAP_HSMMC 1 @@ -133,7 +136,7 @@ "loadaddr=0x82000000\0" \ "usbtty=cdc_acm\0" \ "console=ttyS2,115200n8\0" \ - "mpurate=500\0" \ + "mpurate=auto\0" \ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ "defaultdisplay=dvi\0" \ @@ -158,9 +161,9 @@ "omapdss.def_disp=${defaultdisplay} " \ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ + "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ + "importbootenv=echo Importing environment from mmc ...; " \ + "env import -t $loadaddr $filesize\0" \ "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ @@ -172,15 +175,19 @@ #define CONFIG_BOOTCOMMAND \ "if mmc rescan ${mmcdev}; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run nandboot; " \ - "fi; " \ - "fi; " \ - "else run nandboot; fi" + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loaduimage; then " \ + "run mmcboot;" \ + "fi;" \ + "fi;" \ + "run nandboot;" \ #define CONFIG_AUTO_COMPLETE 1 @@ -269,4 +276,4 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#endif /* __CONFIG_H */ +#endif /* __IGEP00X0_H */ diff --git a/include/configs/ima3-mx53.h b/include/configs/ima3-mx53.h new file mode 100644 index 0000000000..ea48d64635 --- /dev/null +++ b/include/configs/ima3-mx53.h @@ -0,0 +1,269 @@ +/* + * (C) Copyright 2012, Stefano Babic <sbabic@denx.de> + * + * Copyright (C) 2010 Freescale Semiconductor, Inc. + * + * Configuration settings for the MX53-EVK Freescale board. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* SOC type must be included before imx-regs.h */ +#define CONFIG_MX53 +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx5x_pins.h> + +#define CONFIG_SYS_MX5_HCLK 24000000 +#define CONFIG_SYS_MX5_CLK32 32768 + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +#define CONFIG_OF_LIBFDT + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F + +/* Enable GPIOs */ +#define CONFIG_MXC_GPIO + +/* UART */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR + +/* MMC */ +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_NUM 1 + +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DOS_PARTITION + +/* Ethernet on FEC */ +#define CONFIG_NET_MULTI +#define CONFIG_MII +#define CONFIG_DISCOVER_PHY + +#define CONFIG_FEC_MXC +#define IMX_FEC_BASE FEC_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x01 +#define CONFIG_PHY_ADDR CONFIG_FEC_MXC_PHYADDR +#define CONFIG_RESET_PHY_R +#define CONFIG_FEC_MXC_NO_ANEG +#define CONFIG_PRIME "FEC0" + +/* SPI */ +#define CONFIG_HARD_SPI +#define CONFIG_MXC_SPI +#define CONFIG_DEFAULT_SPI_BUS 1 +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 + +/* SPI FLASH - not used for environment */ +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_CS (IOMUX_TO_GPIO(MX53_PIN_CSI0_D11) \ + << 8) | 0 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +/* Command definition */ +#include <config_cmd_default.h> +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_MMC +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_CMD_GPIO + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ +#define CONFIG_SYS_TEXT_BASE 0xf0001400 /* uboot in nor flash */ + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "IMA3 MX53 U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x10000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_CMDLINE_EDITING + +/* Stack sizes */ +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CSD0_BASE_ADDR +#define PHYS_SDRAM_1_SIZE (1024 * 1024 * 1024) + +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define MTDIDS_DEFAULT "nor0=f0000000.flash" + +/* FLASH and environment organization */ + +#define CONFIG_SYS_FLASH_BASE 0xF0000000 +#define CONFIG_SYS_FLASH_CFI /* Flash is CFI conformant */ +#define CONFIG_FLASH_CFI_DRIVER /* Use the common driver */ +#define CONFIG_FLASH_CFI_MTD /* with MTD support */ +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 1024 + +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) + +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +/* + * Default environment and default scripts + * to update uboot and load kernel + */ + +#define HOSTNAME ima3-mx53 +#define xstr(s) str(s) +#define str(s) #s + +#define CONFIG_HOSTNAME ima3-mx53 +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram0 rw\0" \ + "addip_sta=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ + "addip=if test -n ${ipdyn};then run addip_dyn;" \ + "else run addip_sta;fi\0" \ + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "addtty=setenv bootargs ${bootargs}" \ + " console=${console},${baudrate}\0" \ + "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ + "console=ttymxc3\0" \ + "loadaddr=70800000\0" \ + "kernel_addr_r=70800000\0" \ + "ramdisk_addr_r=71000000\0" \ + "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ + "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ + "ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0" \ + "mmcargs=setenv bootargs root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "mmcroot=/dev/mmcblk0p3 rw\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs addip addtty addmtd addmisc mmcload;" \ + "bootm\0" \ + "mmcload=fatload mmc ${mmcdev}:${mmcpart} " \ + "${loadaddr} ${uimage}\0" \ + "mmcrootfstype=ext3 rootwait\0" \ + "flash_self=run ramargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr}\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ + "run nfsargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr_r}\0" \ + "net_self_load=tftp ${ramdisk_addr_r} ${ramdisk_file};" \ + "tftp ${kernel_addr_r} ${bootfile}\0" \ + "net_self=if run net_self_load;then " \ + "run ramargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ + "else echo Images not loades;fi\0" \ + "satargs=setenv bootargs root=/dev/sda1\0" \ + "satafile=boot/uImage\0" \ + "ssdboot=echo Booting from ssd ...; " \ + "run satargs addip addtty addmtd addmisc;" \ + "sata init;ext2load sata 0:1 ${kernel_addr_r} " \ + "${satafile};bootm\0" \ + "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.imx\0" \ + "uimage=uImage\0" \ + "load=tftp ${loadaddr} ${u-boot}\0" \ + "uboot_addr=0xf0001000\0" \ + "update=protect off 0xf0000000 +60000;" \ + "erase ${uboot_addr} +60000;" \ + "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ + "upd=if run load;then echo Updating u-boot;if run update;" \ + "then echo U-Boot updated;" \ + "else echo Error updating u-boot !;" \ + "echo Board without bootloader !!;" \ + "fi;" \ + "else echo U-Boot not downloaded..exiting;fi\0" \ + "bootcmd=run net_nfs\0" + + +#define CONFIG_CMD_SATA +#ifdef CONFIG_CMD_SATA + #define CONFIG_DWC_AHSATA + #define CONFIG_SYS_SATA_MAX_DEVICE 1 + #define CONFIG_DWC_AHSATA_PORT_ID 0 + #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR + #define CONFIG_LBA48 + #define CONFIG_LIBATA +#endif + +#endif /* __CONFIG_H */ diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 2af4e7af31..c1f1aa6a8a 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -153,7 +153,6 @@ #define CONFIG_SYS_NAND_BASE 0xd8000000 #define CONFIG_JFFS2_NAND #define CONFIG_MXC_NAND_HWECC -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ /* * SD/MMC diff --git a/include/configs/intip.h b/include/configs/intip.h index 92b65af7c9..33364a843e 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -37,10 +37,10 @@ #define CONFIG_460EX 1 /* Specific PPC460EX */ #ifdef CONFIG_DEVCONCENTER #define CONFIG_HOSTNAME devconcenter -#define CONFIG_IDENT_STRING " devconcenter 0.05" +#define CONFIG_IDENT_STRING " devconcenter 0.06" #else #define CONFIG_HOSTNAME intip -#define CONFIG_IDENT_STRING " intip 0.05" +#define CONFIG_IDENT_STRING " intip 0.06" #endif #define CONFIG_440 1 #define CONFIG_4xx 1 /* ... PPC4xx family */ diff --git a/include/configs/io.h b/include/configs/io.h index 9d2a87d22d..03661cce2d 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -34,11 +34,13 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME io -#define CONFIG_IDENT_STRING " io 0.04" +#define CONFIG_IDENT_STRING " io 0.05" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ -#define CONFIG_LAST_STAGE_INIT /* call last_stage_init */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R +#define CONFIG_MISC_INIT_R +#define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ @@ -48,6 +50,10 @@ #define PLLMR0_DEFAULT PLLMR0_266_133_66 #define PLLMR1_DEFAULT PLLMR1_266_133_66 +#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ +#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ +#define CONFIG_AUTOBOOT_STOP_STR " " + /* new uImage format support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ @@ -76,6 +82,7 @@ * Commands additional to the ones defined in amcc-common.h */ #define CONFIG_CMD_CACHE +#define CONFIG_CMD_DTT #undef CONFIG_CMD_EEPROM /* diff --git a/include/configs/io64.h b/include/configs/io64.h index 51b2dd1c13..887aaefd39 100644 --- a/include/configs/io64.h +++ b/include/configs/io64.h @@ -53,7 +53,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME io64 -#define CONFIG_IDENT_STRING " io64 0.01" +#define CONFIG_IDENT_STRING " io64 0.02" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 9fcc6430cd..7f8825bed1 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -34,10 +34,11 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME iocon -#define CONFIG_IDENT_STRING " iocon 0.03" +#define CONFIG_IDENT_STRING " iocon 0.04" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ @@ -48,6 +49,10 @@ #define PLLMR0_DEFAULT PLLMR0_266_133_66 #define PLLMR1_DEFAULT PLLMR1_266_133_66 +#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ +#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ +#define CONFIG_AUTOBOOT_STOP_STR " " + /* new uImage format support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ diff --git a/include/configs/jadecpu.h b/include/configs/jadecpu.h index f72ee02abf..d644fea22f 100644 --- a/include/configs/jadecpu.h +++ b/include/configs/jadecpu.h @@ -130,7 +130,6 @@ #undef CONFIG_CMD_XIMG #define CONFIG_CMD_BMP -#define CONFIG_CMD_CAN #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index 621dbb8fa6..d505a41de4 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -447,7 +447,6 @@ */ #define CONFIG_CMD_CHIP_CONFIG #define CONFIG_CMD_DATE -#define CONFIG_CMD_LOG #define CONFIG_CMD_NAND #define CONFIG_CMD_PCI #define CONFIG_CMD_SNTP diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index a6f2864c65..68215fda9d 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -435,7 +435,6 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ -#define CONFIG_CMD_LOG #define CONFIG_CMD_MII #define CONFIG_CMD_NET #define CONFIG_CMD_NFS diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 012381a500..c62f4d01fd 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -43,6 +43,8 @@ #define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_MISC_INIT +#define CONFIG_OF_LIBFDT + /* * SPL */ @@ -52,6 +54,7 @@ #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT /* * U-Boot Commands @@ -84,7 +87,7 @@ */ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ -#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ #define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */ #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ @@ -279,6 +282,7 @@ #define CONFIG_BOOTCOMMAND "run bootcmd_net" #define CONFIG_LOADADDR 0x42000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_OF_LIBFDT /* * Extra Environments @@ -286,6 +290,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "update_nand_full_filename=u-boot.nand\0" \ "update_nand_firmware_filename=u-boot.sb\0" \ + "update_sd_firmware_filename=u-boot.sd\0" \ "update_nand_firmware_maxsz=0x100000\0" \ "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ @@ -312,6 +317,14 @@ "nand erase ${fcb_sz} ${fw_sz} ; " \ "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ + "fi\0" \ + "update_sd_firmware=" /* Update the SD firmware partition */ \ + "if mmc rescan ; then " \ + "if tftp ${update_sd_firmware_filename} ; then " \ + "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ + "setexpr fw_sz ${fw_sz} + 1 ; " \ + "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ + "fi ; " \ "fi\0" #endif /* __M28_H__ */ diff --git a/include/configs/makalu.h b/include/configs/makalu.h index fcc789d714..6c1b136659 100644 --- a/include/configs/makalu.h +++ b/include/configs/makalu.h @@ -252,7 +252,6 @@ */ #define CONFIG_CMD_DATE #define CONFIG_CMD_DTT -#define CONFIG_CMD_LOG #define CONFIG_CMD_PCI #define CONFIG_CMD_SNTP diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 1315c3ceb8..f6a83a8505 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -171,8 +171,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ - #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" @@ -327,7 +325,7 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE (45 << 10) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK /* move malloc and bss high to prevent clashing with the main image */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index d6197bc610..db1e87d69c 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -164,7 +164,6 @@ # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) # define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 # define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 -# define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 7cf641fd13..f1104902be 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -35,7 +35,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_NFS #define CONFIG_CMD_PING -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_MEMORY #define CONFIG_CMD_SAVEENV diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 03f52f3905..52e15cce87 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -38,7 +38,6 @@ */ /*#include <config_cmd_default.h>*/ -#define CONFIG_CMD_DFL #define CONFIG_CMD_FLASH #define CONFIG_CMD_SAVEENV diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 1a6379176b..27b489902b 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -132,7 +132,6 @@ */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index d1ba02b6ee..7210b6e80f 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -65,7 +65,6 @@ #define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_64BIT_VSPRINTF /* U-Boot general configuration */ #define CONFIG_SYS_PROMPT "MX25PDK U-Boot > " diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 02f3366ed2..0c18e5022a 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -46,6 +46,7 @@ #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT /* * U-Boot Commands @@ -67,6 +68,7 @@ #define CONFIG_CMD_SF #define CONFIG_CMD_SPI #define CONFIG_CMD_USB +#define CONFIG_CMD_BOOTZ /* * Memory configurations @@ -148,6 +150,16 @@ #endif /* + * NAND Driver + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_MXS +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x60000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#endif + +/* * Ethernet on SOC (FEC) */ #ifdef CONFIG_CMD_NET @@ -225,6 +237,7 @@ #define CONFIG_BOOTCOMMAND "run bootcmd_net" #define CONFIG_LOADADDR 0x42000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_OF_LIBFDT /* * Extra Environments diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 49d440b9ae..6ce97bc69f 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -99,6 +99,7 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_DATE #define CONFIG_CMD_NAND +#define CONFIG_CMD_BOOTZ /* * Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index de4b954a52..bd57baa808 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -39,8 +39,6 @@ #define CONFIG_SYS_TEXT_BASE 0xA0000000 #define CONFIG_SYS_CACHELINE_SIZE 32 -#define CONFIG_SYS_64BIT_VSPRINTF - #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 34a4edd41e..eab0e27fb5 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -27,7 +27,6 @@ #define CONFIG_SYS_MX5_HCLK 24000000 #define CONFIG_SYS_MX5_CLK32 32768 -#define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO @@ -42,7 +41,9 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MXC_GPIO +#define CONFIG_REVISION_TAG #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE @@ -56,6 +57,7 @@ #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC #define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 #define CONFIG_DOS_PARTITION /* Eth Configs */ @@ -85,6 +87,21 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 +/* I2C Configs */ +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_MX53_PORT1 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0xfe + +/* PMIC Controller */ +#define CONFIG_PMIC +#define CONFIG_PMIC_I2C +#define CONFIG_DIALOG_PMIC +#define CONFIG_PMIC_FSL +#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 +#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 @@ -193,4 +210,14 @@ #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_SATA +#ifdef CONFIG_CMD_SATA + #define CONFIG_DWC_AHSATA + #define CONFIG_SYS_SATA_MAX_DEVICE 1 + #define CONFIG_DWC_AHSATA_PORT_ID 0 + #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR + #define CONFIG_LBA48 + #define CONFIG_LIBATA +#endif + #endif /* __CONFIG_H */ diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index e83aec6c21..90652c6629 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -168,6 +168,7 @@ #define CONFIG_SYS_MMC_ENV_DEV 1 #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ #define CONFIG_SYS_DCACHE_OFF diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 3f7e51d877..feabc05a47 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -42,6 +42,7 @@ #define CONFIG_ARCH_CPU_INIT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO #define CONFIG_MXC_UART @@ -71,6 +72,19 @@ #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION +#define CONFIG_CMD_SATA +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII @@ -110,6 +124,8 @@ #define CONFIG_BOOTDELAY 3 +#define CONFIG_PREBOOT "" + #define CONFIG_LOADADDR 0x10800000 #define CONFIG_SYS_TEXT_BASE 0x17800000 @@ -211,6 +227,7 @@ #endif #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ #define CONFIG_SYS_DCACHE_OFF diff --git a/include/configs/neo.h b/include/configs/neo.h index 8de5aaf1ed..38b5becc2e 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -35,9 +35,13 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME neo +#define CONFIG_IDENT_STRING " neo 0.01" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R +#define CONFIG_MISC_INIT_R +#define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ @@ -149,53 +153,53 @@ #ifdef CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ -#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ +#define CONFIG_ENV_ADDR 0xFFF00000 +#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR_REDUND 0xFFF20000 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #endif /* * PPC405 GPIO Configuration */ -#define CONFIG_SYS_4xx_GPIO_TABLE { /* GPIO Alternate1 */ \ -{ \ -/* GPIO Core 0 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO0 PerBLast */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO1 TS1E */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO2 TS2E */ \ -{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO3 TS1O */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO4 TS2O */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO5 TS3 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO6 TS4 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO7 TS5 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO8 TS6 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO9 TrcClk */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO10 PerCS1 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO11 PerCS2 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO12 PerCS3 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO13 PerCS4 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO14 PerAddr03 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO15 PerAddr04 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO16 PerAddr05 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO17 IRQ0 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO18 IRQ1 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO19 IRQ2 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO20 IRQ3 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO21 IRQ4 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO22 IRQ5 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO23 IRQ6 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO24 UART0_DCD */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO25 UART0_DSR */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO26 UART0_RI */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO27 UART0_DTR */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO28 UART1_Rx */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO29 UART1_Tx */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO30 RejectPkt0 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO31 RejectPkt1 */ \ -} \ +#define CONFIG_SYS_4xx_GPIO_TABLE { \ +{ \ +/* GPIO Core 0 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO0 PerBLast */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO1 TS1E */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO2 TS2E */ \ +{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO3 TS1O */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO4 TS2O */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_1 }, /* GPIO5 TS3 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO6 TS4 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO7 TS5 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO8 TS6 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO9 TrcClk */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO10 PerCS1 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO11 PerCS2 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO12 PerCS3 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO13 PerCS4 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO14 PerAddr03 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO15 PerAddr04 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO16 PerAddr05 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO17 IRQ0 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO18 IRQ1 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO19 IRQ2 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO20 IRQ3 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO21 IRQ4 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO22 IRQ5 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO23 IRQ6 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO24 UART0_DCD */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO25 UART0_DSR */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO26 UART0_RI */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO27 UART0_DTR */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO28 UART1_Rx */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO29 UART1_Tx */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO30 RejectPkt0 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO31 RejectPkt1 */ \ +} \ } /* @@ -226,12 +230,22 @@ #define CONFIG_SYS_EBC_PB1CR 0xFB85A000 /* BAS=0xFF8,BS=4MB,BU=R/W,BW=8bit */ /* Memory Bank 2 (FPGA) initialization */ -#define CONFIG_FPGA_BASE 0x7f100000 +#define CONFIG_SYS_FPGA0_BASE 0x7f100000 #define CONFIG_SYS_EBC_PB2AP 0x92015480 #define CONFIG_SYS_EBC_PB2CR 0x7f11a000 /* BAS=0x7f1,BS=1MB,BU=R/W,BW=16bit */ +#define CONFIG_SYS_FPGA_BASE(k) CONFIG_SYS_FPGA0_BASE + +#define CONFIG_SYS_FPGA_COUNT 1 + /* Memory Bank 3 (Latches) initialization */ +#define CONFIG_SYS_LATCH_BASE 0x7f200000 #define CONFIG_SYS_EBC_PB3AP 0x92015480 #define CONFIG_SYS_EBC_PB3CR 0x7f21a000 /* BAS=0x7f2,BS=1MB,BU=R/W,BW=16bit */ +#define CONFIG_SYS_LATCH0_RESET 0xffff +#define CONFIG_SYS_LATCH0_BOOT 0xffff +#define CONFIG_SYS_LATCH1_RESET 0xffbf +#define CONFIG_SYS_LATCH1_BOOT 0xffff + #endif /* __CONFIG_H */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index ddeb4146f7..b891ee4925 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -399,7 +399,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 @@ -410,6 +410,7 @@ #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_I2C_SUPPORT diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h index 4910ddaa83..7b21a5c8c4 100644 --- a/include/configs/omap3_evm_common.h +++ b/include/configs/omap3_evm_common.h @@ -282,12 +282,13 @@ /* Defines for SPL */ #define CONFIG_SPL #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) /* 45 KB */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ +#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_I2C_SUPPORT diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 01360f6cbd..4ac17cc636 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -122,7 +122,7 @@ #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#define CONFIG_CMD_SETECPR /* Evaluate expressions */ +#define CONFIG_CMD_SETEXPR /* Evaluate expressions */ #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 64adc7455c..a0a7a1c42a 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -303,7 +303,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK /* move malloc and bss high to prevent clashing with the main image */ @@ -317,6 +317,7 @@ #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_I2C_SUPPORT diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 4df5f5dac5..d02f338437 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -174,8 +174,7 @@ "usbtty=cdc_acm\0" \ "loadaddr=0x82000000\0" \ "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ - "rw rootflags=bulk_read console=ttyS0,115200n8 " \ - "vram=6272K omapfb.vram=0:3000K\0" \ + "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ #define CONFIG_BOOTCOMMAND \ diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index a989721afc..072e17bab8 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -35,7 +35,6 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP44XX 1 /* which is a 44XX */ #define CONFIG_OMAP4430 1 /* which is in a 4430 */ -#define CONFIG_ARCH_CPU_INIT /* Get CPU defs */ #include <asm/arch/cpu.h> @@ -106,7 +105,6 @@ #define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 #define CONFIG_OMAP_HSMMC 1 -#define CONFIG_SYS_MMC_SET_DEV 1 #define CONFIG_DOS_PARTITION 1 @@ -151,6 +149,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyO2,115200n8\0" \ + "fdt_high=0xffffffff\0" \ "usbtty=cdc_acm\0" \ "vram=16M\0" \ "mmcdev=0\0" \ @@ -287,4 +286,6 @@ #define CONFIG_SYS_ENABLE_PADS_ALL +#define CONFIG_SYS_THUMB_BUILD + #endif /* __CONFIG_OMAP4_COMMON_H */ diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h index a8dfef321d..d3a2438e28 100644 --- a/include/configs/omap5912osk.h +++ b/include/configs/omap5912osk.h @@ -44,8 +44,6 @@ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 /* Required for ramdisk support */ diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h index d3d526310e..38b5028060 100644 --- a/include/configs/omap5_evm.h +++ b/include/configs/omap5_evm.h @@ -38,7 +38,6 @@ #define CONFIG_OMAP54XX /* which is a 54XX */ #define CONFIG_OMAP5430 /* which is in a 5430 */ #define CONFIG_5430EVM /* working with EVM */ -#define CONFIG_ARCH_CPU_INIT /* Get CPU defs */ #include <asm/arch/cpu.h> @@ -49,8 +48,10 @@ #define CONFIG_DISPLAY_BOARDINFO /* Clock Defines */ -#define V_OSCK 38400000 /* Clock output from T2 */ +#define V_OSCK 19200000 /* Clock output from T2 */ #define V_SCLK V_OSCK +#define CONFIG_SYS_CLOCKS_ENABLE_ALL 1 /* Enable all clocks */ +#define CONFIG_SYS_ENABLE_PADS_ALL 1 /* Enable all PADS for now */ #undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R @@ -97,9 +98,10 @@ #define CONFIG_DRIVER_OMAP34XX_I2C #define CONFIG_I2C_MULTI_BUS -/* TWL6030 */ -#define CONFIG_TWL6030_POWER -#define CONFIG_CMD_BAT +/* TWL6035 */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_TWL6035_POWER +#endif /* MMC */ #define CONFIG_GENERIC_MMC @@ -111,14 +113,8 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ #define CONFIG_ENV_OFFSET 0xE0000 +#define CONFIG_CMD_SAVEENV -/* USB */ -#define CONFIG_MUSB_UDC -#define CONFIG_USB_OMAP3 - -/* USB device configuration */ -#define CONFIG_USB_DEVICE -#define CONFIG_USB_TTY #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Flash */ @@ -154,7 +150,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ - "console=ttyS2,115200n8\0" \ + "console=ttyO2,115200n8\0" \ "usbtty=cdc_acm\0" \ "vram=16M\0" \ "mmcdev=0\0" \ @@ -250,8 +246,8 @@ /* Defines for SPL */ #define CONFIG_SPL -#define CONFIG_SPL_TEXT_BASE 0x40304350 -#define CONFIG_SPL_MAX_SIZE 0x1E000 /* 120K */ +#define CONFIG_SPL_TEXT_BASE 0x40300350 +#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ diff --git a/include/configs/omap730p2.h b/include/configs/omap730p2.h index 26e7e1f1e0..f7900e0d83 100644 --- a/include/configs/omap730p2.h +++ b/include/configs/omap730p2.h @@ -49,8 +49,6 @@ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 diff --git a/include/configs/origen.h b/include/configs/origen.h index 8ede82575c..d4d0f84be6 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -69,9 +69,10 @@ #define EXYNOS4_DEFAULT_UART_OFFSET 0x020000 /* SD/MMC configuration */ -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI /* PWM */ #define CONFIG_PWM 1 @@ -82,7 +83,7 @@ /* Command definition*/ #include <config_cmd_default.h> -#define CONFIG_CMD_PING +#undef CONFIG_CMD_PING #define CONFIG_CMD_ELF #define CONFIG_CMD_DHCP #define CONFIG_CMD_MMC diff --git a/include/configs/otc570.h b/include/configs/otc570.h index b322c775a1..85993789b9 100644 --- a/include/configs/otc570.h +++ b/include/configs/otc570.h @@ -215,7 +215,6 @@ # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) # define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 # define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 -# define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 3098c5acfe..04fd8d07f5 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -184,7 +184,7 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_CMD_SATA -#define CONFIG_SATA_SIL3114 +#define CONFIG_SATA_SIL #define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_LIBATA #define CONFIG_LBA48 @@ -227,7 +227,7 @@ /* DDR Setup */ #define CONFIG_FSL_DDR3 -#define CONFIG_DDR_RAW_TIMING +#define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52 @@ -534,9 +534,6 @@ #define CONFIG_OF_BOARD_SETUP #define CONFIG_OF_STDOUT_VIA_ALIAS -#define CONFIG_SYS_64BIT_VSPRINTF -#define CONFIG_SYS_64BIT_STRTOUL - /* new uImage format support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h new file mode 100644 index 0000000000..df46be5469 --- /dev/null +++ b/include/configs/pogo_e02.h @@ -0,0 +1,119 @@ +/* + * Copyright (C) 2012 + * David Purdy <david.c.purdy@gmail.com> + * + * Based on Kirkwood support: + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _CONFIG_POGO_E02_H +#define _CONFIG_POGO_E02_H + +/* + * Machine type definition and ID + */ +#define MACH_TYPE_POGO_E02 3542 +#define CONFIG_MACH_TYPE MACH_TYPE_POGO_E02 +#define CONFIG_IDENT_STRING "\nPogo E02" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD /* SOC Family Name */ +#define CONFIG_KW88F6281 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#define CONFIG_SYS_MVFS +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* Remove or override few declarations from mv-common.h */ +#undef CONFIG_SYS_PROMPT /* previously defined in mv-common.h */ +#define CONFIG_SYS_PROMPT "PogoE02> " + +/* + * Environment variables configurations + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */ +#else +#define CONFIG_ENV_IS_NOWHERE +#endif + +#define CONFIG_ENV_SIZE 0x20000 /* 128k */ +#define CONFIG_ENV_OFFSET 0x60000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND \ + "setenv bootargs $(bootargs_console); " \ + "run bootcmd_usb; " \ + "bootm 0x00800000 0x01100000" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdparts=mtdparts=orion_nand:1M(u-boot),4M(uImage)," \ + "32M(rootfs),-(data)\0"\ + "mtdids=nand0=orion_nand\0"\ + "bootargs_console=console=ttyS0,115200\0" \ + "bootcmd_usb=usb start; ext2load usb 0:1 0x00800000 /uImage; " \ + "ext2load usb 0:1 0x01100000 /uInitrd\0" + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ +#define CONFIG_PHY_BASE_ADR 0 +#endif /* CONFIG_CMD_NET */ + +/* + * File system + */ +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_LZO + +#endif /* _CONFIG_POGO_E02_H */ diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index dc5ec3aa82..5d0c385987 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -69,7 +69,6 @@ #define CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ #define CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_LOG #undef CONFIG_CMD_MII #define CONFIG_CMD_NAND #undef CONFIG_CMD_PING diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 0ce3fa864c..9cdfc147e9 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -15,7 +15,6 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_DFL #define CONFIG_CMD_CACHE #define CONFIG_CMD_FLASH #define CONFIG_CMD_PCI diff --git a/include/configs/rda8810.h b/include/configs/rda8810.h new file mode 100644 index 0000000000..8e63b43f55 --- /dev/null +++ b/include/configs/rda8810.h @@ -0,0 +1,25 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8810 + +#define CONFIG_MACH_TYPE (5002) + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V1 /* V1 for rda8810, rda8850 */ +#define CONFIG_SYS_NAND_MAX_CHIPS 1 + +// Enable RDA signed bootloader: +#define CONFIG_SIGNATURE_CHECK_IMAGE + +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda8810e.h b/include/configs/rda8810e.h new file mode 100644 index 0000000000..998739f9fa --- /dev/null +++ b/include/configs/rda8810e.h @@ -0,0 +1,28 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8810E +/* #define CONFIG_RDA_FPGA */ + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V2 /* V2 for rda8810e, rda8820 */ +#define CONFIG_SYS_NAND_MAX_CHIPS 1 + +#define NAND_IO_RECONFIG_WORKROUND + +#ifdef _TGT_AP_HW_TEST_ENABLE +/* force to run hardware test when pdl2 is running */ +//#define CONFIG_PDL_FORCE_HW_TEST +/* test list */ +#define CONFIG_VPU_TEST +#endif + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda8810h.h b/include/configs/rda8810h.h new file mode 100644 index 0000000000..65121133fc --- /dev/null +++ b/include/configs/rda8810h.h @@ -0,0 +1,40 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8810H +#define CONFIG_RDA_FPGA + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V3 +#define CONFIG_SYS_NAND_MAX_CHIPS 4 + +#define NAND_IO_RECONFIG_WORKROUND + +/* Enable RDA signed bootloader:*/ +/* #define CONFIG_SIGNATURE_CHECK_IMAGE */ + +#ifdef _TGT_AP_HW_TEST_ENABLE +/* force to run hardware test when pdl2 is running */ +//#define CONFIG_PDL_FORCE_HW_TEST +/* test list */ +#define CONFIG_VPU_TEST +/* #define CONFIG_DDR_TEST */ +/* #define CONFIG_TIMER_TEST */ +/* #define CONFIG_UART_TEST */ +/* #define CONFIG_GIC_TEST */ +/* #define CONFIG_CACHE_TEST */ +/* #define CONFIG_MIPI_LOOP_TEST */ +/* #define CONFIG_I2C_TEST */ +#endif + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda8820.h b/include/configs/rda8820.h new file mode 100644 index 0000000000..e9c2e2ad42 --- /dev/null +++ b/include/configs/rda8820.h @@ -0,0 +1,19 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8820 +#define CONFIG_RDA_FPGA + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V2 /* V2 for rda8810e, rda8820 */ +#define CONFIG_SYS_NAND_MAX_CHIPS 1 + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda8850.h b/include/configs/rda8850.h new file mode 100644 index 0000000000..3e44ff658c --- /dev/null +++ b/include/configs/rda8850.h @@ -0,0 +1,19 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8850 +/* #define CONFIG_RDA_FPGA */ + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V1 /* V1 for rda8810, rda8850 */ +#define CONFIG_SYS_NAND_MAX_CHIPS 1 + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda8850e.h b/include/configs/rda8850e.h new file mode 100644 index 0000000000..7f628e0ef7 --- /dev/null +++ b/include/configs/rda8850e.h @@ -0,0 +1,37 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8850E +/*#define CONFIG_RDA_FPGA*/ + +/* Enable RDA signed bootloader:*/ +/* #define CONFIG_SIGNATURE_CHECK_IMAGE */ + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V3 /* V3 for rda8850e*/ +#define CONFIG_SYS_NAND_MAX_CHIPS 4 + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#ifdef _TGT_AP_HW_TEST_ENABLE +#define CONFIG_VPU_TEST +/* #define CONFIG_DDR_TEST */ +/* #define CONFIG_TIMER_TEST */ +/* #define CONFIG_UART_TEST */ +/* #define CONFIG_GIC_TEST */ +/* #define CONFIG_CACHE_TEST */ +/* #define CONFIG_MIPI_LOOP_TEST */ +/* #define CONFIG_I2C_TEST */ +#endif + +#define CONFIG_USB_ACM_TWO_CHANS 1 + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda_config_defaults.h b/include/configs/rda_config_defaults.h new file mode 100644 index 0000000000..84cc9bf308 --- /dev/null +++ b/include/configs/rda_config_defaults.h @@ -0,0 +1,411 @@ +#ifndef __RDA_CONFIG_H__ +#define __RDA_CONFIG_H__ + +#include <rda/tgt_ap_board_config.h> +#include <rda/tgt_ap_clock_config.h> +#define MEM_SIZE _TGT_AP_OS_MEM_SIZE + +/* + * Board + */ +#define CONFIG_RDA_MUX_CONFIG 1 + +/* + * SoC Configuration + */ +#define CONFIG_ARMV7 +#define CONFIG_SYS_HZ_CLOCK 2000000 /* 2M */ +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x80008000 +/* #define CONFIG_SYS_ICACHE_OFF */ +/* #define CONFIG_SYS_DCACHE_OFF */ +/* #define CONFIG_SYS_NEON_OFF */ + +/* Display CPU and Board Info */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 +/* + * Memory Info + */ +#define CONFIG_SYS_MALLOC_LEN (0x10000 + 16*1024*1024) /* malloc() len */ +#define PHYS_SDRAM_1 (0x80000000) /* DRAM Start */ +#define PHYS_SDRAM_1_SIZE ((MEM_SIZE) << 20) + +/* memtest start addr */ +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x00800000) + +/* memtest will be run on 16MB */ +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x00800000 + 16*1024*1024) + +/* spl need 20k bytes for nand one page data load (max size is 16k page size) */ +#define CONFIG_SPL_NAND_MIDDLE_DATA_BUFFER (PHYS_SDRAM_1 + 0x01000000) + +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ + +/* + * Serial Driver info + */ +#define CONFIG_BAUDRATE 921600 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200, 921600 } + +/* + * SD/MMC + */ +#define CONFIG_MMC +#define CONFIG_EFI_PARTITION +#define CONFIG_DOS_PARTITION +/*#define CONFIG_RDA_MMC_LEGACY*/ +#define CONFIG_GENERIC_MMC +#define CONFIG_RDA_MMC +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 +/* + * ROM in U0B chips cannot provide information on the booting media, whereas + * SPL and U-BOOT must know the media type. The macro, CONFIG_SDMMC_BOOT, + * is introduced to tell SPL and U-BOOT that this is a SDMMC boot. + * The macro will be obsoleted for future chips, after ROM is updated to + * provide such information. + */ +/*#define CONFIG_SDMMC_BOOT*/ + +#ifdef CONFIG_SDMMC_BOOT /* sdcard */ +#define CONFIG_MMC_DEV_NUM 0 +#define CONFIG_MMC_DEV_NAME "mmc0" +#else /* emmc */ +#define CONFIG_MMC_DEV_NUM 1 +#define CONFIG_MMC_DEV_NAME "mmc1" +#endif + +/* + * Misc drivers + */ +#define CONFIG_RDA_FACTORY 1 +#define CONFIG_RDA_PRDINFO 1 +#define CONFIG_CMD_PRDINFO 1 + +/* + * I2C Configuration + */ + +/* + * Flash & Environment + */ +#define CONFIG_NAND_RDA +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_SYS_NAND_PAGE_2K + +#define CONFIG_SYS_NAND_LARGEPAGE +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +#define CONFIG_SYS_NAND_BASE (PHYS_SDRAM_1 + 0x00800000) + +/* + * Console configuration + */ +#define CONFIG_SYS_PROMPT "RDA > " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */ +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x02000000) +#define CONFIG_VERSION_VARIABLE +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* + * USB Configuration + */ +/* +#define CONFIG_MUSB_HCD 1 +*/ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_RDA + +#ifdef CONFIG_MUSB_HCD +#define MUSB_NO_MULTIPOINT +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_FAT_WRITE +#endif +/* + *USB Gadget Configuration + */ +#ifdef CONFIG_MUSB_UDC +#define CONFIG_RDA_USB_SERIAL +#define CONFIG_USB_DEVICE +#define CONFIG_USBD_HS +#endif + +/* + * U-BOOT only configurations + */ +#ifndef CONFIG_SPL_BUILD + +#ifdef UBIFS_SYSTEM_IMAGE +#define CONFIG_UBIFS_SYSTEM_IMAGE 1 +#endif + +#ifdef UBIFS_USER_IMAGES +#define CONFIG_UBIFS_USER_IMAGES 1 +#endif + +#ifdef EXTFS_SYSTEM_IMAGE +#define CONFIG_EXTFS_SYSTEM_IMAGE 1 +#endif + +#ifdef EXTFS_USER_IMAGES +#define CONFIG_EXTFS_USER_IMAGES 1 +#endif +/*#define CONFIG_SYS_NAND_BASE_LIST { (PHYS_SDRAM_1 + 0x00800000), } */ + +/* + * U-boot USB Configuration + */ + +#ifdef CONFIG_MUSB_UDC +#define CONFIG_USB_FASTBOOT +#define CONFIG_MUSB_DMA +#define CONFIG_CMD_FASTBOOT +#define CONFIG_CMD_PDL2 +#define SCRATCH_ADDR (PHYS_SDRAM_1 + 0x02000000) /* leave 32M for boot and test */ +#define FB_DOWNLOAD_BUF_SIZE (PHYS_SDRAM_1_SIZE - 0x02000000 - 0x800000) /* 216M */ +#endif + +/* + * U-Boot commands + */ +#include <config_cmd_default.h> +#include <asm/arch/mtdparts_def.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MMC +#define CONFIG_CMD_HWFLOW + +/* modem commands */ +#define CONFIG_CMD_MDCOM + +#ifdef CONFIG_NAND_RDA +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +/* +#define CONFIG_MTD_DEBUG +#define CONFIG_MTD_DEBUG_VERBOSE 3 +*/ +#define CONFIG_MTD_DEVICE +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_YAFFS +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_CMD_SOURCE +#define CONFIG_CMD_BOOTZ +#define CONFIG_RBTREE + +/*#define CONFIG_YAFFS2*/ +#define MTDIDS_DEFAULT "nand0=rda_nand" +#define MTDPARTS_DEFAULT "mtdparts=rda_nand:"MTDPARTS_DEF +#define MTDPARTS_KERNEL_DEFAULT "mtdparts=rda_nand:"MTDPARTS_KERNEL_DEF +#endif + +/* + * U-BOOT library + */ +#define CONFIG_USE_ARCH_MEMCPY 1 +/* + * communication code between modem and ap + */ +#define CONFIG_MDCOM + +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DNS +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_RARP +#undef CONFIG_CMD_SNTP + +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_SPI +#undef CONFIG_CMD_SF +#undef CONFIG_CMD_SAVEENV +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_CONSOLE + +#undef CONFIG_BOOTM_NETBSD +#undef CONFIG_BOOTM_RTEMS + +#define CONFIG_LZO + +/* + * Linux Information + */ +#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SETUP_MEMORY_TAGS +// #define CONFIG_SERIAL_TAG + +/* The delay to check whether to stop auto boot */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script_addr=81000000\0" \ + "modem_addr=82000000\0" \ + "factorydata_addr=83000000\0" \ + "kernel_addr=84000000\0" \ + "initrd_addr=85000000\0" \ + "boot_device=mmc\0" \ + "" + +#define CONFIG_BOOTARGS \ + "mem="MK_STR(MEM_SIZE)"M " \ + "console=ttyS0," MK_STR(CONFIG_BAUDRATE) " " \ + "root=/dev/ram rw " \ + "rdinit=/init" + +#define CONFIG_BOOTCOMMAND \ + "mux_config; " \ + "mmc dev 0; " \ + "ext2load mmc 0:1 ${script_addr} boot.scr && source ${script_addr};" \ + "echo Running boot script failed;" + +#endif /* !CONFIG_SPL_BUILD */ + +#if !defined(CONFIG_USE_NAND) && \ + !defined(CONFIG_USE_NOR) && \ + !defined(CONFIG_USE_SPIFLASH) +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_SIZE (16 << 10) +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_ENV +#endif + +/* additions for new relocation code, must added to all boards */ +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + +/* + * Defines for SPL + */ +#define CONFIG_SPL +#define CONFIG_SYS_SRAM_BASE 0x00100000 +#define CONFIG_SYS_SRAM_SIZE 0x00010000 /* 64k */ +#define CONFIG_SPL_TEXT_BASE 0x00100100 /* first 4k leave for boot_rom bss */ +/* + * SPL Build for thumb code + */ +#define CONFIG_SPL_THUMB_BUILD 1 +/* + the spl code should be 48 KB,and must be aligned to page offset +*/ +/* In nand driver V3, + the first page of nand is nand parameter, + it is invisible to uplayer except for nand dump command, + so we also think that spl offset is 0. + need add one page offset when read and write bootloader in nand driver v3. + In nand driver V1, + spl offset must be 0. +*/ +#define NAND_START_ADDR 0 +#define CONFIG_SPL_NAND_OFFS (NAND_START_ADDR) +#define CONFIG_SPL_MAX_SIZE 49152 + +#define CONFIG_UIMAGEHDR_SIZE 0x40 + +#ifdef _TGT_AP_DDR_AUTO_CALI_ENABLE +#define CONFIG_DDR_CAL_VAL_SIZE 0x10 +#define CONFIG_SPL_CODE_MAX_SIZE 48880 //CONFIG_SPL_MAX_SIZE - CONFIG_DDR_CAL_VAL_SIZE - 0x100 +#else +#define CONFIG_DDR_CAL_VAL_SIZE 0 +#define CONFIG_SPL_CODE_MAX_SIZE 48896 //CONFIG_SPL_MAX_SIZE - 0x100 +#endif + +#define CONFIG_SPL_BOARD_INFO_SIZE 512 +#define CONFIG_SPL_BOARD_INFO_ADDR (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CONFIG_SPL_BOARD_INFO_SIZE) + +#define CONFIG_TRAP_SIZE 0x00c0 +#define CONFIG_SPL_LOAD_ADDRESS (CONFIG_SYS_SRAM_BASE + CONFIG_TRAP_SIZE) + +#define CONFIG_SPL_STACK CONFIG_SPL_BOARD_INFO_ADDR + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_YMODEM_SUPPORT +#define CONFIG_SPL_IMAGE_SUPPORT + +#define CONFIG_MTD_PTBL_OFFS (CONFIG_SPL_NAND_OFFS + CONFIG_SPL_MAX_SIZE) +#define CONFIG_MTD_PTBL_SIZE ((SPL_APPENDING_TO-CONFIG_SPL_MAX_SIZE/1024)*1024) +#define CONFIG_SYS_BOOTLOADER_MAX_SIZE (1024*1024) + +#ifndef CONFIG_RDA_PDL +/* Check uimage*/ +#define CONFIG_SPL_CHECK_IMAGE + +/* NAND boot */ +#define CONFIG_SPL_NAND_LOAD +/* EMMC boot */ +#define CONFIG_SPL_EMMC_LOAD +/* XMODME boot */ +#define CONFIG_SPL_XMODEM_LOAD + +/* XMODEM load configs */ +#ifdef CONFIG_SPL_XMODEM_LOAD +#define CONFIG_SYS_XMODEM_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_XMODEM_U_BOOT_DST (CONFIG_SYS_TEXT_BASE - 64) +#endif + +/* + * NAND load configs +*/ +#ifdef CONFIG_SPL_NAND_LOAD +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_SIMPLE + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_OFFS (CONFIG_SPL_NAND_OFFS + CONFIG_SPL_MAX_SIZE + CONFIG_MTD_PTBL_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_SIZE (CONFIG_SYS_BOOTLOADER_MAX_SIZE - CONFIG_MTD_PTBL_SIZE - CONFIG_SPL_MAX_SIZE - CONFIG_SPL_NAND_OFFS) +#define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_TEXT_BASE - 64) +#endif /* CONFIG_SPL_NAND_LOAD */ + +/* + * EMMC load configs + */ +#ifdef CONFIG_SPL_EMMC_LOAD +#define CONFIG_SPL_EMMC_SUPPORT + +#define CONFIG_SPL_EMMC_OFFS 0x20000 + +#define CONFIG_SYS_EMMC_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_EMMC_U_BOOT_OFFS (CONFIG_SPL_EMMC_OFFS + CONFIG_SPL_MAX_SIZE + CONFIG_MTD_PTBL_SIZE) +#define CONFIG_SYS_EMMC_U_BOOT_SIZE (CONFIG_SYS_BOOTLOADER_MAX_SIZE - CONFIG_MTD_PTBL_SIZE - CONFIG_SPL_MAX_SIZE - CONFIG_SPL_EMMC_OFFS) +#define CONFIG_SYS_EMMC_U_BOOT_DST (CONFIG_SYS_TEXT_BASE - 64) +#endif /* CONFIG_SPL_EMMC_LOAD */ + +#else /* CONFIG_RDA_PDL */ + +#define CONFIG_SPL_USB_SUPPORT +#define CONFIG_SPL_MUSB_UDC_SUPPORT +#define CONFIG_SPL_RDA_PDL + +#endif /* CONFIG_RDA_PDL */ + +#define CONIFG_DDR_CAL_VAL_FLAG 0xA1B2 +#define CONFIG_DDR_CAL_SEC_OFFS CONFIG_SPL_MAX_SIZE - CONFIG_DDR_CAL_VAL_SIZE - 0x100 +#endif /* __RDA_CONFIG_H__ */ diff --git a/include/configs/rdaarm926ejs.h b/include/configs/rdaarm926ejs.h new file mode 100644 index 0000000000..aac6b05f29 --- /dev/null +++ b/include/configs/rdaarm926ejs.h @@ -0,0 +1,218 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * Board + */ + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDAARM926EJS +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SYS_HZ_CLOCK 16384 +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x84008000 + +/* + * Memory Info + */ +#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ +#define PHYS_SDRAM_1 0x84000000 /* DDR Start */ +#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 32MB */ +#define CONFIG_MAX_RAM_BANK_SIZE (64 << 20) /* max size from RDA */ + +/* memtest start addr */ +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x00800000) + +/* memtest will be run on 16MB */ +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x00800000 + 16*1024*1024) + +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ + +/* + * Serial Driver info + */ +#define CONFIG_BAUDRATE 921600 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200, 921600 } + +/* + * SD/MMC + */ +#define CONFIG_MMC +#define CONFIG_DOS_PARTITION +/*#define CONFIG_RDA_MMC_LEGACY*/ +#define CONFIG_GENERIC_MMC +#define CONFIG_RDA_MMC + +/* + * I2C Configuration + */ + +/* + * Flash & Environment + */ +#define CONFIG_NAND_RDA +#define CONFIG_SYS_NAND_USE_FLASH_BBT +/*#define CONFIG_SYS_NAND_HW_ECC*/ +/*#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST*/ +#define CONFIG_SYS_NAND_PAGE_2K + +#define CONFIG_SYS_NAND_LARGEPAGE +#define CONFIG_SYS_NAND_BASE 0x01a26000 +/*#define CONFIG_SYS_NAND_BASE_LIST { 0x01a26000, } */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_MAX_CHIPS 1 + +/* + * Network & Ethernet Configuration + */ + +/* + *USB Gadget Configuration + */ + +#define CONFIG_USB_RDA +#define CONFIG_MUSB_UDC +/* +#define CONFIG_USB_TTY +*/ +#define CONFIG_USB_DEVICE +#define CONFIG_USBD_HS +#define CONFIG_USB_FASTBOOT +#define CONFIG_CMD_FASTBOOT +/* +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_RDA +#define CONFIG_USB_FASTBOOT +#define CONFIG_CMD_FASTBOOT +*/ +#define SCRATCH_ADDR 0x86000000 +#define FB_DOWNLOAD_BUF_SIZE (100*1024*1024) + +/* + * U-Boot general configuration + */ +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CONFIG_SYS_PROMPT "RDA > " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* + * Environment settings + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "usbtty=cdc_acm\0" +/* + * Linux Information + */ +#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS \ + "mem=64M console=ttyS0,115200n8 root=/dev/ram rw rdinit=/linuxrc init=/init " +#define CONFIG_BOOTDELAY 3 + +/* + * U-Boot commands + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MMC + +#ifdef CONFIG_NAND_RDA +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_YAFFS +/*#define CONFIG_CMD_UBI*/ +/*#define CONFIG_CMD_UBIFS*/ +#define CONFIG_YAFFS2 +#define CONFIG_RBTREE +#define MTDIDS_DEFAULT "nand0=rda_nand" +#define MTDPARTS_DEFAULT "mtdparts=rda_nand:128k@0(preloader)," \ + "256k(config)," \ + "128k(u-boot_env)," \ + "512k(test_image)," \ + "1M(u-boot)," \ + "6M(kernel)," \ + "504M(system)," \ + "-(data)" +#endif + +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DNS +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_RARP +#undef CONFIG_CMD_SNTP + +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_SPI +#undef CONFIG_CMD_SF +#undef CONFIG_CMD_SAVEENV + +#if !defined(CONFIG_USE_NAND) && \ + !defined(CONFIG_USE_NOR) && \ + !defined(CONFIG_USE_SPIFLASH) +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_SIZE (16 << 10) +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_ENV +#endif + +/* additions for new relocation code, must added to all boards */ +#define CONFIG_SYS_SDRAM_BASE 0x84000000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ + GENERATED_GBL_DATA_SIZE) + +/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SYS_SRAM_BASE 0x01c00000 +#define CONFIG_SYS_SRAM_SIZE 0x00008000 /* 32k */ +#define CONFIG_SPL_TEXT_BASE 0x01c01000 /* first 4k leave for boot_rom bss */ +#define CONFIG_SPL_MAX_SIZE (20 * 1024) /* 8 KB for stack */ +#define CONFIG_SPL_STACK (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE) + +#define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SRAM_BASE /* reuse boot_rom bss */ +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +/*#define CONFIG_SPL_LIBDISK_SUPPORT*/ +/*#define CONFIG_SPL_I2C_SUPPORT*/ +#define CONFIG_SPL_LIBGENERIC_SUPPORT +/*#define CONFIG_SPL_MMC_SUPPORT*/ +/*#define CONFIG_SPL_FAT_SUPPORT*/ +#define CONFIG_SPL_SERIAL_SUPPORT +/*#define CONFIG_SPL_NAND_SUPPORT*/ +/*#define CONFIG_SPL_POWER_SUPPORT*/ +/*#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"*/ + +#endif /* __CONFIG_H */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 56b5547fd2..e133a17259 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -63,9 +63,10 @@ #define CONFIG_BAUDRATE 115200 /* MMC */ -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI /* PWM */ #define CONFIG_PWM 1 diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 13012756ab..00db374182 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -66,9 +66,10 @@ #define CONFIG_BAUDRATE 115200 /* MMC */ -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI /* PWM */ #define CONFIG_PWM 1 diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index ae075e786e..46d42281b7 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -25,6 +25,14 @@ #define __CONFIG_H #include <asm/sizes.h> + +/* LP0 suspend / resume */ +#define CONFIG_TEGRA2_LP0 +#define CONFIG_AES +#define CONFIG_TEGRA_PMU +#define CONFIG_TPS6586X_POWER +#define CONFIG_TEGRA_CLOCK_SCALING + #include "tegra2-common.h" /* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */ @@ -92,4 +100,12 @@ #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB +/* Enable keyboard */ +#define CONFIG_TEGRA2_KEYBOARD +#define CONFIG_KEYBOARD + +#undef TEGRA2_DEVICE_SETTINGS +#define TEGRA2_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ + "stdout=serial\0" \ + "stderr=serial\0" #endif /* __CONFIG_H */ diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 73d2a87596..708bff7bb7 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -41,7 +41,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_NFS -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SF #define CONFIG_CMD_RUN diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 1e71bcc3ef..9c32bfc58b 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -37,7 +37,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_NFS -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_RUN #define CONFIG_CMD_SAVEENV diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 9659f9ebd9..0f63040d25 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -78,7 +78,8 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC #define CONFIG_MMC -#define CONFIG_S5P_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 93c25da1cf..702134bda3 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -68,9 +68,10 @@ #define EXYNOS4_DEFAULT_UART_OFFSET 0x010000 /* SD/MMC configuration */ -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI /* PWM */ #define CONFIG_PWM 1 diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 5fef8cce80..ab1b33209e 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -41,7 +41,7 @@ /* I2C driver configuration */ #define CONFIG_HARD_I2C -#define CONFIG_SPEAR_I2C +#define CONFIG_DW_I2C #define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_SLAVE 0x02 @@ -196,7 +196,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_LOAD_ADDR 0x00800000 #define CONFIG_SYS_CONSOLE_INFO_QUIET 1 -#define CONFIG_SYS_64BIT_VSPRINTF 1 #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 4c4321d2ff..3fc2c44349 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -146,7 +146,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #define CONFIG_AUTO_COMPLETE @@ -258,7 +257,7 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE (45 << 10) /* 45 K */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h index 837f859c7c..068ce8855f 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra2-common.h @@ -26,6 +26,14 @@ #include <asm/sizes.h> /* + * QUOTE(m) will evaluate to a string version of the value of the macro m + * passed in. The extra level of indirection here is to first evaluate the + * macro m before applying the quoting operator. + */ +#define QUOTE_(m) #m +#define QUOTE(m) QUOTE_(m) + +/* * High Level Configuration Options */ #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ @@ -50,6 +58,15 @@ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_OF_LIBFDT /* enable passing of devicetree */ +#ifdef CONFIG_TEGRA2_LP0 +#define TEGRA_LP0_ADDR 0x1C406000 +#define TEGRA_LP0_SIZE 0x2000 +#define TEGRA_LP0_VEC \ + "lp0_vec=" QUOTE(TEGRA_LP0_SIZE) "@" QUOTE(TEGRA_LP0_ADDR) " " +#else +#define TEGRA_LP0_VEC +#endif + /* Environment */ #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ @@ -115,11 +132,18 @@ #define CONFIG_SYS_NO_FLASH -/* Environment information */ +/* Environment information, boards can override if required */ +#define CONFIG_CONSOLE_MUX +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define TEGRA2_DEVICE_SETTINGS "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttyS0,115200n8\0" \ "mem=" TEGRA2_SYSMEM "\0" \ "smpflag=smp\0" \ + TEGRA2_DEVICE_SETTINGS #define CONFIG_LOADADDR 0x408000 /* def. location for kernel */ #define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */ diff --git a/include/configs/trats.h b/include/configs/trats.h index 10f11d9579..ef6510e67d 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -53,7 +53,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG -#define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG #define CONFIG_CMDLINE_EDITING #define CONFIG_SKIP_LOWLEVEL_INIT @@ -74,7 +73,8 @@ /* MMC */ #define CONFIG_GENERIC_MMC #define CONFIG_MMC -#define CONFIG_S5P_MMC +#define CONFIG_S5P_SDHCI +#define CONFIG_SDHCI /* PWM */ #define CONFIG_PWM @@ -174,9 +174,9 @@ /* TRATS has 2 banks of DRAM */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ -#define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */ +#define PHYS_SDRAM_1_SIZE (512 << 20) /* 512 MB in CS 0 */ #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ -#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */ +#define PHYS_SDRAM_2_SIZE (512 << 20) /* 512 MB in CS 0 */ #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ @@ -208,10 +208,18 @@ #define CONFIG_PMIC #define CONFIG_PMIC_I2C -#define CONFIG_PMIC_MAX8998 +#define CONFIG_PMIC_MAX8997 #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG #define CONFIG_USB_GADGET_DUALSPEED +/* LCD */ +#define CONFIG_EXYNOS_FB +#define CONFIG_LCD +#define CONFIG_FB_ADDR 0x52504000 +#define CONFIG_S6E8AX0 +#define CONFIG_EXYNOS_MIPI_DSIM +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1280 * 720 * 4) + #endif /* __CONFIG_H */ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 801a24fd88..9955fca476 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -278,6 +278,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_I2C_SUPPORT @@ -293,7 +294,7 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ diff --git a/include/configs/tx25.h b/include/configs/tx25.h index 87bd8a6756..3dfafa5077 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -117,8 +117,6 @@ #define CONFIG_MXC_NAND_HWECC #define CONFIG_SYS_NAND_LARGEPAGE -#define CONFIG_SYS_64BIT_VSPRINTF - /* U-Boot general configuration */ #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ diff --git a/include/configs/u8500_href.h b/include/configs/u8500_href.h index 4747fbd351..95028de059 100644 --- a/include/configs/u8500_href.h +++ b/include/configs/u8500_href.h @@ -95,7 +95,6 @@ #define CONFIG_CMD_MMC #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 -#define CONFIG_CMD_EMMC #define CONFIG_CMD_SOURCE #define CONFIG_CMD_I2C diff --git a/include/configs/zeus.h b/include/configs/zeus.h index 63279b01ce..2556e3b3ef 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -78,7 +78,6 @@ #define CONFIG_CMD_ELF #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ -#define CONFIG_CMD_LOG #define CONFIG_CMD_MII #define CONFIG_CMD_NET #define CONFIG_CMD_NFS diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index 599d5bb42a..d7ce6c64de 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -93,8 +93,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_CACHE -#define CONFIG_SYS_64BIT_VSPRINTF - /* * Additional command */ |