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Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
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Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
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testing
1. Filter out DRM_MODE_FLAG_INTERLACE modes.
2. Filter out unsupport pixel clock modes.
3. Support these modes as high priority if exist in EDID:
1920x1200 16:10 Monitor
1920x1080 16:9 TV
1680x1050 16:10 Monitor
1280x1024 5:4 Monitor
1280x720 16:9 TV
800x600 4:3 TV
Signed-off-by: xinliang.liu <xinliang.liu@linaro.org>
Signed-off-by: Guodong.Xu <guodong.xu@linaro.org>
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Canned modes are modes you can switch to when booting the hikey board without
HDMI cable.
Implement 3 canned modes which can work on most mornitors:
1. 1080x720p@60
2. 1080x720p@60 with some timings parameters adjusted (aka old 720p)
3. 800x600p@60
Signed-off-by: xinliang.liu <xinliang.liu@linaro.org>
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There is a bug. When swiching to a mode fails, the driver cannot proceed to
the next available mode.
Signed-off-by: xinliang.liu <xinliang.liu@linaro.org>
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To major changes:
1. The way to read PERI_SC_PERIPH_STAT1 should be split into two word
(2-byte) parts.
2. msleep(1) is required between PERI_SC_PERIPH_CTRL14 write and
PERI_SC_PERIPH_STAT1 read.
3. syspll and med_syspll need to be changed together.
4. ddrpll doesn't need to be changed. Keep it at 1.2G.
Tests are done using a LG TV on all four settings. Model no.: LG 37LK460-CC
ATF/UEFI w/ syspll @ 1.2G
ATF/UEFI w/ syspll @ 1.19G
fastboot w/ syspll @ 1.2G
fastboot w/ syspll @ 1.19G
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
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Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
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If the HDMI connector is out during boot, this forces the HDMI up anyway
and causes it to select the fallback (720p) mode since no EDID is coming.
It means the HDMI is configured and working for 720p all the time.
This provides a neat way to force the fallback 720p mode by unplugging
until boot is complete, then plugging the monitor to find whatever booted
(Xorg, framebuffer console) configured fully for the fallback mode.
Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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For now having the sysrq-g mode hack is useful with hikey
Signed-off-by: Andy Green <andy.green@linaro.org>
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This patch let you force cycling between the remaining DRM modes from the
kernel alone.
It can only deal with one CRTC.
It's useful if a working display is needed for using or setting up a device,
but the HDMI compatibility is not 100%. At least the user can check every
valid mode to see if it can work on his display.
Force the mode change by typing
Alt-Gr SysRq g
that is
- hold down the right-hand ALT key
- hold down the SysRq key
- tap g key
- let go of everything
Each time he will move to the "next" mode, when at the last mode he will
go back to the first.
Signed-off-by: Andy Green <andy.green@linaro.org>
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The existing code here assumes that the framebuffer size is always the
scanout size. There is no requirement that is true, and eg, if you start on
a 1080p mode and change mode in the framebuffer console to 720p later,
the framebuffer console remains at 1080p and the new mode is a subwindow on
the 1080p sized original framebuffer console.
This patch corrects the computations to use the right mix of information
about the memory layout (framebuffer stride) and the current scanout
(crtc active mode dimensions) so it works for all cases.
Signed-off-by: Andy Green <andy.green@linaro.org>
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When the pixel clock differs from the DSI byte lane clock, the
timing for h blanking related items becomes fractional.
So we can understand the relationship, log the affected timings
to three decimal places.
Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
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This creates a canned DRM mode for 720p60, and in the event there is
no usable mode left after DRM checks validity, the canned mode will be
used.
This is helpful in two cases
1) No EDID appeared, but the device supports the fallback mode
2) An EDID appeared, but it does not list any acceptable mode. However,
the device does actually support the fallback mode.
It's implemented by adding a new optional connector func callback which
is called in the event we are left with no valid modes. Connectors may
handle the "fallback_mode" callback and add a fallback mode to use rather
than the DRM default of 1024 x 768.
In the case no EDID came but you forced your mode with video= on the
kernel commandline, normally DRM will attempt to synthesize appropriate
mode timings. But these very seldom work with HDMI monitors. In the
case a mode was forced that does not exist in the EDID already but a
fallback mode exists, this patch makes it choose the fallback mode and
ignore the mode forcing.
You can test "no EDID" by shorting HDMI connector p16 (SDA) to p17 (0V)
Signed-off-by: Andy Green <andy.green@linaro.org>
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1) Enhance all the computations to use ps period resolution and kHz frequency resolution, improving accuracy.
2) Automatically use 4 lanes when clock rate > 80MHz, for compatibility with
1080p
3) I found enable and disable of the DSI LP mode when other transmissions can
occur was necessary to make each mode work. By trial and error I found what
is needed for each mode and implemented heuristics.
4) Some modes require one more byte lane clock compared to the calculated
amount, I added a heuristic to do it
With these changes 1080p50 and 60 modes work on all 3 of my monitors, and
720p60 can also work. 720p50 worked on one monitor but on another he was
flicking between showing it correctly and feeling the mode was invalid,
so I disabled it.
There is a colour swap problem on 1080p60 I noticed sometimes. On some
boots what should be R, G, B are misordered as B, R, G, I think it means we
slipped a colour byte
sent by DSI: RGBRGBRGBRGB
received by ADV7533: RGBRGBRGBRGB
This happens between DSI and ADV7533 because
- it's the first place the pixels are serialized
- swapping monitors after this happens it never changes afterwards (ie,
problem is not happening in the monitor receiver)
I only just noticed it so not sure what to do about it yet.
Signed-off-by: Andy Green <andy.green@linaro.org>
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Framebuffer console no longer needs this to work, EDID fetch
and 3-lane restriction automatically selects 720p or best mode
available on monitor.
Signed-off-by: Andy Green <andy.green@linaro.org>
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The helpers bloat the code and hide what's actually going in
the registers.
I'm a bit dubious about these bitfields always mapping correctly as well,
also get rid of those (-94 LOC)
Signed-off-by: Andy Green <andy.green@linaro.org>
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This patch iteratively selects the ADE pixel clock, optionally in
order to always choose the next highest clock, but always to avoid
72MHz base clock, which later selects 576MHz DSI clock which is
unreliable, it only locks correctly about 50% of boots.
Storing the actual chosen clock in adj_mode is used elsewhere to
provide correct computations in later patches.
Signed-off-by: Andy Green <andy.green@linaro.org>
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The existing code seems to expect there is only one setting for
the number of lanes in use. On a pluggable HDMI device, the
number of lanes needed changes dynamically depending on the mode
that is chosen.
This patch makes the number of lanes optional in the dts, if left
out then it's decided dynamically, on the heuristic that
pixel clock > 80MHz == 4 lanes, otherwise 3
Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Otherwise we can't even make a 1080p framebuffer
Signed-off-by: Andy Green <andy.green@linaro.org>
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We only need to fill the logs with this if something is
dying.
Signed-off-by: Andy Green <andy.green@linaro.org>
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Hikey: Upgrade new mcu and lpm for 3.18 (0805_01)
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https://bugs.96boards.org/show_bug.cgi?id=83
Signed-off-by: Fathi Boudra <fathi.boudra@linaro.org>
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Fix efi alloc
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Make reserved kernel size as alignment.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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ARM64: defconfig: enable usb console
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When allocating memory for the kernel image, try the AllocatePages()
boot service to obtain memory at the preferred offset of
'dram_base + TEXT_OFFSET', and only revert to efi_low_alloc() if that
fails. This is the only way to allocate at the base of DRAM if DRAM
starts at 0x0, since efi_low_alloc() refuses to allocate at 0x0.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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This patch enables CPU_IDLE and the generic arm64 cpuidle driver
(ARM64_CPUIDLE).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Add cpu and cluster level's low power state, so that can enable cpuidle
on hi6220.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
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Add sp804 timer node in dts; and set idle state with "local-timer-stop",
so in idle state kernel will use sp804 timer as broadcast timer.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
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Select sp804 timer for ARCH_HISI, which is used as broadcast timer.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
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The ARM Dual-Timer SP804 module is peripheral found not only on ARM32
platforms but also on ARM64 platforms.
This patch moves the driver out of arch/arm to driver/clocksource
so that it can be used on ARM64 platforms also.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Olof Johansson <olof@lixom.net>
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The header asm/hardware/arm_timer.h is included in various machine
specific files to access TIMER_CTRL and initialise to a known state.
This patch introduces a new function sp804_timer_disable to disable
the SP804 timers and uses the same for initialising the timers to
known(off) state, thereby removing the dependency on the header
asm/hardware/arm_timer.h
This change is in prepartion to move sp804 timer support out of arch/arm
so that it can be used on ARM64 platforms.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
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Signed-off-by: Leo Yan <leo.yan@linaro.org>
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Enable SRAM node and stub clock node for Hi6220; furthermore
add the CPU's clock so it will be used by cpufreq-dt driver.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
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On Hi6220, there have some clocks which can use mailbox channel to send
messages to power controller to change frequency; this includes CPU, GPU
and DDR clocks.
For dynamic frequency scaling, firstly need write the frequency value to
SRAM region, and then send message to mailbox to trigger power controller
to handle this requirement. This driver will use syscon APIs to pass SRAM
memory region and use common mailbox APIs for channels accessing.
This init driver will support cpu frequency change firstly.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
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*of_iomap()* will check the device node pointer, and if the pointer is
NULL it will return error code. So refine clock's init flow by checking
the device node with this simple way; and polish a little for the print
out message.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
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This reverts commit 99b948b403fc85437ce79a5912932770aac7aaf5.
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This reverts commit f7ccb3dca40fad1696ac55cdc05d1c8583b74873.
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This reverts commit eb903475029010f99ec09f4d739406a0edae219e.
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This reverts commit a78e6588bf972754707cabf53fdd1a8fc81cba51.
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On Hi6220, below memory regions in DDR have specific purpose:
- 0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime;
- 0x0740,f000 - 0x0740,ffff: For MCU firmware's section;
- 0x06df,f000 - 0x06df,ffff: For mailbox message data.
This patch reserves these memory regions and add device node for
mailbox in dts.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
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Add Hisilicon mailbox's common driver, it registers mailbox channels
into framework; it also invokes low level callback functions for
register's related operations. Enhance rx channel's message queue,
which is based on the code in drivers/mailbox/omap-mailbox.c.
Enable Hi6220 mailbox driver as the first platform to use this
framework. Hi6220's mailbox communicates with MCU; for sending data,
it can support two methods for low level implementation: one is to
use interrupt as acknowledge, another is automatic mode which without
any acknowledge. These two methods have been supported in the driver;
for receiving data, it will depend on the interrupt to notify the
channel has incoming message.
Now mailbox driver is used to send message to MCU to control dynamic
voltage and frequency scaling for CPU, GPU and DDR.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
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