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authorTom Rini <trini@konsulko.com>2021-05-19 11:50:25 -0400
committerTom Rini <trini@konsulko.com>2021-05-19 11:50:25 -0400
commit27c2236f8acfa311eed2c8f8d210824fadd25483 (patch)
treec0431a281fe967221f6e8c839779e58e5d8d8b8a /arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi
parent428bec7cf956c3558bbdfda4d2ba23beb73a68ba (diff)
parentc0e6feeb343f8643376610fb3afd9eb8bcea6aad (diff)
Merge tag 'xilinx-for-v2021.07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2021.07-rc3 ZynqMP: - Syncup DT with Linux kernel - Fix mmc mini configurations via DT - Add pinctrl/psgtr description to DTs - Add DTs for Kria boards - Enable RTC and Time commands Versal: - Fix early BSS section location
Diffstat (limited to 'arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi')
-rw-r--r--arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi b/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi
new file mode 100644
index 0000000000..3f01233cc5
--- /dev/null
+++ b/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx ZynqMP K26/KV260 SD wiring
+ *
+ * (C) Copyright 2020, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+/* SD0 only supports 3.3V, no level shifter */
+&sdhci1 { /* on CC - MIO 39 - 51 */
+ status = "okay";
+ no-1-8-v;
+ disable-wp;
+ broken-cd;
+ xlnx,mio-bank = <1>;
+ /* Do not run SD in HS mode from bootloader */
+ sdhci-caps-mask = <0 0x200000>;
+ sdhci-caps = <0 0>;
+ max-frequency = <19000000>;
+};