diff options
author | ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4> | 2019-09-25 13:48:29 +0000 |
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committer | ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4> | 2019-09-25 13:48:29 +0000 |
commit | be17627e88d18ea90a94a397ca213e349da30beb (patch) | |
tree | 73028e353e14c4709d0498484e031c1f2810f6e5 | |
parent | e10d71312dc212aad8e5cfee0a0bad8a44922e7b (diff) |
[arm] Fix use of CRC32 intrinsics with Armv8-a and hard-float
Backport from mainline
2019-08-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm_acle.h: Use arch=armv8-a+crc+simd pragma for CRC32
intrinsics if __ARM_FP.
Use __ARM_FEATURE_CRC32 ifdef guard.
* gcc.target/arm/acle/crc_hf_1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-9-branch@276126 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 9 | ||||
-rw-r--r-- | gcc/config/arm/arm_acle.h | 8 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c | 14 |
4 files changed, 36 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 53726d633fe..b4cd6e269b9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2019-09-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + Backport from mainline + 2019-08-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm_acle.h: Use arch=armv8-a+crc+simd pragma for CRC32 + intrinsics if __ARM_FP. + Use __ARM_FEATURE_CRC32 ifdef guard. + 2019-09-23 Max Filippov <jcmvbkbc@gmail.com> Backport from mainline diff --git a/gcc/config/arm/arm_acle.h b/gcc/config/arm/arm_acle.h index 2c7acc698ea..6857ab1787d 100644 --- a/gcc/config/arm/arm_acle.h +++ b/gcc/config/arm/arm_acle.h @@ -174,8 +174,12 @@ __arm_mrrc2 (const unsigned int __coproc, const unsigned int __opc1, #endif /* (!__thumb__ || __thumb2__) && __ARM_ARCH >= 4. */ #pragma GCC push_options -#if __ARM_ARCH >= 8 +#ifdef __ARM_FEATURE_CRC32 +#ifdef __ARM_FP +#pragma GCC target ("arch=armv8-a+crc+simd") +#else #pragma GCC target ("arch=armv8-a+crc") +#endif __extension__ static __inline uint32_t __attribute__ ((__always_inline__)) __crc32b (uint32_t __a, uint8_t __b) @@ -235,7 +239,7 @@ __crc32cd (uint32_t __a, uint64_t __b) } #endif -#endif /* __ARM_ARCH >= 8. */ +#endif /* __ARM_FEATURE_CRC32 */ #pragma GCC pop_options #ifdef __cplusplus diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d48010f8921..71b6ec52fcd 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2019-09-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + Backport from mainline + 2019-08-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * gcc.target/arm/acle/crc_hf_1.c: New test. + 2019-09-21 Paul Thomas <pault@gcc.gnu.org> Backport from mainline diff --git a/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c b/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c new file mode 100644 index 00000000000..e6cbfc0b33e --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c @@ -0,0 +1,14 @@ +/* Test that using an Armv8-a hard-float target doesn't + break CRC intrinsics. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-options "-mfloat-abi=hard -march=armv8-a+simd+crc" } */ + +#include <arm_acle.h> + +uint32_t +foo (uint32_t a, uint32_t b) +{ + return __crc32cw (a, b); +} |