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path: root/gcc/config/arm/cortex-a57.md
AgeCommit message (Expand)Author
2019-09-17[arm][aarch64] Make no_insn issue to nothingrsandifo
2019-07-09[arm]: redefine aes patternsktkachov
2019-07-02[arm/AArch64] Assume unhandled NEON types are neon_arith_basic types when sch...ktkachov
2019-01-01 Update copyright years.jakub
2018-11-26[arm][1/3] Rename mul64 attr to widen_mul64ktkachov
2018-01-03 Update copyright years.jakub
2017-09-12[Mechanical Patch ARM/AArch64 1/2] Rename load/store scheduling types to enco...jgreenhalgh
2017-06-21 * config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi)naveenh
2017-01-01 Update copyright years.jakub
2016-11-14The second patch updates the Cortex-A57 scheduler now that we can differentiatewilco
2016-11-14Currently the SBFM, UBFM and BFM instructions all use the attribute "bfm".wilco
2016-06-20The Cortex-A57 scheduler is missing fcsel, so add it.wilco
2016-06-09[AArch64] Model CSEL instruction in Cortex-A57 scheduling modelktkachov
2016-02-15Add support for the FCCMP insn typesevandro
2016-02-11 * cgraph.c: Spelling fixes - behaviour -> behavior andjakub
2016-02-10Enable instruction fusion of dependent AESE; AESMC and AESD; AESIMC pairs.wilco
2016-01-04 Update copyright years.jakub
2015-09-29add separate insn sched class for vector LDP & STPspop
2015-09-28[Patch 1/2 AArch64/ARM] Give AArch64 ROR (Immediate) a new type attributejgreenhalgh
2015-03-11Add missing definition crypto_sha256_fast, crypto_sha256_slowspop
2015-01-16[AArch64, Obvious] Fix broken commit r219724jgreenhalgh
2015-01-16[AArch64] Add a new scheduling description for the ARM Cortex-A57 processorjgreenhalgh