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path: root/gcc/config/rs6000/rs6000.md
AgeCommit message (Expand)Author
2019-10-16[arm] fix bootstrap failure due to uninitialized warningrearnsha
2019-09-24[Darwin, PPC, Mode Iterators 0/n] Make iterators visible to darwin.md.iains
2019-09-06rs6000: Delete UNSPEC_MV_CR_OV.segher
2019-09-06rs6000: Delete UNSPEC_FRSPsegher
2019-08-22rs6000: Use unspec_volatile for darn (PR91481)segher
2019-08-22rs6000: Move various non-vector things out of altivec.mdsegher
2019-08-02Add future.md.meissner
2019-07-16[rs6000] Fix ambiguous .md attribute usesrsandifo
2019-07-07rs6000: Delete Ffresegher
2019-07-032019-07-03 Michael Meissner <meissner@linux.ibm.com>meissner
2019-07-01@signbit<mode>2_dmsegher
2019-07-01@ieee_128bit_vsx_abs<mode>2segher
2019-07-01@ieee_128bit_vsx_neg<mode>2segher
2019-07-01@abs<mode>2_hwsegher
2019-07-01@neg<mode>2_hwsegher
2019-07-01@extenddf<mode>2segher
2019-07-01@extenddf<mode>2_{fprs,vsx}segher
2019-07-01@eh_set_lr_<mode>segher
2019-07-01@ctr<mode>segher
2019-07-01@indirect_jump<mode>_nospecsegher
2019-07-01@abs<mode>2_internalsegher
2019-07-01@fix_trunc<mode>si2_fprssegher
2019-07-01@neg<mode>2segher
2019-06-28Fix PR target/91009meissner
2019-06-272019-06-27 Aaron Sawdey <acsawdey@linux.ibm.com>acsawdey
2019-06-26[RS6000] Change maddld match_operand from DI to GPRhelijia
2019-06-202019-06-20 Michael Meissner <meissner@linux.ibm.com>meissner
2019-06-15rs6000: New iterator CCEITHERsegher
2019-06-04rs6000: Add p9kf and p9tf isa valuessegher
2019-06-04rs6000: <VSs> -> <sd>psegher
2019-06-04rs6000: ww -> wasegher
2019-06-04rs6000: Remove Ftrad, Fvsx, Fs; add s and sdsegher
2019-06-04rs6000: wf -> wasegher
2019-06-04rs6000: wd -> wasegher
2019-06-04rs6000: Delete Fv2segher
2019-06-04rs6000: ws -> wasegher
2019-06-04rs6000: wv -> v+p7vsegher
2019-06-04rs6000: wi->wa, wt->wasegher
2019-06-03rs6000: Delete -mmfpgprsegher
2019-06-03rs6000: Delete wgsegher
2019-05-29[gcc]wschmidt
2019-05-23Add infrastructure to support -mcpu=future to represent a futurewschmidt
2019-05-21rs6000: wz -> d+p7segher
2019-05-21rs6000: wl -> d+p6segher
2019-05-21rs6000: wk -> ws+p8vsegher
2019-05-21rs6000: wj -> wi+p8vsegher
2019-05-21rs6000: wh -> d+p8vsegher
2019-05-20rs6000: Delete the "wH" and "wI" constraintssegher
2019-05-20rs6000: Delete the "wy" constraintsegher
2019-05-20rs6000: Delete the "wu" constraintsegher
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