diff options
author | Hale Wang <hale.wang@arm.com> | 2015-06-03 07:17:23 +0000 |
---|---|---|
committer | Hale Wang <hale.wang@arm.com> | 2015-06-03 07:17:23 +0000 |
commit | 2d3a50a61eb9edec4000f8443a83a53781617773 (patch) | |
tree | dac5de5d3369b0f100c35d171e7190b412a01819 | |
parent | ed9c37f39821d0bca4a5e4579062636ee6fce316 (diff) |
2015-06-03 Hale Wang <hale.wang@arm.com>ARM/embedded-4_9-branch
Backport from mainline r222306
2015-04-22 Hale Wang <hale.wang@arm.com>
Terry Guo <terry.guo@arm.com>
PR rtl-optimization/64818
* combine.c (can_combine_p): Don't combine user-specified
register if it is in an asm input.
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ARM/embedded-4_9-branch@224057 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog.arm | 10 | ||||
-rw-r--r-- | gcc/combine.c | 9 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/pr64818.c | 30 |
3 files changed, 49 insertions, 0 deletions
diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm index f23ce181570..0c3bb27f9c7 100644 --- a/gcc/ChangeLog.arm +++ b/gcc/ChangeLog.arm @@ -1,3 +1,13 @@ +2015-06-03 Hale Wang <hale.wang@arm.com> + + Backport from mainline r222306 + 2015-04-22 Hale Wang <hale.wang@arm.com> + Terry Guo <terry.guo@arm.com> + + PR rtl-optimization/64818 + * combine.c (can_combine_p): Don't combine user-specified + register if it is in an asm input. + 2015-03-02 Terry Guo <terry.guo@arm.com> Backport from mainline r220999 diff --git a/gcc/combine.c b/gcc/combine.c index adea2c161b6..7df85f24847 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -1835,6 +1835,15 @@ can_combine_p (rtx insn, rtx i3, rtx pred ATTRIBUTE_UNUSED, set = expand_field_assignment (set); src = SET_SRC (set), dest = SET_DEST (set); + /* Do not eliminate user-specified register if it is in an + asm input because we may break the register asm usage defined + in GCC manual if allow to do so. + Be aware that this may cover more cases than we expect but this + should be harmless. */ + if (REG_P (dest) && REG_USERVAR_P (dest) && HARD_REGISTER_P (dest) + && extract_asm_operands (PATTERN (i3))) + return 0; + /* Don't eliminate a store in the stack pointer. */ if (dest == stack_pointer_rtx /* Don't combine with an insn that sets a register to itself if it has diff --git a/gcc/testsuite/gcc.target/arm/pr64818.c b/gcc/testsuite/gcc.target/arm/pr64818.c new file mode 100644 index 00000000000..bddd8462c69 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr64818.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +char temp[16]; +extern int foo1 (void); + +void foo (void) +{ + int i; + int len; + + while (1) + { + len = foo1 (); + register int a asm ("r0") = 5; + register char *b asm ("r1") = temp; + register int c asm ("r2") = len; + asm volatile ("mov %[r0], %[r0]\n mov %[r1], %[r1]\n mov %[r2], %[r2]\n" + : "+m"(*b) + : [r0]"r"(a), [r1]"r"(b), [r2]"r"(c)); + + for (i = 0; i < len; i++) + { + if (temp[i] == 10) + return; + } + } +} + +/* { dg-final { scan-assembler "\[\\t \]+mov\ r1,\ r1" } } */ |