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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2015-01-14 00:20:14 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@linux.vnet.ibm.com> | 2015-01-14 00:20:14 +0000 |
| commit | 9b1ac9a70e66b7ad3e33aea153419aa2ec52d587 (patch) | |
| tree | 3ab6aa48f2051fbc01259540215f3fc1a4ff7a28 | |
| parent | 5d930cdb09eac12696e27c5d35b90fb188202432 (diff) | |
checkpointibm/fusion2
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ibm/fusion2@219570 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog.meissner | 5 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 30 |
2 files changed, 20 insertions, 15 deletions
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index d32190dca4b..f22dab66a7f 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,8 @@ +2015-01-13 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/rs6000.md (addis + gpr store peephole): Disable + for now. + 2015-01-12 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/predicates.md (upper16_cint_operand): New diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 689fd401c1c..66a254541f3 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -13857,19 +13857,6 @@ DONE; }) -(define_peephole2 - [(set (match_operand:P 0 "base_reg_operand" "") - (match_operand:P 1 "fusion_gpr_addis" "")) - (set (match_operand:GPR_STORE 2 "offsettable_mem_operand" "") - (match_operand:GPR_STORE 3 "int_reg_operand" ""))] - "TARGET_FUSION_EXTRA && peep2_reg_dead_p (2, operands[0]) - && fusion_extra_p (operands[0], operands[1], operands[2], operands[3])" - [(const_int 0)] -{ - expand_fusion_extra_store (operands); - DONE; -}) - ;; Merge addis with floating load of constants when fast math is used. Fast ;; math currently generates addis/addi and then the load of the constant from ;; the register, instead of doing the addi as part of the load. However, if @@ -13882,7 +13869,7 @@ (match_operand:P 2 "" ""))) (set (match_operand:SFDF 3 "fpr_reg_operand" "") (match_operand:SFDF 4 "offsettable_mem_operand" ""))] - "TARGET_FUSION_EXTRA && rtx_equal_p (operands[0], XEXP (operands[4], 0)) + "0 && TARGET_FUSION_EXTRA && rtx_equal_p (operands[0], XEXP (operands[4], 0)) && peep2_reg_dead_p (3, operands[0])" [(const_int 0)] { @@ -13907,7 +13894,7 @@ (match_operand:P 2 "" ""))) (set (match_operand:DF 3 "fpr_reg_operand" "") (float_extend:DF (match_operand:SF 4 "offsettable_mem_operand" "")))] - "TARGET_FUSION_EXTRA && rtx_equal_p (operands[0], XEXP (operands[4], 0)) + "0 && TARGET_FUSION_EXTRA && rtx_equal_p (operands[0], XEXP (operands[4], 0)) && peep2_reg_dead_p (3, operands[0])" [(const_int 0)] { @@ -13926,6 +13913,19 @@ }) (define_peephole2 + [(set (match_operand:P 0 "base_reg_operand" "") + (match_operand:P 1 "fusion_gpr_addis" "")) + (set (match_operand:GPR_STORE 2 "offsettable_mem_operand" "") + (match_operand:GPR_STORE 3 "int_reg_operand" ""))] + "0 && TARGET_FUSION_EXTRA && peep2_reg_dead_p (2, operands[0]) + && fusion_extra_p (operands[0], operands[1], operands[2], operands[3])" + [(const_int 0)] +{ + expand_fusion_extra_store (operands); + DONE; +}) + +(define_peephole2 [(set (match_operand:SDI 0 "int_reg_operand" "") (match_operand:SDI 1 "upper16_cint_operand" "")) (set (match_dup 0) |