tidied up with no regressions of my regression testingibm/ltc99327

git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ibm/ltc99327@256379 138bc75d-0d04-0410-961f-82ee72b054a4

10 files changed, 45 insertions, 1609 deletions

diff --git a/gcc/config/rs6000/rs6000-p8swap.c b/gcc/config/rs6000/rs6000-p8swap.c
index 9a89f50d8cf..249746682a7 100644
--- a/gcc/config/rs6000/rs6000-p8swap.c
+++ b/gcc/config/rs6000/rs6000-p8swap.c
@@ -333,27 +333,13 @@ rs6000_sum_of_two_registers_p (const_rtx expr)
     {
       const_rtx operand1 = XEXP (expr, 0);
       const_rtx operand2 = XEXP (expr, 1);
-      if (dump_file) {
-	fprintf (dump_file,
-		 "rs6000_sum_of_two_registers_p looking at operand 1 (%s):\n",
-		 REG_P (operand1)? "REG_P": "!REG_P");
-	print_inline_rtx (dump_file, operand1, 2);
-	fprintf (dump_file, "\nand operand2 (%s):\n",
-		 REG_P (operand2)? "REG_P": "!REG_P");
-	print_inline_rtx (dump_file, operand2, 2);
-	fprintf (dump_file, "\n");
-      }
       return (REG_P (operand1) && REG_P (operand2));
     }
-  if (dump_file) {
-    fprintf (dump_file,
-	     "!PLUS: returning false from rs6000_sum_of_two_registers_p\n");
-  }
   return false;
 }
 
 /* Return true iff expr represents an address expression that masks off
- * the low-order 4 bits in the style of an lvx or stvx rtl pattern.  */
+   the low-order 4 bits in the style of an lvx or stvx rtl pattern.  */
 bool
 rs6000_quadword_masked_address_p (const_rtx expr)
 {
@@ -361,27 +347,10 @@ rs6000_quadword_masked_address_p (const_rtx expr)
     {
       const_rtx operand1 = XEXP (expr, 0);
       const_rtx operand2 = XEXP (expr, 1);
-      if (dump_file)
-	{
-	  fprintf (dump_file, "rs6000_quadword_masked_address_p operand 1:\n");
-	  print_inline_rtx (dump_file, operand1, 2);
-	  fprintf (dump_file, "\nand operand2:\n");
-	  print_inline_rtx (dump_file, operand2, 2);
-	  fprintf (dump_file, "\n");
-	}
-      if (REG_P (operand2) || rs6000_sum_of_two_registers_p (operand2))
-	{
-	  if (CONST_SCALAR_INT_P (operand1) && INTVAL (operand1) == -16)
-	    {
-	      if (dump_file)
-		fprintf (dump_file, "returning true\n");
-	      return true;
-	    }
-	}
+      if ((REG_P (operand2) || rs6000_sum_of_two_registers_p (operand2))
+	  && CONST_SCALAR_INT_P (operand1) && INTVAL (operand1) == -16)
+	return true;
     }
-  if (dump_file)
-    fprintf (dump_file,
-	     "returning false from rs6000_quadword_masked_address_p\n");
   return false;
 }
 
@@ -390,20 +359,9 @@ rs6000_quadword_masked_address_p (const_rtx expr)
 static bool
 quad_aligned_load_p (swap_web_entry *insn_entry, rtx_insn *insn)
 {
-  if (dump_file)
-    {
-      fprintf (dump_file, "made it to quad_aligned_load_p with insn:\n");
-      print_inline_rtx (dump_file, insn, 2);
-      fprintf (dump_file, "\n");
-    }
-
   unsigned uid = INSN_UID (insn);
   if (!insn_entry[uid].is_swap || insn_entry[uid].is_load)
-    {
-      if (dump_file)
-	fprintf (dump_file, " quad_aligned_load_p returning false (A)\n\n");
-      return false;
-    }
+    return false;
 
   struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
 
@@ -425,18 +383,7 @@ quad_aligned_load_p (swap_web_entry *insn_entry, rtx_insn *insn)
   /* We're looking for a load-with-swap insn.  If this is not that,
      return false.  */
   if (!insn_entry[uid2].is_load || !insn_entry[uid2].is_swap)
-    {
-      if (dump_file)
-	fprintf (dump_file, " quad_aligned_load_p returning false (B)\n\n");
-      return false;
-    }
-
-  if (dump_file)
-    {
-      fprintf (dump_file, "Input to swap is load-with-swap\n");
-      print_inline_rtx (dump_file, def_insn, 2);
-      fprintf (dump_file, "\n");
-    }
+    return false;
 
   /* If the source of the rtl def is not a set from memory, return
      false.  */
@@ -444,30 +391,10 @@ quad_aligned_load_p (swap_web_entry *insn_entry, rtx_insn *insn)
   if (GET_CODE (body) != SET
       || GET_CODE (SET_SRC (body)) != VEC_SELECT
       || GET_CODE (XEXP (SET_SRC (body), 0)) != MEM)
-    {
-      if (dump_file)
-	fprintf (dump_file, " quad_aligned_load_p returning false (C)\n\n");
-      return false;
-    }
+    return false;
 
   rtx mem = XEXP (SET_SRC (body), 0);
-
-  /* note: i was previously not confirming that mem is regp */
   rtx base_reg = XEXP (mem, 0);
-
-  if (dump_file)
-    {
-      fprintf (dump_file, "mem is ");
-      print_inline_rtx (dump_file, mem, 2);
-      fprintf (dump_file, "\n MEM_ALIGN (mem) is %d\n", MEM_ALIGN (mem));
-      fprintf (dump_file, "base_reg is ");
-      print_inline_rtx (dump_file, base_reg, 2);
-      fprintf (dump_file, "\n");
-      fprintf (dump_file, " quad_aligned_load_p returning %s\n\n",
-	       ((REG_P (base_reg) || rs6000_sum_of_two_registers_p (base_reg))
-		&& MEM_ALIGN (mem) >= 128)? "true": "false");
-    }
-
   return ((REG_P (base_reg) || rs6000_sum_of_two_registers_p (base_reg))
 	  && MEM_ALIGN (mem) >= 128)? true: false;
 }
@@ -477,50 +404,19 @@ quad_aligned_load_p (swap_web_entry *insn_entry, rtx_insn *insn)
 static bool
 quad_aligned_store_p (swap_web_entry *insn_entry, rtx_insn *insn)
 {
-  if (dump_file)
-    {
-      fprintf (dump_file, "made it to quad_aligned_store_p with insn:\n");
-      print_inline_rtx (dump_file, insn, 2);
-      fprintf (dump_file, "\n");
-    }
-  
   unsigned uid = INSN_UID (insn);
   if (!insn_entry[uid].is_swap || !insn_entry[uid].is_store)
-    {
-      if (dump_file)
-	fprintf (dump_file, " quad_aligned_store_p returning false (A)\n\n");
-      return false;
-    }
+    return false;
 
   rtx body = PATTERN (insn);
-  if (dump_file) {
-    fprintf (dump_file, "body is: ");
-    print_inline_rtx (dump_file, body, 2);
-    fprintf (dump_file, "\n");
-  }
   rtx dest_address = XEXP (SET_DEST (body), 0);
-  if (dump_file) {
-    fprintf (dump_file, "dest_address is: ");
-    print_inline_rtx (dump_file, dest_address, 2);
-    fprintf (dump_file, "\n");
-  }
   rtx swap_reg = XEXP (SET_SRC (body), 0);
-  if (dump_file) {
-    fprintf (dump_file, "swap_reg is: ");
-    print_inline_rtx (dump_file, swap_reg, 2);
-    fprintf (dump_file, "\n");
-  }
 
   /* If the base address for the memory expression is not represented
      by a single register and is not the sum of two registers, punt.  */
   if (!REG_P (dest_address) && !rs6000_sum_of_two_registers_p (dest_address))
     return false;
 
-  /* kelvin thinks maybe he should punt if !REG_P (swap_reg) */
-  if (dump_file) {
-    fprintf (dump_file, "swap_reg is %sREG_P ()\n", REG_P (swap_reg)? "": "!");
-  }
-
   /* Confirm that the value to be stored is produced by a swap
      instruction.  */
   struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
@@ -529,119 +425,38 @@ quad_aligned_store_p (swap_web_entry *insn_entry, rtx_insn *insn)
     {
       struct df_link *def_link = DF_REF_CHAIN (use);
 
-      if (dump_file)
-	{
-	  fprintf (dump_file, "looking at a use:\n");
-	  df_ref_debug (use, dump_file);
-	}
-
       /* if this is not the definition of the candidate swap register,
 	 then skip it.  I am interested in a different definition.  */
       if (!rtx_equal_p (DF_REF_REG (use), swap_reg))
-	{
-	  if (dump_file)
-	      fprintf (dump_file,
-		       " ... continue loop because use is uninteresting\n");
-	  continue;
-	}
-      
-      if (dump_file)
-	{
-	  fprintf (dump_file,
-		   " ... so I think I found the def i'm interested in\n");
-	}
+	continue;
 
       /* If there is no def or the def is artifical or there are
 	 multiple defs, punt.  */ 
       if (!def_link || !def_link->ref || DF_REF_IS_ARTIFICIAL (def_link->ref)
 	  || def_link->next)
-	{
-	  if (dump_file)
-	    {
-	      fprintf (dump_file, "premature departure\n");
-	      fprintf (dump_file, "def_link: %llx\n",
-		       (unsigned long long) def_link);
-	      if (def_link) {
-		fprintf (dump_file, "def_link->ref: %llx\n",
-			 (unsigned long long) def_link->ref);
-		if (def_link->ref) {
-		  fprintf (dump_file, " (which is%s artificial)\n",
-			   DF_REF_IS_ARTIFICIAL (def_link->ref)? "": " not");
-
-		  rtx def_insn = DF_REF_INSN (def_link->ref);
-		  unsigned uid2 = INSN_UID (def_insn);
-		  fprintf (dump_file, "looking at def_insn (%s, %s, %s)\n",
-			   insn_entry[uid2].is_load? "is_load": "!is_load",
-			   insn_entry[uid2].is_store? "is_store": "!is_store",
-			   insn_entry[uid2].is_swap? "is_swap": "!is_swap");
-		  print_inline_rtx (dump_file, def_insn, 2);
-		  fprintf (dump_file, "\n");
-		}
-		if (def_link->next)
-		  fprintf (dump_file, "def_link->next: %llx\n",
-			   (unsigned long long) def_link->next);
-	      }
-	    }
-	  return false;
-	}
+	return false;
 
       rtx def_insn = DF_REF_INSN (def_link->ref);
       unsigned uid2 = INSN_UID (def_insn);
-      
-      if (dump_file)
-	{
-	  fprintf (dump_file, "looking at def_insn (%s, %s, %s)\n",
-		   insn_entry[uid2].is_load? "is_load": "!is_load",
-		   insn_entry[uid2].is_store? "is_store": "!is_store",
-		   insn_entry[uid2].is_swap? "is_swap": "!is_swap");
-	  print_inline_rtx (dump_file, def_insn, 2);
-	  fprintf (dump_file, "\n");
-	}
 
       /* If this source value is not a simple swap, return false */
       if (!insn_entry[uid2].is_swap || insn_entry[uid2].is_load
 	  || insn_entry[uid2].is_store)
-	{
-	  if (dump_file)
-	    fprintf (dump_file,
-		     " returning false because not a simple swap\n");
-	  return false;
-	}
+	return false;
+
       /* I've processed the use that I care about, so break out of
 	 this loop.  */
       break;
     }
 
-  if (dump_file)
-    {
-      fprintf (dump_file, "outside loop, about to try single_set\n");
-    }
-
   /* At this point, we know the source data comes from a swap.  The
      remaining question is whether the memory address is aligned.  */
-
   rtx set = single_set (insn);
   if (set)
     {
       rtx dest = SET_DEST (set);
       if (MEM_P (dest))
-	{
-	  if (dump_file)
-	    {
-	      fprintf (dump_file, "dest: ");
-	      print_inline_rtx (dump_file, dest, 2);
-	      fprintf (dump_file, "\n MEM_ALIGN (SET_DEST (body)) is %d\n",
-		       MEM_ALIGN (dest));
-	      fprintf (dump_file, " quad_aligned_store_p returning %s\n\n",
-		       (MEM_ALIGN (dest) >= 128)? "true": "false");
-	    }
-	  return (MEM_ALIGN (dest) >= 128)? true: false;
-	}
-    }
-  if (dump_file)
-    {
-      fprintf (dump_file, " quad_aligned_store_p returning false\n");
-      fprintf (dump_file, "  (not single set or not mem_p)\n");
+	return (MEM_ALIGN (dest) >= 128);
     }
   return false;
 }
@@ -659,20 +474,13 @@ const_load_sequence_p (swap_web_entry *insn_entry, rtx insn)
 
   struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
   df_ref use;
-  /* kelvin says we're iterating over the definitions that are used by
-     this insn.  Since this is a swap insn, I really expect only one
-     used definition.  kelvin confirmed this by examining
-     replace_swapped_load_constant and observing that it treats
-     the same insn argument as having only one used definition. */
+
+  /* Iterate over the definitions that are used by this insn.  Since
+     this is known to be a swap insn, expect only one used definnition.  */
   FOR_EACH_INSN_INFO_USE (use, insn_info)
     {
-      /* kelvin says use is one of the variables that this insn makes
-	 use of.  def_link tells me where this variable is defined.  */
       struct df_link *def_link = DF_REF_CHAIN (use);
 
-      /* for kelvin's purposes, let's still enforce that there's only
-	 one def and it's not artificial.  */
-
       /* If there is no def or the def is artificial or there are
 	 multiple defs, punt.  */
       if (!def_link || !def_link->ref || DF_REF_IS_ARTIFICIAL (def_link->ref)
@@ -694,10 +502,8 @@ const_load_sequence_p (swap_web_entry *insn_entry, rtx insn)
 	return false;
 
       rtx mem = XEXP (SET_SRC (body), 0);
-      /*  kelvin wants to test right here that mem is properly
-	  aligned.  if so, he wants to return true.  is there any
-	  reason to do the additional analysis that follows?  */
       rtx base_reg = XEXP (mem, 0);
+
       /* If the base address for the memory expression is not
 	 represented by a register, punt.  */
       if (!REG_P (base_reg))
@@ -705,11 +511,6 @@ const_load_sequence_p (swap_web_entry *insn_entry, rtx insn)
 
       df_ref base_use;
       insn_info = DF_INSN_INFO_GET (def_insn);
-      /* kelvin thinks we're now iterating through all the uses that feed
-	 into the load subexpression in search of the rtl that
-	 represents the base_reg.  We're going to enforce some
-	 constraints on this expression.  kelvin believes he doesn't
-	 care about this in his aligned_store predicate test.  */
       FOR_EACH_INSN_INFO_USE (base_use, insn_info)
 	{
 	  /* If base_use does not represent base_reg, look for another
@@ -1658,6 +1459,8 @@ replace_swap_with_copy (swap_web_entry *insn_entry, unsigned i)
   insn->set_deleted ();
 }
 
+/* Make NEW_MEM_EXP's attributes and flags resemble those of
+   ORIGINAL_MEM_EXP.  */
 static void
 mimic_memory_attributes_and_flags (rtx new_mem_exp, const_rtx original_mem_exp)
 {
@@ -1701,16 +1504,6 @@ mimic_memory_attributes_and_flags (rtx new_mem_exp, const_rtx original_mem_exp)
     }
   else
     clear_mem_size (new_mem_exp);
-
-  if (dump_file) {
-    fprintf (dump_file,
-	     "in mimic_memory_attributes_and_flags, original memory exp\n");
-    print_inline_rtx (dump_file, original_mem_exp, 2);
-    fprintf (dump_file, "\n");
-    fprintf (dump_file, " new memory exp (may crash during output)\n");
-    print_inline_rtx (dump_file, new_mem_exp, 2);
-    fprintf (dump_file, "\n");
-  }
 }
 
 /* Generate an rtx expression to represent use of the stvx insn to store
@@ -1718,31 +1511,14 @@ mimic_memory_attributes_and_flags (rtx new_mem_exp, const_rtx original_mem_exp)
    DEST_EXP, with vector mode MODE.  */
 rtx
 rs6000_gen_stvx (enum machine_mode mode, rtx dest_exp, rtx src_exp) {
-  /* replace this swapping-store insn with a stvx insn */
-  /*  see the stvx rtl pattern from vsx.md.  */
-
   rtx memory_address = XEXP (dest_exp, 0);
   rtx stvx;
-  
-  if (dump_file)
-    {
-      fprintf (dump_file, "in rs6000_gen_stvx (), dest_exp is\n");
-      print_inline_rtx (dump_file, dest_exp, 2);
-      fprintf (dump_file, "\n");
-      fprintf (dump_file, "memory_address is\n");
-      print_inline_rtx (dump_file, memory_address, 2);
-      fprintf (dump_file, "\n");
-    }
 
   if (rs6000_sum_of_two_registers_p (memory_address))
     {
       rtx op1, op2;
       op1 = XEXP (memory_address, 0);
       op2 = XEXP (memory_address, 1);
-      
-      if (dump_file)
-	fprintf (dump_file, "Using the 2op form of stvx\n");
-      
       if (mode == V16QImode)
 	stvx = gen_altivec_stvx_v16qi_2op (src_exp, op1, op2);
       else if (mode == V8HImode)
@@ -1790,30 +1566,18 @@ rs6000_gen_stvx (enum machine_mode mode, rtx dest_exp, rtx src_exp) {
 	gcc_unreachable ();
     }
 
-  /* kelvin may rewrite the following code to use change_address.  As
-     such, we can eliminate the mimic_memory_attributes_and_flags
-     function.  */
   rtx new_mem_exp = SET_DEST (stvx);
   mimic_memory_attributes_and_flags (new_mem_exp, dest_exp);
-
   return stvx;
 }
 
-/* Given that store_insn represents an aligned store-with-swap of a
+/* Given that STORE_INSN represents an aligned store-with-swap of a
    swapped value, replace the store with an aligned store (without
    swap) and replace the swap with a copy insn.  */
 static void
 replace_swapped_aligned_store (swap_web_entry *insn_entry,
 			       rtx_insn *store_insn)
 {
-  if (dump_file)
-    {
-      fprintf (dump_file,
-	       "made it to replace_swapped_aligned_store, store insn is:\n");
-      print_inline_rtx (dump_file, store_insn, 2);
-      fprintf (dump_file, "\n");
-    }
-
   unsigned uid = INSN_UID (store_insn);
   gcc_assert (insn_entry[uid].is_swap && insn_entry[uid].is_store);
 
@@ -1837,30 +1601,20 @@ replace_swapped_aligned_store (swap_web_entry *insn_entry,
 	 then skip it.  I am only interested in the swap insnd.  */
       if (!rtx_equal_p (DF_REF_REG (use), swap_reg))
 	continue;
-      
+
       /* If there is no def or the def is artifical or there are
-	 multiple defs, we should not be here.  */ 
+	 multiple defs, we should not be here.  */
       gcc_assert (def_link && def_link->ref && !def_link->next
 		  && !DF_REF_IS_ARTIFICIAL (def_link->ref));
 
       swap_insn = DF_REF_INSN (def_link->ref);
       uid2 = INSN_UID (swap_insn);
- 
-      if (dump_file)
-	{
-	  fprintf (dump_file, "Found swap_insn (%s, %s, %s)\n",
-		   insn_entry[uid2].is_load? "is_load": "!is_load",
-		   insn_entry[uid2].is_store? "is_store": "!is_store",
-		   insn_entry[uid2].is_swap? "is_swap": "!is_swap");
-	  print_inline_rtx (dump_file, swap_insn, 2);
-	  fprintf (dump_file, "\n");
-	}
 
       /* If this source value is not a simple swap, we should not be here.  */
       gcc_assert (insn_entry[uid2].is_swap && !insn_entry[uid2].is_load
 		  && !insn_entry[uid2].is_store);
 
-      /* I've processed the use that I care about, so break out of
+      /* We've processed the use we care about, so break out of
 	 this loop.  */
       break;
     }
@@ -1876,28 +1630,10 @@ replace_swapped_aligned_store (swap_web_entry *insn_entry,
   gcc_assert (MEM_P (dest_exp));
   gcc_assert (MEM_ALIGN (dest_exp) >= 128);
 
-  if (dump_file)
-    {
-      fprintf (dump_file, "The original body expression\n");
-      print_inline_rtx (dump_file, body, 2);
-      fprintf (dump_file, "\n");
-      fprintf (dump_file, "The original dest_exp before stvx replace is:\n");
-      print_inline_rtx (dump_file, dest_exp, 2);
-      fprintf (dump_file, "\n");
-      fprintf (dump_file, "The effective address is\n");
-      print_inline_rtx (dump_file, dest_address, 2);
-      fprintf (dump_file, "\n");
-      fprintf (dump_file, "The source expression is\n");
-      print_inline_rtx (dump_file, src_exp, 2);
-      fprintf (dump_file, "\n");
-    }
-
   /* Replace the copy with a new insn.  */
   rtx stvx;
   stvx = rs6000_gen_stvx (mode, dest_exp, src_exp);
 
-  /* The following block of code was copied from replace_swapped_aligned_load,
-     Needs to be integrated into this new context.  */
   rtx_insn *new_insn = emit_insn_before (stvx, store_insn);
   rtx new_body = PATTERN (new_insn);
 
@@ -1907,26 +1643,10 @@ replace_swapped_aligned_store (swap_web_entry *insn_entry,
   set_block_for_insn (new_insn, BLOCK_FOR_INSN (store_insn));
   df_insn_rescan (new_insn);
 
-  if (dump_file)
-    {
-      unsigned int new_uid = INSN_UID (new_insn);
-      fprintf (dump_file,
-	       "Replacing swapped-store %d with store %d\n", uid, new_uid);
-    }
-
   df_insn_delete (store_insn);
   remove_insn (store_insn);
   store_insn->set_deleted ();
 
-  if (dump_file)
-    {
-      fprintf (dump_file, "The modified stvx insn is\n");
-      print_inline_rtx (dump_file, new_insn, 2);
-      fprintf (dump_file, "\n");
-    }
-
-  /* This code was also copied from replace_swapped_aligned_load and also
-   * needs to be integrated into this new context.  */
   /* Replace the swap with a copy.  */
   uid2 = INSN_UID (swap_insn);
   mark_swaps_for_removal (insn_entry, uid2);
@@ -1947,9 +1667,6 @@ rs6000_gen_lvx (enum machine_mode mode, rtx dest_exp, rtx src_exp)
       op1 = XEXP (memory_address, 0);
       op2 = XEXP (memory_address, 1);
 
-      if (dump_file)
-	fprintf (dump_file, "Using the 2op form of lvx\n");
-
       if (mode == V16QImode)
 	lvx = gen_altivec_lvx_v16qi_2op (dest_exp, op1, op2);
       else if (mode == V8HImode)
@@ -1970,7 +1687,7 @@ rs6000_gen_lvx (enum machine_mode mode, rtx dest_exp, rtx src_exp)
 	lvx = gen_altivec_lvx_v1ti_2op (dest_exp, op1, op2);
       else
 	/* KFmode, TFmode, other modes not expected in this context.  */
-	gcc_unreachable ();    
+	gcc_unreachable ();
     }
   else				/* REG_P (memory_address) */
     {
@@ -1997,29 +1714,18 @@ rs6000_gen_lvx (enum machine_mode mode, rtx dest_exp, rtx src_exp)
 	gcc_unreachable ();    
     }
 
-  /* kelvin may rewrite the following code to use change_address.  As
-     such, we can eliminate the mimic_memory_attributes_and_flags
-     function.  */
   rtx new_mem_exp = SET_SRC (lvx);
   mimic_memory_attributes_and_flags (new_mem_exp, src_exp);
 
   return lvx;
 }
 
-/* Given that swap_insn represents a swap of an aligned
+/* Given that SWAP_INSN represents a swap of an aligned
    load-with-swap, replace the load with an aligned load (without
    swap) and replace the swap with a copy insn.  */
 static void
 replace_swapped_aligned_load (swap_web_entry *insn_entry, rtx swap_insn)
 {
-  if (dump_file)
-    {
-      fprintf (dump_file,
-	       "made it to replace_swapped_aligned_load, insn is:\n");
-      print_inline_rtx (dump_file, swap_insn, 2);
-      fprintf (dump_file, "\n");
-    }
-
   /* Find the load.  */
   unsigned uid = INSN_UID (swap_insn);
   /* Only call this if quad_aligned_load_p (swap_insn).  */
@@ -2035,17 +1741,10 @@ replace_swapped_aligned_load (swap_web_entry *insn_entry, rtx swap_insn)
   gcc_assert (def_link && !def_link->next);
   gcc_assert (def_link && def_link->ref &&
 	      !DF_REF_IS_ARTIFICIAL (def_link->ref) && !def_link->next);
-  
+
   rtx_insn *def_insn = DF_REF_INSN (def_link->ref);
   unsigned uid2 = INSN_UID (def_insn);
 
-  if (dump_file)
-    {
-      fprintf (dump_file, "in replace_swapped_aligned_load, load insn is\n");
-      print_inline_rtx (dump_file, def_insn, 2);
-      fprintf (dump_file, "\n");
-    }
-
   /* We're expecting a load-with-swap insn.  */
   gcc_assert (insn_entry[uid2].is_load && insn_entry[uid2].is_swap);
 
@@ -2056,71 +1755,10 @@ replace_swapped_aligned_load (swap_web_entry *insn_entry, rtx swap_insn)
 	      && (GET_CODE (SET_SRC (body)) == VEC_SELECT)
 	      && (GET_CODE (XEXP (SET_SRC (body), 0)) == MEM));
 
-
-  /* src_exp is not defined. */
-
-  /*  const_rtx src_exp = XEXP (SET_SRC (body), 0); */
-
   rtx src_exp = XEXP (SET_SRC (body), 0);
-  rtx memory_address = XEXP (src_exp, 0);
   enum machine_mode mode = GET_MODE (src_exp);
-  rtx lvx;
+  rtx lvx = rs6000_gen_lvx (mode, SET_DEST (body), src_exp);
 
-  if (dump_file)
-    {
-      fprintf (dump_file, "The original body expression\n");
-      print_inline_rtx (dump_file, body, 2);
-      fprintf (dump_file, "\n");
-      fprintf (dump_file, "The original src_exp before lvx replace is:\n");
-      print_inline_rtx (dump_file, src_exp, 2);
-      fprintf (dump_file, "\n");
-      fprintf (dump_file, "The register holding the effective address is\n");
-      print_inline_rtx (dump_file, memory_address, 2);
-      fprintf (dump_file, "\n");
-      fprintf (dump_file, "mode is %d\n", mode);
-    }
-
-  lvx = rs6000_gen_lvx (mode, SET_DEST (body), src_exp);
-
-#ifdef LAMEO_SHAMEO_ATTEMPT_TO_USE_CHANGE_ADDRESS
-  if (dump_file) {
-    fprintf (dump_file, "Preparing to change address of src_exp:\n");
-    print_inline_rtx (dump_file, src_exp, 2);
-    fprintf (dump_file, "\n");
-    fprintf (dump_file, "The replacement expression is represented by:\n");
-    print_inline_rtx (dump_file, SET_SRC (lvx), 2);
-    fprintf (dump_file, "\n");
-    fprintf (dump_file, "The addr for change_address is\n");
-    print_inline_rtx (dump_file, XEXP (SET_SRC (lvx), 0), 2);
-    fprintf (dump_file, "\n");
-  }
-
-  /* Overwrite the VEC_SELECT operation with the new lvx pattern.  */
-
-  /* kelvin finds that change_address is not everything I need,
-     because I also need to remove the VEC_SELECT operation.
-     This code, I believe, only fixes the address expression but does
-     not yet remove the VEC_SELECT operation.  */
-  src_exp = change_address (src_exp, VOIDmode, XEXP (SET_SRC (lvx), 0));
-  SET_SRC (body) = src_exp;
-
-  if (dump_file) {
-    fprintf (dump_file, "src_exp after change_address holds\n");
-    print_inline_rtx (dump_file, src_exp, 2);
-    fprintf (dump_file, "\n");
-    fprintf (dump_file, "body is now\n");
-    print_inline_rtx (dump_file, body, 2);
-    fprintf (dump_file, "\n");
-  }
-
-  if (dump_file)
-    {
-      fprintf (dump_file, "The modified lvx insn is\n");
-      print_inline_rtx (dump_file, def_insn, 2);
-      fprintf (dump_file, "\n");
-    }
-
-#else
   rtx_insn *new_insn = emit_insn_before (lvx, def_insn);
   rtx new_body = PATTERN (new_insn);
 
@@ -2130,26 +1768,10 @@ replace_swapped_aligned_load (swap_web_entry *insn_entry, rtx swap_insn)
   set_block_for_insn (new_insn, BLOCK_FOR_INSN (def_insn));
   df_insn_rescan (new_insn);
 
-  if (dump_file)
-    {
-      unsigned int new_uid = INSN_UID (new_insn);
-      fprintf (dump_file,
-	       "Replacing swapped_load %d with load %d\n", uid2, new_uid);
-    }
-
   df_insn_delete (def_insn);
   remove_insn (def_insn);
   def_insn->set_deleted ();
 
-  if (dump_file)
-    {
-      fprintf (dump_file, "The modified lvx insn is\n");
-      print_inline_rtx (dump_file, new_insn, 2);
-      fprintf (dump_file, "\n");
-    }
-#endif
-
-
   /* Replace the swap with a copy.  */
   mark_swaps_for_removal (insn_entry, uid);
   replace_swap_with_copy (insn_entry, uid);
@@ -2715,38 +2337,11 @@ rs6000_analyze_swaps (function *fun)
   df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
   df_chain_add_problem (DF_DU_CHAIN | DF_UD_CHAIN);
   df_analyze ();
-  /* kelvin is experimenting with the following flag */
   df_set_flags (DF_DEFER_INSN_RESCAN);
 
-  if (dump_file)
-    {
-      fprintf (dump_file, "Before rs6000_analyze_swaps prepass\n");
-      df_dump (dump_file);
-    }
-
   /* Pre-pass to recombine lvx and stvx patterns so we don't lose info.  */
   recombine_lvx_stvx_patterns (fun);
 
-  if (dump_file)
-    {
-      fprintf (dump_file, "After rs6000_analyze_swaps prepass\n");
-      df_dump (dump_file);
-    }
-
-
-  /* We're thinking that we need to do some analysis to improve integrity of
-     data-flow information, but we're not sure which calls we need to make.
-  df_remove_problem (df_chain);
-  df_process_deferred_rescans ();
-  df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
-  df_chain_add_problem (DF_UD_CHAIN);
-  df_analyze ();
-  */
-  /* kelvin can't decide whether to keep or not.  am experimenting.
-     did the call to df_analyze cause us not to remove insns 8 and 9?
-     No. problem still exists even without df_analyze ().
-  */
-
   /* Allocate structure to represent webs of insns.  */
   insn_entry = XCNEWVEC (swap_web_entry, get_max_uid ());
 
@@ -2974,11 +2569,6 @@ rs6000_analyze_swaps (function *fun)
   df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
   df_chain_add_problem (DF_UD_CHAIN);
   df_analyze ();
-  if (dump_file)
-    {
-      fprintf (dump_file, "after df_analyze for pass 2\n");
-      df_dump (dump_file);
-    }
 
   swap_web_entry *pass2_insn_entry;
   pass2_insn_entry = XCNEWVEC (swap_web_entry, get_max_uid ());
@@ -3001,23 +2591,6 @@ rs6000_analyze_swaps (function *fun)
 	  if (insn_is_swap_p (insn))
 	    pass2_insn_entry[uid].is_swap = 1;
 	}
-      if (dump_file)
-	{
-	  fprintf (dump_file,
-		   "pass 2 web analysis of insn %d: (%s, %s, %s)\n", uid,
-		   (pass2_insn_entry[uid].is_load)? "is_load": "!is_load",
-		   (pass2_insn_entry[uid].is_store)? "is_store": "!is_store",
-		   (pass2_insn_entry[uid].is_swap)? "is_swap": "!is_swap");
-	  print_inline_rtx (dump_file, insn, 2);
-	  fprintf (dump_file, "\n\n");
-	}
-    }
-
-  if (dump_file)
-    {
-      fprintf (dump_file,
-	       "\nSwap insn entry table after web analysis for pass 2\n");
-      dump_swap_insn_table (pass2_insn_entry);
     }
 
   e = get_max_uid ();
@@ -3044,9 +2617,7 @@ rs6000_analyze_swaps (function *fun)
   free (pass2_insn_entry);
 
   /* Use a third pass over rtl to replace swap(load(vector constant))
-     with load(swapped vector constant). Kelvin now wonders if a
-     constant value in memory will ever not be properly aligned in
-     memory.  */
+     with load(swapped vector constant).  */
 
   /* First, rebuild ud chains.  */
   df_remove_problem (df_chain);
@@ -3054,11 +2625,6 @@ rs6000_analyze_swaps (function *fun)
   df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
   df_chain_add_problem (DF_UD_CHAIN);
   df_analyze ();
-  if (dump_file)
-    {
-      fprintf (dump_file, "after df_analyze for pass 3\n");
-      df_dump (dump_file);
-    }
 
   swap_web_entry *pass3_insn_entry;
   pass3_insn_entry = XCNEWVEC (swap_web_entry, get_max_uid ());
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index a78ad5f1995..1e794a0faa6 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -9469,22 +9469,6 @@ rs6000_legitimize_reload_address (rtx x, machine_mode mode,
   bool reg_offset_p = reg_offset_addressing_ok_p (mode);
   bool quad_offset_p = mode_supports_vsx_dform_quad (mode);
 
-  extern FILE *lra_dump_file;
-  FILE *my_dump_file;
-  if (dump_file)
-    my_dump_file = dump_file;
-  else if (lra_dump_file)
-    my_dump_file = lra_dump_file;
-  else
-    my_dump_file = NULL;
-  if (my_dump_file) {
-    fprintf (my_dump_file,
-	     "rs6000_legitimize_reload_address(mode: %d, opnum:%d)\n",
-	     mode, opnum);
-    print_inline_rtx (my_dump_file, x, 2);
-    fprintf (dump_file, "\n");
-  }
-
   /* Nasty hack for vsx_splat_v2df/v2di load from mem, which takes a
      DFmode/DImode MEM.  Ditto for ISA 3.0 vsx_splat_v4sf/v4si.  */
   if (reg_offset_p
@@ -20974,9 +20958,8 @@ rs6000_output_move_128bit (rtx operands[])
 	    return "lxvx %x0,%y1";
 
 	  else if (mode == V16QImode || mode == V8HImode || mode == V4SImode)
-	    {
-	      return "lxvw4x %x0,%y1";
-	    }
+	    return "lxvw4x %x0,%y1";
+
 	  else
 	    return "lxvd2x %x0,%y1";
 	}
@@ -25019,33 +25002,6 @@ rs6000_stack_info (void)
   else
     info->push_p = non_fixed_size > (TARGET_32BIT ? 220 : 288);
 
-#ifdef KELVIN_SEES_HANG_HERE
-  /* problem may be that lra_dump_file is non-null, but has been
-     closed by the time we get to pass_thread_prologue_and_epilogue */
-  extern FILE *lra_dump_file, *dump_file;
-  FILE *my_dump_file;
-
-  if (dump_file)
-    my_dump_file = dump_file;
-  else if (lra_dump_file)
-    my_dump_file = lra_dump_file;
-  else
-    my_dump_file = NULL;
-
-  if (my_dump_file) {
-    fprintf (my_dump_file, "... set info->push_p to %d\n", info->push_p);
-    fprintf (my_dump_file,
-	     " TARGET_XCOFF: %d, NO_DEBUG: %d, TARGET_32BIT: %d\n",
-	     TARGET_XCOFF, NO_DEBUG, TARGET_32BIT);
-    fprintf (my_dump_file,
-	     " info->calls_p: %d, DEFAULT_ABI: %d, ABI_V4: %d\n",
-	     info->calls_p, DEFAULT_ABI, ABI_V4);
-    fprintf (my_dump_file,
-	     " non_fixed_size: %ld, frame_pointer_needed: %d, write_symbols: %d\n",
-	     non_fixed_size, frame_pointer_needed, write_symbols);
-  }
-#endif
-
   return info;
 }
 
@@ -36313,33 +36269,6 @@ rs6000_initial_elimination_offset (int from, int to)
   rs6000_stack_t *info = rs6000_stack_info ();
   HOST_WIDE_INT offset;
 
-  extern FILE *lra_dump_file, *dump_file;
-  FILE *my_dump_file;
-
-  if (dump_file)
-    my_dump_file = dump_file;
-  else if (lra_dump_file)
-    my_dump_file = lra_dump_file;
-  else
-    my_dump_file = NULL;
-
-  if (my_dump_file) {
-    fprintf (my_dump_file, "rs6000_initial_elimination_offset (%d, %d)\n",
-	     from, to);
-    fprintf (my_dump_file, " HARD_FRAME_POINTER_REGNUM: %d, ",
-	     HARD_FRAME_POINTER_REGNUM);
-    fprintf (my_dump_file, "STACK_POINTER_REGNUM: %d\n",
-	     STACK_POINTER_REGNUM);
-    fprintf (my_dump_file, "  info->push_p: %d, info->total_size: %ld\n",
-	     info->push_p, info->total_size);
-    fprintf (my_dump_file, " FRAME_POINTER_REGNUM: %d, ",
-	     FRAME_POINTER_REGNUM);
-    fprintf (my_dump_file, "FRAME_GROWS_DOWNWARD: %d\n",
-	     FRAME_GROWS_DOWNWARD);
-    fprintf (my_dump_file,
-	     "  info->fixed_size: %d, ->vars_size: %ld, ->parm_size: %d\n",
-	     info->fixed_size, info->vars_size, info->parm_size);
-  }
   if (from == HARD_FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
     offset = info->push_p ? 0 : -info->total_size;
   else if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
@@ -36361,9 +36290,6 @@ rs6000_initial_elimination_offset (int from, int to)
   else
     gcc_unreachable ();
 
-  if (my_dump_file)
-    fprintf (my_dump_file, "  returning %ld\n", offset);
-
   return offset;
 }
 
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 7ee1a80c21f..c715fbd339c 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -432,21 +432,6 @@
 {
   rtx mem = operands[1];
 
-  if (dump_file) {
-    fprintf (dump_file,
-	     \"*vsx_le_perm_load_<mode> for doubles, alignment %d\n\",
-	     MEM_ALIGN (mem));
-    fprintf (dump_file,
-	     \"split *vsx_le_perm_load_<mode>, looking at mem exp\n\");
-    print_inline_rtx (dump_file, mem, 2);
-    fprintf (dump_file, \"\n\");
-
-    fprintf (dump_file, \"REGNO(operands[0]) is %d\n\", 
-             reg_or_subregno (operands[0]));
-    if (reg_renumber != NULL)
-      fprintf (dump_file, \"reg_renumber[REGNO(operands[0])] is %d\n\",
-	       reg_renumber[REGNO(operands[0])]);
-  }
   /* Don't apply the swap optimization if we've already performed register
      allocation and the hard register destination is not in the altivec
      range.  */
@@ -454,74 +439,24 @@
       && ((reg_or_subregno (operands[0]) >= FIRST_PSEUDO_REGISTER)
 	  || ALTIVEC_REGNO_P (reg_or_subregno (operands[0]))))
     {
-      /* this pattern shows up in several different contexts.
-         I need to parse the comment and the code...  Are they equivalent?
-           (MEM_ALIGN (mem) >= 128) means the optimization might be relevant.
-           (REGNO(operands[0]) >= FIRST_PSEUDO_REGISTER)
-             means operands[0] has not yet been assigned to a
-             physical register - it is a pseudo-register.
-           (ALTIVEC_REGNO_P (REGNO(operands[0])))
-             means operands[0] (which is known by short-circuit evaluation
-             to be a physical register) is in the altivec range.
-       */
-
-       /* kelvin thinks the comment does not match the implementation,
-          the reason being that
-       	   REGNO(operands[0]) >= FIRST_PSEUDO_REGISTER
-	  does not always mean we have not performed register
-          allocation.  My guess is the problem I'm seeing on
-          p8vector-int128.c is that this test succeeds but
-          reg_renumber[pseudo_reg] is > 0 */
-
-      if (dump_file)
-        {
-          fprintf (dump_file,
-		   \"split *vsx_le_perm_load_<mode>, looking at mem exp\n\");
-	  print_inline_rtx (dump_file, mem, 2);
-	  fprintf (dump_file, \"\n\");
-
-	  fprintf (dump_file, \"reg_or_subregno (operands[0]) is %d\n\",
-	  	   reg_or_subregno (operands[0]));
-	  if (reg_renumber != NULL)
- 	    fprintf (dump_file, \"reg_renumber[REGNO(operands[0])] is %d\n\",
-		     reg_renumber[REGNO(operands[0])]);
-        }
-
       rtx mem_address = XEXP (mem, 0);
-
-      if (dump_file)
-        {
-	  fprintf (dump_file, \"memory address:\n\");
-	  print_inline_rtx (dump_file, mem_address, 2);
-	  fprintf (dump_file, \"\n\");
-
-	}
-
       enum machine_mode mode = GET_MODE (mem);
 
       if (REG_P (mem_address) || rs6000_sum_of_two_registers_p (mem_address))
         {
-	  if (dump_file)
-            fprintf (dump_file,
-	             \"mem_address is REG_P or sum of two registers\n\");
 	  /* Replace the source memory address with masked address.  */
           rtx lvx_set_expr = rs6000_gen_lvx (mode, operands[0], mem);
 	  emit_insn (lvx_set_expr);
 	  DONE;
         }
-      else if (rs6000_quadword_masked_address_p (mem_address)) 
+      else if (rs6000_quadword_masked_address_p (mem_address))
         {
-	  if (dump_file)
-            fprintf (dump_file, \"base_reg is quad-word-masked address\n\");
 	  /* This rtl is already in the form that matches lvx
 	     instruction, so leave it alone.  */
 	  DONE;
         }
       /* Otherwise, fall through to transform into a swapping load.  */
     }
-  if (dump_file)
-    fprintf (dump_file, \"transforming into a swapping load\n\");
-
   operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])
                                        : operands[0];
 }
@@ -549,10 +484,6 @@
 {
   rtx mem = operands[1];
 
-  if (dump_file)
-    fprintf (dump_file, \"*vsx_le_perm_load_<mode> for words, alignment %d\n\",
-    	     MEM_ALIGN (mem));
-
   /* Don't apply the swap optimization if we've already performed register
      allocation and the hard register destination is not in the altivec
      range.  */
@@ -561,35 +492,17 @@
 	  || ALTIVEC_REGNO_P (REGNO(operands[0]))))
     {
       rtx mem_address = XEXP (mem, 0);
-
-      if (dump_file)
-        {
-	  fprintf (dump_file,
-		   \"split *vsx_le_perm_load_<mode>, looking at mem exp\n\");
-	  print_inline_rtx (dump_file, mem, 2);
-	  fprintf (dump_file, \"\n\");
-
-	  fprintf (dump_file, \"memory address:\n\");
-	  print_inline_rtx (dump_file, mem_address, 2);
-	  fprintf (dump_file, \"\n\");
-	}
-
       enum machine_mode mode = GET_MODE (mem);
 
       if (REG_P (mem_address) || rs6000_sum_of_two_registers_p (mem_address))
         {
-	  if (dump_file)
-            fprintf (dump_file,
-	             \"mem_address is REG_P or sum of two registers\n\");
 	  /* Replace the source memory address with masked address.  */
           rtx lvx_set_expr = rs6000_gen_lvx (mode, operands[0], mem);
 	  emit_insn (lvx_set_expr);
 	  DONE;
         }
-      else if (rs6000_quadword_masked_address_p (mem_address)) 
+      else if (rs6000_quadword_masked_address_p (mem_address))
         {
-	  if (dump_file)
-            fprintf (dump_file, \"base_reg is quad-word-masked address\n\");
 	  /* This rtl is already in the form that matches lvx
 	     instruction, so leave it alone.  */
 	  DONE;
@@ -627,10 +540,6 @@
 {
   rtx mem = operands[1];
 
-  if (dump_file)
-    fprintf (dump_file, \"*vsx_le_perm_load_<mode> for halfs, alignment %d\n\",
-    	     MEM_ALIGN (mem));
-
   /* Don't apply the swap optimization if we've already performed register
      allocation and the hard register destination is not in the altivec
      range.  */
@@ -639,35 +548,17 @@
 	  || ALTIVEC_REGNO_P (REGNO(operands[0]))))
     {
       rtx mem_address = XEXP (mem, 0);
-
-      if (dump_file)
-        {
-	  fprintf (dump_file,
-		   \"split *vsx_le_perm_load_<mode>, looking at mem exp\n\");
-	  print_inline_rtx (dump_file, mem, 2);
-	  fprintf (dump_file, \"\n\");
-
-	  fprintf (dump_file, \"memory address:\n\");
-	  print_inline_rtx (dump_file, mem_address, 2);
-	  fprintf (dump_file, \"\n\");
-	}
-
       enum machine_mode mode = GET_MODE (mem);
 
       if (REG_P (mem_address) || rs6000_sum_of_two_registers_p (mem_address))
         {
-	  if (dump_file)
-            fprintf (dump_file,
-	             \"mem_address is REG_P or sum of two registers\n\");
 	  /* Replace the source memory address with masked address.  */
-          rtx lvx_set_expr = rs6000_gen_lvx (mode, operands[0], mem);
+	  rtx lvx_set_expr = rs6000_gen_lvx (mode, operands[0], mem);
 	  emit_insn (lvx_set_expr);
 	  DONE;
         }
-      else if (rs6000_quadword_masked_address_p (mem_address)) 
+      else if (rs6000_quadword_masked_address_p (mem_address))
         {
-	  if (dump_file)
-            fprintf (dump_file, \"base_reg is quad-word-masked address\n\");
 	  /* This rtl is already in the form that matches lvx
 	     instruction, so leave it alone.  */
 	  DONE;
@@ -713,10 +604,6 @@
 {
   rtx mem = operands[1];
 
-  if (dump_file)
-    fprintf (dump_file, \"*vsx_le_perm_load_<mode> for bytes, alignment %d\n\",
-    	     MEM_ALIGN (mem));
-
   /* Don't apply the swap optimization if we've already performed register
      allocation and the hard register destination is not in the altivec
      range.  */
@@ -725,44 +612,17 @@
 	  || ALTIVEC_REGNO_P (REGNO(operands[0]))))
     {
       rtx mem_address = XEXP (mem, 0);
-
-      if (dump_file)
-        {
-	  fprintf (dump_file,
-		   \"split *vsx_le_perm_load_<mode>, looking at mem exp\n\");
-	  print_inline_rtx (dump_file, mem, 2);
-	  fprintf (dump_file, \"\n\");
-
-	  fprintf (dump_file, \"memory address:\n\");
-	  print_inline_rtx (dump_file, mem_address, 2);
-	  fprintf (dump_file, \"\n\");
-	}
-
       enum machine_mode mode = GET_MODE (mem);
 
       if (REG_P (mem_address) || rs6000_sum_of_two_registers_p (mem_address))
         {
-	  if (dump_file)
-            fprintf (dump_file,
-	             \"mem_address is REG_P or sum of two registers\n\");
 	  /* Replace the source memory address with masked address.  */
-          rtx lvx_set_expr = rs6000_gen_lvx (mode, operands[0], mem);
-
-	  if (dump_file) {
-	    fprintf (dump_file, \"lvx_set_expr is\n\");
-	    print_inline_rtx (dump_file, lvx_set_expr, 2);
-	    fprintf (dump_file, \"\nthe source of set is:\n\");
-	    print_inline_rtx (dump_file, SET_SRC (lvx_set_expr), 2);
-	    fprintf (dump_file, \"\n\");
-	  }
-
+	  rtx lvx_set_expr = rs6000_gen_lvx (mode, operands[0], mem);
 	  emit_insn (lvx_set_expr);
 	  DONE;
         }
-      else if (rs6000_quadword_masked_address_p (mem_address)) 
+      else if (rs6000_quadword_masked_address_p (mem_address))
         {
-	  if (dump_file)
-            fprintf (dump_file, \"base_reg is quad-word-masked address\n\");
 	  /* This rtl is already in the form that matches lvx
 	     instruction, so leave it alone.  */
 	  DONE;
@@ -784,7 +644,6 @@
   [(set_attr "type" "vecstore")
    (set_attr "length" "12")])
 
-;; kelvin fixed this
 (define_split
   [(set (match_operand:VSX_D 0 "memory_operand" "")
         (match_operand:VSX_D 1 "vsx_register_operand" ""))]
@@ -800,37 +659,18 @@
 {
   rtx mem = operands[0];
 
-  if (dump_file)
-    fprintf (dump_file, \"splitting V2DF or V2DI memory store, with alignment %d\n\",
-             MEM_ALIGN (mem));
-
   if (MEM_ALIGN (mem) >= 128)
     {
       rtx mem_address = XEXP (mem, 0);
-      if (dump_file)
-        {
-	  fprintf (dump_file, \"mem expression:\n\");
-	  print_inline_rtx (dump_file, mem, 2);
-	  fprintf (dump_file, \"\n\");
-
-	  fprintf (dump_file, \"memory address\n\");
-	  print_inline_rtx (dump_file, mem_address, 2);
-	  fprintf (dump_file, \"\n\");
-	}
       enum machine_mode mode = GET_MODE (mem);
       if (REG_P (mem_address) || rs6000_sum_of_two_registers_p (mem_address))
 	{
-	  if (dump_file)
-	    fprintf (dump_file,
-		     \"memory address is REG_P or sum of 2 registers\n\");
 	  rtx stvx_set_expr = rs6000_gen_stvx (mode, mem, operands[1]);
 	  emit_insn (stvx_set_expr);
 	  DONE;
 	}
       else if (rs6000_quadword_masked_address_p (mem_address))
 	{
-	  if (dump_file)
-	    fprintf (dump_file, "mem address is quad-word-masked addr\n\");
 	  /* This rtl is already in the form that matches stvx instruction,
 	     so leave it alone.  */
 	  DONE;
@@ -870,7 +710,6 @@
   [(set_attr "type" "vecstore")
    (set_attr "length" "12")])
 
-;; kelvin fixed this
 (define_split
   [(set (match_operand:VSX_W 0 "memory_operand" "")
         (match_operand:VSX_W 1 "vsx_register_operand" ""))]
@@ -888,37 +727,18 @@
 {
   rtx mem = operands[0];
 
-  if (dump_file)
-    fprintf (dump_file, \"splitting V4SF or V4SI memory store, with alignment %d\n\",
-             MEM_ALIGN (mem));
-
   if (MEM_ALIGN (mem) >= 128)
     {
       rtx mem_address = XEXP (mem, 0);
-      if (dump_file)
-        {
-	  fprintf (dump_file, \"mem expression:\n\");
-	  print_inline_rtx (dump_file, mem, 2);
-	  fprintf (dump_file, \"\n\");
-
-	  fprintf (dump_file, \"memory address\n\");
-	  print_inline_rtx (dump_file, mem_address, 2);
-	  fprintf (dump_file, \"\n\");
-	}
       enum machine_mode mode = GET_MODE (mem);
       if (REG_P (mem_address) || rs6000_sum_of_two_registers_p (mem_address))
 	{
-	  if (dump_file)
-	    fprintf (dump_file,
-		     \"memory address is REG_P or sum of 2 registers\n\");
 	  rtx stvx_set_expr = rs6000_gen_stvx (mode, mem, operands[1]);
 	  emit_insn (stvx_set_expr);
 	  DONE;
 	}
       else if (rs6000_quadword_masked_address_p (mem_address))
 	{
-	  if (dump_file)
-	    fprintf (dump_file, "mem address is quad-word-masked addr\n\");
 	  /* This rtl is already in the form that matches stvx instruction,
 	     so leave it alone.  */
 	  DONE;
@@ -961,7 +781,6 @@
   [(set_attr "type" "vecstore")
    (set_attr "length" "12")])
 
-;; kelvin fixed this
 (define_split
   [(set (match_operand:V8HI 0 "memory_operand" "")
         (match_operand:V8HI 1 "vsx_register_operand" ""))]
@@ -983,37 +802,18 @@
 {
   rtx mem = operands[0];
 
-  if (dump_file)
-    fprintf (dump_file, \"splitting V8HI memory store, with alignment %d\n\",
-             MEM_ALIGN (mem));
-
   if (MEM_ALIGN (mem) >= 128)
     {
       rtx mem_address = XEXP (mem, 0);
-      if (dump_file)
-        {
-	  fprintf (dump_file, \"mem expression:\n\");
-	  print_inline_rtx (dump_file, mem, 2);
-	  fprintf (dump_file, \"\n\");
-
-	  fprintf (dump_file, \"memory address\n\");
-	  print_inline_rtx (dump_file, mem_address, 2);
-	  fprintf (dump_file, \"\n\");
-	}
       enum machine_mode mode = GET_MODE (mem);
       if (REG_P (mem_address) || rs6000_sum_of_two_registers_p (mem_address))
 	{
-	  if (dump_file)
-	    fprintf (dump_file,
-		     \"memory address is REG_P or sum of 2 registers\n\");
 	  rtx stvx_set_expr = rs6000_gen_stvx (mode, mem, operands[1]);
 	  emit_insn (stvx_set_expr);
 	  DONE;
 	}
       else if (rs6000_quadword_masked_address_p (mem_address))
 	{
-	  if (dump_file)
-	    fprintf (dump_file, "mem address is quad-word-masked addr\n\");
 	  /* This rtl is already in the form that matches stvx instruction,
 	     so leave it alone.  */
 	  DONE;
@@ -1062,7 +862,6 @@
   [(set_attr "type" "vecstore")
    (set_attr "length" "12")])
 
-;; kelvin did fix this
 (define_split
   [(set (match_operand:V16QI 0 "memory_operand" "")
         (match_operand:V16QI 1 "vsx_register_operand" ""))]
@@ -1092,37 +891,18 @@
 {
   rtx mem = operands[0];
 
-  if (dump_file)
-    fprintf (dump_file, \"splitting V16QI memory store, with alignment %d\n\",
-             MEM_ALIGN (mem));
-
   if (MEM_ALIGN (mem) >= 128)
     {
       rtx mem_address = XEXP (mem, 0);
-      if (dump_file)
-        {
-	  fprintf (dump_file, \"mem expression:\n\");
-	  print_inline_rtx (dump_file, mem, 2);
-	  fprintf (dump_file, \"\n\");
-
-	  fprintf (dump_file, \"memory address\n\");
-	  print_inline_rtx (dump_file, mem_address, 2);
-	  fprintf (dump_file, \"\n\");
-	}
       enum machine_mode mode = GET_MODE (mem);
       if (REG_P (mem_address) || rs6000_sum_of_two_registers_p (mem_address))
 	{
-	  if (dump_file)
-	    fprintf (dump_file,
-		     \"memory address is REG_P or sum of 2 registers\n\");
 	  rtx stvx_set_expr = rs6000_gen_stvx (mode, mem, operands[1]);
 	  emit_insn (stvx_set_expr);
 	  DONE;
 	}
       else if (rs6000_quadword_masked_address_p (mem_address))
 	{
-	  if (dump_file)
-	    fprintf (dump_file, "mem address is quad-word-masked addr\n\");
 	  /* This rtl is already in the form that matches stvx instruction,
 	     so leave it alone.  */
 	  DONE;
@@ -4410,63 +4190,6 @@
    (set_attr "type" "veccomplex")])
 
 
-;; kelvin reenabled to get original behavior.  will do some more testing
-;; of unadulterated compiler.
-;;
-;; kelvin disabled the following two optimizations because they are not
-;; working for V16QI on little endian.  Maybe these work on big endian.
-;; not sure...  These two peepholes differ only in the order of the
-;; two operands passed to the load operation.
-;;  Based on expansions of VSX_M and VSm, the instruction selected
-;;  for each vector type is as follows:
-;;
-;; V16QI: "lxvw4x"
-;;  BE memory bytes:    00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
-;;  BE loaded register: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
-;;  (good)
-;;
-;;  LE memory bytes:    00 01 02 03 | 04 05 06 07 | 08 09 0a 0b | 0c 0d 0e 0f
-;;  LE loaded register: 03 02 01 00 | 07 06 05 04 | 0b 0a 09 08 | 0f 0e 0d 0c
-;;  (bad)
-;;
-;;  big endian-load:
-;;  little endian-load:
-;;  
-;; V8HI: "lxvw4x"
-;;  short int array[] =
-;;  { 0x0001, 0x0203, 0x0405, 0x0607, 0x0809, 0x0a0b, 0x0c0d, 0x0e0f };
-;;
-;;  BE memory bytes: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
-;;  big-endian load: 0x0001 0x0203 0x0405 0x0607 0x0809 0x0a0b 0x0c0d 0x0e0f
-;;
-;;  LE memory bytes: 01 00 03 02 05 04 07 06 09 08 0b 0a 0d 0c 0f 0e
-;;  little-endian load: 0x0203 0x0001 0x06070405 0x0a0b0809
-;;  (bad)
-;;
-;; V4SI: "lxvw4x"
-;; int array[] =
-;; { 0x00010203, 0x04050607, 0x08090a0b, 0x0c0d0e0f }
-;;
-;; BE memory bytes: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
-;; BE loaded register: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
-;; 
-;; LE memory bytes: 03 02 01 00 07 06 05 04 0b 0a 09 08 0f 0e 0d 0c
-;; LE loaded register: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
-;;
-;; V4SF: "lxvw4x"
-;; V2DF: "lxvd2x"
-;; V2DI: "lxvd2x"
-;;   DF: "lxdx"
-;;   TF: "lxvd2x"
-;;   KF: "lxvd2x"
-;; V1TI: "lxvd2x"
-;;   TI: "lxvd2x"
-;;
-;; BE memory bytes: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
-;;
-;; LE memory bytes: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
-;;
- 
 ;; Power8 Vector fusion.  The fused ops must be physically adjacent.
 (define_peephole
   [(set (match_operand:P 0 "base_reg_operand" "")
@@ -4475,7 +4198,7 @@
 	(mem:VSX_M (plus:P (match_dup 0)
 			   (match_operand:P 3 "int_reg_operand" ""))))]
   "TARGET_VSX && TARGET_P8_FUSION && !TARGET_P9_VECTOR"
-  "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M:VSm>x %x2,%0,%3";
+  "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M:VSm>x %x2,%0,%3"  
   [(set_attr "length" "8")
    (set_attr "type" "vecload")])
 
diff --git a/gcc/genmatch.c b/gcc/genmatch.c
index 2df0215d0d7..9da911a3695 100644
--- a/gcc/genmatch.c
+++ b/gcc/genmatch.c
@@ -30,9 +30,6 @@ along with GCC; see the file COPYING3.  If not see
 #include "hash-set.h"
 #include "is-a.h"
 
-#ifdef KELVIN_DEBUG
-static int kelvin_file_no = -1;
-#endif
 
 /* Stubs for GGC referenced through instantiations triggered by hash-map.  */
 void *ggc_internal_cleared_alloc (size_t, void (*)(void *),
@@ -3879,44 +3876,6 @@ public:
   bool parsing_match_operand;
 };
 
-#ifdef KELVIN_DEBUG
-void kelvin_token (const cpp_token *token)
-{
-  if (token->type == CPP_NAME) {
-    write (kelvin_file_no, "CPP_NAME(", 9);
-    const unsigned char *s = CPP_HASHNODE (token->val.node.node)->ident.str;
-    write (kelvin_file_no, s, strlen ((const char *) s));
-    write (kelvin_file_no, ")", 1);
-  } else if (token->type == CPP_STRING) {
-    write (kelvin_file_no, "CPP_STRING(", 11);
-    const unsigned char *s = token->val.str.text;
-    write (kelvin_file_no, s, strlen ((const char *) s));
-    write (kelvin_file_no, ")", 1);
-  } else if (token->type == CPP_NUMBER) {
-    write (kelvin_file_no, "CPP_NUMBER", 10);
-    const unsigned char *s = token->val.str.text;
-    write (kelvin_file_no, s, strlen ((const char *) s));
-    write (kelvin_file_no, ")", 1);
-  } else {
-    const char *name = cpp_type2name (token->type, 0);
-    write (kelvin_file_no, name, strlen (name));
-  }
-}
-
-void
-kelvin_breakpoint_3 (const cpp_token *token)
-{
-  char buffer[32];
-  if (kelvin_file_no < 0)
-    kelvin_file_no = open ("kelvin-genmatch-trace", O_WRONLY | O_CREAT);
-  write (kelvin_file_no, "parser::next: ", 14);
-  kelvin_token (token);
-  sprintf (buffer, "@ %x", token->src_loc);
-  write (kelvin_file_no, buffer, strlen (buffer));
-  write (kelvin_file_no, "\n", 1);
-}
-#endif
-
 /* Lexing helpers.  */
 
 /* Read the next non-whitespace token from R.  */
@@ -3928,29 +3887,11 @@ parser::next ()
   do
     {
       token = cpp_get_token (r);
-#ifdef KELVIN_DEBUG
-      kelvin_breakpoint_3 (token);
-#endif
     }
   while (token->type == CPP_PADDING);
   return token;
 }
 
-#ifdef KELVIN_DEBUG
-void
-kelvin_breakpoint_2 (const cpp_token *token)
-{
-  char buffer[32];
-  if (kelvin_file_no < 0)
-    kelvin_file_no = open ("kelvin-genmatch-trace", O_WRONLY | O_CREAT);
-  write (kelvin_file_no, "parser::peek: ", 14);
-  kelvin_token (token);
-  sprintf (buffer, "@ %x", token->src_loc);
-  write (kelvin_file_no, buffer, strlen (buffer));
-  write (kelvin_file_no, "\n", 1);
-}
-#endif
-
 /* Peek at the next non-whitespace token from R.  */
 
 const cpp_token *
@@ -3961,9 +3902,6 @@ parser::peek (unsigned num)
   do
     {
       token = cpp_peek_token (r, i++);
-#ifdef KELVIN_DEBUG
-      kelvin_breakpoint_2 (token);
-#endif
     }
   while (token->type == CPP_PADDING
 	 || (--num > 0));
@@ -3995,33 +3933,12 @@ parser::peek_ident (const char *id, unsigned num)
   return 0;
 }
 
-#ifdef KELVIN_DEBUG
-void kelvin_breakpoint(enum cpp_ttype tk, const cpp_token *token)
-{
-  char buffer[32];
-  if (kelvin_file_no < 0)
-    kelvin_file_no = open ("kelvin-genmatch-trace", O_WRONLY | O_CREAT);
-
-  write (kelvin_file_no, "parser::expect token: ", 22);
-  kelvin_token (token);
-  sprintf (buffer, "@ %x", token->src_loc);
-  write (kelvin_file_no, buffer, strlen (buffer));
-  write (kelvin_file_no, ", expected: ", 12);
-  const char *name = cpp_type2name (tk, 0);
-  write (kelvin_file_no, name, strlen (name));
-  write (kelvin_file_no, "\n", 1);
-}
-#endif
-
 /* Read the next token from R and assert it is of type TK.  */
 
 const cpp_token *
 parser::expect (enum cpp_ttype tk)
 {
   const cpp_token *token = next ();
-#ifdef KELVIN_DEBUG
-  kelvin_breakpoint (tk, token);
-#endif
   if (token->type != tk)
     fatal_at (token, "expected %s, got %s",
 	      cpp_type2name (tk, 0), cpp_type2name (token->type, 0));
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 66ae9f06a11..d90bde2817a 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -3046,50 +3046,6 @@ base_plus_disp_to_reg (struct address_info *ad)
   enum reg_class cl;
   rtx new_reg;
 
-  /* kelvin believes this is where my code is becoming corrupted.  */
-  if (lra_dump_file) {
-    if (ad->base) {
-      fprintf (lra_dump_file, "base_plus_disp_to_reg, ad->base: ");
-      print_inline_rtx (lra_dump_file, *ad->base, 2);
-      fprintf (lra_dump_file, "\n");
-    }
-    if (ad->base_term) {
-      fprintf (lra_dump_file, "ad->base_term: ");
-      print_inline_rtx (lra_dump_file, *ad->base_term, 2);
-      fprintf (lra_dump_file, "\n");
-    }
-    if (ad->segment) {
-      fprintf (lra_dump_file, "ad->segment: ");
-      print_inline_rtx (lra_dump_file, *ad->segment, 2);
-      fprintf (lra_dump_file, "\n");
-    }
-    if (ad->segment_term) {
-      fprintf (lra_dump_file, "ad->segment_term: ");
-      print_inline_rtx (lra_dump_file, *ad->segment_term, 2);
-      fprintf (lra_dump_file, "\n");
-    }
-    if (ad->disp) {
-      fprintf (lra_dump_file, "ad->disp: ");
-      print_inline_rtx (lra_dump_file, *ad->disp, 2);
-      fprintf (lra_dump_file, "\n");
-    }
-    if (ad->disp_term) {
-      fprintf (lra_dump_file, "ad->disp_term: ");
-      print_inline_rtx (lra_dump_file, *ad->disp_term, 2);
-      fprintf (lra_dump_file, "\n");
-    }
-    if (ad->index) {
-      fprintf (lra_dump_file, "ad->index: ");
-      print_inline_rtx (lra_dump_file, *ad->index, 2);
-      fprintf (lra_dump_file, "\n");
-    }
-    if (ad->index_term) {
-      fprintf (lra_dump_file, "ad->index_term: ");
-      print_inline_rtx (lra_dump_file, *ad->index_term, 2);
-      fprintf (lra_dump_file, "\n");
-    }
-  }
-
   lra_assert (ad->base == ad->base_term && ad->disp == ad->disp_term);
   cl = base_reg_class (ad->mode, ad->as, ad->base_outer_code,
 		       get_index_code (ad));
@@ -3264,9 +3220,6 @@ process_address_1 (int nop, bool check_only_p,
       && GET_CODE (XEXP (op, 0)) == SCRATCH)
     return false;
 
-  if (lra_dump_file)
-    fprintf (lra_dump_file, "process_address_1 checkpoint a\n");
-
   if (insn_extra_address_constraint (cn))
     decompose_lea_address (&ad, curr_id->operand_loc[nop]);
   /* Do not attempt to decompose arbitrary addresses generated by combine
@@ -3280,10 +3233,6 @@ process_address_1 (int nop, bool check_only_p,
     decompose_mem_address (&ad, SUBREG_REG (op));
   else
     return false;
-
-  if (lra_dump_file)
-    fprintf (lra_dump_file, "process_address_1 checkpoint b\n");
-
   /* If INDEX_REG_CLASS is assigned to base_term already and isn't to
      index_term, swap them so to avoid assigning INDEX_REG_CLASS to both
      when INDEX_REG_CLASS is a single register class.  */
@@ -3315,11 +3264,6 @@ process_address_1 (int nop, bool check_only_p,
       if (ad.base_term2 != NULL)
 	*ad.base_term2 = *ad.base_term;
     }
-
-  if (lra_dump_file)
-    fprintf (lra_dump_file, "process_address_1 checkpoint c\n");
-
-
   if (ad.index_term != NULL
       && process_addr_reg (ad.index_term, check_only_p,
 			   before, NULL, INDEX_REG_CLASS))
@@ -3356,17 +3300,6 @@ process_address_1 (int nop, bool check_only_p,
      presence and shape of the index is valid.  */
   push_to_sequence (*before);
   lra_assert (ad.disp == ad.disp_term);
-
-  if (lra_dump_file)
-    fprintf (lra_dump_file, "process_address_1 checkpoint e\n");
-  /* kelvin thinks the need for a a new register arises because
-   *  "the address is a frame address with an invalid offset"
-   * kelvin thinks the offset is invalid because the activation frame
-   * has been modified, presumably to accomodate some register
-   * that has been spilled. but I haven't figured out which
-   * register(s) that is.
-   */
-
   if (ad.base == NULL)
     {
       if (ad.index == NULL)
@@ -3379,10 +3312,6 @@ process_address_1 (int nop, bool check_only_p,
 	  rtx addr = *ad.inner;
 
 	  new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, "addr");
-	  if (lra_dump_file) {
-	    fprintf (lra_dump_file, "Found creation of the new_reg, ");
-	    fprintf (lra_dump_file, "HAVE_lo_sum is %d\n", HAVE_lo_sum);
-	  }
 	  if (HAVE_lo_sum)
 	    {
 	      /* addr => lo_sum (new_base, addr), case (2) above.  */
@@ -3416,9 +3345,6 @@ process_address_1 (int nop, bool check_only_p,
 		delete_insns_since (last);
 	    }
 
-	  if (lra_dump_file)
-	    fprintf (lra_dump_file, "code is %d\n", code);
-
 	  if (code < 0)
 	    {
 	      /* addr => new_base, case (2) above.  */
@@ -3449,13 +3375,6 @@ process_address_1 (int nop, bool check_only_p,
 
 	  lra_assert (INDEX_REG_CLASS != NO_REGS);
 	  new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, "disp");
-
-	  if (lra_dump_file) {
-	    fprintf (lra_dump_file, "new_reg created for case 1\n");
-	    print_inline_rtx (lra_dump_file, new_reg, 2);
-	    fprintf (lra_dump_file, "\n");
-	  }
-
 	  lra_emit_move (new_reg, *ad.disp);
 	  *ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg),
 					   new_reg, *ad.index);
@@ -3472,9 +3391,6 @@ process_address_1 (int nop, bool check_only_p,
       start_sequence ();
       new_reg = base_to_reg (&ad);
 
-      if (lra_dump_file)
-	fprintf (lra_dump_file, "we believe we are in cases 1 and 3\n");
-
       /* base + disp => new base, cases (1) and (3) above.  */
       /* Another option would be to reload the displacement into an
 	 index register.  However, postreload has code to optimize
@@ -3483,12 +3399,6 @@ process_address_1 (int nop, bool check_only_p,
 	 not necessarily be a win.  */
       if (new_reg == NULL_RTX)
         new_reg = base_plus_disp_to_reg (&ad);
-
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "new_reg allocated as base + displacement\n");
-	print_inline_rtx (lra_dump_file, new_reg, 2);
-	fprintf (lra_dump_file, "\n");
-      }
       insns = get_insns ();
       last_insn = get_last_insn ();
       /* If we generated at least two insns, try last insn source as
@@ -3534,11 +3444,6 @@ process_address_1 (int nop, bool check_only_p,
 	      new_insns = get_insns ();
 	      end_sequence ();
 	      new_reg = gen_rtx_PLUS (Pmode, new_reg, disp);
-	      if (lra_dump_file) {
-		fprintf (lra_dump_file, "Confused new_reg: ");
-		print_inline_rtx (lra_dump_file, new_reg, 2);
-		fprintf (lra_dump_file, "\n");
-	      }
 	      delete_insns_since (PREV_INSN (last_insn));
 	      add_insn (new_insns);
 	      insns = get_insns ();
@@ -3553,11 +3458,6 @@ process_address_1 (int nop, bool check_only_p,
       /* base + scale * index + disp => new base + scale * index,
 	 case (1) above.  */
       new_reg = base_plus_disp_to_reg (&ad);
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "Confubalation abounds @ new_reg: ");
-	print_inline_rtx (lra_dump_file, new_reg, 2);
-	fprintf (lra_dump_file, "\n");
-      }
       *ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg),
 				       new_reg, *ad.index);
     }
@@ -3577,11 +3477,6 @@ process_address_1 (int nop, bool check_only_p,
       pseudo onto the memory of different mode for which the scale is
       prohibitted.  */
       new_reg = index_part_to_reg (&ad);
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "I'm not the only confubalated new_reg: ");
-	print_inline_rtx (lra_dump_file, new_reg, 2);
-	fprintf (lra_dump_file, "\n");
-      }
       *ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg),
 				       *ad.base_term, new_reg);
     }
@@ -3592,18 +3487,10 @@ process_address_1 (int nop, bool check_only_p,
       rtx addr = *ad.inner;
       
       new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, "addr");
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "Are you confubalated too?  @ new_reg: ");
-	print_inline_rtx (lra_dump_file, new_reg, 2);
-	fprintf (lra_dump_file, "\n");
-      }
       /* addr => new_base.  */
       lra_emit_move (new_reg, addr);
       *ad.inner = new_reg;
     }
-  if (lra_dump_file)
-    fprintf (lra_dump_file, "process_address_1 checkpoint f\n");
-
   *before = get_insns ();
   end_sequence ();
   return true;
@@ -3830,21 +3717,10 @@ curr_insn_transform (bool check_only_p)
   int max_regno_before;
   int reused_alternative_num;
 
-  if (lra_dump_file)
-    {
-      fprintf (lra_dump_file,
-	       "curr_insn_transform (%d), curr_insn: ", check_only_p);
-      print_inline_rtx (lra_dump_file, curr_insn, 2);
-      fprintf (lra_dump_file, "\n");
-    }
-
   curr_insn_set = single_set (curr_insn);
   if (curr_insn_set != NULL_RTX && simple_move_p ())
     return false;
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint A\n");
-  }
   no_input_reloads_p = no_output_reloads_p = false;
   goal_alt_number = -1;
   change_p = sec_mem_p = false;
@@ -3869,9 +3745,6 @@ curr_insn_transform (bool check_only_p)
 
   max_regno_before = max_reg_num ();
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint B\n");
-  }
   for (i = 0; i < n_operands; i++)
     {
       goal_alt_matched[i][0] = -1;
@@ -3890,9 +3763,6 @@ curr_insn_transform (bool check_only_p)
   curr_swapped = false;
   goal_alt_swapped = false;
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint C\n");
-  }
   if (! check_only_p)
     /* Make equivalence substitution and memory subreg elimination
        before address processing because an address legitimacy can
@@ -3902,10 +3772,6 @@ curr_insn_transform (bool check_only_p)
 	rtx op, subst, old;
 	bool op_change_p = false;
 
-	if (lra_dump_file) {
-	  fprintf (lra_dump_file, "Kelvin checkpoint D, i: %d\n", i);
-	}
-
 	if (curr_static_id->operand[i].is_operator)
 	  continue;
 	
@@ -3945,9 +3811,6 @@ curr_insn_transform (bool check_only_p)
 	  }
       }
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint E\n");
-  }
   /* Reload address registers and displacements.  We do it before
      finding an alternative because of memory constraints.  */
   before = after = NULL;
@@ -3960,27 +3823,17 @@ curr_insn_transform (bool check_only_p)
 	change_p = true;
 	lra_update_dup (curr_id, i);
       }
-
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint E.5\n");
-  }
-
+  
   if (change_p)
     /* If we've changed the instruction then any alternative that
        we chose previously may no longer be valid.  */
     lra_set_used_insn_alternative (curr_insn, -1);
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint E.75\n");
-  }
   if (! check_only_p && curr_insn_set != NULL_RTX
       && check_and_process_move (&change_p, &sec_mem_p))
     return change_p;
 
  try_swapped:
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint F\n");
-  }
 
   reused_alternative_num = check_only_p ? -1 : curr_id->used_insn_alternative;
   if (lra_dump_file != NULL && reused_alternative_num >= 0)
@@ -4001,9 +3854,6 @@ curr_insn_transform (bool check_only_p)
      If we have just tried the alternatives the second time, return
      operands to normal and drop through.  */
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint G\n");
-  }
   if (reused_alternative_num < 0 && commutative >= 0)
     {
       curr_swapped = !curr_swapped;
@@ -4028,9 +3878,6 @@ curr_insn_transform (bool check_only_p)
       lra_set_insn_deleted (curr_insn);
       return true;
     }
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint H\n");
-  }
 
   /* If the best alternative is with operands 1 and 2 swapped, swap
      them.  Update the operand numbers of any reloads already
@@ -4061,9 +3908,6 @@ curr_insn_transform (bool check_only_p)
       use_sec_mem_p = i < n_operands;
     }
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint I\n");
-  }
   if (use_sec_mem_p)
     {
       int in = -1, out = -1;
@@ -4091,11 +3935,6 @@ curr_insn_transform (bool check_only_p)
       sec_mode = targetm.secondary_memory_needed_mode (rld_mode);
       new_reg = lra_create_new_reg (sec_mode, NULL_RTX,
 				    NO_REGS, "secondary");
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "Created new_reg: ");
-	print_inline_rtx (lra_dump_file, new_reg, 2);
-	fprintf (lra_dump_file, "\n");
-      }
       /* If the mode is changed, it should be wider.  */
       lra_assert (!partial_subreg_p (sec_mode, rld_mode));
       if (sec_mode != rld_mode)
@@ -4112,12 +3951,6 @@ curr_insn_transform (bool check_only_p)
 	  before = emit_spill_move (true, new_reg, src);
 	  emit_insn (before);
 	  before = get_insns ();
-	  if (lra_dump_file) {
-	    fprintf (lra_dump_file,
-		     "Created before expression for spill move\n");
-	    print_inline_rtx (lra_dump_file, before, 2);
-	    fprintf (lra_dump_file, "\n");
-	  }
 	  end_sequence ();
 	  lra_process_new_insns (curr_insn, before, NULL, "Changing on");
 	  lra_set_insn_deleted (curr_insn);
@@ -4137,11 +3970,6 @@ curr_insn_transform (bool check_only_p)
 	  /* See comments above.  */
 	  push_to_sequence (before);
 	  before = emit_spill_move (true, new_reg, src);
-	  if (lra_dump_file) {
-	    fprintf (lra_dump_file, "Different before generation: ");
-	    print_inline_rtx (lra_dump_file, before, 2);
-	    fprintf (lra_dump_file, "\n");
-	  }
 	  emit_insn (before);
 	  before = get_insns ();
 	  end_sequence ();
@@ -4152,10 +3980,6 @@ curr_insn_transform (bool check_only_p)
       return true;
     }
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint J\n");
-  }
-
   lra_assert (goal_alt_number >= 0);
   lra_set_used_insn_alternative (curr_insn, goal_alt_number);
 
@@ -4184,9 +4008,6 @@ curr_insn_transform (bool check_only_p)
        fprintf (lra_dump_file, "\n");
     }
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint K\n");
-  }
   /* Right now, for any pair of operands I and J that are required to
      match, with J < I, goal_alt_matches[I] is J.  Add I to
      goal_alt_matched[J].  */
@@ -4207,10 +4028,6 @@ curr_insn_transform (bool check_only_p)
 	goal_alt_matched[j][k + 1] = -1;
       }
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint L\n");
-  }
-
   for (i = 0; i < n_operands; i++)
     goal_alt_win[i] |= goal_alt_match_win[i];
 
@@ -4291,9 +4108,6 @@ curr_insn_transform (bool check_only_p)
 	  }
       }
 
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint M\n");
-  }
   n_outputs = 0;
   outputs[0] = -1;
   for (i = 0; i < n_operands; i++)
@@ -4303,10 +4117,6 @@ curr_insn_transform (bool check_only_p)
       rtx old, new_reg;
       rtx op = *curr_id->operand_loc[i];
 
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "Kelvin checkpoint N, i: %d\n", i);
-      }
-
       if (goal_alt_win[i])
 	{
 	  if (goal_alt[i] == NO_REGS
@@ -4361,10 +4171,6 @@ curr_insn_transform (bool check_only_p)
       if (goal_alt_matches[i] >= 0)
 	continue;
 
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "Kelvin checkpoint O\n");
-      }
-
       /* We should not have an operand with a non-offsettable address
 	 appearing where an offsettable address will do.  It also may
 	 be a case when the address should be special in other words
@@ -4500,10 +4306,6 @@ curr_insn_transform (bool check_only_p)
 	   process_alt_operands decides that it is possible.  */
 	gcc_unreachable ();
 
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "Kelvin checkpoint P\n");
-      }
-
       /* Memorise processed outputs so that output remaining to be processed
 	 can avoid using the same register value (see match_reload).  */
       if (curr_static_id->operand[i].type == OP_OUT)
@@ -4530,9 +4332,6 @@ curr_insn_transform (bool check_only_p)
 		     REGNO (op), regno);
 	}
     }
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint Q\n");
-  }
   if (before != NULL_RTX || after != NULL_RTX
       || max_regno_before != max_reg_num ())
     change_p = true;
@@ -4542,22 +4341,6 @@ curr_insn_transform (bool check_only_p)
       /* Something changes -- process the insn.	 */
       lra_update_insn_regno_info (curr_insn);
     }
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "Kelvin checkpoint R\n");
-  }
-  if (lra_dump_file)
-    {
-      fprintf (lra_dump_file,
-	       " ... calling lra_process_new_insns with before: ");
-      print_inline_rtx (lra_dump_file, before, 2);
-      fprintf (lra_dump_file,
-	       "\n ... and after: ");
-      print_inline_rtx (lra_dump_file, after, 2);
-      fprintf (lra_dump_file, "\nchange_p is: %d\n", change_p);
-      fprintf (lra_dump_file, "curr_insn has been transformed into:\n");
-      print_inline_rtx (lra_dump_file, curr_insn, 2);
-      fprintf (lra_dump_file, "\n");
-    }
   lra_process_new_insns (curr_insn, before, after, "Inserting insn reload");
   return change_p;
 }
diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c
index cb964ea49bb..24a02ef1208 100644
--- a/gcc/lra-eliminations.c
+++ b/gcc/lra-eliminations.c
@@ -269,14 +269,6 @@ get_elimination (rtx reg)
     = eliminable_reg_rtx[hard_regno];
   lra_assert (self_elim_table.from_rtx != NULL);
   self_elim_table.offset = offset;
-#ifdef KELVIN_DEBUG
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "setting self_elim_table.offset to %ld for ",
-	     offset);
-    print_inline_rtx (lra_dump_file, reg, 2);
-    fprintf (lra_dump_file, "\n");
-  }
-#endif
   return &self_elim_table;
 }
 
@@ -330,9 +322,8 @@ move_plus_up (rtx x)
 
    If we make full substitution to SP for non-null INSN, add the insn
    sp offset.  */
-
 rtx
-lra_eliminate_regs_1x (rtx_insn *insn, rtx x, machine_mode mem_mode,
+lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
 		      bool subst_p, bool update_p,
 		      HOST_WIDE_INT update_sp_offset, bool full_p)
 {
@@ -348,24 +339,6 @@ lra_eliminate_regs_1x (rtx_insn *insn, rtx x, machine_mode mem_mode,
   if (! current_function_decl)
     return x;
 
-#ifdef KELVIN_DEBUG
-  /* this code is causing an ICE in certain regression tests, 
-   *  e.g. dump-noaddr.c
-  if (lra_dump_file) {
-    fprintf (lra_dump_file,
-	     "lra_eliminate_regs_1 (mem_mode: %d, subst_p: %d, update_p: %d",
-	     mem_mode, subst_p, update_p);
-    fprintf (lra_dump_file, ", update_sp_offset: %ld, full_p: %d)\n",
-	     update_sp_offset, full_p);
-    fprintf (lra_dump_file, "insn: ");
-    print_inline_rtx (lra_dump_file, insn, 2);
-    fprintf (lra_dump_file, "\nx: ");
-    print_inline_rtx (lra_dump_file, x, 2);
-    fprintf (lra_dump_file, "\n");
-  }
-  */
-#endif
-  
   switch (code)
     {
     CASE_CONST_ANY:
@@ -387,19 +360,6 @@ lra_eliminate_regs_1x (rtx_insn *insn, rtx x, machine_mode mem_mode,
 	{
 	  rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
 
-#ifdef KELVIN_DEBUG
-	  if (lra_dump_file) {
-	    fprintf (lra_dump_file, "handling REG, to_rtx: ");
-	    print_inline_rtx (lra_dump_file, ep->to_rtx, 2);
-	    fprintf (lra_dump_file, "\nfrom_rtx: ");
-	    print_inline_rtx (lra_dump_file, ep->from_rtx, 2);
-	    fprintf (lra_dump_file, "\nep->offset: %ld\n", ep->offset);
-	    fprintf (lra_dump_file, "stack_pointer_rtx: ");
-	    print_inline_rtx (lra_dump_file, stack_pointer_rtx, 2);
-	    fprintf (lra_dump_file, "\n(insn)->sp_offset: %ld\n",
-		     lra_get_insn_recog_data (insn)->sp_offset);
-	  }
-#endif
 	  if (update_sp_offset != 0)
 	    {
 	      if (ep->to_rtx == stack_pointer_rtx)
@@ -429,17 +389,7 @@ lra_eliminate_regs_1x (rtx_insn *insn, rtx x, machine_mode mem_mode,
 	    {
 	      HOST_WIDE_INT offset;
 	      rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
-#ifdef KELVIN_DEBUG
-	      if (lra_dump_file) {
-		fprintf (lra_dump_file, "... handling PLUS\n");
-		fprintf (lra_dump_file, "    ep: ");
-		fprintf (lra_dump_file, "%s eliminate %d to %d (offset=" 
-			 HOST_WIDE_INT_PRINT_DEC
-			 ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n",
-			 ep->can_eliminate ? "Can" : "Can't",
-			 ep->from, ep->to, ep->offset, ep->previous_offset);
-	      }
-#endif
+
 	      if (! update_p && ! full_p)
 		return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
 	      
@@ -448,25 +398,8 @@ lra_eliminate_regs_1x (rtx_insn *insn, rtx x, machine_mode mem_mode,
 	      else
 		offset = (update_p
 			  ? ep->offset - ep->previous_offset : ep->offset);
-
-#ifdef KELVIN_DEBUG
-	      if (lra_dump_file) {
-		fprintf (lra_dump_file, " first stage offset: %ld\n", offset);
-		fprintf (lra_dump_file, " stack_pointer_rtx: ");
-		print_inline_rtx (lra_dump_file, stack_pointer_rtx, 2);
-		fprintf (lra_dump_file, "\n");
-		fprintf (lra_dump_file,
-			 "lra_get_insn_recog_data (insn)->sp_offset: %ld\n",
-			 lra_get_insn_recog_data (insn)->sp_offset);
-	      }
-#endif
 	      if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
 		offset -= lra_get_insn_recog_data (insn)->sp_offset;
-
-#ifdef KELVIN_DEBUG
-	      if (lra_dump_file)
-		fprintf (lra_dump_file, "reworking sum to %ld\n", offset);
-#endif
 	      if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) == -offset)
 		return to;
 	      else
@@ -766,24 +699,6 @@ lra_eliminate_regs_1x (rtx_insn *insn, rtx x, machine_mode mem_mode,
   return x;
 }
 
-rtx
-lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
-		      bool subst_p, bool update_p,
-		      HOST_WIDE_INT update_sp_offset, bool full_p)
-{
-  rtx result = lra_eliminate_regs_1x (insn, x, mem_mode,
-				      subst_p, update_p,
-				      update_sp_offset, full_p);
-#ifdef KELVIN_DEBUG
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, " returning from lra_eliminate_regs_1 with\n");
-    print_inline_rtx (lra_dump_file, result, 2);
-    fprintf (lra_dump_file, "\n");
-  }
-#endif
-  return result;
-}
-
 /* This function is used externally in subsequent passes of GCC.  It
    always does a full elimination of X.	 */
 rtx
@@ -832,33 +747,12 @@ mark_not_eliminable (rtx x, machine_mode mem_mode)
 	     them.  */
 	  size = PUSH_ROUNDING (size);
 #endif
-	  if (code == PRE_DEC || code == POST_DEC) {
+	  if (code == PRE_DEC || code == POST_DEC)
 	    curr_sp_change -= size;
-#ifdef KELVIN_DEBUG
-	    if (lra_dump_file)
-	      fprintf (lra_dump_file,
-		       "mark_non-eliminable decr by %d to %ld\n",
-		       size, curr_sp_change);
-#endif
-	  }
-	  else if (code == PRE_INC || code == POST_INC) {
+	  else if (code == PRE_INC || code == POST_INC)
 	    curr_sp_change += size;
-#ifdef KELVIN_DEBUG
-	    if (lra_dump_file)
-	      fprintf (lra_dump_file,
-		       "mark_non-eliminable incr by %d to %ld\n",
-		       size, curr_sp_change);
-#endif
-	  }
-	  else if (code == PRE_MODIFY || code == POST_MODIFY) {
+	  else if (code == PRE_MODIFY || code == POST_MODIFY)
 	    curr_sp_change += INTVAL (XEXP (XEXP (x, 1), 1));
-#ifdef KELVIN_DEBUG
-	    if (lra_dump_file)
-	      fprintf (lra_dump_file,
-		       "mark_non-eliminable modify by %ld to %ld\n",
-		       INTVAL (XEXP (XEXP (x, 1), 1)), curr_sp_change);
-#endif
-	  }
 	}
       else if (REG_P (XEXP (x, 0))
 	       && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
@@ -911,12 +805,6 @@ mark_not_eliminable (rtx x, machine_mode mem_mode)
 	  && CONST_INT_P (XEXP (SET_SRC (x), 1)))
 	{
 	  curr_sp_change += INTVAL (XEXP (SET_SRC (x), 1));
-#ifdef KELVIN_DEBUG
-	  if (lra_dump_file)
-	    fprintf (lra_dump_file,
-		     "mark_non-eliminable mangle by %ld to %ld\n",
-		     INTVAL (XEXP (SET_SRC (x), 1)), curr_sp_change);
-#endif
 	  return;
 	}
       if (! REG_P (SET_DEST (x))
@@ -1262,7 +1150,6 @@ spill_pseudos (HARD_REG_SET set)
 
   if (hard_reg_set_empty_p (set))
     return;
-#ifdef KELVIN_DEBUG
   if (lra_dump_file != NULL)
     {
       fprintf (lra_dump_file, "	   Spilling non-eliminable hard regs:");
@@ -1271,7 +1158,6 @@ spill_pseudos (HARD_REG_SET set)
 	  fprintf (lra_dump_file, " %d", i);
       fprintf (lra_dump_file, "\n");
     }
-#endif
   bitmap_initialize (&to_process, &reg_obstack);
   for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
     if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
@@ -1300,7 +1186,7 @@ spill_pseudos (HARD_REG_SET set)
    insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
    registers whose offsets should be changed.  Return true if any
    elimination offset changed.  */
-/*static*/ bool
+static bool
 update_reg_eliminate (bitmap insns_with_changed_offsets)
 {
   bool prev, result;
@@ -1309,13 +1195,6 @@ update_reg_eliminate (bitmap insns_with_changed_offsets)
 
   targetm.compute_frame_layout ();
 
-#ifdef KELVIN_DEBUG
-  if (lra_dump_file) {
-    fprintf (lra_dump_file,
-	     "update_reg_eliminate after compute_frame_layout\n");
-    print_elim_table (lra_dump_file);
-  }
-#endif
   /* Clear self elimination offsets.  */
   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
     self_elim_offsets[ep->from] = 0;
@@ -1326,12 +1205,6 @@ update_reg_eliminate (bitmap insns_with_changed_offsets)
       if (elimination_map[ep->from] == ep)
 	ep->previous_offset = ep->offset;
 
-#ifdef KELVIN_DEBUG
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "A\n");
-	print_elim_table (lra_dump_file);
-      }
-#endif
       prev = ep->prev_can_eliminate;
       setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
       if (ep->can_eliminate && ! prev)
@@ -1343,22 +1216,14 @@ update_reg_eliminate (bitmap insns_with_changed_offsets)
 	  setup_can_eliminate (ep, false);
 	  continue;
 	}
-#ifdef KELVIN_DEBUG
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "B\n");
-	print_elim_table (lra_dump_file);
-      }
-#endif
       if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
 	{
 	  /* We cannot use this elimination anymore -- find another
 	     one.  */
-#ifdef KELVIN_DEBUG
 	  if (lra_dump_file != NULL)
 	    fprintf (lra_dump_file,
 		     "	Elimination %d to %d is not possible anymore\n",
 		     ep->from, ep->to);
-#endif
 	  /* If after processing RTL we decides that SP can be used as
 	     a result of elimination, it can not be changed.  */
 	  gcc_assert ((ep->to_rtx != stack_pointer_rtx)
@@ -1369,20 +1234,11 @@ update_reg_eliminate (bitmap insns_with_changed_offsets)
 	  for (ep1 = ep + 1; ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
 	    if (ep1->can_eliminate && ep1->from == ep->from)
 	      break;
-
-#ifdef KELVIN_DEBUG
-	  if (lra_dump_file) {
-	    fprintf (lra_dump_file, "C\n");
-	    print_elim_table (lra_dump_file);
-	  }
-#endif
 	  if (ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS])
 	    {
-#ifdef KELVIN_DEBUG
 	      if (lra_dump_file != NULL)
 		fprintf (lra_dump_file, "    Using elimination %d to %d now\n",
 			 ep1->from, ep1->to);
-#endif
 	      lra_assert (ep1->previous_offset == 0);
 	      ep1->previous_offset = ep->offset;
 	    }
@@ -1391,11 +1247,9 @@ update_reg_eliminate (bitmap insns_with_changed_offsets)
 	      /* There is no elimination anymore just use the hard
 		 register `from' itself.  Setup self elimination
 		 offset to restore the original offset values.	*/
-#ifdef KELVIN_DEBUG
 	      if (lra_dump_file != NULL)
 		fprintf (lra_dump_file, "    %d is not eliminable at all\n",
 			 ep->from);
-#endif
 	      self_elim_offsets[ep->from] = -ep->offset;
 	      if (ep->offset != 0)
 		bitmap_ior_into (insns_with_changed_offsets,
@@ -1403,28 +1257,8 @@ update_reg_eliminate (bitmap insns_with_changed_offsets)
 	    }
 	}
 
-#ifdef KELVIN_DEBUG
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "D\n");
-	print_elim_table (lra_dump_file);
-      }
-#endif
       INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
-
-#ifdef KELVIN_DEBUG
-      if (lra_dump_file) {
-	fprintf (lra_dump_file, "E\n");
-	print_elim_table (lra_dump_file);
-      }
-#endif
     }
-#ifdef KELVIN_DEBUG
-  if (lra_dump_file) {
-    fprintf (lra_dump_file,
-	     "update_reg_eliminate b4 setup_elimination_table\n");
-    print_elim_table (lra_dump_file);
-  }
-#endif
   setup_elimination_map ();
   result = false;
   CLEAR_HARD_REG_SET (temp_hard_reg_set);
@@ -1451,19 +1285,7 @@ update_reg_eliminate (bitmap insns_with_changed_offsets)
       }
   IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
   AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
-#ifdef KELVIN_DEBUG
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "update_reg_eliminate b4 spill_pseudos\n");
-    print_elim_table (lra_dump_file);
-  }
-#endif
   spill_pseudos (temp_hard_reg_set);
-#ifdef KELVIN_DEBUG
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "update_reg_eliminate after spill_pseudos\n");
-    print_elim_table (lra_dump_file);
-  }
-#endif
   return result;
 }
 
@@ -1527,22 +1349,11 @@ init_elimination (void)
   FOR_EACH_BB_FN (bb, cfun)
     {
       curr_sp_change = 0;
-#ifdef KELVIN_DEBUG
-      if (lra_dump_file)
-	fprintf (lra_dump_file,
-		 "init_elimination setting curr_sp_change to 0\n");
-#endif
       stop_to_sp_elimination_p = false;
       FOR_BB_INSNS (bb, insn)
 	if (INSN_P (insn))
 	  {
 	    lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change;
-#ifdef KELVIN_DEBUG
-	    if (lra_dump_file)
-	      fprintf (lra_dump_file,
-		       "init_elimination setting sp_offset to %ld\n",
-		       curr_sp_change);
-#endif
 	    if (NONDEBUG_INSN_P (insn))
 	      {
 		mark_not_eliminable (PATTERN (insn), VOIDmode);
@@ -1559,15 +1370,8 @@ init_elimination (void)
 	    setup_can_eliminate (ep, false);
     }
   setup_elimination_map ();
-#ifdef KELVIN_DEBUG
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "At end of init_elimination, table is\n");
-    print_elim_table (lra_dump_file);
-  }
-#endif
 }
 
-
 /* Eliminate hard reg given by its location LOC.  */
 void
 lra_eliminate_reg_if_possible (rtx *loc)
@@ -1623,23 +1427,10 @@ lra_eliminate (bool final_p, bool first_p)
 
   timevar_push (TV_LRA_ELIMINATE);
 
-#ifdef KELVIN_DEBUG
-  if (lra_dump_file)
-    fprintf (lra_dump_file, "lra_eliminate (%d, %d)\n", final_p, first_p);
-#endif
-
   if (first_p)
     init_elimination ();
 
   bitmap_initialize (&insns_with_changed_offsets, &reg_obstack);
-
-#ifdef KELVIN_DEBUG
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "In lra_eliminate, after bitmap_initialize\n");
-    print_elim_table (lra_dump_file);
-  }
-#endif
-
   if (final_p)
     {
       if (flag_checking)
@@ -1647,12 +1438,6 @@ lra_eliminate (bool final_p, bool first_p)
 	  update_reg_eliminate (&insns_with_changed_offsets);
 	  gcc_assert (bitmap_empty_p (&insns_with_changed_offsets));
 	}
-#ifdef KELVIN_DEBUG
-      if (lra_dump_file) {
-        fprintf (lra_dump_file, "In middle of lra_eliminate\n");
-        print_elim_table (lra_dump_file);
-      }
-#endif
       /* We change eliminable hard registers in insns so we should do
 	 this for all insns containing any eliminable hard
 	 register.  */
@@ -1663,13 +1448,11 @@ lra_eliminate (bool final_p, bool first_p)
     }
   else if (! update_reg_eliminate (&insns_with_changed_offsets))
     goto lra_eliminate_done;
-#ifdef KELVIN_DEBUG
   if (lra_dump_file != NULL)
     {
       fprintf (lra_dump_file, "New elimination table:\n");
       print_elim_table (lra_dump_file);
     }
-#endif
   EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
     /* A dead insn can be deleted in process_insn_for_elimination.  */
     if (lra_insn_recog_data[uid] != NULL)
diff --git a/gcc/lra.c b/gcc/lra.c
index 2509f999b47..a4737773b6e 100644
--- a/gcc/lra.c
+++ b/gcc/lra.c
@@ -1181,8 +1181,6 @@ lra_update_insn_recog_data (rtx_insn *insn)
     {
       data = lra_get_insn_recog_data (insn);
       /* Initiate or restore SP offset.  */
-      if (lra_dump_file)
-	fprintf (lra_dump_file, "setting sp_offset to %ld\n", sp_offset);
       data->sp_offset = sp_offset;
       return data;
     }
@@ -1815,14 +1813,6 @@ setup_sp_offset (rtx_insn *from, rtx_insn *last)
   rtx_insn *before = next_nonnote_insn_bb (last);
   HOST_WIDE_INT offset = (before == NULL_RTX || ! INSN_P (before)
 			  ? 0 : lra_get_insn_recog_data (before)->sp_offset);
-  if (lra_dump_file) {
-    fprintf (lra_dump_file, "setup_sp_offset with offset: %ld\n", offset);
-    fprintf (lra_dump_file, "from:\n");
-    print_inline_rtx (lra_dump_file, from, 2);
-    fprintf (lra_dump_file, "\nto (inclusive):\n");
-    print_inline_rtx (lra_dump_file, last, 2);
-    fprintf (lra_dump_file, "\n");
-  }
 
   for (rtx_insn *insn = from; insn != NEXT_INSN (last); insn = NEXT_INSN (insn))
     lra_get_insn_recog_data (insn)->sp_offset = offset;
diff --git a/gcc/recog.c b/gcc/recog.c
index 3e105d74e15..cfce0291ba0 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -49,11 +49,6 @@ along with GCC; see the file COPYING3.  If not see
 #endif
 #endif
 
-#undef KELVIN_INSTRUMENTS
-#ifdef KELVIN_INSTRUMENTS
-#include "hard-reg-set.h"
-#endif
-
 static void validate_replace_rtx_1 (rtx *, rtx, rtx, rtx_insn *, bool);
 static void validate_replace_src_1 (rtx *, void *);
 static rtx_insn *split_insn (rtx_insn *);
@@ -2314,18 +2309,6 @@ extract_insn (rtx_insn *insn)
 
       insn_extract (insn);
 
-#ifdef KELVIN_INSTRUMENTS
-      if (dump_file)
-	{
-	  fprintf (dump_file, "extract_insn (");
-	  print_inline_rtx (dump_file, insn, 2);
-	  fprintf (dump_file, "), memoized as %d\n", icode);
-	  fprintf (dump_file, " n_operands: %d\n", recog_data.n_operands);
-	  fprintf (dump_file, " n_alternatives: %d\n",
-		   recog_data.n_alternatives);
-	  fprintf (dump_file, " n_dups: %d\n", recog_data.n_dups);
-	}
-#endif
       for (i = 0; i < noperands; i++)
 	{
 	  recog_data.constraints[i] = insn_data[icode].operand[i].constraint;
@@ -2334,18 +2317,6 @@ extract_insn (rtx_insn *insn)
 	  /* VOIDmode match_operands gets mode from their real operand.  */
 	  if (recog_data.operand_mode[i] == VOIDmode)
 	    recog_data.operand_mode[i] = GET_MODE (recog_data.operand[i]);
-#ifdef KELVIN_INSTRUMENTS
-	  if (dump_file)
-	    {
-	      fprintf (dump_file, " for operand %d:\n", i);
-	      fprintf (dump_file,
-		       "  constraints[i]: %s\n", recog_data.constraints[i]);
-	      fprintf (dump_file,
-		       "  is_operator[i]: %d\n", recog_data.is_operator[i]);
-	      fprintf (dump_file,
-		       "  operand_mode[i]: %d\n", recog_data.operand_mode[i]);
-	    }
-#endif
 	}
     }
   for (i = 0; i < noperands; i++)
@@ -2571,16 +2542,6 @@ constrain_operands (int strict, alternative_mask alternatives)
   struct funny_match funny_match[MAX_RECOG_OPERANDS];
   int funny_match_index;
 
-#ifdef KELVIN_INSTRUMENTS
-  if (dump_file)
-    {
-      fprintf (dump_file, "constrain_operands(%d, %llx)\n",
-	       strict, (unsigned long long int) alternatives);
-      fprintf (dump_file, " n_operands: %d, n_alternatives: %d\n",
-	       recog_data.n_operands, recog_data.n_alternatives);
-    }
-#endif
-
   which_alternative = 0;
   if (recog_data.n_operands == 0 || recog_data.n_alternatives == 0)
     return 1;
@@ -2598,10 +2559,6 @@ constrain_operands (int strict, alternative_mask alternatives)
       int lose = 0;
       funny_match_index = 0;
 
-#ifdef KELVIN_INSTRUMENTS
-      if (dump_file)
-	fprintf (dump_file, "trying out alternative %d\n", which_alternative);
-#endif
       if (!TEST_BIT (alternatives, which_alternative))
 	{
 	  int i;
@@ -2623,10 +2580,6 @@ constrain_operands (int strict, alternative_mask alternatives)
 	  int val;
 	  int len;
 
-#ifdef KELVIN_INSTRUMENTS
-	  if (dump_file)
-	    fprintf (dump_file, "examining operand %d\n", opno);
-#endif
 	  earlyclobber[opno] = 0;
 
 	  /* A unary operator may be accepted by the predicate, but it
@@ -2650,13 +2603,6 @@ constrain_operands (int strict, alternative_mask alternatives)
 	  if (*p == 0 || *p == ',')
 	    win = 1;
 
-#ifdef KELVIN_INSTRUMENTS
-	  if (dump_file)
-	    {
-	      fprintf (dump_file, " looking at constraint %s\n", p);
-	      fprintf (dump_file, " was constraint empty, win: %d\n", win);
-	    }
-#endif
 	  do
 	    switch (c = *p, len = CONSTRAINT_LEN (c, p), c)
 	      {
@@ -2723,11 +2669,6 @@ constrain_operands (int strict, alternative_mask alternatives)
 		  if (val != 0)
 		    win = 1;
 
-#ifdef KELVIN_INSTRUMENTS
-		  if (dump_file)
-		    fprintf (dump_file,
-			     "digit constraint, val: %d, win: %d\n", val, win);
-#endif
 		  /* If output is *x and input is *--x, arrange later
 		     to change the output to *--x as well, since the
 		     output op is the one that will be printed.  */
@@ -2749,11 +2690,6 @@ constrain_operands (int strict, alternative_mask alternatives)
 		    || (strict_memory_address_p (recog_data.operand_mode[opno],
 						 op)))
 		  win = 1;
-
-#ifdef KELVIN_INSTRUMENTS
-		if (dump_file)
-		  fprintf (dump_file, "p constraint, win: %d\n", win);
-#endif
 		break;
 
 		/* No need to check general_operand again;
@@ -2771,24 +2707,9 @@ constrain_operands (int strict, alternative_mask alternatives)
 			    && REGNO (op) >= FIRST_PSEUDO_REGISTER)
 			|| reg_fits_class_p (op, GENERAL_REGS, offset, mode))
 		      win = 1;
-
-#ifdef KELVIN_INSTRUMENTS
-		    if (dump_file)
-		      fprintf (dump_file, "g constraint with REG_P, win: %d\n",
-			       win);
-#endif
 		  }
 		else if (strict < 0 || general_operand (op, mode))
-#ifdef KELVIN_INSTRUMENTS
-		  {
-		    win = 1;
-		    if (dump_file)
-		      fprintf (dump_file,
-			       "g constraint with !REG_p, win: %d\n", win);
-		  }
-#else
 		  win = 1;
-#endif
 		break;
 
 	      default:
@@ -2797,21 +2718,6 @@ constrain_operands (int strict, alternative_mask alternatives)
 		  enum reg_class cl = reg_class_for_constraint (cn);
 		  if (cl != NO_REGS)
 		    {
-#ifdef KELVIN_INSTRUMENTS
-		      if (dump_file)
-			{
-			  fprintf (dump_file,
-				   "Default constraint cl != NO_REGS\n");
-			  fprintf (dump_file, "REG_P (op): %d\n", REG_P (op));
-			  fprintf (dump_file,
-				   "cn: %d, cl: %d, offset: %d, mode: %d\n",
-				   cn, cl, offset, mode);
-			  if (REG_P (op))
-			    fprintf (dump_file,
-				     "reg_fits_class_p () returns %d\n",
-				     reg_fits_class_p (op, cl, offset, mode));
-			}
-#endif
 		      if (strict < 0
 			  || (strict == 0
 			      && REG_P (op)
@@ -2820,28 +2726,11 @@ constrain_operands (int strict, alternative_mask alternatives)
 			  || (REG_P (op)
 			      && reg_fits_class_p (op, cl, offset, mode)))
 		        win = 1;
-#ifdef KELVIN_INSTRUMENTS
-		      if (dump_file)
-			fprintf (dump_file,
-				 "default constraint cl != NO_REGS, win: %d\n",
-				 win);
-#endif
 		    }
 
 		  else if (constraint_satisfied_p (op, cn))
-#ifdef KELVIN_INSTRUMENTS
-		    {
-		      win = 1;
-		      if (dump_file)
-			fprintf (dump_file,
-				 "default constraint cl == NO_REGS "
-				 " and constraint_satisfied_p, win: %d\n",
-				 win);
-		    }
-#else
 		    win = 1;
 
-#endif
 		  else if (insn_extra_memory_constraint (cn)
 			   /* Every memory operand can be reloaded to fit.  */
 			   && ((strict < 0 && MEM_P (op))
@@ -2855,27 +2744,11 @@ constrain_operands (int strict, alternative_mask alternatives)
 			       /* During reload, accept a pseudo  */
 			       || (reload_in_progress && REG_P (op)
 				   && REGNO (op) >= FIRST_PSEUDO_REGISTER)))
-#ifdef KELVIN_INSTRUMENTS
-		    {
-		      win = 1;
-		      if (dump_file)
-			fprintf (dump_file,
-				 "default constraint wins by reload\n");
-		    }
-#else
 		    win = 1;
-#endif
 		  else if (insn_extra_address_constraint (cn)
 			   /* Every address operand can be reloaded to fit.  */
 			   && strict < 0)
-		    {
-		      win = 1;
-#ifdef KELVIN_INSTRUMENTS
-		      if (dump_file)
-			fprintf (dump_file,
-				 "default constraint wins by extra addr\n");
-#endif
-		    }
+		    win = 1;
 		  /* Cater to architectures like IA-64 that define extra memory
 		     constraints without using define_memory_constraint.  */
 		  else if (reload_in_progress
@@ -2885,21 +2758,7 @@ constrain_operands (int strict, alternative_mask alternatives)
 			   && reg_equiv_mem (REGNO (op)) != 0
 			   && constraint_satisfied_p
 			      (reg_equiv_mem (REGNO (op)), cn))
-#ifdef KELVIN_INSTRUMENTS
-		    {
-		      win = 1;
-		      if (dump_file)
-			fprintf (dump_file,
-				 "default constraint wins by specialness\n");
-		    }
-#else
 		    win = 1;
-#endif
-		  else
-		    {
-		      if (dump_file)
-			fprintf (dump_file, "default constraint don't win\n");
-		    }
 		  break;
 		}
 	      }
@@ -2910,23 +2769,7 @@ constrain_operands (int strict, alternative_mask alternatives)
 	     this alternative loses.  */
 	  if (! win)
 	    lose = 1;
-
-#ifdef KELVIN_INSTRUMENTS
-	  if (dump_file)
-	    {
-	      fprintf (dump_file, "after examining constraints for opno %d\n",
-		       opno);
-	      fprintf (dump_file, " constraints is %s\n", p);
-	      fprintf (dump_file, " win is %d, lose is %d\n", win, lose);
-	    }
-#endif
 	}
-
-#ifdef KELVIN_INSTRUMENTS
-      if (dump_file)
-	fprintf (dump_file, "... might return true if !lose (%d)\n",
-		 lose);
-#endif
       /* This alternative won; the operands are ok.
 	 Change whichever operands this alternative says to change.  */
       if (! lose)
@@ -2958,11 +2801,6 @@ constrain_operands (int strict, alternative_mask alternatives)
 						   recog_data.operand[eopno]))
 		    lose = 1;
 
-#ifdef KELVIN_INSTRUMENTS
-	  if (dump_file)
-	    fprintf (dump_file, "... might return true if still !lose (%d)\n",
-		     lose);
-#endif
 	  if (! lose)
 	    {
 	      while (--funny_match_index >= 0)
@@ -2987,15 +2825,7 @@ constrain_operands (int strict, alternative_mask alternatives)
 			  if (strchr (recog_data.constraints[opno], '<') == NULL
 			      && strchr (recog_data.constraints[opno], '>')
 				 == NULL)
-#ifdef KELVIN_INSTRUMENTS
-			    {
-			      if (dump_file)
-				fprintf (dump_file, " ... fail with <>\n");
-			      return 0;
-			    }
-#else
 			    return 0;
-#endif
 			  break;
 			default:
 			  break;
@@ -3010,13 +2840,6 @@ constrain_operands (int strict, alternative_mask alternatives)
     }
   while (which_alternative < recog_data.n_alternatives);
 
-#ifdef KELVIN_INSTRUMENTS
-  if (dump_file)
-    {
-      fprintf (dump_file, "Failing from constrain_operands, strict is %d\n",
-	       strict);
-    }
-#endif
   which_alternative = -1;
   /* If we are about to reject this, but we are not to test strictly,
      try a very loose test.  Only return failure if it fails also.  */
@@ -3040,44 +2863,6 @@ reg_fits_class_p (const_rtx operand, reg_class_t cl, int offset,
   if (cl == NO_REGS)
     return false;
 
-#ifdef KELVIN_INSTRUMENTS
-  if (dump_file)
-    {
-      fprintf (dump_file, "reg_fits_class_p, regno: %d, offset: %d\n",
-	       regno, offset);
-      fprintf (dump_file, "HARD_REGISTER_NUM_P (regno): %d\n",
-	       HARD_REGISTER_NUM_P (regno));
-      fprintf (dump_file, "HARD_REGISTER_NUM_P (regno + offset): %d\n",
-	       HARD_REGISTER_NUM_P (regno + offset));
-      fprintf (dump_file, "cl: %d\n", cl);
-
-      if (HARD_REGISTER_NUM_P (regno)
-	  && HARD_REGISTER_NUM_P (regno + offset)) {
-
-	fprintf (dump_file, "in_hard_reg_set_p () returns %s because ...\n",
-		 (in_hard_reg_set_p (reg_class_contents[(int) cl], mode,
-				     regno + offset)? "true": "false"));
-	fprintf (dump_file, " regno + offset is %d\n", regno + offset);
-
-
-
-
-	fprintf (dump_file, " TEST_HARD_REG_BIT (regs, regno + offset) is %s\n",
-		 TEST_HARD_REG_BIT (reg_class_contents[(int) cl],
-				    regno + offset)? "true": "false");
-
-	fprintf (dump_file, " end_regno is %d\n", end_hard_regno (mode, regno));
-
-	fprintf (dump_file, " HARD_REGISTER_NUM_P (end_regno - 1) is %s\n",
-		 (HARD_REGISTER_NUM_P (end_hard_regno (mode, regno) - 1)?
-		  "true": "false"));
-
-	instrument_reg_set (dump_file, reg_class_contents[(int) cl],
-			    mode, regno + offset);
-      }
-    }
-#endif
-
   /* Regno must not be a pseudo register.  Offset may be negative.  */
   return (HARD_REGISTER_NUM_P (regno)
 	  && HARD_REGISTER_NUM_P (regno + offset)
diff --git a/gcc/regs.h b/gcc/regs.h
index 6fb1e124479..8225355e3f3 100644
--- a/gcc/regs.h
+++ b/gcc/regs.h
@@ -292,23 +292,6 @@ remove_from_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
     CLEAR_HARD_REG_BIT (*regs, regno);
   while (++regno < end_regno);
 }
-/* kelvin help function */
-static inline void
-instrument_reg_set (FILE *dump_file, const HARD_REG_SET regs,
-		    machine_mode mode, unsigned int regno)
-{
-  unsigned int end_regno;
-
-  if (TEST_HARD_REG_BIT (regs, regno))
-    {
-      end_regno = end_hard_regno (mode, regno);
-      if (HARD_REGISTER_NUM_P (end_regno - 1))
-	while (++regno < end_regno)
-	  fprintf (dump_file,
-		   " TEST_HARD_REG_BIT (regs, %d) is %s\n", regno,
-		   (TEST_HARD_REG_BIT (regs, regno)? "true": "false"));
-    }
-}
 
 /* Return true if REGS contains the whole of (reg:MODE REGNO).  */
 
diff --git a/libcpp/lex.c b/libcpp/lex.c
index bbd73405a76..18139bafb9d 100644
--- a/libcpp/lex.c
+++ b/libcpp/lex.c
@@ -2645,20 +2645,6 @@ _cpp_get_fresh_line (cpp_reader *pfile)
     }							\
   while (0)
 
-#ifdef KELVIN_DEBUG
-static FILE *kelvin_lex_trace;
-
-void
-kelvin_trace (const char *msg, struct cpp_buffer *buffer)
-{
-  if (kelvin_lex_trace == NULL)
-    kelvin_lex_trace = fopen ("kelvin-lex-trace", "w");
-
-  fprintf (kelvin_lex_trace, "%s: buffer [%s], current focus @ %ld\n",
-	   msg, buffer->buf, (buffer->cur - buffer->buf));
-}
-#endif
-
 /* Lex a token into pfile->cur_token, which is also incremented, to
    get diagnostics pointing to the correct location.
 
@@ -2726,12 +2712,6 @@ _cpp_lex_direct (cpp_reader *pfile)
       _cpp_process_line_notes (pfile, false);
       result->src_loc = pfile->line_table->highest_line;
     }
-#ifdef KELVIN_DEBUG
-  /* kelvin says this is where we get the next lexical character.
-   * still figuring out how we check for buffer overflow.
-   */
-  kelvin_trace ("b4 switch in cpp_lex_direct", buffer);
-#endif
   c = *buffer->cur++;
 
   if (pfile->forced_token_location_p)