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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2016-05-31 23:32:44 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@linux.vnet.ibm.com> | 2016-05-31 23:32:44 +0000 |
| commit | cc87a686abe88bd09dfb958cfbe80f775c6aaae1 (patch) | |
| tree | fb46b4abcfef2cbc7deaba71eadaea851d33227f | |
| parent | b6a8ac3c06dfefb75b1548dbe8cdc283ddc05888 (diff) | |
Generate mtvsrddibm/power9-gcc6
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ibm/power9-gcc6@236967 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/config/rs6000/vsx.md | 15 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/p9-splat-4.c | 10 |
2 files changed, 16 insertions, 9 deletions
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 8b89022e01e..290b3268819 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -2384,18 +2384,15 @@ ;; V2DF/V2DI splat (define_insn "vsx_splat_<mode>" - [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,wd,wd,?<VSa>,?<VSa>,?<VSa>") + [(set (match_operand:VSX_D 0 "vsx_register_operand" "=<VSa>,<VSa>,we") (vec_duplicate:VSX_D - (match_operand:<VS_scalar> 1 "splat_input_operand" "<VS_64reg>,f,Z,<VSa>,<VSa>,Z")))] + (match_operand:<VS_scalar> 1 "splat_input_operand" "<VS_64reg>,Z,r")))] "VECTOR_MEM_VSX_P (<MODE>mode)" "@ xxpermdi %x0,%x1,%x1,0 - xxpermdi %x0,%x1,%x1,0 lxvdsx %x0,%y1 - xxpermdi %x0,%x1,%x1,0 - xxpermdi %x0,%x1,%x1,0 - lxvdsx %x0,%y1" - [(set_attr "type" "vecperm,vecperm,vecload,vecperm,vecperm,vecload")]) + mtvsrdd %x0,%1,%1" + [(set_attr "type" "vecperm,vecload,mftgpr")]) ;; V4SI splat (ISA 3.0) ;; When SI's are allowed in VSX registers, add XXSPLTW support @@ -2414,7 +2411,7 @@ (define_insn "*vsx_splat_v4si_internal" [(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa") (vec_duplicate:V4SI - (match_operand:SI 1 "reg_or_indexed_operand" "r,Z")))] + (match_operand:SI 1 "splat_input_operand" "r,Z")))] "TARGET_P9_VECTOR" "@ mtvsrws %x0,%1 @@ -2425,7 +2422,7 @@ (define_insn_and_split "*vsx_splat_v4sf_internal" [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa,wa") (vec_duplicate:V4SF - (match_operand:SF 1 "reg_or_indexed_operand" "Z,wy,r")))] + (match_operand:SF 1 "splat_input_operand" "Z,wy,r")))] "TARGET_P9_VECTOR" "@ lxvwsx %x0,%y1 diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c new file mode 100644 index 00000000000..d643324afe1 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2" } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ + +#include <altivec.h> + +vector long long foo (long long a) { return (vector long long) { a, a }; } + +/* { dg-final { scan-assembler "mtvsrdd" } } */ |