diff options
author | Eric Christopher <echristo@redhat.com> | 2003-02-02 09:03:45 +0000 |
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committer | Eric Christopher <echristo@redhat.com> | 2003-02-02 09:03:45 +0000 |
commit | c953ee176f39ba490470bd840e23c6b144f49508 (patch) | |
tree | 967c2fb9634549a62478b839f380a46058075e91 | |
parent | 91a0c86f68771de5b1dc6938f137130248838edc (diff) |
2003-02-02 Eric Christopher <echristo@redhat.com>
* config/mips/mips.c (mips_sign_extend): Remove.
* config/mips/mips-protos.h: Ditto.
* config/mips/mips.md (movdi_internal2_extend): Remove.
(extendsidi2): Fix mode of convert_memory_address.
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/mips-3_4-rewrite-branch@62278 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog.rewrite | 7 | ||||
-rw-r--r-- | gcc/config/mips/mips-protos.h | 3 | ||||
-rw-r--r-- | gcc/config/mips/mips.c | 27 | ||||
-rw-r--r-- | gcc/config/mips/mips.md | 22 |
4 files changed, 11 insertions, 48 deletions
diff --git a/gcc/ChangeLog.rewrite b/gcc/ChangeLog.rewrite index 0e372eddebe..d7dfa65fc1f 100644 --- a/gcc/ChangeLog.rewrite +++ b/gcc/ChangeLog.rewrite @@ -1,3 +1,10 @@ +2003-02-02 Eric Christopher <echristo@redhat.com> + + * config/mips/mips.c (mips_sign_extend): Remove. + * config/mips/mips-protos.h: Ditto. + * config/mips/mips.md (movdi_internal2_extend): Remove. + (extendsidi2): Fix mode of convert_memory_address. + 2003-01-24 Eric Christopher <echristo@redhat.com> * config/mips/mips.md: Rewrite zero_extend* and extend* diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index a746c0d1a00..24329fdb8ad 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -96,7 +96,6 @@ extern const char *mips_fill_delay_slot PARAMS ((const char *, rtx)); extern const char *mips_move_1word PARAMS ((rtx *, rtx, int)); extern const char *mips_move_2words PARAMS ((rtx *, rtx)); -extern const char *mips_sign_extend PARAMS ((rtx, rtx, rtx)); extern const char *mips_emit_prefetch PARAMS ((rtx *)); extern const char *mips_restore_gp PARAMS ((rtx *, rtx)); extern const char *output_block_move PARAMS ((rtx, rtx *, int, @@ -114,7 +113,7 @@ extern int mips_adjust_insn_length PARAMS ((rtx, int)); extern enum reg_class mips_secondary_reload_class PARAMS ((enum reg_class, enum machine_mode, rtx, int)); -extern enum reg_class mips_cannot_change_mode_class +extern enum reg_class mips_cannot_change_mode_class PARAMS ((enum machine_mode, enum machine_mode)); extern int mips_class_max_nregs PARAMS ((enum reg_class, enum machine_mode)); diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 791ce013ead..b0a43394486 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -2665,33 +2665,6 @@ mips_restore_gp (operands, insn) return mips_move_1word (operands, insn, 0); } -/* Return an instruction to sign-extend SImode value SRC and store it - in DImode value DEST. INSN is the original extendsidi2-type insn. */ - -const char * -mips_sign_extend (insn, dest, src) - rtx insn, dest, src; -{ - rtx operands[MAX_RECOG_OPERANDS]; - - if ((register_operand (src, SImode) && FP_REG_P (true_regnum (src))) - || memory_operand (src, SImode)) - { - /* If the source is a floating-point register, we need to use a - 32-bit move, since the float register is not kept sign-extended. - If the source is in memory, we need a 32-bit load. */ - operands[0] = gen_lowpart_SUBREG (SImode, dest); - operands[1] = src; - return mips_move_1word (operands, insn, false); - } - else - { - operands[0] = dest; - operands[1] = src; - return mips_move_2words (operands, insn); - } -} - /* Return the appropriate instructions to move 2 words */ const char * diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index b0663a31710..966ee6f229c 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -4313,12 +4313,6 @@ move\\t%0,%z4\\n\\ ;; Extension insns. ;; Those for integer source operand are ordered widest source type first. -;; In 64 bit mode, 32 bit values in general registers are always -;; correctly sign extended. That means that if the target is a -;; general register, we can sign extend from SImode to DImode just by -;; doing a move. The matching define_insns are *movdi_internal2_extend -;; and *movdi_internal2_mips16. - (define_expand "extendsidi2" [(set (match_operand:DI 0 "register_operand" "") (sign_extend:DI (match_operand:SI 1 "move_operand" "")))] @@ -4327,8 +4321,10 @@ move\\t%0,%z4\\n\\ { if (symbolic_operand (operands[1], SImode)) { - emit_move_insn (operands[0], convert_memory_address (Pmode, operands[1])); DONE; + emit_move_insn (operands[0], convert_memory_address (DImode, operands[1])); + DONE; } + }") (define_insn "*extendsidi2" @@ -5252,18 +5248,6 @@ move\\t%0,%z4\\n\\ ;; This pattern is essentially a trimmed-down version of movdi_internal2. ;; The main difference is that dJ -> f and f -> d are the only constraints ;; involving float registers. See mips_secondary_reload_class for details. -(define_insn "*movdi_internal2_extend" - [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,m,*d,*f,*x,*d,*x,*a,*B*C*D,*B*C*D,*d,*m") - (sign_extend:DI (match_operand:SI 1 "move_operand" "d,R,m,dJ,*f,*d*J,*J,*x,*d,*J,*d,*m,*B*C*D,*B*C*D")))] - "TARGET_64BIT - && (register_operand (operands[0], DImode) - || register_operand (operands[1], DImode) - || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0) - || operands[1] == CONST0_RTX (DImode))" - "* return mips_sign_extend (insn, operands[0], operands[1]);" - [(set_attr "type" "move,const,load,store,xfer,xfer,hilo,hilo,hilo,hilo,xfer,load,xfer,store") - (set_attr "mode" "DI") - (set_attr "length" "4,*,*,*,4,4,4,4,4,8,8,*,8,*")]) (define_insn "*movdi_internal2_mips16" [(set (match_operand:DI 0 "nonimmediate_operand" "=d,y,d,d,d,d,d,m,*d") |