diff options
Diffstat (limited to 'gcc/config/mips')
| -rw-r--r-- | gcc/config/mips/mips.c | 10 | ||||
| -rw-r--r-- | gcc/config/mips/mips.h | 9 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 2 | ||||
| -rw-r--r-- | gcc/config/mips/xlr.md | 4 |
4 files changed, 12 insertions, 13 deletions
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 0b51c78f576..ca727ad12e5 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -1094,13 +1094,7 @@ static const struct mips_rtx_cost_data mips_rtx_cost_data[PROCESSOR_MAX] = { DEFAULT_COSTS }, { /* XLR */ - /* Need to replace first five with the costs of calling the appropriate - libgcc routine. */ - COSTS_N_INSNS (256), /* fp_add */ - COSTS_N_INSNS (256), /* fp_mult_sf */ - COSTS_N_INSNS (256), /* fp_mult_df */ - COSTS_N_INSNS (256), /* fp_div_sf */ - COSTS_N_INSNS (256), /* fp_div_df */ + SOFT_FP_COSTS, COSTS_N_INSNS (8), /* int_mult_si */ COSTS_N_INSNS (8), /* int_mult_di */ COSTS_N_INSNS (72), /* int_div_si */ @@ -14725,7 +14719,7 @@ mips_final_prescan_insn (rtx insn, rtx *opvec, int noperands) /* Implement TARGET_ASM_FINAL_POSTSCAN_INSN. */ -void +static void mips_final_postscan_insn (FILE *file, rtx insn, rtx *opvec, int noperands) { int i; diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 45971acf08a..cd6f1e5d220 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -709,7 +709,8 @@ enum mips_code_readable_setting { %{march=mips32|march=4kc|march=4km|march=4kp|march=4ksc:-mips32} \ %{march=mips32r2|march=m4k|march=4ke*|march=4ksd|march=24k* \ |march=34k*|march=74k*: -mips32r2} \ - %{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000: -mips64} \ + %{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000 \ + |march=xlr: -mips64} \ %{march=mips64r2|march=octeon: -mips64r2} \ %{!march=*: -" MULTILIB_ISA_DEFAULT "}}" @@ -720,7 +721,7 @@ enum mips_code_readable_setting { #define MIPS_ARCH_FLOAT_SPEC \ "%{mhard-float|msoft-float|march=mips*:; \ march=vr41*|march=m4k|march=4k*|march=24kc|march=24kec \ - |march=34kc|march=74kc|march=5kc|march=octeon: -msoft-float; \ + |march=34kc|march=74kc|march=5kc|march=octeon|march=xlr: -msoft-float; \ march=*: -mhard-float}" /* A spec condition that matches 32-bit options. It only works if @@ -3462,3 +3463,7 @@ extern enum mips_code_readable_setting mips_code_readable; #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ mips_final_prescan_insn (INSN, OPVEC, NOPERANDS) + +/* This is necessary to avoid a warning about comparing different enum + types. */ +#define mips_tune_attr ((enum attr_cpu) mips_tune) diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 8a6719466d3..8453aab3deb 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -571,7 +571,7 @@ ;; with the processor_type enumeration in mips.h. (define_attr "cpu" "r3000,4kc,4kp,5kc,5kf,20kc,24kc,24kf2_1,24kf1_1,74kc,74kf2_1,74kf1_1,74kf3_2,loongson_2e,loongson_2f,m4k,octeon,r3900,r6000,r4000,r4100,r4111,r4120,r4130,r4300,r4600,r4650,r5000,r5400,r5500,r7000,r8000,r9000,r10000,sb1,sb1a,sr71000,xlr" - (const (symbol_ref "mips_tune"))) + (const (symbol_ref "mips_tune_attr"))) ;; The type of hardware hazard associated with this instruction. ;; DELAY means that the next instruction cannot read the result diff --git a/gcc/config/mips/xlr.md b/gcc/config/mips/xlr.md index 21550ba12d9..69913b7b2fb 100644 --- a/gcc/config/mips/xlr.md +++ b/gcc/config/mips/xlr.md @@ -1,5 +1,5 @@ ;; DFA-based pipeline description for the XLR. -;; Copyright (C) 2008 Free Software Foundation, Inc. +;; Copyright (C) 2008, 2009 Free Software Foundation, Inc. ;; ;; xlr.md Machine Description for the RMI XLR Microprocessor ;; This file is part of GCC. @@ -31,7 +31,7 @@ ;; Integer arithmetic instructions. (define_insn_reservation "ir_xlr_alu" 1 (and (eq_attr "cpu" "xlr") - (eq_attr "type" "arith,shift,clz,const,unknown,multi,nop,trap")) + (eq_attr "type" "move,arith,shift,clz,logical,signext,const,unknown,multi,nop,trap")) "xlr_main_pipe") ;; Integer arithmetic instructions. |