diff options
Diffstat (limited to 'gcc/config')
126 files changed, 4054 insertions, 4307 deletions
diff --git a/gcc/config/1750a/1750a.c b/gcc/config/1750a/1750a.c index ff9ae37e880..f35c087a456 100644 --- a/gcc/config/1750a/1750a.c +++ b/gcc/config/1750a/1750a.c @@ -21,8 +21,7 @@ Boston, MA 02111-1307, USA. */ #define __datalbl #include "config.h" -#include <stdio.h> -#include <string.h> +#include "system.h" #include "rtl.h" #include "tree.h" #include "expr.h" @@ -117,7 +116,7 @@ function_arg (cum, mode, type, named) else size = GET_MODE_SIZE (mode); if (cum + size < 12) - return gen_rtx (REG, mode, cum); + return gen_rtx_REG (mode, cum); else return (rtx) 0; } diff --git a/gcc/config/1750a/1750a.h b/gcc/config/1750a/1750a.h index 2394165a2c4..3fa7066b4d5 100644 --- a/gcc/config/1750a/1750a.h +++ b/gcc/config/1750a/1750a.h @@ -474,14 +474,14 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx(REG,TYPE_MODE(VALTYPE),0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* 1750 note: no libcalls yet */ #define LIBCALL_VALUE(MODE) printf("LIBCALL_VALUE called!\n"), \ - gen_rtx(REG,MODE,0) + gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value. */ @@ -696,8 +696,8 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) printf("INITIALIZE_TRAMPO called\n") /* { \ - emit_move_insn (gen_rtx (MEM, QImode, plus_constant (TRAMP, 1)), CXT); \ - emit_move_insn (gen_rtx (MEM, QImode, plus_constant (TRAMP, 6)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 1)), CXT); \ + emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 6)), FNADDR); \ } */ @@ -853,8 +853,8 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA in one reasonably fast instruction. */ #define MOVE_MAX 65536 -/* MOVE_RATIO is the number of move instructions that is better than a - block move. */ +/* If a memory-to-memory move would take MOVE_RATIO or more simple + move-instruction pairs, we will do a movstr or libcall instead. */ #define MOVE_RATIO 4 /* Define this if zero-extension is slow (more than one real instruction). */ diff --git a/gcc/config/1750a/1750a.md b/gcc/config/1750a/1750a.md index 161d75d9bda..983cbf0f217 100644 --- a/gcc/config/1750a/1750a.md +++ b/gcc/config/1750a/1750a.md @@ -1,6 +1,6 @@ ;;- Machine description for GNU compiler ;;- MIL-STD-1750A version. -;; Copyright (C) 1994, 1995, 1996, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc. ;; Contributed by O.M.Kellogg, DASA (oliver.kellogg@space.otn.dasa.de). ;; This file is part of GNU CC. @@ -669,7 +669,7 @@ rtx new_opnds[4]; new_opnds[0] = operands[0]; new_opnds[1] = operands[1]; - new_opnds[2] = gen_rtx (CONST_INT, VOIDmode, -INTVAL(operands[2])); + new_opnds[2] = GEN_INT (-INTVAL(operands[2])); new_opnds[3] = operands[3]; istr = \"disn\"; return mod_regno_adjust (istr, new_opnds); @@ -767,9 +767,9 @@ (neg:TQF (match_operand:TQF 1 "register_operand" "r")))] "" " - emit_insn(gen_rtx(SET,VOIDmode,operands[0],CONST0_RTX(TQFmode))); - emit_insn(gen_rtx(SET,VOIDmode,operands[0], - gen_rtx(MINUS,TQFmode,operands[0],operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], CONST0_RTX (TQFmode))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_MINUS (TQFmode, operands[0], operands[1]))); DONE; ") @@ -954,7 +954,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -981,7 +981,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -1012,7 +1012,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -1038,7 +1038,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -1375,17 +1375,6 @@ "" "ANYCALL %0") - -; (define_insn "return" -; [(return)] -; "" -; "* -; { -; rtx oprnd = gen_rtx(CONST_INT,VOIDmode,get_frame_size()); -; output_asm_insn(\"ret.m %0\",&oprnd); -; return \"\;\"; -; } ") - (define_insn "indirect_jump" [(set (pc) (match_operand:QI 0 "address_operand" "p"))] "" diff --git a/gcc/config/a29k/a29k.c b/gcc/config/a29k/a29k.c index 4b28bba00bd..ad33bb95ef0 100644 --- a/gcc/config/a29k/a29k.c +++ b/gcc/config/a29k/a29k.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on AMD Am29000. - Copyright (C) 1987, 88, 90-94, 1995, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 90-95, 97, 1998 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@nyu.edu) This file is part of GNU CC. @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -850,9 +850,10 @@ a29k_clobbers_to (insn, op) for (i = R_LR (2); i < high_regno; i++) CALL_INSN_FUNCTION_USAGE (insn) - = gen_rtx (EXPR_LIST, VOIDmode, - gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, SImode, i)), - CALL_INSN_FUNCTION_USAGE (insn)); + = gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_CLOBBER (VOIDmode, + gen_rtx (REG, SImode, i)), + CALL_INSN_FUNCTION_USAGE (insn)); } /* These routines are used in finding insns to fill delay slots in the diff --git a/gcc/config/a29k/a29k.h b/gcc/config/a29k/a29k.h index 03e7f73be39..94bf8957000 100644 --- a/gcc/config/a29k/a29k.h +++ b/gcc/config/a29k/a29k.h @@ -746,12 +746,12 @@ extern struct rtx_def *a29k_get_reloaded_address (); On 29k the value is found in gr96. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), R_GR (96)) + gen_rtx_REG (TYPE_MODE (VALTYPE), R_GR (96)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, R_GR (96)) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, R_GR (96)) /* 1 if N is a possible register number for a function value as seen by the caller. @@ -846,7 +846,7 @@ extern struct rtx_def *a29k_get_reloaded_address (); #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ - ? gen_rtx(REG, (MODE), R_LR (2) + (CUM)) : 0) + ? gen_rtx_REG ((MODE), R_LR (2) + (CUM)) : 0) /* Define where a function finds its arguments. This is different from FUNCTION_ARG because of register windows. @@ -856,8 +856,8 @@ extern struct rtx_def *a29k_get_reloaded_address (); #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ - ? gen_rtx (REG, MODE, \ - incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \ + ? gen_rtx_REG (MODE, \ + incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \ : 0) /* This indicates that an argument is to be passed with an invisible reference @@ -911,7 +911,7 @@ extern struct rtx_def *a29k_get_reloaded_address (); if (! (NO_RTL) && first_reg_offset != 16) \ move_block_from_reg \ (R_AR (0) + first_reg_offset, \ - gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx), \ + gen_rtx_MEM (BLKmode, virtual_incoming_args_rtx), \ 16 - first_reg_offset, (16 - first_reg_offset) * UNITS_PER_WORD); \ PRETEND_SIZE = (16 - first_reg_offset) * UNITS_PER_WORD; \ } \ @@ -1043,25 +1043,25 @@ extern char *a29k_function_name; rtx _val = force_reg (SImode, VALUE); \ \ _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3)); \ - emit_move_insn (gen_rtx (MEM, QImode, _addr), \ + emit_move_insn (gen_rtx_MEM (QImode, _addr), \ gen_lowpart (QImode, _val)); \ \ _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ build_int_2 (8, 0), 0, 1); \ _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1)); \ - emit_move_insn (gen_rtx (MEM, QImode, _addr), \ + emit_move_insn (gen_rtx_MEM (QImode, _addr), \ gen_lowpart (QImode, _temp)); \ \ _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ build_int_2 (8, 0), _temp, 1); \ _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3)); \ - emit_move_insn (gen_rtx (MEM, QImode, _addr), \ + emit_move_insn (gen_rtx_MEM (QImode, _addr), \ gen_lowpart (QImode, _temp)); \ \ _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ build_int_2 (8, 0), _temp, 1); \ _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1)); \ - emit_move_insn (gen_rtx (MEM, QImode, _addr), \ + emit_move_insn (gen_rtx_MEM (QImode, _addr), \ gen_lowpart (QImode, _temp)); \ } diff --git a/gcc/config/a29k/a29k.md b/gcc/config/a29k/a29k.md index cc4f422b0f2..91e5f34be05 100644 --- a/gcc/config/a29k/a29k.md +++ b/gcc/config/a29k/a29k.md @@ -1,5 +1,5 @@ ;;- Machine description for AMD Am29000 for GNU C compiler -;; Copyright (C) 1991, 1992, 1994 Free Software Foundation, Inc. +;; Copyright (C) 1991, 1992, 1994, 1998 Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; This file is part of GNU CC. @@ -145,8 +145,8 @@ later be inlined into another function. */ if (! TARGET_SMALL_MEMORY && GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF) - operands[0] = gen_rtx (MEM, SImode, - force_reg (Pmode, XEXP (operands[0], 0))); + operands[0] = gen_rtx_MEM (SImode, + force_reg (Pmode, XEXP (operands[0], 0))); }") (define_expand "call_value" @@ -178,9 +178,8 @@ later be inlined into another function. */ if (! TARGET_SMALL_MEMORY && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF) - operands[1] = gen_rtx (MEM, SImode, - force_reg (Pmode, XEXP (operands[1], 0))); - + operands[1] = gen_rtx_MEM (SImode, + force_reg (Pmode, XEXP (operands[1], 0))); }") (define_insn "" @@ -644,9 +643,9 @@ if (size != 8 || (pos != 8 && pos != 16)) FAIL; - operands[3] = gen_rtx (ASHIFT, PSImode, - force_reg (PSImode, GEN_INT (pos / 8)), - GEN_INT (3)); + operands[3] = gen_rtx_ASHIFT (PSImode, + force_reg (PSImode, GEN_INT (pos / 8)), + GEN_INT (3)); }") @@ -967,9 +966,9 @@ if ((size != 8 && size != 16) || pos % size != 0) FAIL; - operands[2] = gen_rtx (ASHIFT, PSImode, - force_reg (PSImode, GEN_INT (pos / 8)), - GEN_INT (3)); + operands[2] = gen_rtx_ASHIFT (PSImode, + force_reg (PSImode, GEN_INT (pos / 8)), + GEN_INT (3)); }") ;; LOAD (also used by move insn). @@ -1056,20 +1055,20 @@ /* CR gets set to the number of registers minus one. */ operands[2] = GEN_INT(count - 1); - operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 2)); + operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 2)); from = memory_address (SImode, XEXP (operands[1], 0)); - XVECEXP (operands[3], 0, 0) = gen_rtx (SET, VOIDmode, - gen_rtx (REG, SImode, regno), - gen_rtx (MEM, SImode, from)); + XVECEXP (operands[3], 0, 0) = gen_rtx_SET (VOIDmode, + gen_rtx_REG (SImode, regno), + gen_rtx_MEM (SImode, from)); operands[4] = gen_reg_rtx (PSImode); - XVECEXP (operands[3], 0, 1) = gen_rtx (USE, VOIDmode, operands[4]); - XVECEXP (operands[3], 0, 2) = gen_rtx (CLOBBER, VOIDmode, operands[4]); + XVECEXP (operands[3], 0, 1) = gen_rtx_USE (VOIDmode, operands[4]); + XVECEXP (operands[3], 0, 2) = gen_rtx_CLOBBER (VOIDmode, operands[4]); for (i = 1; i < count; i++) XVECEXP (operands[3], 0, i + 2) - = gen_rtx (SET, VOIDmode, gen_rtx (REG, SImode, regno + i), - gen_rtx (MEM, SImode, plus_constant (from, i * 4))); + = gen_rtx_SET (VOIDmode, gen_rtx (REG, SImode, regno + i), + gen_rtx_MEM (SImode, plus_constant (from, i * 4))); }") ;; Indicate that CR is used and is then clobbered. @@ -1378,20 +1377,20 @@ /* CR gets set to the number of registers minus one. */ operands[2] = GEN_INT(count - 1); - operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 2)); + operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 2)); from = memory_address (SImode, XEXP (operands[0], 0)); - XVECEXP (operands[3], 0, 0) = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, from), - gen_rtx (REG, SImode, regno)); + XVECEXP (operands[3], 0, 0) = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (SImode, from), + gen_rtx_REG (SImode, regno)); operands[4] = gen_reg_rtx (PSImode); - XVECEXP (operands[3], 0, 1) = gen_rtx (USE, VOIDmode, operands[4]); - XVECEXP (operands[3], 0, 2) = gen_rtx (CLOBBER, VOIDmode, operands[4]); + XVECEXP (operands[3], 0, 1) = gen_rtx_USE (VOIDmode, operands[4]); + XVECEXP (operands[3], 0, 2) = gen_rtx_CLOBBER (VOIDmode, operands[4]); for (i = 1; i < count; i++) XVECEXP (operands[3], 0, i + 2) - = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, plus_constant (from, i * 4)), - gen_rtx (REG, SImode, regno + i)); + = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (SImode, plus_constant (from, i * 4)), + gen_rtx_REG (SImode, regno + i)); }") (define_expand "store_multiple_bug" @@ -1417,19 +1416,19 @@ count = INTVAL (operands[2]); regno = REGNO (operands[1]); - operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 1)); + operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 1)); from = memory_address (SImode, XEXP (operands[0], 0)); - XVECEXP (operands[3], 0, 0) = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, from), - gen_rtx (REG, SImode, regno)); + XVECEXP (operands[3], 0, 0) = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (SImode, from), + gen_rtx_REG (SImode, regno)); XVECEXP (operands[3], 0, 1) - = gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, PSImode)); + = gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (PSImode)); for (i = 1; i < count; i++) XVECEXP (operands[3], 0, i + 1) - = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, plus_constant (from, i * 4)), - gen_rtx (REG, SImode, regno + i)); + = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (SImode, plus_constant (from, i * 4)), + gen_rtx_REG (SImode, regno + i)); }") (define_insn "" @@ -1811,7 +1810,7 @@ " { rtx seq = gen_loadhi (gen_lowpart (SImode, operands[0]), a29k_get_reloaded_address (operands[1]), - gen_rtx (REG, SImode, R_TAV), + gen_rtx_REG (SImode, R_TAV), operands[2]); a29k_set_memflags (seq, operands[1]); @@ -1828,7 +1827,7 @@ { rtx (*fcn) () = TARGET_BYTE_WRITES ? gen_storehihww : gen_storehinhww; rtx seq = (*fcn) (a29k_get_reloaded_address (operands[0]), gen_lowpart (SImode, operands[1]), - gen_rtx (REG, SImode, R_TAV), operands[2]); + gen_rtx_REG (SImode, R_TAV), operands[2]); a29k_set_memflags (seq, operands[0]); emit_insn (seq); @@ -1941,7 +1940,7 @@ " { rtx seq = gen_loadqi (gen_lowpart (SImode, operands[0]), a29k_get_reloaded_address (operands[1]), - gen_rtx (REG, SImode, R_TAV), + gen_rtx_REG (SImode, R_TAV), operands[2]); a29k_set_memflags (seq, operands[1]); @@ -1958,7 +1957,7 @@ { rtx (*fcn) () = TARGET_BYTE_WRITES ? gen_storeqihww : gen_storeqinhww; rtx seq = (*fcn) (a29k_get_reloaded_address (operands[0]), gen_lowpart (SImode, operands[1]), - gen_rtx (REG, SImode, R_TAV), operands[2]); + gen_rtx_REG (SImode, R_TAV), operands[2]); a29k_set_memflags (seq, operands[0]); emit_insn (seq); @@ -2173,25 +2172,25 @@ if (REGNO (operands[0]) >= REGNO (operands[1]) + 1 && REGNO (operands[0]) <= REGNO (operands[1]) + 3) { - operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]) + 3); - operands[4] = gen_rtx (REG, SImode, REGNO (operands[1]) + 3); - operands[5] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2); - operands[6] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2); - operands[7] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - operands[8] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); - operands[9] = gen_rtx (REG, SImode, REGNO (operands[0])); - operands[10] = gen_rtx (REG, SImode, REGNO (operands[1])); + operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 3); + operands[4] = gen_rtx_REG (SImode, REGNO (operands[1]) + 3); + operands[5] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2); + operands[6] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2); + operands[7] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + operands[8] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); + operands[9] = gen_rtx_REG (SImode, REGNO (operands[0])); + operands[10] = gen_rtx_REG (SImode, REGNO (operands[1])); } else { - operands[3] = gen_rtx (REG, SImode, REGNO (operands[0])); - operands[4] = gen_rtx (REG, SImode, REGNO (operands[1])); - operands[5] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - operands[6] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); - operands[7] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2); - operands[8] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2); - operands[9] = gen_rtx (REG, SImode, REGNO (operands[0]) + 3); - operands[10] = gen_rtx (REG, SImode, REGNO (operands[1]) + 3); + operands[3] = gen_rtx_REG (SImode, REGNO (operands[0])); + operands[4] = gen_rtx_REG (SImode, REGNO (operands[1])); + operands[5] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + operands[6] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); + operands[7] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2); + operands[8] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2); + operands[9] = gen_rtx_REG (SImode, REGNO (operands[0]) + 3); + operands[10] = gen_rtx_REG (SImode, REGNO (operands[1]) + 3); } }") @@ -2553,9 +2552,9 @@ { operands[1] = gen_reg_rtx (SImode); if (a29k_compare_fp_p) - operands[2] = gen_rtx (GT, SImode, a29k_compare_op1, a29k_compare_op0); + operands[2] = gen_rtx_GT (SImode, a29k_compare_op1, a29k_compare_op0); else - operands[2] = gen_rtx (LT, SImode, a29k_compare_op0, a29k_compare_op1); + operands[2] = gen_rtx_LT (SImode, a29k_compare_op0, a29k_compare_op1); }") ;; Similarly for "le". @@ -2570,9 +2569,9 @@ { operands[1] = gen_reg_rtx (SImode); if (a29k_compare_fp_p) - operands[2] = gen_rtx (GE, SImode, a29k_compare_op1, a29k_compare_op0); + operands[2] = gen_rtx_GE (SImode, a29k_compare_op1, a29k_compare_op0); else - operands[2] = gen_rtx (LE, SImode, a29k_compare_op0, a29k_compare_op1); + operands[2] = gen_rtx_LE (SImode, a29k_compare_op0, a29k_compare_op1); }") (define_expand "bltu" @@ -2708,9 +2707,9 @@ " { if (a29k_compare_fp_p) - operands[1] = gen_rtx (GT, SImode, a29k_compare_op1, a29k_compare_op0); + operands[1] = gen_rtx_GT (SImode, a29k_compare_op1, a29k_compare_op0); else - operands[1] = gen_rtx (LT, SImode, a29k_compare_op0, a29k_compare_op1); + operands[1] = gen_rtx_LT (SImode, a29k_compare_op0, a29k_compare_op1); }") ;; Similarly for "le" @@ -2721,9 +2720,9 @@ " { if (a29k_compare_fp_p) - operands[1] = gen_rtx (GE, SImode, a29k_compare_op1, a29k_compare_op0); + operands[1] = gen_rtx_GE (SImode, a29k_compare_op1, a29k_compare_op0); else - operands[1] = gen_rtx (LE, SImode, a29k_compare_op0, a29k_compare_op1); + operands[1] = gen_rtx_LE (SImode, a29k_compare_op0, a29k_compare_op1); }") (define_expand "sltu" diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index 4c3c6c67294..7b809314778 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -21,7 +21,7 @@ Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -322,7 +322,7 @@ sext_add_operand (op, mode) return ((unsigned HOST_WIDE_INT) INTVAL (op) < 255 || (unsigned HOST_WIDE_INT) (- INTVAL (op)) < 255); - return register_operand (op, mode); + return reg_not_elim_operand (op, mode); } /* Return 1 if OP is the constant 4 or 8. */ @@ -763,8 +763,8 @@ get_aligned_mem (ref, paligned_mem, pbitnum) if (GET_CODE (base) == PLUS) offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0); - *paligned_mem = gen_rtx (MEM, SImode, - plus_constant (base, offset & ~3)); + *paligned_mem = gen_rtx_MEM (SImode, + plus_constant (base, offset & ~3)); MEM_IN_STRUCT_P (*paligned_mem) = MEM_IN_STRUCT_P (ref); MEM_VOLATILE_P (*paligned_mem) = MEM_VOLATILE_P (ref); RTX_UNCHANGING_P (*paligned_mem) = RTX_UNCHANGING_P (ref); @@ -1628,9 +1628,9 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt) /* Store function address and CXT. */ addr = memory_address (Pmode, plus_constant (tramp, 16)); - emit_move_insn (gen_rtx (MEM, Pmode, addr), fnaddr); + emit_move_insn (gen_rtx_MEM (Pmode, addr), fnaddr); addr = memory_address (Pmode, plus_constant (tramp, 24)); - emit_move_insn (gen_rtx (MEM, Pmode, addr), cxt); + emit_move_insn (gen_rtx_MEM (Pmode, addr), cxt); /* Compute hint value. */ temp = force_operand (plus_constant (tramp, 12), NULL_RTX); @@ -1641,18 +1641,18 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt) /* Merge in the hint. */ addr = memory_address (SImode, plus_constant (tramp, 8)); - temp1 = force_reg (SImode, gen_rtx (MEM, SImode, addr)); + temp1 = force_reg (SImode, gen_rtx_MEM (SImode, addr)); temp1 = expand_and (temp1, GEN_INT (0xffffc000), NULL_RTX); temp1 = expand_binop (SImode, ior_optab, temp1, temp, temp1, 1, OPTAB_WIDEN); - emit_move_insn (gen_rtx (MEM, SImode, addr), temp1); + emit_move_insn (gen_rtx_MEM (SImode, addr), temp1); #ifdef TRANSFER_FROM_TRAMPOLINE - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"), + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"), 0, VOIDmode, 1, addr, Pmode); #endif - emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, - gen_rtvec (1, const0_rtx), 0)); + emit_insn (gen_rtx_UNSPEC_VOLATILE (VOIDmode, + gen_rtvec (1, const0_rtx), 0)); } /* Do what is necessary for `va_start'. The argument is ignored; @@ -1722,7 +1722,7 @@ alpha_builtin_saveregs (arglist) dest = change_address (block, ptr_mode, XEXP (block, 0)); emit_move_insn (dest, addr); - if (flag_check_memory_usage) + if (current_function_check_memory_usage) emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, dest, ptr_mode, GEN_INT (GET_MODE_SIZE (ptr_mode)), @@ -1736,7 +1736,7 @@ alpha_builtin_saveregs (arglist) POINTER_SIZE/BITS_PER_UNIT)); emit_move_insn (dest, argsize); - if (flag_check_memory_usage) + if (current_function_check_memory_usage) emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, dest, ptr_mode, GEN_INT (GET_MODE_SIZE @@ -1777,8 +1777,8 @@ alpha_return_addr () { alpha_return_addr_rtx = ret = gen_reg_rtx (Pmode); - emit_insn_after (gen_rtx (SET, VOIDmode, ret, - gen_rtx (REG, Pmode, REG_RA)), + emit_insn_after (gen_rtx_SET (VOIDmode, ret, + gen_rtx_REG (Pmode, REG_RA)), get_insns ()); } @@ -1933,6 +1933,34 @@ alpha_sa_size () #endif /* ! OPEN_VMS */ +/* Returns 1 if OP is a register which is not eliminable (i.e., not SP or FP). + + This is used in the patterns used for the integer multiply-add + insn to avoid creating complex expressions that will cause trouble + during reload and need numerous additional patterns to be + recognized. */ + +int +reg_not_elim_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + if (op == frame_pointer_rtx || op == arg_pointer_rtx) + return 0; + + return register_operand (op, mode); +} + +/* Likewise, but allow 8 bit constants as well. */ + +int +reg_not_elim_or_8bit_operand (op, mode) + rtx op; + enum machine_mode mode; +{ + return reg_not_elim_operand (op, mode) || cint8_operand (op, mode); +} + /* Return 1 if this function can directly return via $26. */ int diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index cbfbf0e52a2..a74731abc25 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -917,25 +917,24 @@ enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, $f0 for floating-point functions. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, \ - ((INTEGRAL_TYPE_P (VALTYPE) \ - && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ - || POINTER_TYPE_P (VALTYPE)) \ - ? word_mode : TYPE_MODE (VALTYPE), \ - ((TARGET_FPREGS \ - && (TREE_CODE (VALTYPE) == REAL_TYPE \ - || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \ - ? 32 : 0)) + gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \ + && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ + || POINTER_TYPE_P (VALTYPE)) \ + ? word_mode : TYPE_MODE (VALTYPE), \ + ((TARGET_FPREGS \ + && (TREE_CODE (VALTYPE) == REAL_TYPE \ + || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \ + ? 32 : 0)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, \ - (TARGET_FPREGS \ - && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ - || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ - ? 32 : 0)) + gen_rtx_REG (MODE, \ + (TARGET_FPREGS \ + && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ + || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ + ? 32 : 0)) /* The definition of this macro implies that there are cases where a scalar value cannot be returned in registers. @@ -1013,11 +1012,12 @@ enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \ - ? gen_rtx(REG, (MODE), \ - (CUM) + 16 + ((TARGET_FPREGS \ - && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ - || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ - * 32)) \ + ? gen_rtx_REG ((MODE), \ + (CUM) + 16 \ + + ((TARGET_FPREGS \ + && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ + || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ + * 32)) \ : 0) /* Specify the padding direction of arguments. @@ -1071,15 +1071,15 @@ enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, { \ move_block_from_reg \ (16 + CUM, \ - gen_rtx (MEM, BLKmode, \ - plus_constant (virtual_incoming_args_rtx, \ - ((CUM) + 6)* UNITS_PER_WORD)), \ + gen_rtx_MEM (BLKmode, \ + plus_constant (virtual_incoming_args_rtx, \ + ((CUM) + 6)* UNITS_PER_WORD)), \ 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ move_block_from_reg \ (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \ - gen_rtx (MEM, BLKmode, \ - plus_constant (virtual_incoming_args_rtx, \ - (CUM) * UNITS_PER_WORD)), \ + gen_rtx_MEM (BLKmode, \ + plus_constant (virtual_incoming_args_rtx, \ + (CUM) * UNITS_PER_WORD)), \ 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ } \ PRETEND_SIZE = 12 * UNITS_PER_WORD; \ @@ -1495,9 +1495,8 @@ extern void final_prescan_insn (); #define FIXUNS_TRUNC_LIKE_FIX_TRUNC -/* Max number of bytes we can move to or from memory - in one reasonably fast instruction. */ - +/* If a memory-to-memory move would take MOVE_RATIO or more simple + move-instruction pairs, we will do a movstr or libcall instead. */ #define MOVE_MAX 8 /* Largest number of bytes of an object that can be placed in a register. @@ -2108,35 +2107,37 @@ literal_section () \ /* Define the codes that are matched by predicates in alpha.c. */ #define PREDICATE_CODES \ - {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ - {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \ - {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \ - {"cint8_operand", {CONST_INT}}, \ - {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ {"add_operand", {SUBREG, REG, CONST_INT}}, \ - {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \ - {"const48_operand", {CONST_INT}}, \ - {"and_operand", {SUBREG, REG, CONST_INT}}, \ - {"or_operand", {SUBREG, REG, CONST_INT}}, \ - {"mode_mask_operand", {CONST_INT}}, \ - {"mul8_operand", {CONST_INT}}, \ - {"mode_width_operand", {CONST_INT}}, \ - {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ + {"aligned_memory_operand", {MEM}}, \ {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \ {"alpha_swapped_comparison_operator", {EQ, GE, GT, GEU, GTU}}, \ - {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ + {"and_operand", {SUBREG, REG, CONST_INT}}, \ + {"any_memory_operand", {MEM}}, \ + {"call_operand", {REG, SYMBOL_REF}}, \ + {"cint8_operand", {CONST_INT}}, \ + {"const48_operand", {CONST_INT}}, \ + {"current_file_function_operand", {SYMBOL_REF}}, \ {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ {"fp0_operand", {CONST_DOUBLE}}, \ - {"current_file_function_operand", {SYMBOL_REF}}, \ - {"call_operand", {REG, SYMBOL_REF}}, \ {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ SYMBOL_REF, CONST, LABEL_REF}}, \ + {"mode_mask_operand", {CONST_INT}}, \ + {"mode_width_operand", {CONST_INT}}, \ + {"mul8_operand", {CONST_INT}}, \ + {"or_operand", {SUBREG, REG, CONST_INT}}, \ + {"reg_not_elim_operand", {SUBREG, REG}}, \ + {"reg_not_elim_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \ + {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ + {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \ + {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \ + {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ + {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ + {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \ + {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \ + {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ SYMBOL_REF, CONST, LABEL_REF}}, \ - {"aligned_memory_operand", {MEM}}, \ - {"unaligned_memory_operand", {MEM}}, \ - {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \ - {"any_memory_operand", {MEM}}, + {"unaligned_memory_operand", {MEM}}, /* Tell collect that the object format is ECOFF. */ #define OBJECT_FORMAT_COFF diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 2f996de8c4c..d49309d6e22 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -234,10 +234,10 @@ (match_operand:SI 2 "add_operand" "")))] "" " -{ emit_insn (gen_rtx (SET, VOIDmode, gen_lowpart (DImode, operands[0]), - gen_rtx (PLUS, DImode, - gen_lowpart (DImode, operands[1]), - gen_lowpart (DImode, operands[2])))); +{ emit_insn (gen_rtx_SET (VOIDmode, gen_lowpart (DImode, operands[0]), + gen_rtx_PLUS (DImode, + gen_lowpart (DImode, operands[1]), + gen_lowpart (DImode, operands[2])))); DONE; } ") @@ -282,9 +282,9 @@ (define_split [(set (match_operand:DI 0 "register_operand" "") (sign_extend:DI - (plus:SI (match_operand:SI 1 "register_operand" "") + (plus:SI (match_operand:SI 1 "reg_not_elim_operand" "") (match_operand:SI 2 "const_int_operand" "")))) - (clobber (match_operand:SI 3 "register_operand" ""))] + (clobber (match_operand:SI 3 "reg_not_elim_operand" ""))] "! sext_add_operand (operands[2], SImode) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) % 4 == 0" [(set (match_dup 3) (match_dup 4)) @@ -354,24 +354,24 @@ (define_insn "" [(set (match_operand:SI 0 "register_operand" "=r,r") - (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "rJ,rJ") + (plus:SI (mult:SI (match_operand:SI 1 "reg_not_elim_operand" "r,r") (match_operand:SI 2 "const48_operand" "I,I")) (match_operand:SI 3 "sext_add_operand" "rI,O")))] "" "@ - s%2addl %r1,%3,%0 - s%2subl %r1,%n3,%0") + s%2addl %1,%3,%0 + s%2subl %1,%n3,%0") (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r,r") (sign_extend:DI - (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "rJ,rJ") + (plus:SI (mult:SI (match_operand:SI 1 "reg_not_elim_operand" "r,r") (match_operand:SI 2 "const48_operand" "I,I")) (match_operand:SI 3 "sext_add_operand" "rI,O"))))] "" "@ - s%2addl %r1,%3,%0 - s%2subl %r1,%n3,%0") + s%2addl %1,%3,%0 + s%2subl %1,%n3,%0") (define_split [(set (match_operand:DI 0 "register_operand" "") @@ -380,8 +380,8 @@ [(match_operand 2 "" "") (match_operand 3 "" "")]) (match_operand:SI 4 "const48_operand" "")) - (match_operand:SI 5 "add_operand" "")))) - (clobber (match_operand:DI 6 "register_operand" ""))] + (match_operand:SI 5 "sext_add_operand" "")))) + (clobber (match_operand:DI 6 "reg_not_elim_operand" ""))] "" [(set (match_dup 6) (match_dup 7)) (set (match_dup 0) @@ -396,105 +396,14 @@ (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r,r") - (plus:DI (mult:DI (match_operand:DI 1 "reg_or_0_operand" "rJ,rJ") + (plus:DI (mult:DI (match_operand:DI 1 "reg_not_elim_operand" "r,r") (match_operand:DI 2 "const48_operand" "I,I")) - (match_operand:DI 3 "reg_or_8bit_operand" "rI,O")))] + (match_operand:DI 3 "reg_not_elim_or_8bit_operand" "rI,O")))] "" "@ - s%2addq %r1,%3,%0 + s%2addq %1,%3,%0 s%2subq %1,%n3,%0") -;; These variants of the above insns can occur if the third operand -;; is the frame pointer. This is a kludge, but there doesn't -;; seem to be a way around it. Only recognize them while reloading. - -(define_insn "" - [(set (match_operand:DI 0 "some_operand" "=&r") - (plus:DI (plus:DI (match_operand:DI 1 "some_operand" "r") - (match_operand:DI 2 "some_operand" "r")) - (match_operand:DI 3 "some_operand" "rIOKL")))] - "reload_in_progress" - "#") - -(define_split - [(set (match_operand:DI 0 "register_operand" "") - (plus:DI (plus:DI (match_operand:DI 1 "register_operand" "") - (match_operand:DI 2 "register_operand" "")) - (match_operand:DI 3 "add_operand" "")))] - "reload_completed" - [(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2))) - (set (match_dup 0) (plus:DI (match_dup 0) (match_dup 3)))] - "") - -(define_insn "" - [(set (match_operand:SI 0 "some_operand" "=&r") - (plus:SI (plus:SI (mult:SI (match_operand:SI 1 "some_operand" "rJ") - (match_operand:SI 2 "const48_operand" "I")) - (match_operand:SI 3 "some_operand" "r")) - (match_operand:SI 4 "some_operand" "rIOKL")))] - "reload_in_progress" - "#") - -(define_split - [(set (match_operand:SI 0 "register_operand" "r") - (plus:SI (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "") - (match_operand:SI 2 "const48_operand" "")) - (match_operand:SI 3 "register_operand" "")) - (match_operand:SI 4 "add_operand" "rIOKL")))] - "reload_completed" - [(set (match_dup 0) - (plus:SI (mult:SI (match_dup 1) (match_dup 2)) (match_dup 3))) - (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4)))] - "") - -(define_insn "" - [(set (match_operand:DI 0 "some_operand" "=&r") - (sign_extend:DI - (plus:SI (plus:SI - (mult:SI (match_operand:SI 1 "some_operand" "rJ") - (match_operand:SI 2 "const48_operand" "I")) - (match_operand:SI 3 "some_operand" "r")) - (match_operand:SI 4 "some_operand" "rIOKL"))))] - "reload_in_progress" - "#") - -(define_split - [(set (match_operand:DI 0 "register_operand" "") - (sign_extend:DI - (plus:SI (plus:SI - (mult:SI (match_operand:SI 1 "reg_or_0_operand" "") - (match_operand:SI 2 "const48_operand" "")) - (match_operand:SI 3 "register_operand" "")) - (match_operand:SI 4 "add_operand" ""))))] - "reload_completed" - [(set (match_dup 5) - (plus:SI (mult:SI (match_dup 1) (match_dup 2)) (match_dup 3))) - (set (match_dup 0) (sign_extend:DI (plus:SI (match_dup 5) (match_dup 4))))] - " -{ operands[5] = gen_lowpart (SImode, operands[0]); -}") - -(define_insn "" - [(set (match_operand:DI 0 "some_operand" "=&r") - (plus:DI (plus:DI (mult:DI (match_operand:DI 1 "some_operand" "rJ") - (match_operand:DI 2 "const48_operand" "I")) - (match_operand:DI 3 "some_operand" "r")) - (match_operand:DI 4 "some_operand" "rIOKL")))] - "reload_in_progress" - "#") - -(define_split - [(set (match_operand:DI 0 "register_operand" "=") - (plus:DI (plus:DI (mult:DI (match_operand:DI 1 "reg_or_0_operand" "") - (match_operand:DI 2 "const48_operand" "")) - (match_operand:DI 3 "register_operand" "")) - (match_operand:DI 4 "add_operand" "")))] - "reload_completed" - [(set (match_dup 0) - (plus:DI (mult:DI (match_dup 1) (match_dup 2)) (match_dup 3))) - (set (match_dup 0) (plus:DI (match_dup 0) (match_dup 4)))] - "") - (define_insn "negsi2" [(set (match_operand:SI 0 "register_operand" "=r") (neg:SI (match_operand:SI 1 "reg_or_8bit_operand" "rI")))] @@ -520,10 +429,10 @@ (match_operand:SI 2 "reg_or_8bit_operand" "")))] "" " -{ emit_insn (gen_rtx (SET, VOIDmode, gen_lowpart (DImode, operands[0]), - gen_rtx (MINUS, DImode, - gen_lowpart (DImode, operands[1]), - gen_lowpart (DImode, operands[2])))); +{ emit_insn (gen_rtx_SET (VOIDmode, gen_lowpart (DImode, operands[0]), + gen_rtx_MINUS (DImode, + gen_lowpart (DImode, operands[1]), + gen_lowpart (DImode, operands[2])))); DONE; } ") @@ -551,28 +460,28 @@ (define_insn "" [(set (match_operand:SI 0 "register_operand" "=r") - (minus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "rJ") + (minus:SI (mult:SI (match_operand:SI 1 "reg_not_elim_operand" "r") (match_operand:SI 2 "const48_operand" "I")) (match_operand:SI 3 "reg_or_8bit_operand" "rI")))] "" - "s%2subl %r1,%3,%0") + "s%2subl %1,%3,%0") (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r") (sign_extend:DI - (minus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "rJ") + (minus:SI (mult:SI (match_operand:SI 1 "reg_not_elim_operand" "r") (match_operand:SI 2 "const48_operand" "I")) (match_operand:SI 3 "reg_or_8bit_operand" "rI"))))] "" - "s%2subl %r1,%3,%0") + "s%2subl %1,%3,%0") (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r") - (minus:DI (mult:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") + (minus:DI (mult:DI (match_operand:DI 1 "reg_not_elim_operand" "r") (match_operand:DI 2 "const48_operand" "I")) (match_operand:DI 3 "reg_or_8bit_operand" "rI")))] "" - "s%2subq %r1,%3,%0") + "s%2subq %1,%3,%0") (define_insn "mulsi3" [(set (match_operand:SI 0 "register_operand" "=r") @@ -1547,7 +1456,7 @@ "TARGET_FP && reload_completed" [(set (match_dup 2) (fix:DI (match_dup 1))) (set (match_dup 0) (unspec:SI [(match_dup 2)] 5))] - "operands[2] = gen_rtx (REG, DImode, REGNO (operands[0]));") + "operands[2] = gen_rtx_REG (DImode, REGNO (operands[0]));") (define_insn "" [(set (match_operand:SI 0 "register_operand" "=f") @@ -1618,7 +1527,7 @@ "TARGET_FP && reload_completed" [(set (match_dup 2) (fix:DI (float_extend:DF (match_dup 1)))) (set (match_dup 0) (unspec:SI [(match_dup 2)] 5))] - "operands[2] = gen_rtx (REG, DImode, REGNO (operands[0]));") + "operands[2] = gen_rtx_REG (DImode, REGNO (operands[0]));") (define_insn "fix_truncsfsi2_tp" [(set (match_operand:SI 0 "register_operand" "=&f") @@ -2785,8 +2694,8 @@ { enum machine_mode mode = alpha_compare_fp_p ? DFmode : DImode; operands[1] = gen_reg_rtx (mode); - operands[2] = gen_rtx (LT, mode, alpha_compare_op0, alpha_compare_op1); - operands[3] = gen_rtx (NE, VOIDmode, operands[1], CONST0_RTX (mode)); + operands[2] = gen_rtx_LT (mode, alpha_compare_op0, alpha_compare_op1); + operands[3] = gen_rtx_NE (VOIDmode, operands[1], CONST0_RTX (mode)); }") (define_expand "ble" @@ -2800,8 +2709,8 @@ { enum machine_mode mode = alpha_compare_fp_p ? DFmode : DImode; operands[1] = gen_reg_rtx (mode); - operands[2] = gen_rtx (LE, mode, alpha_compare_op0, alpha_compare_op1); - operands[3] = gen_rtx (NE, VOIDmode, operands[1], CONST0_RTX (mode)); + operands[2] = gen_rtx_LE (mode, alpha_compare_op0, alpha_compare_op1); + operands[3] = gen_rtx_NE (VOIDmode, operands[1], CONST0_RTX (mode)); }") (define_expand "bgt" @@ -2816,14 +2725,14 @@ if (alpha_compare_fp_p) { operands[1] = gen_reg_rtx (DFmode); - operands[2] = gen_rtx (LT, DFmode, alpha_compare_op1, alpha_compare_op0); - operands[3] = gen_rtx (NE, VOIDmode, operands[1], CONST0_RTX (DFmode)); + operands[2] = gen_rtx_LT (DFmode, alpha_compare_op1, alpha_compare_op0); + operands[3] = gen_rtx_NE (VOIDmode, operands[1], CONST0_RTX (DFmode)); } else { operands[1] = gen_reg_rtx (DImode); - operands[2] = gen_rtx (LE, DImode, alpha_compare_op0, alpha_compare_op1); - operands[3] = gen_rtx (EQ, VOIDmode, operands[1], const0_rtx); + operands[2] = gen_rtx_LE (DImode, alpha_compare_op0, alpha_compare_op1); + operands[3] = gen_rtx_EQ (VOIDmode, operands[1], const0_rtx); } }") @@ -2839,14 +2748,14 @@ if (alpha_compare_fp_p) { operands[1] = gen_reg_rtx (DFmode); - operands[2] = gen_rtx (LE, DFmode, alpha_compare_op1, alpha_compare_op0); - operands[3] = gen_rtx (NE, VOIDmode, operands[1], CONST0_RTX (DFmode)); + operands[2] = gen_rtx_LE (DFmode, alpha_compare_op1, alpha_compare_op0); + operands[3] = gen_rtx_NE (VOIDmode, operands[1], CONST0_RTX (DFmode)); } else { operands[1] = gen_reg_rtx (DImode); - operands[2] = gen_rtx (LT, DImode, alpha_compare_op0, alpha_compare_op1); - operands[3] = gen_rtx (EQ, VOIDmode, operands[1], const0_rtx); + operands[2] = gen_rtx_LT (DImode, alpha_compare_op0, alpha_compare_op1); + operands[3] = gen_rtx_EQ (VOIDmode, operands[1], const0_rtx); } }") @@ -2860,8 +2769,8 @@ " { operands[1] = gen_reg_rtx (DImode); - operands[2] = gen_rtx (LTU, DImode, alpha_compare_op0, alpha_compare_op1); - operands[3] = gen_rtx (NE, VOIDmode, operands[1], const0_rtx); + operands[2] = gen_rtx_LTU (DImode, alpha_compare_op0, alpha_compare_op1); + operands[3] = gen_rtx_NE (VOIDmode, operands[1], const0_rtx); }") (define_expand "bleu" @@ -2874,8 +2783,8 @@ " { operands[1] = gen_reg_rtx (DImode); - operands[2] = gen_rtx (LEU, DImode, alpha_compare_op0, alpha_compare_op1); - operands[3] = gen_rtx (NE, VOIDmode, operands[1], const0_rtx); + operands[2] = gen_rtx_LEU (DImode, alpha_compare_op0, alpha_compare_op1); + operands[3] = gen_rtx_NE (VOIDmode, operands[1], const0_rtx); }") (define_expand "bgtu" @@ -2888,8 +2797,8 @@ " { operands[1] = gen_reg_rtx (DImode); - operands[2] = gen_rtx (LEU, DImode, alpha_compare_op0, alpha_compare_op1); - operands[3] = gen_rtx (EQ, VOIDmode, operands[1], const0_rtx); + operands[2] = gen_rtx_LEU (DImode, alpha_compare_op0, alpha_compare_op1); + operands[3] = gen_rtx_EQ (VOIDmode, operands[1], const0_rtx); }") (define_expand "bgeu" @@ -2902,8 +2811,8 @@ " { operands[1] = gen_reg_rtx (DImode); - operands[2] = gen_rtx (LTU, DImode, alpha_compare_op0, alpha_compare_op1); - operands[3] = gen_rtx (EQ, VOIDmode, operands[1], const0_rtx); + operands[2] = gen_rtx_LTU (DImode, alpha_compare_op0, alpha_compare_op1); + operands[3] = gen_rtx_EQ (VOIDmode, operands[1], const0_rtx); }") (define_expand "seq" @@ -2915,7 +2824,7 @@ if (alpha_compare_fp_p) FAIL; - operands[1] = gen_rtx (EQ, DImode, alpha_compare_op0, alpha_compare_op1); + operands[1] = gen_rtx_EQ (DImode, alpha_compare_op0, alpha_compare_op1); }") (define_expand "sne" @@ -2928,7 +2837,7 @@ if (alpha_compare_fp_p) FAIL; - operands[1] = gen_rtx (EQ, DImode, alpha_compare_op0, alpha_compare_op1); + operands[1] = gen_rtx_EQ (DImode, alpha_compare_op0, alpha_compare_op1); }") (define_expand "slt" @@ -2940,7 +2849,7 @@ if (alpha_compare_fp_p) FAIL; - operands[1] = gen_rtx (LT, DImode, alpha_compare_op0, alpha_compare_op1); + operands[1] = gen_rtx_LT (DImode, alpha_compare_op0, alpha_compare_op1); }") (define_expand "sle" @@ -2952,7 +2861,7 @@ if (alpha_compare_fp_p) FAIL; - operands[1] = gen_rtx (LE, DImode, alpha_compare_op0, alpha_compare_op1); + operands[1] = gen_rtx_LE (DImode, alpha_compare_op0, alpha_compare_op1); }") (define_expand "sgt" @@ -2964,8 +2873,8 @@ if (alpha_compare_fp_p) FAIL; - operands[1] = gen_rtx (LT, DImode, force_reg (DImode, alpha_compare_op1), - alpha_compare_op0); + operands[1] = gen_rtx_LT (DImode, force_reg (DImode, alpha_compare_op1), + alpha_compare_op0); }") (define_expand "sge" @@ -2977,8 +2886,8 @@ if (alpha_compare_fp_p) FAIL; - operands[1] = gen_rtx (LE, DImode, force_reg (DImode, alpha_compare_op1), - alpha_compare_op0); + operands[1] = gen_rtx_LE (DImode, force_reg (DImode, alpha_compare_op1), + alpha_compare_op0); }") (define_expand "sltu" @@ -2990,7 +2899,7 @@ if (alpha_compare_fp_p) FAIL; - operands[1] = gen_rtx (LTU, DImode, alpha_compare_op0, alpha_compare_op1); + operands[1] = gen_rtx_LTU (DImode, alpha_compare_op0, alpha_compare_op1); }") (define_expand "sleu" @@ -3002,7 +2911,7 @@ if (alpha_compare_fp_p) FAIL; - operands[1] = gen_rtx (LEU, DImode, alpha_compare_op0, alpha_compare_op1); + operands[1] = gen_rtx_LEU (DImode, alpha_compare_op0, alpha_compare_op1); }") (define_expand "sgtu" @@ -3014,8 +2923,8 @@ if (alpha_compare_fp_p) FAIL; - operands[1] = gen_rtx (LTU, DImode, force_reg (DImode, alpha_compare_op1), - alpha_compare_op0); + operands[1] = gen_rtx_LTU (DImode, force_reg (DImode, alpha_compare_op1), + alpha_compare_op0); }") (define_expand "sgeu" @@ -3027,8 +2936,8 @@ if (alpha_compare_fp_p) FAIL; - operands[1] = gen_rtx (LEU, DImode, force_reg (DImode, alpha_compare_op1), - alpha_compare_op0); + operands[1] = gen_rtx_LEU (DImode, force_reg (DImode, alpha_compare_op1), + alpha_compare_op0); }") ;; These are the main define_expand's used to make conditional moves. @@ -3133,10 +3042,9 @@ && extended_count (operands[3], DImode, unsignedp) >= 1)) { if (GET_CODE (operands[3]) == CONST_INT) - operands[7] = gen_rtx (PLUS, DImode, operands[2], - GEN_INT (- INTVAL (operands[3]))); + operands[7] = plus_constant (operands[2], - INTVAL (operands[3])); else - operands[7] = gen_rtx (MINUS, DImode, operands[2], operands[3]); + operands[7] = gen_rtx_MINUS (DImode, operands[2], operands[3]); operands[8] = gen_rtx (code, VOIDmode, operands[6], const0_rtx); } @@ -3145,13 +3053,13 @@ || code == LEU || code == LTU) { operands[7] = gen_rtx (code, DImode, operands[2], operands[3]); - operands[8] = gen_rtx (NE, VOIDmode, operands[6], const0_rtx); + operands[8] = gen_rtx_NE (VOIDmode, operands[6], const0_rtx); } else { operands[7] = gen_rtx (reverse_condition (code), DImode, operands[2], operands[3]); - operands[8] = gen_rtx (EQ, VOIDmode, operands[6], const0_rtx); + operands[8] = gen_rtx_EQ (VOIDmode, operands[6], const0_rtx); } }") @@ -3180,12 +3088,11 @@ FAIL; if (GET_CODE (operands[3]) == CONST_INT) - tem = gen_rtx (PLUS, SImode, operands[2], - GEN_INT (- INTVAL (operands[3]))); + tem = plus_constant (operands[2], - INTVAL (operands[3])); else - tem = gen_rtx (MINUS, SImode, operands[2], operands[3]); + tem = gen_rtx_MINUS (SImode, operands[2], operands[3]); - operands[7] = gen_rtx (SIGN_EXTEND, DImode, tem); + operands[7] = gen_rtx_SIGN_EXTEND (DImode, tem); operands[8] = gen_rtx (GET_CODE (operands[1]), VOIDmode, operands[6], const0_rtx); }") @@ -3211,10 +3118,9 @@ && extended_count (operands[3], DImode, unsignedp) >= 1)) { if (GET_CODE (operands[3]) == CONST_INT) - operands[5] = gen_rtx (PLUS, DImode, operands[2], - GEN_INT (- INTVAL (operands[3]))); + operands[5] = plus_constant (operands[2], - INTVAL (operands[3])); else - operands[5] = gen_rtx (MINUS, DImode, operands[2], operands[3]); + operands[5] = gen_rtx_MINUS (DImode, operands[2], operands[3]); operands[6] = gen_rtx (code, VOIDmode, operands[4], const0_rtx); } @@ -3223,13 +3129,13 @@ || code == LEU || code == LTU) { operands[5] = gen_rtx (code, DImode, operands[2], operands[3]); - operands[6] = gen_rtx (NE, VOIDmode, operands[4], const0_rtx); + operands[6] = gen_rtx_NE (VOIDmode, operands[4], const0_rtx); } else { operands[5] = gen_rtx (reverse_condition (code), DImode, operands[2], operands[3]); - operands[6] = gen_rtx (EQ, VOIDmode, operands[4], const0_rtx); + operands[6] = gen_rtx_EQ (VOIDmode, operands[4], const0_rtx); } }") @@ -3250,12 +3156,11 @@ { rtx tem; if (GET_CODE (operands[3]) == CONST_INT) - tem = gen_rtx (PLUS, SImode, operands[2], - GEN_INT (- INTVAL (operands[3]))); + tem = plus_constant (operands[2], - INTVAL (operands[3])); else - tem = gen_rtx (MINUS, SImode, operands[2], operands[3]); + tem = gen_rtx_MINUS (SImode, operands[2], operands[3]); - operands[5] = gen_rtx (SIGN_EXTEND, DImode, tem); + operands[5] = gen_rtx_SIGN_EXTEND (DImode, tem); operands[6] = gen_rtx (GET_CODE (operands[1]), VOIDmode, operands[4], const0_rtx); }") @@ -3320,7 +3225,7 @@ if (GET_CODE (operands[0]) != SYMBOL_REF && ! (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == 27)) { - rtx tem = gen_rtx (REG, DImode, 27); + rtx tem = gen_rtx_REG (DImode, 27); emit_move_insn (tem, operands[0]); operands[0] = tem; } @@ -3339,7 +3244,7 @@ if (GET_CODE (operands[1]) != SYMBOL_REF && ! (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == 27)) { - rtx tem = gen_rtx (REG, DImode, 27); + rtx tem = gen_rtx_REG (DImode, 27); emit_move_insn (tem, operands[1]); operands[1] = tem; } @@ -3368,7 +3273,7 @@ indirect call differently. Load RA and set operands[2] to PV in both cases. */ - emit_move_insn (gen_rtx (REG, DImode, 25), operands[1]); + emit_move_insn (gen_rtx_REG (DImode, 25), operands[1]); if (GET_CODE (operands[0]) == SYMBOL_REF) { extern char *savealloc (); @@ -3380,17 +3285,17 @@ strcpy (linksym, symbol); strcat (linksym, \"..lk\"); - linkage = gen_rtx (SYMBOL_REF, Pmode, linksym); - - emit_move_insn (gen_rtx (REG, Pmode, 26), gen_rtx (MEM, Pmode, linkage)); + linkage = gen_rtx_SYMBOL_REF (Pmode, linksym); + emit_move_insn (gen_rtx_REG (Pmode, 26), + gen_rtx_MEM (Pmode, linkage)); operands[2] - = validize_mem (gen_rtx (MEM, Pmode, plus_constant (linkage, 8))); + = validize_mem (gen_rtx_MEM (Pmode, plus_constant (linkage, 8))); } else { - emit_move_insn (gen_rtx (REG, Pmode, 26), - gen_rtx (MEM, Pmode, plus_constant (operands[0], 8))); + emit_move_insn (gen_rtx_REG (Pmode, 26), + gen_rtx_MEM (Pmode, plus_constant (operands[0], 8))); operands[2] = operands[0]; } @@ -3432,7 +3337,7 @@ if (GET_CODE (operands[1]) != SYMBOL_REF && ! (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == 27)) { - rtx tem = gen_rtx (REG, DImode, 27); + rtx tem = gen_rtx_REG (DImode, 27); emit_move_insn (tem, operands[1]); operands[1] = tem; } @@ -3452,7 +3357,7 @@ if (GET_CODE (operands[1]) != SYMBOL_REF && ! (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == 27)) { - rtx tem = gen_rtx (REG, DImode, 27); + rtx tem = gen_rtx_REG (DImode, 27); emit_move_insn (tem, operands[1]); operands[1] = tem; } @@ -3477,7 +3382,7 @@ indirect call differently. Load RA and set operands[3] to PV in both cases. */ - emit_move_insn (gen_rtx (REG, DImode, 25), operands[2]); + emit_move_insn (gen_rtx_REG (DImode, 25), operands[2]); if (GET_CODE (operands[1]) == SYMBOL_REF) { extern char *savealloc (); @@ -3488,17 +3393,17 @@ alpha_need_linkage (symbol, 0); strcpy (linksym, symbol); strcat (linksym, \"..lk\"); - linkage = gen_rtx (SYMBOL_REF, Pmode, linksym); + linkage = gen_rtx_SYMBOL_REF (Pmode, linksym); - emit_move_insn (gen_rtx (REG, Pmode, 26), gen_rtx (MEM, Pmode, linkage)); + emit_move_insn (gen_rtx_REG (Pmode, 26), gen_rtx_MEM (Pmode, linkage)); operands[3] - = validize_mem (gen_rtx (MEM, Pmode, plus_constant (linkage, 8))); + = validize_mem (gen_rtx_MEM (Pmode, plus_constant (linkage, 8))); } else { - emit_move_insn (gen_rtx (REG, Pmode, 26), - gen_rtx (MEM, Pmode, plus_constant (operands[1], 8))); + emit_move_insn (gen_rtx_REG (Pmode, 26), + gen_rtx_MEM (Pmode, plus_constant (operands[1], 8))); operands[3] = operands[1]; } @@ -4349,7 +4254,7 @@ { rtx aligned_mem, bitnum; rtx scratch = (reload_in_progress - ? gen_rtx (REG, SImode, REGNO (operands[0])) + ? gen_rtx_REG (SImode, REGNO (operands[0])) : gen_reg_rtx (SImode)); get_aligned_mem (operands[1], &aligned_mem, &bitnum); @@ -4461,7 +4366,7 @@ { rtx aligned_mem, bitnum; rtx scratch = (reload_in_progress - ? gen_rtx (REG, SImode, REGNO (operands[0])) + ? gen_rtx_REG (SImode, REGNO (operands[0])) : gen_reg_rtx (SImode)); get_aligned_mem (operands[1], &aligned_mem, &bitnum); @@ -4542,11 +4447,11 @@ /* It is possible that one of the registers we got for operands[2] might coincide with that of operands[0] (which is why we made it TImode). Pick the other one to use as our scratch. */ - rtx scratch = gen_rtx (REG, DImode, - REGNO (operands[0]) == REGNO (operands[2]) - ? REGNO (operands[2]) + 1 : REGNO (operands[2])); + rtx scratch = gen_rtx_REG (DImode, + REGNO (operands[0]) == REGNO (operands[2]) + ? REGNO (operands[2]) + 1 : REGNO (operands[2])); rtx seq = gen_unaligned_loadqi (operands[0], addr, scratch, - gen_rtx (REG, DImode, REGNO (operands[0]))); + gen_rtx_REG (DImode, REGNO (operands[0]))); alpha_set_memflags (seq, operands[1]); emit_insn (seq); @@ -4564,11 +4469,11 @@ /* It is possible that one of the registers we got for operands[2] might coincide with that of operands[0] (which is why we made it TImode). Pick the other one to use as our scratch. */ - rtx scratch = gen_rtx (REG, DImode, - REGNO (operands[0]) == REGNO (operands[2]) - ? REGNO (operands[2]) + 1 : REGNO (operands[2])); + rtx scratch = gen_rtx_REG (DImode, + REGNO (operands[0]) == REGNO (operands[2]) + ? REGNO (operands[2]) + 1 : REGNO (operands[2])); rtx seq = gen_unaligned_loadhi (operands[0], addr, scratch, - gen_rtx (REG, DImode, REGNO (operands[0]))); + gen_rtx_REG (DImode, REGNO (operands[0]))); alpha_set_memflags (seq, operands[1]); emit_insn (seq); @@ -4590,15 +4495,15 @@ get_aligned_mem (operands[0], &aligned_mem, &bitnum); emit_insn (gen_aligned_store (aligned_mem, operands[1], bitnum, - gen_rtx (REG, SImode, REGNO (operands[2])), - gen_rtx (REG, SImode, - REGNO (operands[2]) + 1))); + gen_rtx_REG (SImode, REGNO (operands[2])), + gen_rtx_REG (SImode, + REGNO (operands[2]) + 1))); } else { rtx addr = get_unaligned_address (operands[0], 0); - rtx scratch1 = gen_rtx (REG, DImode, REGNO (operands[2])); - rtx scratch2 = gen_rtx (REG, DImode, REGNO (operands[2]) + 1); + rtx scratch1 = gen_rtx_REG (DImode, REGNO (operands[2])); + rtx scratch2 = gen_rtx_REG (DImode, REGNO (operands[2]) + 1); rtx scratch3 = scratch1; rtx seq; @@ -4629,15 +4534,15 @@ get_aligned_mem (operands[0], &aligned_mem, &bitnum); emit_insn (gen_aligned_store (aligned_mem, operands[1], bitnum, - gen_rtx (REG, SImode, REGNO (operands[2])), - gen_rtx (REG, SImode, - REGNO (operands[2]) + 1))); + gen_rtx_REG (SImode, REGNO (operands[2])), + gen_rtx_REG (SImode, + REGNO (operands[2]) + 1))); } else { rtx addr = get_unaligned_address (operands[0], 0); - rtx scratch1 = gen_rtx (REG, DImode, REGNO (operands[2])); - rtx scratch2 = gen_rtx (REG, DImode, REGNO (operands[2]) + 1); + rtx scratch1 = gen_rtx_REG (DImode, REGNO (operands[2])); + rtx scratch2 = gen_rtx_REG (DImode, REGNO (operands[2]) + 1); rtx scratch3 = scratch1; rtx seq; @@ -4659,8 +4564,8 @@ "" " { - operands[1] = gen_rtx (MEM, DImode, plus_constant (stack_pointer_rtx, - INTVAL (operands[0]))); + operands[1] = gen_rtx_MEM (DImode, plus_constant (stack_pointer_rtx, + INTVAL (operands[0]))); MEM_VOLATILE_P (operands[1]) = 1; operands[0] = const0_rtx; @@ -4722,16 +4627,16 @@ } emit_label (loop_label); - memref = gen_rtx (MEM, DImode, tmp); + memref = gen_rtx_MEM (DImode, tmp); MEM_VOLATILE_P (memref) = 1; emit_move_insn (memref, const0_rtx); emit_insn (gen_adddi3 (tmp, tmp, GEN_INT(-8192))); emit_insn (gen_cmpdi (tmp, want)); emit_jump_insn (gen_bgtu (loop_label)); if (obey_regdecls) - gen_rtx (USE, VOIDmode, tmp); + emit_insn (gen_rtx_USE (VOIDmode, tmp)); - memref = gen_rtx (MEM, DImode, want); + memref = gen_rtx_MEM (DImode, want); MEM_VOLATILE_P (memref) = 1; emit_move_insn (memref, const0_rtx); diff --git a/gcc/config/alpha/vms.h b/gcc/config/alpha/vms.h index 8e4fd6dc858..97d7ac249b5 100644 --- a/gcc/config/alpha/vms.h +++ b/gcc/config/alpha/vms.h @@ -1,5 +1,5 @@ /* Output variables, constants and external declarations, for GNU compiler. - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -135,7 +135,7 @@ Boston, MA 02111-1307, USA. */ Thus 6 or more means all following args should go on the stack. */ enum avms_arg_type {I64, FF, FD, FG, FS, FT}; -typedef struct {char num_args; enum avms_arg_type atypes[6];} avms_arg_info; +typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info; #undef CUMULATIVE_ARGS #define CUMULATIVE_ARGS avms_arg_info @@ -177,12 +177,12 @@ extern struct rtx_def *alpha_arg_info_reg_val (); #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ((MODE) == VOIDmode ? alpha_arg_info_reg_val (CUM) \ : ((CUM.num_args) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \ - ? gen_rtx(REG, (MODE), \ - ((CUM).num_args + 16 \ - + ((TARGET_FPREGS \ - && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ - || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ - * 32))) \ + ? gen_rtx_REG ((MODE), \ + ((CUM).num_args + 16 \ + + ((TARGET_FPREGS \ + && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ + || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ + * 32))) \ : 0)) #undef FUNCTION_ARG_ADVANCE @@ -234,7 +234,7 @@ extern struct rtx_def *alpha_arg_info_reg_val (); { \ if (! (NO_RTL)) \ { \ - emit_move_insn (gen_rtx (REG, DImode, 1), \ + emit_move_insn (gen_rtx_REG (DImode, 1), \ virtual_incoming_args_rtx); \ emit_insn (gen_arg_home ()); \ } \ @@ -357,16 +357,16 @@ literals_section () \ CXT is an RTX for the static chain value for the function. */ #undef INITIALIZE_TRAMPOLINE -#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ -{ \ - emit_move_insn (gen_rtx (MEM, Pmode, \ - memory_address (Pmode, \ - plus_constant ((TRAMP), 16))), \ - (FNADDR)); \ - emit_move_insn (gen_rtx (MEM, Pmode, \ - memory_address (Pmode, \ +#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ +{ \ + emit_move_insn (gen_rtx_MEM (Pmode, \ + memory_address (Pmode, \ + plus_constant ((TRAMP), 16))), \ + (FNADDR)); \ + emit_move_insn (gen_rtx_MEM (Pmode, \ + memory_address (Pmode, \ plus_constant ((TRAMP), 24))), \ - (CXT)); \ + (CXT)); \ } #undef TRANSFER_FROM_TRAMPOLINE diff --git a/gcc/config/alpha/x-alpha b/gcc/config/alpha/x-alpha index 99197479798..86aab854ada 100644 --- a/gcc/config/alpha/x-alpha +++ b/gcc/config/alpha/x-alpha @@ -1 +1 @@ -CLIB=-lmld +CLIB=-lmld -lexc diff --git a/gcc/config/alpha/xm-alpha.h b/gcc/config/alpha/xm-alpha.h index f7e870f5641..fb653e17101 100644 --- a/gcc/config/alpha/xm-alpha.h +++ b/gcc/config/alpha/xm-alpha.h @@ -1,5 +1,5 @@ /* Configuration for GNU C-compiler for DEC Alpha. - Copyright (C) 1990, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. + Copyright (C) 1990, 92, 93, 94, 95, 1998 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu). This file is part of GNU CC. @@ -55,16 +55,6 @@ extern void *alloca (); #define ONLY_INT_FIELDS #endif -/* Declare some functions needed for this machine. We don't want to - include these in the sources since other machines might define them - differently. */ - -extern void *malloc (), *realloc (), *calloc (); - -#ifndef inhibit_libc -#include "string.h" -#endif - /* OSF/1 is POSIX.1 compliant. */ #define POSIX diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index e2f46e7c965..d0a90ea1d2d 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on the Argonaut ARC cpu. - Copyright (C) 1994, 1995, 1997 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1997, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -20,8 +20,8 @@ Boston, MA 02111-1307, USA. */ /* ??? This is an old port, and is undoubtedly suffering from bit rot. */ -#include <stdio.h> #include "config.h" +#include "system.h" #include "tree.h" #include "rtl.h" #include "regs.h" @@ -706,10 +706,10 @@ gen_compare_reg (code, x, y) enum machine_mode mode = SELECT_CC_MODE (code, x, y); rtx cc_reg; - cc_reg = gen_rtx (REG, mode, 61); + cc_reg = gen_rtx_REG (mode, 61); - emit_insn (gen_rtx (SET, VOIDmode, cc_reg, - gen_rtx (COMPARE, mode, x, y))); + emit_insn (gen_rtx_SET (VOIDmode, cc_reg, + gen_rtx_COMPARE (mode, x, y))); return cc_reg; } @@ -785,10 +785,10 @@ arc_setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) int align_slop = size & 1; rtx regblock; - regblock = gen_rtx (MEM, BLKmode, - plus_constant (arg_pointer_rtx, - FIRST_PARM_OFFSET (0) - + align_slop * UNITS_PER_WORD)); + regblock = gen_rtx_MEM (BLKmode, + plus_constant (arg_pointer_rtx, + FIRST_PARM_OFFSET (0) + + align_slop * UNITS_PER_WORD)); move_block_from_reg (first_reg_offset, regblock, MAX_ARC_PARM_REGS - first_reg_offset, ((MAX_ARC_PARM_REGS - first_reg_offset) diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h index e259ce0a286..d588a61e430 100644 --- a/gcc/config/arc/arc.h +++ b/gcc/config/arc/arc.h @@ -601,10 +601,12 @@ extern enum reg_class arc_regno_reg_class[]; farther back is at [%fp,4]. */ #if 0 /* The default value should work. */ #define RETURN_ADDR_RTX(COUNT, FRAME) \ -(((COUNT) == -1) \ - ? gen_rtx (REG, Pmode, 31) \ - : copy_to_reg (gen_rtx (MEM, Pmode, \ - memory_address (Pmode, plus_constant ((FRAME), UNITS_PER_WORD))))) +(((COUNT) == -1) \ + ? gen_rtx_REG (Pmode, 31) \ + : copy_to_reg (gen_rtx_MEM (Pmode, \ + memory_address (Pmode, \ + plus_constant ((FRAME), \ + UNITS_PER_WORD))))) #endif /* Register to use for pushing function arguments. */ @@ -723,7 +725,7 @@ extern int current_function_varargs; and the rest are pushed. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \ - ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ + ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ : 0) /* A C expression for the number of words, at the beginning of an @@ -813,11 +815,11 @@ arc_setup_incoming_varargs(&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL) VALTYPE is the data type of the value (as a tree). If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */ -#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0) +#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value as seen by the caller. */ @@ -910,9 +912,9 @@ do { \ CXT is an RTX for the static chain value for the function. */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ do { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), FNADDR); \ - emit_insn (gen_flush_icache (validize_mem (gen_rtx (MEM, SImode, TRAMP)))); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), FNADDR); \ + emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \ } while (0) /* Library calls. */ diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 328b1ebd991..0a66459a88e 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -1,5 +1,5 @@ ;; Machine description of the Argonaut ARC cpu for GNU C compiler -;; Copyright (C) 1994, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1994, 1997, 1998 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -304,7 +304,7 @@ ;{ ; /* Flow doesn't understand that this is effectively a DFmode move. ; It doesn't know that all of `operands[0]' is set. */ -; emit_insn (gen_rtx (CLOBBER, VOIDmode, operands[0])); +; emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); ; ; /* Emit insns that movsi_insn can handle. */ ; emit_insn (gen_movsi (operand_subword (operands[0], 0, 0, DImode), @@ -407,7 +407,7 @@ ;{ ; /* Flow doesn't understand that this is effectively a DFmode move. ; It doesn't know that all of `operands[0]' is set. */ -; emit_insn (gen_rtx (CLOBBER, VOIDmode, operands[0])); +; emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); ; ; /* Emit insns that movsi_insn can handle. */ ; emit_insn (gen_movsi (operand_subword (operands[0], 0, 0, DFmode), @@ -586,9 +586,9 @@ " { enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg = gen_rtx (REG, - SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), - 61); + rtx ccreg + = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), + 61); operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); }") @@ -602,14 +602,14 @@ ; " ;{ ; enum rtx_code code = GET_CODE (operands[1]); -; rtx ccreg = gen_rtx (REG, -; SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), -; 61); +; rtx ccreg +; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), +; 61); ; ; operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); -;}") - +}") (define_expand "movsfcc" + [(set (match_operand:SF 0 "register_operand" "") (if_then_else (match_operand 1 "comparison_operator" "") (match_operand:SF 2 "nonmemory_operand" "") @@ -618,9 +618,9 @@ " { enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg = gen_rtx (REG, - SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), - 61); + rtx ccreg + = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), + 61); operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); }") @@ -633,13 +633,13 @@ ; "0 /* ??? can generate less efficient code if constants involved */" ; " ;{ -; enum rtx_code code = GET_CODE (operands[1]); -; rtx ccreg = gen_rtx (REG, -; SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), -; 61); +; enum rtx_code code = GET_CODE (operands[1]); +; rtx ccreg +; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), +; 61); ; ; operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); -;}") +}") (define_insn "*movsicc_insn" [(set (match_operand:SI 0 "register_operand" "=r") @@ -1060,12 +1060,14 @@ { if (! TARGET_SHIFTER) { - emit_insn (gen_rtx - (PARALLEL, VOIDmode, + emit_insn (gen_rtx_PARALLEL + (VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (ASHIFT, SImode, operands[1], operands[2])), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0))))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_ASHIFT (SImode, operands[1], + operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (SImode))))); DONE; } }") @@ -1079,12 +1081,15 @@ { if (! TARGET_SHIFTER) { - emit_insn (gen_rtx - (PARALLEL, VOIDmode, + emit_insn (gen_rtx_PARALLEL + (VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (ASHIFTRT, SImode, operands[1], operands[2])), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0))))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_ASHIFTRT (SImode, + operands[1], + operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (SImode))))); DONE; } }") @@ -1098,12 +1103,15 @@ { if (! TARGET_SHIFTER) { - emit_insn (gen_rtx - (PARALLEL, VOIDmode, + emit_insn (gen_rtx_PARALLEL + (VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (LSHIFTRT, SImode, operands[1], operands[2])), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0))))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_LSHIFTRT (SImode, + operands[1], + operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (SImode))))); DONE; } }") diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 947504277d7..731bd225b5f 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -22,8 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> -#include <string.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -490,22 +489,22 @@ arm_split_constant (code, mode, val, target, source, subtargets) { /* Currently SET is the only monadic value for CODE, all the rest are diadic. */ - emit_insn (gen_rtx (SET, VOIDmode, target, GEN_INT (val))); + emit_insn (gen_rtx_SET (VOIDmode, target, GEN_INT (val))); return 1; } else { rtx temp = subtargets ? gen_reg_rtx (mode) : target; - emit_insn (gen_rtx (SET, VOIDmode, temp, GEN_INT (val))); + emit_insn (gen_rtx_SET (VOIDmode, temp, GEN_INT (val))); /* For MINUS, the value is subtracted from, since we never have subtraction of a constant. */ if (code == MINUS) - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (code, mode, temp, source))); + emit_insn (gen_rtx_SET (VOIDmode, target, + gen_rtx (code, mode, temp, source))); else - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (code, mode, source, temp))); + emit_insn (gen_rtx_SET (VOIDmode, target, + gen_rtx (code, mode, source, temp))); return 2; } } @@ -562,8 +561,8 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) if (remainder == 0xffffffff) { if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, - GEN_INT (ARM_SIGN_EXTEND (val)))); + emit_insn (gen_rtx_SET (VOIDmode, target, + GEN_INT (ARM_SIGN_EXTEND (val)))); return 1; } if (remainder == 0) @@ -571,7 +570,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) if (reload_completed && rtx_equal_p (target, source)) return 0; if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, source)); + emit_insn (gen_rtx_SET (VOIDmode, target, source)); return 1; } break; @@ -580,7 +579,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) if (remainder == 0) { if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, const0_rtx)); + emit_insn (gen_rtx_SET (VOIDmode, target, const0_rtx)); return 1; } if (remainder == 0xffffffff) @@ -588,7 +587,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) if (reload_completed && rtx_equal_p (target, source)) return 0; if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, source)); + emit_insn (gen_rtx_SET (VOIDmode, target, source)); return 1; } can_invert = 1; @@ -600,14 +599,14 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) if (reload_completed && rtx_equal_p (target, source)) return 0; if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, source)); + emit_insn (gen_rtx_SET (VOIDmode, target, source)); return 1; } if (remainder == 0xffffffff) { if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (NOT, mode, source))); + emit_insn (gen_rtx_SET (VOIDmode, target, + gen_rtx_NOT (mode, source))); return 1; } @@ -620,15 +619,16 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) if (remainder == 0) { if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (NEG, mode, source))); + emit_insn (gen_rtx_SET (VOIDmode, target, + gen_rtx_NEG (mode, source))); return 1; } if (const_ok_for_arm (val)) { if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (MINUS, mode, GEN_INT (val), source))); + emit_insn (gen_rtx_SET (VOIDmode, target, + gen_rtx_MINUS (mode, GEN_INT (val), + source))); return 1; } can_negate = 1; @@ -645,10 +645,10 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) || (can_invert && const_ok_for_arm (~val))) { if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, - (source ? gen_rtx (code, mode, source, - GEN_INT (val)) - : GEN_INT (val)))); + emit_insn (gen_rtx_SET (VOIDmode, target, + (source ? gen_rtx (code, mode, source, + GEN_INT (val)) + : GEN_INT (val)))); return 1; } @@ -703,8 +703,8 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) if (generate) { new_src = subtargets ? gen_reg_rtx (mode) : target; - emit_insn (gen_rtx (SET, VOIDmode, new_src, - GEN_INT (temp1))); + emit_insn (gen_rtx_SET (VOIDmode, new_src, + GEN_INT (temp1))); emit_insn (gen_ashrsi3 (target, new_src, GEN_INT (set_sign_bit_copies - 1))); } @@ -718,8 +718,8 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) if (generate) { new_src = subtargets ? gen_reg_rtx (mode) : target; - emit_insn (gen_rtx (SET, VOIDmode, new_src, - GEN_INT (temp1))); + emit_insn (gen_rtx_SET (VOIDmode, new_src, + GEN_INT (temp1))); emit_insn (gen_ashrsi3 (target, new_src, GEN_INT (set_sign_bit_copies - 1))); } @@ -750,11 +750,12 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) source, subtargets, generate); source = new_src; if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (IOR, mode, - gen_rtx (ASHIFT, mode, source, - GEN_INT (i)), - source))); + emit_insn (gen_rtx_SET + (VOIDmode, target, + gen_rtx_IOR (mode, + gen_rtx_ASHIFT (mode, source, + GEN_INT (i)), + source))); return insns + 1; } } @@ -772,11 +773,13 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) source, subtargets, generate); source = new_src; if (generate) - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (IOR, mode, - gen_rtx (LSHIFTRT, mode, - source, GEN_INT (i)), - source))); + emit_insn + (gen_rtx_SET (VOIDmode, target, + gen_rtx_IOR + (mode, + gen_rtx_LSHIFTRT (mode, source, + GEN_INT (i)), + source))); return insns + 1; } } @@ -797,9 +800,9 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) { rtx sub = subtargets ? gen_reg_rtx (mode) : target; - emit_insn (gen_rtx (SET, VOIDmode, sub, GEN_INT (val))); - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (code, mode, source, sub))); + emit_insn (gen_rtx_SET (VOIDmode, sub, GEN_INT (val))); + emit_insn (gen_rtx_SET (VOIDmode, target, + gen_rtx (code, mode, source, sub))); } return 2; } @@ -816,14 +819,15 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) rtx sub = subtargets ? gen_reg_rtx (mode) : target; rtx shift = GEN_INT (set_sign_bit_copies); - emit_insn (gen_rtx (SET, VOIDmode, sub, - gen_rtx (NOT, mode, - gen_rtx (ASHIFT, mode, source, - shift)))); - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (NOT, mode, - gen_rtx (LSHIFTRT, mode, sub, + emit_insn (gen_rtx_SET (VOIDmode, sub, + gen_rtx_NOT (mode, + gen_rtx_ASHIFT (mode, + source, shift)))); + emit_insn (gen_rtx_SET (VOIDmode, target, + gen_rtx_NOT (mode, + gen_rtx_LSHIFTRT (mode, sub, + shift)))); } return 2; } @@ -836,13 +840,14 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) rtx sub = subtargets ? gen_reg_rtx (mode) : target; rtx shift = GEN_INT (set_zero_bit_copies); - emit_insn (gen_rtx (SET, VOIDmode, sub, - gen_rtx (NOT, mode, - gen_rtx (LSHIFTRT, mode, source, + emit_insn (gen_rtx_SET (VOIDmode, sub, + gen_rtx_NOT (mode, + gen_rtx_LSHIFTRT (mode, + source, shift)))); - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (NOT, mode, - gen_rtx (ASHIFT, mode, sub, + emit_insn (gen_rtx_SET (VOIDmode, target, + gen_rtx_NOT (mode, + gen_rtx_ASHIFT (mode, sub, shift)))); } return 2; @@ -853,16 +858,16 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) if (generate) { rtx sub = subtargets ? gen_reg_rtx (mode) : target; - emit_insn (gen_rtx (SET, VOIDmode, sub, - gen_rtx (NOT, mode, source))); + emit_insn (gen_rtx_SET (VOIDmode, sub, + gen_rtx_NOT (mode, source))); source = sub; if (subtargets) sub = gen_reg_rtx (mode); - emit_insn (gen_rtx (SET, VOIDmode, sub, - gen_rtx (AND, mode, source, - GEN_INT (temp1)))); - emit_insn (gen_rtx (SET, VOIDmode, target, - gen_rtx (NOT, mode, sub))); + emit_insn (gen_rtx_SET (VOIDmode, sub, + gen_rtx_AND (mode, source, + GEN_INT (temp1)))); + emit_insn (gen_rtx_SET (VOIDmode, target, + gen_rtx_NOT (mode, sub))); } return 3; } @@ -1006,39 +1011,40 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) if (code == SET) { if (generate) - emit_insn (gen_rtx (SET, VOIDmode, - new_src = (subtargets - ? gen_reg_rtx (mode) - : target), - GEN_INT (can_invert ? ~temp1 : temp1))); + emit_insn (gen_rtx_SET (VOIDmode, + new_src = (subtargets + ? gen_reg_rtx (mode) + : target), + GEN_INT (can_invert + ? ~temp1 : temp1))); can_invert = 0; code = PLUS; } else if (code == MINUS) { if (generate) - emit_insn (gen_rtx (SET, VOIDmode, - new_src = (subtargets - ? gen_reg_rtx (mode) - : target), - gen_rtx (code, mode, GEN_INT (temp1), - source))); + emit_insn (gen_rtx_SET (VOIDmode, + new_src = (subtargets + ? gen_reg_rtx (mode) + : target), + gen_rtx (code, mode, GEN_INT (temp1), + source))); code = PLUS; } else { if (generate) - emit_insn (gen_rtx (SET, VOIDmode, - new_src = (remainder - ? (subtargets - ? gen_reg_rtx (mode) - : target) - : target), - gen_rtx (code, mode, source, - GEN_INT (can_invert ? ~temp1 - : (can_negate - ? -temp1 - : temp1))))); + emit_insn (gen_rtx_SET (VOIDmode, + new_src = (remainder + ? (subtargets + ? gen_reg_rtx (mode) + : target) + : target), + gen_rtx (code, mode, source, + GEN_INT (can_invert ? ~temp1 + : (can_negate + ? -temp1 + : temp1))))); } insns++; @@ -1204,16 +1210,17 @@ legitimize_pic_address (orig, mode, reg) emit_insn (gen_pic_load_addr (address, orig)); - pic_ref = gen_rtx (MEM, Pmode, - gen_rtx (PLUS, Pmode, pic_offset_table_rtx, address)); + pic_ref = gen_rtx_MEM (Pmode, + gen_rtx_PLUS (Pmode, pic_offset_table_rtx, + address)); RTX_UNCHANGING_P (pic_ref) = 1; insn = emit_move_insn (reg, pic_ref); #endif current_function_uses_pic_offset_table = 1; /* Put a REG_EQUAL note on this insn, so that it can be optimized by loop. */ - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, orig, - REG_NOTES (insn)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig, + REG_NOTES (insn)); return reg; } else if (GET_CODE (orig) == CONST) @@ -1265,7 +1272,7 @@ legitimize_pic_address (orig, mode, reg) return reg; } - return gen_rtx (PLUS, Pmode, base, offset); + return gen_rtx_PLUS (Pmode, base, offset); } else if (GET_CODE (orig) == LABEL_REF) current_function_uses_pic_offset_table = 1; @@ -1300,20 +1307,15 @@ arm_finalize_pic () start_sequence (); l1 = gen_label_rtx (); - global_offset_table = gen_rtx (SYMBOL_REF, Pmode, "_GLOBAL_OFFSET_TABLE_"); + global_offset_table = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_"); /* The PC contains 'dot'+8, but the label L1 is on the next instruction, so the offset is only 'dot'+4. */ - pic_tmp = gen_rtx (CONST, VOIDmode, - gen_rtx (PLUS, Pmode, - gen_rtx (LABEL_REF, VOIDmode, l1), - GEN_INT (4))); - pic_tmp2 = gen_rtx (CONST, VOIDmode, - gen_rtx (PLUS, Pmode, - global_offset_table, - pc_rtx)); - - pic_rtx = gen_rtx (CONST, Pmode, - gen_rtx (MINUS, Pmode, pic_tmp2, pic_tmp)); + pic_tmp = plus_constant (gen_rtx_LABEL_REF (Pmode, l1), + GEN_INT (4)); + pic_tmp2 = gen_rtx_CONST (VOIDmode, + gen_rtx_PLUS (Pmode, global_offset_table, pc_rtx)); + + pic_rtx = gen_rtx_CONST (Pmode, gen_rtx_MINUS (Pmode, pic_tmp2, pic_tmp)); emit_insn (gen_pic_load_addr (pic_offset_table_rtx, pic_rtx)); emit_jump_insn (gen_pic_add_dot_plus_eight(l1, pic_offset_table_rtx)); @@ -1325,7 +1327,7 @@ arm_finalize_pic () /* Need to emit this whether or not we obey regdecls, since setjmp/longjmp can cause life info to screw up. */ - emit_insn (gen_rtx (USE, VOIDmode, pic_offset_table_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx)); #endif /* AOF_ASSEMBLER */ } @@ -2804,30 +2806,29 @@ arm_gen_load_multiple (base_regno, count, from, up, write_back, unchanging_p, int sign = up ? 1 : -1; rtx mem; - result = gen_rtx (PARALLEL, VOIDmode, - rtvec_alloc (count + (write_back ? 2 : 0))); + result = gen_rtx_PARALLEL (VOIDmode, + rtvec_alloc (count + (write_back ? 2 : 0))); if (write_back) { XVECEXP (result, 0, 0) - = gen_rtx (SET, GET_MODE (from), from, - plus_constant (from, count * 4 * sign)); + = gen_rtx_SET (GET_MODE (from), from, + plus_constant (from, count * 4 * sign)); i = 1; count++; } for (j = 0; i < count; i++, j++) { - mem = gen_rtx (MEM, SImode, plus_constant (from, j * 4 * sign)); + mem = gen_rtx_MEM (SImode, plus_constant (from, j * 4 * sign)); RTX_UNCHANGING_P (mem) = unchanging_p; MEM_IN_STRUCT_P (mem) = in_struct_p; - XVECEXP (result, 0, i) = gen_rtx (SET, VOIDmode, - gen_rtx (REG, SImode, base_regno + j), - mem); + XVECEXP (result, 0, i) + = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, base_regno + j), mem); } if (write_back) - XVECEXP (result, 0, i) = gen_rtx (CLOBBER, SImode, from); + XVECEXP (result, 0, i) = gen_rtx_CLOBBER (SImode, from); return result; } @@ -2848,29 +2849,29 @@ arm_gen_store_multiple (base_regno, count, to, up, write_back, unchanging_p, int sign = up ? 1 : -1; rtx mem; - result = gen_rtx (PARALLEL, VOIDmode, - rtvec_alloc (count + (write_back ? 2 : 0))); + result = gen_rtx_PARALLEL (VOIDmode, + rtvec_alloc (count + (write_back ? 2 : 0))); if (write_back) { XVECEXP (result, 0, 0) - = gen_rtx (SET, GET_MODE (to), to, - plus_constant (to, count * 4 * sign)); + = gen_rtx_SET (GET_MODE (to), to, + plus_constant (to, count * 4 * sign)); i = 1; count++; } for (j = 0; i < count; i++, j++) { - mem = gen_rtx (MEM, SImode, plus_constant (to, j * 4 * sign)); + mem = gen_rtx_MEM (SImode, plus_constant (to, j * 4 * sign)); RTX_UNCHANGING_P (mem) = unchanging_p; MEM_IN_STRUCT_P (mem) = in_struct_p; - XVECEXP (result, 0, i) = gen_rtx (SET, VOIDmode, mem, - gen_rtx (REG, SImode, base_regno + j)); + XVECEXP (result, 0, i) + = gen_rtx_SET (VOIDmode, mem, gen_rtx_REG (SImode, base_regno + j)); } if (write_back) - XVECEXP (result, 0, i) = gen_rtx (CLOBBER, SImode, to); + XVECEXP (result, 0, i) = gen_rtx_CLOBBER (SImode, to); return result; } @@ -2910,7 +2911,7 @@ arm_gen_movstrqi (operands) last_bytes = INTVAL (operands[2]) & 3; if (out_words_to_go != in_words_to_go && ((in_words_to_go - 1) & 3) != 0) - part_bytes_reg = gen_rtx (REG, SImode, (in_words_to_go - 1) & 3); + part_bytes_reg = gen_rtx_REG (SImode, (in_words_to_go - 1) & 3); for (i = 0; in_words_to_go >= 2; i+=4) { @@ -2937,10 +2938,10 @@ arm_gen_movstrqi (operands) dst_in_struct_p)); else { - mem = gen_rtx (MEM, SImode, dst); + mem = gen_rtx_MEM (SImode, dst); RTX_UNCHANGING_P (mem) = dst_unchanging_p; MEM_IN_STRUCT_P (mem) = dst_in_struct_p; - emit_move_insn (mem, gen_rtx (REG, SImode, 0)); + emit_move_insn (mem, gen_rtx_REG (SImode, 0)); if (last_bytes != 0) emit_insn (gen_addsi3 (dst, dst, GEN_INT (4))); } @@ -2955,13 +2956,13 @@ arm_gen_movstrqi (operands) { rtx sreg; - mem = gen_rtx (MEM, SImode, src); + mem = gen_rtx_MEM (SImode, src); RTX_UNCHANGING_P (mem) = src_unchanging_p; MEM_IN_STRUCT_P (mem) = src_in_struct_p; emit_move_insn (sreg = gen_reg_rtx (SImode), mem); emit_move_insn (fin_src = gen_reg_rtx (SImode), plus_constant (src, 4)); - mem = gen_rtx (MEM, SImode, dst); + mem = gen_rtx_MEM (SImode, dst); RTX_UNCHANGING_P (mem) = dst_unchanging_p; MEM_IN_STRUCT_P (mem) = dst_in_struct_p; emit_move_insn (mem, sreg); @@ -2977,7 +2978,7 @@ arm_gen_movstrqi (operands) if (in_words_to_go < 0) abort (); - mem = gen_rtx (MEM, SImode, src); + mem = gen_rtx_MEM (SImode, src); RTX_UNCHANGING_P (mem) = src_unchanging_p; MEM_IN_STRUCT_P (mem) = src_in_struct_p; part_bytes_reg = copy_to_mode_reg (SImode, mem); @@ -2997,10 +2998,10 @@ arm_gen_movstrqi (operands) while (last_bytes) { - mem = gen_rtx (MEM, QImode, plus_constant (dst, last_bytes - 1)); + mem = gen_rtx_MEM (QImode, plus_constant (dst, last_bytes - 1)); RTX_UNCHANGING_P (mem) = dst_unchanging_p; MEM_IN_STRUCT_P (mem) = dst_in_struct_p; - emit_move_insn (mem, gen_rtx (SUBREG, QImode, part_bytes_reg, 0)); + emit_move_insn (mem, gen_rtx_SUBREG (QImode, part_bytes_reg, 0)); if (--last_bytes) { tmp = gen_reg_rtx (SImode); @@ -3017,10 +3018,10 @@ arm_gen_movstrqi (operands) if (part_bytes_reg == NULL) abort (); - mem = gen_rtx (MEM, QImode, dst); + mem = gen_rtx_MEM (QImode, dst); RTX_UNCHANGING_P (mem) = dst_unchanging_p; MEM_IN_STRUCT_P (mem) = dst_in_struct_p; - emit_move_insn (mem, gen_rtx (SUBREG, QImode, part_bytes_reg, 0)); + emit_move_insn (mem, gen_rtx_SUBREG (QImode, part_bytes_reg, 0)); if (--last_bytes) { rtx tmp = gen_reg_rtx (SImode); @@ -3056,12 +3057,12 @@ gen_rotated_half_load (memref) && ((BYTES_BIG_ENDIAN ? 1 : 0) ^ ((offset & 2) == 0))) return NULL; - base = gen_rtx (MEM, SImode, plus_constant (base, offset & ~2)); + base = gen_rtx_MEM (SImode, plus_constant (base, offset & ~2)); if ((BYTES_BIG_ENDIAN ? 1 : 0) ^ ((offset & 2) == 2)) return base; - return gen_rtx (ROTATE, SImode, base, GEN_INT (16)); + return gen_rtx_ROTATE (SImode, base, GEN_INT (16)); } static enum machine_mode @@ -3256,10 +3257,10 @@ gen_compare_reg (code, x, y, fp) rtx x, y; { enum machine_mode mode = SELECT_CC_MODE (code, x, y); - rtx cc_reg = gen_rtx (REG, mode, 24); + rtx cc_reg = gen_rtx_REG (mode, 24); - emit_insn (gen_rtx (SET, VOIDmode, cc_reg, - gen_rtx (COMPARE, mode, x, y))); + emit_insn (gen_rtx_SET (VOIDmode, cc_reg, + gen_rtx_COMPARE (mode, x, y))); return cc_reg; } @@ -3270,37 +3271,35 @@ arm_reload_in_hi (operands) { rtx base = find_replacement (&XEXP (operands[1], 0)); - emit_insn (gen_zero_extendqisi2 (operands[2], gen_rtx (MEM, QImode, base))); + emit_insn (gen_zero_extendqisi2 (operands[2], gen_rtx_MEM (QImode, base))); /* Handle the case where the address is too complex to be offset by 1. */ if (GET_CODE (base) == MINUS || (GET_CODE (base) == PLUS && GET_CODE (XEXP (base, 1)) != CONST_INT)) { - rtx base_plus = gen_rtx (REG, SImode, REGNO (operands[0])); + rtx base_plus = gen_rtx_REG (SImode, REGNO (operands[0])); - emit_insn (gen_rtx (SET, VOIDmode, base_plus, base)); + emit_insn (gen_rtx_SET (VOIDmode, base_plus, base)); base = base_plus; } - emit_insn (gen_zero_extendqisi2 (gen_rtx (SUBREG, SImode, operands[0], 0), - gen_rtx (MEM, QImode, - plus_constant (base, 1)))); + emit_insn (gen_zero_extendqisi2 (gen_rtx_SUBREG (SImode, operands[0], 0), + gen_rtx_MEM (QImode, + plus_constant (base, 1)))); if (BYTES_BIG_ENDIAN) - emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (SUBREG, SImode, - operands[0], 0), - gen_rtx (IOR, SImode, - gen_rtx (ASHIFT, SImode, - gen_rtx (SUBREG, SImode, - operands[0], 0), - GEN_INT (8)), - operands[2]))); + emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_SUBREG (SImode, operands[0], 0), + gen_rtx_IOR (SImode, + gen_rtx_ASHIFT + (SImode, + gen_rtx_SUBREG (SImode, operands[0], 0), + GEN_INT (8)), + operands[2]))); else - emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (SUBREG, SImode, - operands[0], 0), - gen_rtx (IOR, SImode, - gen_rtx (ASHIFT, SImode, - operands[2], - GEN_INT (8)), - gen_rtx (SUBREG, SImode, operands[0], 0)))); + emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_SUBREG (SImode, operands[0], 0), + gen_rtx_IOR (SImode, + gen_rtx_ASHIFT (SImode, operands[2], + GEN_INT (8)), + gen_rtx_SUBREG (SImode, operands[0], + 0)))); } void @@ -3311,23 +3310,23 @@ arm_reload_out_hi (operands) if (BYTES_BIG_ENDIAN) { - emit_insn (gen_movqi (gen_rtx (MEM, QImode, plus_constant (base, 1)), - gen_rtx (SUBREG, QImode, operands[1], 0))); + emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (base, 1)), + gen_rtx_SUBREG (QImode, operands[1], 0))); emit_insn (gen_lshrsi3 (operands[2], - gen_rtx (SUBREG, SImode, operands[1], 0), + gen_rtx_SUBREG (SImode, operands[1], 0), GEN_INT (8))); - emit_insn (gen_movqi (gen_rtx (MEM, QImode, base), - gen_rtx (SUBREG, QImode, operands[2], 0))); + emit_insn (gen_movqi (gen_rtx_MEM (QImode, base), + gen_rtx_SUBREG (QImode, operands[2], 0))); } else { - emit_insn (gen_movqi (gen_rtx (MEM, QImode, base), - gen_rtx (SUBREG, QImode, operands[1], 0))); + emit_insn (gen_movqi (gen_rtx_MEM (QImode, base), + gen_rtx_SUBREG (QImode, operands[1], 0))); emit_insn (gen_lshrsi3 (operands[2], - gen_rtx (SUBREG, SImode, operands[1], 0), + gen_rtx_SUBREG (SImode, operands[1], 0), GEN_INT (8))); - emit_insn (gen_movqi (gen_rtx (MEM, QImode, plus_constant (base, 1)), - gen_rtx (SUBREG, QImode, operands[2], 0))); + emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (base, 1)), + gen_rtx_SUBREG (QImode, operands[2], 0))); } } @@ -3680,8 +3679,8 @@ arm_reorg (first) } offset = add_constant (src, mode); - addr = plus_constant (gen_rtx (LABEL_REF, VOIDmode, - pool_vector_label), + addr = plus_constant (gen_rtx_LABEL_REF (VOIDmode, + pool_vector_label), offset); /* For wide moves to integer regs we need to split the @@ -3693,20 +3692,20 @@ arm_reorg (first) if (GET_MODE_SIZE (mode) > 4 && (scratch = REGNO (dst)) < 16) { - rtx reg = gen_rtx (REG, SImode, scratch); + rtx reg = gen_rtx_REG (SImode, scratch); newinsn = emit_insn_after (gen_movaddr (reg, addr), newinsn); addr = reg; } - newsrc = gen_rtx (MEM, mode, addr); + newsrc = gen_rtx_MEM (mode, addr); /* Build a jump insn wrapper around the move instead of an ordinary insn, because we want to have room for the target label rtx in fld[7], which an ordinary insn doesn't have. */ - newinsn = emit_jump_insn_after (gen_rtx (SET, VOIDmode, - dst, newsrc), + newinsn = emit_jump_insn_after (gen_rtx_SET (VOIDmode, + dst, newsrc), newinsn); JUMP_LABEL (newinsn) = pool_vector_label; @@ -3804,7 +3803,7 @@ output_call (operands) if (REGNO (operands[0]) == 14) { - operands[0] = gen_rtx (REG, SImode, 12); + operands[0] = gen_rtx_REG (SImode, 12); output_asm_insn ("mov%?\t%0, %|lr", operands); } output_asm_insn ("mov%?\t%|lr, %|pc", operands); @@ -3827,7 +3826,7 @@ eliminate_lr2ip (x) case REG: if (REGNO (x0) == 14) { - *x = gen_rtx (REG, SImode, 12); + *x = gen_rtx_REG (SImode, 12); return 1; } return 0; @@ -3876,9 +3875,9 @@ output_mov_long_double_fpu_from_arm (operands) if (arm_reg0 == 12) abort(); - ops[0] = gen_rtx (REG, SImode, arm_reg0); - ops[1] = gen_rtx (REG, SImode, 1 + arm_reg0); - ops[2] = gen_rtx (REG, SImode, 2 + arm_reg0); + ops[0] = gen_rtx_REG (SImode, arm_reg0); + ops[1] = gen_rtx_REG (SImode, 1 + arm_reg0); + ops[2] = gen_rtx_REG (SImode, 2 + arm_reg0); output_asm_insn ("stm%?fd\t%|sp!, {%0, %1, %2}", ops); output_asm_insn ("ldf%?e\t%0, [%|sp], #12", operands); @@ -3899,9 +3898,9 @@ output_mov_long_double_arm_from_fpu (operands) if (arm_reg0 == 12) abort(); - ops[0] = gen_rtx (REG, SImode, arm_reg0); - ops[1] = gen_rtx (REG, SImode, 1 + arm_reg0); - ops[2] = gen_rtx (REG, SImode, 2 + arm_reg0); + ops[0] = gen_rtx_REG (SImode, arm_reg0); + ops[1] = gen_rtx_REG (SImode, 1 + arm_reg0); + ops[2] = gen_rtx_REG (SImode, 2 + arm_reg0); output_asm_insn ("stf%?e\t%1, [%|sp, #-12]!", operands); output_asm_insn ("ldm%?fd\t%|sp!, {%0, %1, %2}", ops); @@ -3925,8 +3924,8 @@ output_mov_long_double_arm_from_arm (operands) { for (i = 0; i < 3; i++) { - ops[0] = gen_rtx (REG, SImode, dest_start + i); - ops[1] = gen_rtx (REG, SImode, src_start + i); + ops[0] = gen_rtx_REG (SImode, dest_start + i); + ops[1] = gen_rtx_REG (SImode, src_start + i); output_asm_insn ("mov%?\t%0, %1", ops); } } @@ -3934,8 +3933,8 @@ output_mov_long_double_arm_from_arm (operands) { for (i = 2; i >= 0; i--) { - ops[0] = gen_rtx (REG, SImode, dest_start + i); - ops[1] = gen_rtx (REG, SImode, src_start + i); + ops[0] = gen_rtx_REG (SImode, dest_start + i); + ops[1] = gen_rtx_REG (SImode, src_start + i); output_asm_insn ("mov%?\t%0, %1", ops); } } @@ -3957,8 +3956,8 @@ output_mov_double_fpu_from_arm (operands) if (arm_reg0 == 12) abort(); - ops[0] = gen_rtx (REG, SImode, arm_reg0); - ops[1] = gen_rtx (REG, SImode, 1 + arm_reg0); + ops[0] = gen_rtx_REG (SImode, arm_reg0); + ops[1] = gen_rtx_REG (SImode, 1 + arm_reg0); output_asm_insn ("stm%?fd\t%|sp!, {%0, %1}", ops); output_asm_insn ("ldf%?d\t%0, [%|sp], #8", operands); return ""; @@ -3978,8 +3977,8 @@ output_mov_double_arm_from_fpu (operands) if (arm_reg0 == 12) abort(); - ops[0] = gen_rtx (REG, SImode, arm_reg0); - ops[1] = gen_rtx (REG, SImode, 1 + arm_reg0); + ops[0] = gen_rtx_REG (SImode, arm_reg0); + ops[1] = gen_rtx_REG (SImode, 1 + arm_reg0); output_asm_insn ("stf%?d\t%1, [%|sp, #-8]!", operands); output_asm_insn ("ldm%?fd\t%|sp!, {%0, %1}", ops); return ""; @@ -4001,7 +4000,7 @@ output_move_double (operands) { int reg0 = REGNO (operands[0]); - otherops[0] = gen_rtx (REG, SImode, 1 + reg0); + otherops[0] = gen_rtx_REG (SImode, 1 + reg0); if (code1 == REG) { int reg1 = REGNO (operands[1]); @@ -4206,7 +4205,7 @@ output_move_double (operands) default: otherops[0] = adj_offsettable_operand (operands[0], 4); - otherops[1] = gen_rtx (REG, SImode, 1 + REGNO (operands[1])); + otherops[1] = gen_rtx_REG (SImode, 1 + REGNO (operands[1])); output_asm_insn ("str%?\t%1, %0", operands); output_asm_insn ("str%?\t%1, %0", otherops); } @@ -4677,7 +4676,7 @@ output_return_instruction (operand, really_return, reverse) /* Otherwise, trap an attempted return by aborting. */ ops[0] = operand; - ops[1] = gen_rtx (SYMBOL_REF, Pmode, "abort"); + ops[1] = gen_rtx_SYMBOL_REF (Pmode, "abort"); assemble_external_libcall (ops[1]); output_asm_insn (reverse ? "bl%D0\t%a1" : "bl%d0\t%a1", ops); return ""; @@ -4872,7 +4871,7 @@ output_func_epilogue (f, frame_size) /* A volatile function should never return. Call abort. */ if (volatile_func) { - rtx op = gen_rtx (SYMBOL_REF, Pmode, "abort"); + rtx op = gen_rtx_SYMBOL_REF (Pmode, "abort"); assemble_external_libcall (op); output_asm_insn ("bl\t%a0", &op); goto epilogue_done; @@ -5032,8 +5031,7 @@ output_func_epilogue (f, frame_size) { /* Unwind the pre-pushed regs */ operands[0] = operands[1] = stack_pointer_rtx; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - current_function_pretend_args_size); + operands[2] = GEN_INT (current_function_pretend_args_size); output_add_immediate (operands); } /* And finally, go home */ @@ -5066,19 +5064,21 @@ emit_multi_reg_push (mask) if (num_regs == 0 || num_regs > 16) abort (); - par = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (num_regs)); + par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (num_regs)); for (i = 0; i < 16; i++) { if (mask & (1 << i)) { XVECEXP (par, 0, 0) - = gen_rtx (SET, VOIDmode, gen_rtx (MEM, BLKmode, - gen_rtx (PRE_DEC, BLKmode, - stack_pointer_rtx)), - gen_rtx (UNSPEC, BLKmode, - gen_rtvec (1, gen_rtx (REG, SImode, i)), - 2)); + = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (BLKmode, + gen_rtx_PRE_DEC (BLKmode, + stack_pointer_rtx)), + gen_rtx_UNSPEC (BLKmode, + gen_rtvec (1, + gen_rtx_REG (SImode, i)), + 2)); break; } } @@ -5088,7 +5088,7 @@ emit_multi_reg_push (mask) if (mask & (1 << i)) { XVECEXP (par, 0, j) - = gen_rtx (USE, VOIDmode, gen_rtx (REG, SImode, i)); + = gen_rtx_USE (VOIDmode, gen_rtx_REG (SImode, i)); j++; } } @@ -5104,19 +5104,20 @@ emit_sfm (base_reg, count) rtx par; int i; - par = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count)); + par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count)); + + XVECEXP (par, 0, 0) + = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (BLKmode, + gen_rtx_PRE_DEC (BLKmode, stack_pointer_rtx)), + gen_rtx_UNSPEC (BLKmode, + gen_rtvec (1, gen_rtx_REG (XFmode, + base_reg++)), + 2)); - XVECEXP (par, 0, 0) = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, BLKmode, - gen_rtx (PRE_DEC, BLKmode, - stack_pointer_rtx)), - gen_rtx (UNSPEC, BLKmode, - gen_rtvec (1, gen_rtx (REG, XFmode, - base_reg++)), - 2)); for (i = 1; i < count; i++) - XVECEXP (par, 0, i) = gen_rtx (USE, VOIDmode, - gen_rtx (REG, XFmode, base_reg++)); + XVECEXP (par, 0, i) = gen_rtx_USE (VOIDmode, + gen_rtx_REG (XFmode, base_reg++)); emit_insn (par); } @@ -5152,7 +5153,7 @@ arm_expand_prologue () if (frame_pointer_needed) { live_regs_mask |= 0xD800; - emit_insn (gen_movsi (gen_rtx (REG, SImode, 12), + emit_insn (gen_movsi (gen_rtx_REG (SImode, 12), stack_pointer_rtx)); } @@ -5182,11 +5183,12 @@ arm_expand_prologue () { for (reg = 23; reg > 15; reg--) if (regs_ever_live[reg] && ! call_used_regs[reg]) - emit_insn (gen_rtx (SET, VOIDmode, - gen_rtx (MEM, XFmode, - gen_rtx (PRE_DEC, XFmode, - stack_pointer_rtx)), - gen_rtx (REG, XFmode, reg))); + emit_insn (gen_rtx_SET + (VOIDmode, + gen_rtx_MEM (XFmode, + gen_rtx_PRE_DEC (XFmode, + stack_pointer_rtx)), + gen_rtx_REG (XFmode, reg))); } else { @@ -5216,15 +5218,15 @@ arm_expand_prologue () } if (frame_pointer_needed) - emit_insn (gen_addsi3 (hard_frame_pointer_rtx, gen_rtx (REG, SImode, 12), + emit_insn (gen_addsi3 (hard_frame_pointer_rtx, gen_rtx_REG (SImode, 12), (GEN_INT (-(4 + current_function_pretend_args_size))))); if (amount != const0_rtx) { emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, amount)); - emit_insn (gen_rtx (CLOBBER, VOIDmode, - gen_rtx (MEM, BLKmode, stack_pointer_rtx))); + emit_insn (gen_rtx_CLOBBER (VOIDmode, + gen_rtx_MEM (BLKmode, stack_pointer_rtx))); } /* If we are profiling, make sure no instructions are scheduled before @@ -5891,7 +5893,7 @@ aof_pic_entry (x) { /* This needs to persist throughout the compilation. */ end_temporary_allocation (); - aof_pic_label = gen_rtx (SYMBOL_REF, Pmode, "x$adcons"); + aof_pic_label = gen_rtx_SYMBOL_REF (Pmode, "x$adcons"); resume_temporary_allocation (); } diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index bb756809ba8..542d6049e42 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -938,15 +938,15 @@ enum reg_class otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ (GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT && TARGET_HARD_FLOAT \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0)) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ (GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT \ - ? gen_rtx (REG, MODE, 16) \ - : gen_rtx (REG, MODE, 0)) + ? gen_rtx_REG (MODE, 16) \ + : gen_rtx_REG (MODE, 0)) /* 1 if N is a possible register number for a function value. On the ARM, only r0 and f0 can return results. */ @@ -985,7 +985,7 @@ enum reg_class stack if necessary). */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ((NAMED) \ - ? ((CUM) >= 16 ? 0 : gen_rtx (REG, MODE, (CUM) / 4)) \ + ? ((CUM) >= 16 ? 0 : gen_rtx_REG (MODE, (CUM) / 4)) \ : 0) /* For an arg passed partly in registers and partly in memory, @@ -1178,9 +1178,9 @@ enum reg_class CXT is an RTX for the static chain value for the function. */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \ (CXT)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \ (FNADDR)); \ } @@ -1476,14 +1476,14 @@ extern struct rtx_def *legitimize_pic_address (); n -= low_n; \ } \ base_reg = gen_reg_rtx (SImode); \ - val = force_operand (gen_rtx (PLUS, SImode, xop0, \ - GEN_INT (n)), NULL_RTX); \ + val = force_operand (gen_rtx_PLUS (SImode, xop0, \ + GEN_INT (n)), NULL_RTX); \ emit_move_insn (base_reg, val); \ (X) = (low_n == 0 ? base_reg \ - : gen_rtx (PLUS, SImode, base_reg, GEN_INT (low_n))); \ + : gen_rtx_PLUS (SImode, base_reg, GEN_INT (low_n))); \ } \ else if (xop0 != XEXP (X, 0) || xop1 != XEXP (x, 1)) \ - (X) = gen_rtx (PLUS, SImode, xop0, xop1); \ + (X) = gen_rtx_PLUS (SImode, xop0, xop1); \ } \ else if (GET_CODE (X) == MINUS) \ { \ @@ -1495,7 +1495,7 @@ extern struct rtx_def *legitimize_pic_address (); if (CONSTANT_P (xop1) && ! symbol_mentioned_p (xop1)) \ xop1 = force_reg (SImode, xop1); \ if (xop0 != XEXP (X, 0) || xop1 != XEXP (X, 1)) \ - (X) = gen_rtx (MINUS, SImode, xop0, xop1); \ + (X) = gen_rtx_MINUS (SImode, xop0, xop1); \ } \ if (flag_pic) \ (X) = legitimize_pic_address (OLDX, MODE, NULL_RTX); \ @@ -1939,7 +1939,7 @@ do { \ #define RETURN_ADDR_RTX(COUNT, FRAME) \ ((COUNT == 0) \ - ? gen_rtx (MEM, Pmode, plus_constant (FRAME, -4)) \ + ? gen_rtx_MEM (Pmode, plus_constant (FRAME, -4)) \ : NULL_RTX) /* Used to mask out junk bits from the return address, such as diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index ee4a9086ed7..3ec838b30ca 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -1251,8 +1251,8 @@ emit_insn (gen_ashlsi3 (op0, operands[3], GEN_INT (32 - INTVAL (operands[1])))); - emit_insn (gen_iorsi3 (op1, gen_rtx (LSHIFTRT, SImode, operands[0], - operands[1]), + emit_insn (gen_iorsi3 (op1, gen_rtx_LSHIFTRT (SImode, operands[0], + operands[1]), op0)); emit_insn (gen_rotlsi3 (subtarget, op1, operands[1])); } @@ -1269,8 +1269,8 @@ GEN_INT (32 - INTVAL (operands[1])))); emit_insn (gen_ashlsi3 (op1, operands[0], operands[1])); emit_insn (gen_iorsi3 (subtarget, - gen_rtx (LSHIFTRT, SImode, op1, - operands[1]), op0)); + gen_rtx_LSHIFTRT (SImode, op1, operands[1]), + op0)); } else { @@ -1306,12 +1306,12 @@ } if (INTVAL (operands[2]) != 0) - op0 = gen_rtx (ASHIFT, SImode, op0, operands[2]); + op0 = gen_rtx_ASHIFT (SImode, op0, operands[2]); emit_insn (gen_andsi_notsi_si (op2, operands[0], op0)); } if (INTVAL (operands[2]) != 0) - op1 = gen_rtx (ASHIFT, SImode, op1, operands[2]); + op1 = gen_rtx_ASHIFT (SImode, op1, operands[2]); emit_insn (gen_iorsi3 (subtarget, op1, op2)); } @@ -2139,8 +2139,8 @@ { if (arm_arch4 && GET_CODE (operands[1]) == MEM) { - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (ZERO_EXTEND, SImode, operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_ZERO_EXTEND (SImode, operands[1]))); DONE; } if (TARGET_SHORT_BY_BYTES && GET_CODE (operands[1]) == MEM) @@ -2241,8 +2241,8 @@ { if (arm_arch4 && GET_CODE (operands[1]) == MEM) { - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (SIGN_EXTEND, SImode, operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_SIGN_EXTEND (SImode, operands[1]))); DONE; } @@ -2333,8 +2333,8 @@ { if (arm_arch4 && GET_CODE (operands[1]) == MEM) { - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (SIGN_EXTEND, HImode, operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_SIGN_EXTEND (HImode, operands[1]))); DONE; } if (! s_register_operand (operands[1], QImode)) @@ -2363,8 +2363,8 @@ { if (arm_arch4 && GET_CODE (operands[1]) == MEM) { - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (SIGN_EXTEND, SImode, operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_SIGN_EXTEND (SImode, operands[1]))); DONE; } if (! s_register_operand (operands[1], QImode)) @@ -2755,7 +2755,7 @@ } emit_insn (gen_movsi (reg, GEN_INT (val))); - operands[1] = gen_rtx (SUBREG, HImode, reg, 0); + operands[1] = gen_rtx_SUBREG (HImode, reg, 0); } else if (! arm_arch4) { @@ -2775,8 +2775,11 @@ { HOST_WIDE_INT new_offset = INTVAL (offset) & ~2; - emit_insn (gen_movsi (reg, gen_rtx (MEM, SImode, - plus_constant (base, new_offset)))); + emit_insn (gen_movsi (reg, + gen_rtx_MEM + (SImode, + plus_constant (base, + new_offset)))); if (((INTVAL (offset) & 2) != 0) ^ (BYTES_BIG_ENDIAN ? 1 : 0)) { @@ -2808,15 +2811,16 @@ if ((INTVAL (offset) & 2) == 2) { HOST_WIDE_INT new_offset = INTVAL (offset) ^ 2; - new_mem = gen_rtx (MEM, SImode, - plus_constant (base, new_offset)); + new_mem = gen_rtx_MEM (SImode, + plus_constant (base, + new_offset)); emit_insn (gen_movsi (reg, new_mem)); } else { - new_mem = gen_rtx (MEM, SImode, - XEXP (operands[1], 0)); + new_mem = gen_rtx_MEM (SImode, + XEXP (operands[1], 0)); emit_insn (gen_rotated_loadsi (reg, new_mem)); } @@ -2841,7 +2845,7 @@ if (GET_CODE (operands[0]) != REG) abort (); - operands[0] = gen_rtx (SUBREG, SImode, operands[0], 0); + operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0); emit_insn (gen_movsi (operands[0], operands[1])); DONE; } @@ -2858,7 +2862,7 @@ rtx ops[2]; ops[0] = operands[0]; - ops[1] = gen_rtx (MEM, SImode, plus_constant (XEXP (operands[1], 0), 2)); + ops[1] = gen_rtx_MEM (SImode, plus_constant (XEXP (operands[1], 0), 2)); output_asm_insn (\"ldr%?\\t%0, %1\\t%@ load-rotate\", ops); return \"\"; }" @@ -3002,7 +3006,7 @@ rtx reg = gen_reg_rtx (SImode); emit_insn (gen_movsi (reg, operands[1])); - operands[1] = gen_rtx (SUBREG, QImode, reg, 0); + operands[1] = gen_rtx_SUBREG (QImode, reg, 0); } if (GET_CODE (operands[0]) == MEM) operands[1] = force_reg (QImode, operands[1]); @@ -3090,8 +3094,8 @@ operands[2] = XEXP (operands[0], 0); else if (code == POST_INC || code == PRE_DEC) { - operands[0] = gen_rtx (SUBREG, DImode, operands[0], 0); - operands[1] = gen_rtx (SUBREG, DImode, operands[1], 0); + operands[0] = gen_rtx_SUBREG (DImode, operands[0], 0); + operands[1] = gen_rtx_SUBREG (DImode, operands[1], 0); emit_insn (gen_movdi (operands[0], operands[1])); DONE; } @@ -3107,8 +3111,8 @@ emit_insn (gen_addsi3 (operands[2], XEXP (XEXP (operands[0], 0), 0), XEXP (XEXP (operands[0], 0), 1))); - emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (MEM, DFmode, operands[2]), - operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_MEM (DFmode, operands[2]), + operands[1])); if (code == POST_DEC) emit_insn (gen_addsi3 (operands[2], operands[2], GEN_INT (-8))); @@ -5992,8 +5996,8 @@ enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), operands[2], operands[3]); - operands[6] = gen_rtx (REG, mode, 24); - operands[7] = gen_rtx (COMPARE, mode, operands[2], operands[3]); + operands[6] = gen_rtx_REG (mode, 24); + operands[7] = gen_rtx_COMPARE (mode, operands[2], operands[3]); } ") diff --git a/gcc/config/clipper/clipper.c b/gcc/config/clipper/clipper.c index f3bae7eead4..d0efbaf2859 100644 --- a/gcc/config/clipper/clipper.c +++ b/gcc/config/clipper/clipper.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Clipper - Copyright (C) 1987, 1988, 1991, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 1988, 1991, 1997, 1998 Free Software Foundation, Inc. Contributed by Holger Teutsch (holger@hotbso.rhein-main.de) This file is part of GNU CC. @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -42,16 +42,14 @@ extern int frame_pointer_needed; static int frame_size; -/* - * compute size of a clipper stack frame where 'lsize' is the required - * space for local variables. - */ +/* Compute size of a clipper stack frame where 'lsize' is the required + space for local variables. */ int clipper_frame_size (lsize) int lsize; { - int i,size; /* total size of frame */ + int i, size; /* total size of frame */ int save_size; save_size = 0; /* compute size for reg saves */ @@ -69,17 +67,15 @@ clipper_frame_size (lsize) return size; } -/* - * prologue and epilogue output - * function is entered with pc pushed, i.e. stack is 32 bit aligned - * - * current_function_args_size == 0 means that the current function's args - * are passed totally in registers i.e fp is not used as ap. - * If frame_size is also 0 the current function does not push anything and - * can run with misaligned stack -> subq $4,sp / add $4,sp on entry and exit - * can be omitted. - * - */ +/* Prologue and epilogue output + Function is entered with pc pushed, i.e. stack is 32 bit aligned + + current_function_args_size == 0 means that the current function's args + are passed totally in registers i.e fp is not used as ap. + If frame_size is also 0 the current function does not push anything and + can run with misaligned stack -> subq $4,sp / add $4,sp on entry and exit + can be omitted. */ + void output_function_prologue (file, lsize) FILE *file; @@ -387,58 +383,45 @@ clipper_builtin_saveregs (arglist) addr = copy_to_reg (XEXP (block, 0)); - f0_addr = gen_rtx (PLUS, Pmode, addr, gen_rtx (CONST_INT, Pmode, 24)); - f1_addr = gen_rtx (PLUS, Pmode, addr, gen_rtx (CONST_INT, Pmode, 32)); - r0_addr = gen_rtx (PLUS, Pmode, addr, gen_rtx (CONST_INT, Pmode, 40)); - r1_addr = gen_rtx (PLUS, Pmode, addr, gen_rtx (CONST_INT, Pmode, 44)); + f0_addr = plus_constant (addr, 24); + f1_addr = plus_constant (addr, 32); + r0_addr = plus_constant (addr, 40); + r1_addr = plus_constant (addr, 44); /* Store float regs */ - emit_move_insn (gen_rtx (MEM, DFmode, f0_addr), gen_rtx (REG, DFmode, 16)); - emit_move_insn (gen_rtx (MEM, DFmode, f1_addr), gen_rtx (REG, DFmode, 17)); + emit_move_insn (gen_rtx_MEM (DFmode, f0_addr), gen_rtx_REG (DFmode, 16)); + emit_move_insn (gen_rtx_MEM (DFmode, f1_addr), gen_rtx_REG (DFmode, 17)); /* Store int regs */ - emit_move_insn (gen_rtx (MEM, SImode, r0_addr), gen_rtx (REG, SImode, 0)); - emit_move_insn (gen_rtx (MEM, SImode, r1_addr), gen_rtx (REG, SImode, 1)); + emit_move_insn (gen_rtx_MEM (SImode, r0_addr), gen_rtx_REG (SImode, 0)); + emit_move_insn (gen_rtx_MEM (SImode, r1_addr), gen_rtx_REG (SImode, 1)); /* Store the arg pointer in the __va_stk member. */ - emit_move_insn (gen_rtx (MEM, SImode, addr), + emit_move_insn (gen_rtx_MEM (SImode, addr), copy_to_reg (virtual_incoming_args_rtx)); - /* now move addresses of the saved regs into the pointer array */ scratch = gen_reg_rtx (Pmode); emit_move_insn (scratch, r0_addr); - emit_move_insn (gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, addr, - gen_rtx (CONST_INT, Pmode, 4))), - scratch); + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 4)), scratch); emit_move_insn (scratch, f0_addr); - emit_move_insn (gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, addr, - gen_rtx (CONST_INT, Pmode, 8))), - scratch); + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 8)), scratch); emit_move_insn (scratch, r1_addr); - emit_move_insn (gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, addr, - gen_rtx (CONST_INT, Pmode, 12))), - scratch); + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 12)), scratch); emit_move_insn (scratch, f1_addr); - emit_move_insn (gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, addr, - gen_rtx (CONST_INT, Pmode, 16))), - scratch); + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 16)), scratch); - if (flag_check_memory_usage) + if (current_function_check_memory_usage) { emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, addr, ptr_mode, diff --git a/gcc/config/clipper/clipper.h b/gcc/config/clipper/clipper.h index 9600df34177..e0f04bf0817 100644 --- a/gcc/config/clipper/clipper.h +++ b/gcc/config/clipper/clipper.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Clipper version. - Copyright (C) 1987, 88, 91, 93-95, 1996 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 91, 93-96, 1998 Free Software Foundation, Inc. Contributed by Holger Teutsch (holger@hotbso.rhein-main.de) This file is part of GNU CC. @@ -393,15 +393,15 @@ enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES}; otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\ - TYPE_MODE (VALTYPE) == DFmode) ? \ - 16 : 0)) + gen_rtx_REG (TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\ + TYPE_MODE (VALTYPE) == DFmode) ? \ + 16 : 0)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), ((MODE) == SFmode || (MODE) == DFmode ? 16 : 0)) + gen_rtx_REG ((MODE), ((MODE) == SFmode || (MODE) == DFmode ? 16 : 0)) /* 1 if N is a possible register number for a function value @@ -527,8 +527,9 @@ do \ && (GET_MODE_SIZE (MODE) <= 8) \ && ((TYPE) == NULL || !AGGREGATE_TYPE_P(TYPE)) \ && ((MODE) != DImode || (CUM).num == 0)) \ - ? gen_rtx (REG, (MODE), \ - GET_MODE_CLASS(MODE) == MODE_FLOAT ? (CUM).num+16 : (CUM).num) \ + ? gen_rtx_REG ((MODE), \ + GET_MODE_CLASS(MODE) == MODE_FLOAT \ + ? (CUM).num+16 : (CUM).num) \ : 0) /* If defined, a C expression that gives the alignment boundary, in bits, @@ -633,8 +634,8 @@ do \ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 24)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 28)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 24)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 28)), FNADDR); \ } /* Addressing modes, and classification of registers for them. */ @@ -814,8 +815,10 @@ do \ in one reasonably fast instruction. */ #define MOVE_MAX 4 -/* MOVE_RATIO is the number of move instructions that is better than a - block move. Make this large on clipper, since the block move is very +/* If a memory-to-memory move would take MOVE_RATIO or more simple + move-instruction pairs, we will do a movstr or libcall instead. + + Make this large on clipper, since the block move is very inefficient with small blocks, and the hard register needs of the block move require much reload work. */ diff --git a/gcc/config/clipper/clipper.md b/gcc/config/clipper/clipper.md index e045ce9acc8..8f694e77a1f 100644 --- a/gcc/config/clipper/clipper.md +++ b/gcc/config/clipper/clipper.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, Clipper Version -;; Copyright (C) 1987, 88, 91, 93, 94, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1987, 88, 91, 93, 94, 97, 1998 Free Software Foundation, Inc. ;; Contributed by Holger Teutsch (holger@hotbso.rhein-main.de) ;; This file is part of GNU CC. @@ -178,7 +178,7 @@ { rtx xops[4]; xops[0] = operands[0]; - xops[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xops[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xops[2] = operands[1]; xops[3] = adj_offsettable_operand (operands[1], 4); output_asm_insn (\"loadw %2,%0\;loadw %3,%1\", xops); @@ -189,9 +189,9 @@ { rtx xops[4]; xops[0] = operands[0]; - xops[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xops[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xops[2] = operands[1]; - xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"movw %2,%0\;movw %3,%1\", xops); return \"\"; } @@ -215,7 +215,7 @@ xops[0] = operands[0]; /* r -> o */ xops[1] = adj_offsettable_operand (operands[0], 4); xops[2] = operands[1]; - xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"storw %2,%0\;storw %3,%1\", xops); return \"\"; }" @@ -317,12 +317,12 @@ { rtx xoperands[2],yoperands[2]; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (which_alternative == 0) /* r -> r */ { output_asm_insn (\"movw %1,%0\", operands); - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"movw %1,%0\", xoperands); return \"\"; } @@ -340,12 +340,10 @@ abort (); yoperands[0] = operands[0]; - yoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); + yoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); output_asm_insn (\"loadi %1,%0\", yoperands); - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[1])); + xoperands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); output_asm_insn (\"loadi %1,%0\", xoperands); return \"\"; } @@ -368,7 +366,7 @@ xops[0] = operands[0]; xops[1] = adj_offsettable_operand (operands[0], 4); xops[2] = operands[1]; - xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"storw %2,%0\;storw %3,%1\", xops); return \"\"; }" @@ -698,9 +696,9 @@ rtx xoperands[4]; xoperands[0] = operands[0]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xoperands[2] = operands[2]; - xoperands[3] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[3] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); output_asm_insn (\"addw %2,%0\;addwc %3,%1\", xoperands); return \"\"; }" @@ -735,7 +733,7 @@ val = -val; xops[0] = operands[0]; - xops[1] = gen_rtx (CONST_INT, VOIDmode, val); + xops[1] = GEN_INT (val); if (val >= 16) output_asm_insn (\"subi %1,%0\", xops); @@ -769,9 +767,9 @@ rtx xoperands[4]; xoperands[0] = operands[0]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xoperands[2] = operands[2]; - xoperands[3] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[3] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); output_asm_insn (\"subw %2,%0\;subwc %3,%1\", xoperands); return \"\"; }" @@ -993,7 +991,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1020,7 +1018,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1090,7 +1088,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1117,7 +1115,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1148,7 +1146,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1175,7 +1173,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" diff --git a/gcc/config/convex/convex.c b/gcc/config/convex/convex.c index cd2eb55c964..7606becc52d 100644 --- a/gcc/config/convex/convex.c +++ b/gcc/config/convex/convex.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Convex. - Copyright (C) 1988, 1993, 1994, 1997 Free Software Foundation, Inc. + Copyright (C) 1988, 1993, 1994, 1997, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -19,7 +19,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "tree.h" #include "rtl.h" #include "regs.h" @@ -359,8 +359,8 @@ expand_movstr (operands) dest = change_address (dest, mode, 0); /* Make load and store patterns for this piece */ - load = gen_rtx (SET, VOIDmode, reg, src); - store = gen_rtx (SET, VOIDmode, dest, reg); + load = gen_rtx_SET (VOIDmode, reg, src); + store = gen_rtx_SET (VOIDmode, dest, reg); /* Emit the load and the store from last time. When we emit a store, we can reuse its temp reg. */ @@ -397,7 +397,7 @@ static void expand_movstr_call (operands) rtx *operands; { - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0, + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0, VOIDmode, 3, XEXP (operands[0], 0), Pmode, XEXP (operands[1], 0), Pmode, diff --git a/gcc/config/convex/convex.md b/gcc/config/convex/convex.md index cb6f64dc39b..a118513fed4 100644 --- a/gcc/config/convex/convex.md +++ b/gcc/config/convex/convex.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, Convex Version -;; Copyright (C) 1988, 1994, 1995 Free Software Foundation, Inc. +;; Copyright (C) 1988, 1994, 1995, 1998 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1518,7 +1518,7 @@ } else { - output_cmp (gen_rtx (REG, SImode, 7), constm1_rtx, 'W'); + output_cmp (gen_rtx_REG (SImode, 7), constm1_rtx, 'W'); return \"psh.w s7\;ld.w %0,s7\;add.w #-1,s7\;st.w s7,%0\;pop.w s7\"; } }") @@ -1540,7 +1540,7 @@ } else { - output_cmp (gen_rtx (REG, SImode, 7), const0_rtx, 'W'); + output_cmp (gen_rtx_REG (SImode, 7), const0_rtx, 'W'); return \"psh.w s7\;ld.w %0,s7\;add.w #-1,s7\;st.w s7,%0\;pop.w s7\"; } }") @@ -1561,7 +1561,7 @@ } else { - output_cmp (gen_rtx (REG, HImode, 7), constm1_rtx, 'H'); + output_cmp (gen_rtx_REG (HImode, 7), constm1_rtx, 'H'); return \"psh.w s7\;ld.h %0,s7\;add.h #-1,s7\;st.h s7,%0\;pop.w s7\"; } }") @@ -1583,7 +1583,7 @@ } else { - output_cmp (gen_rtx (REG, HImode, 7), const0_rtx, 'H'); + output_cmp (gen_rtx_REG (HImode, 7), const0_rtx, 'H'); return \"psh.w s7\;ld.h %0,s7\;add.h #-1,s7\;st.h s7,%0\;pop.w s7\"; } }") diff --git a/gcc/config/dsp16xx/dsp16xx.c b/gcc/config/dsp16xx/dsp16xx.c index 4a0b34bc622..433891c5fec 100644 --- a/gcc/config/dsp16xx/dsp16xx.c +++ b/gcc/config/dsp16xx/dsp16xx.c @@ -21,7 +21,7 @@ Boston, MA 02111-1307, USA. */ /* Some output-actions in dsp1600.md need these. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -1705,7 +1705,7 @@ rtx *operands; REAL_VALUE_FROM_CONST_DOUBLE (d, src); REAL_VALUE_TO_TARGET_SINGLE (d, value); - operands[1] = gen_rtx (CONST_INT, VOIDmode, value); + operands[1] = GEN_INT (value); output_asm_insn ("%u0=%U1\n\t%w0=%H1", operands); #else fatal ("inline float constants not supported on this host"); @@ -1780,10 +1780,11 @@ enum machine_mode mode; quotient = shift_amount/16; shift_amount = shift_amount - (quotient * 16); for (i = 0; i < quotient; i++) - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (shift_op, mode, - first_shift_emitted ? operands[0] : operands[1], - gen_rtx (CONST_INT, VOIDmode, 16)))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (shift_op, mode, + first_shift_emitted + ? operands[0] : operands[1], + GEN_INT (16)))); first_shift_emitted = 1; } else if (shift_amount/8) @@ -1791,10 +1792,11 @@ enum machine_mode mode; quotient = shift_amount/8; shift_amount = shift_amount - (quotient * 8); for (i = 0; i < quotient; i++) - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (shift_op, mode, - first_shift_emitted ? operands[0] : operands[1], - gen_rtx (CONST_INT, VOIDmode, 8)))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (shift_op, mode, + first_shift_emitted + ? operands[0] : operands[1], + GEN_INT (8)))); first_shift_emitted = 1; } else if (shift_amount/4) @@ -1802,10 +1804,11 @@ enum machine_mode mode; quotient = shift_amount/4; shift_amount = shift_amount - (quotient * 4); for (i = 0; i < quotient; i++) - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (shift_op, mode, - first_shift_emitted ? operands[0] : operands[1], - gen_rtx (CONST_INT, VOIDmode, 4)))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (shift_op, mode, + first_shift_emitted + ? operands[0] : operands[1], + GEN_INT (4)))); first_shift_emitted = 1; } else if (shift_amount/1) @@ -1813,10 +1816,11 @@ enum machine_mode mode; quotient = shift_amount/1; shift_amount = shift_amount - (quotient * 1); for (i = 0; i < quotient; i++) - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (shift_op, mode, - first_shift_emitted ? operands[0] : operands[1], - gen_rtx (CONST_INT, VOIDmode, 1)))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (shift_op, mode, + first_shift_emitted + ? operands[0] : operands[1], + GEN_INT (1)))); first_shift_emitted = 1; } } @@ -2070,7 +2074,7 @@ dsp16xx_function_arg (args_so_far, mode, type, named) args_so_far++; if (named && args_so_far < 4 && !MUST_PASS_IN_STACK (mode,type)) - return gen_rtx (REG, mode, args_so_far + FIRST_REG_FOR_FUNCTION_ARG); + return gen_rtx_REG (mode, args_so_far + FIRST_REG_FOR_FUNCTION_ARG); else return (struct rtx_def *) 0; } @@ -2120,14 +2124,14 @@ gen_tst_reg (x) if (mode == QImode) { - emit_insn (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, - gen_rtx (SET, VOIDmode, cc0_rtx, x), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, QImode, 0))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, gen_rtx_SET (VOIDmode, cc0_rtx, x), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode))))); } else if (mode == HImode) - emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, x)); + emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, x)); else fatal ("Invalid mode for gen_tst_reg"); @@ -2150,54 +2154,64 @@ gen_compare_reg (code, x, y) if (mode == QImode) { - if (code == GTU || code == GEU || - code == LTU || code == LEU) + if (code == GTU || code == GEU + || code == LTU || code == LEU) { - emit_insn (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (3, - gen_rtx (SET, VOIDmode, cc0_rtx, - gen_rtx (COMPARE, mode, x, y)), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, QImode, 0)), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, QImode, 0))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (3, + gen_rtx_SET (VOIDmode, cc0_rtx, + gen_rtx_COMPARE (mode, x, y)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode))))); } else { - emit_insn (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (3, - gen_rtx (SET, VOIDmode, cc0_rtx, - gen_rtx (COMPARE, mode, x, y)), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, QImode, 0)), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, QImode, 0))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (3, gen_rtx_SET (VOIDmode, cc0_rtx, + gen_rtx_COMPARE (mode, x, y)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode))))); } } else if (mode == HImode) { - if (code == GTU || code == GEU || - code == LTU || code == LEU) + if (code == GTU || code == GEU + || code == LTU || code == LEU) { #if 1 - emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (5, - gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, x, y)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (5, + gen_rtx_SET (VOIDmode, cc0_rtx, + gen_rtx_COMPARE (VOIDmode, + x, y)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode))))); #else if (!dsp16xx_ucmphi2_libcall) - dsp16xx_ucmphi2_libcall = gen_rtx (SYMBOL_REF, Pmode, UCMPHI2_LIBCALL); + dsp16xx_ucmphi2_libcall = gen_rtx_SYMBOL_REF (Pmode, UCMPHI2_LIBCALL); emit_library_call (dsp16xx_ucmphi2_libcall, 1, HImode, 2, x, HImode, y, HImode); emit_insn (gen_tsthi_1 (copy_to_reg(hard_libcall_value (HImode)))); #endif } else - emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, - gen_rtx (COMPARE, VOIDmode, force_reg(HImode, x), - force_reg(HImode,y)))); + emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, + gen_rtx_COMPARE (VOIDmode, + force_reg (HImode, x), + force_reg (HImode,y)))); } else fatal ("Invalid mode for integer comparison in gen_compare_reg"); diff --git a/gcc/config/dsp16xx/dsp16xx.h b/gcc/config/dsp16xx/dsp16xx.h index 7ce0c133b86..1666ce5455c 100644 --- a/gcc/config/dsp16xx/dsp16xx.h +++ b/gcc/config/dsp16xx/dsp16xx.h @@ -1130,11 +1130,11 @@ extern struct dsp16xx_frame_info current_frame_info; #define VALUE_REGNO(MODE) (REG_Y) #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE))) + gen_rtx_REG (TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE))) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, VALUE_REGNO(MODE)) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, VALUE_REGNO(MODE)) /* 1 if N is a possible register number for a function value. */ #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y) diff --git a/gcc/config/dsp16xx/dsp16xx.md b/gcc/config/dsp16xx/dsp16xx.md index adf1cc7c557..c82285dcee1 100644 --- a/gcc/config/dsp16xx/dsp16xx.md +++ b/gcc/config/dsp16xx/dsp16xx.md @@ -195,15 +195,15 @@ { rtx xoperands[2]; - xoperands[0] = gen_rtx (REG, HImode, REG_A0); + xoperands[0] = gen_rtx_REG (HImode, REG_A0); xoperands[1] = operands[0]; double_reg_from_memory (xoperands); } if (GET_CODE(operands[1]) == REG) { - if (REGNO (operands[1]) == REG_Y || - REGNO (operands[1]) == REG_PROD) + if (REGNO (operands[1]) == REG_Y + || REGNO (operands[1]) == REG_PROD) { output_asm_insn (\"a1=%1\", operands); } @@ -218,7 +218,7 @@ { rtx xoperands[2]; - xoperands[0] = gen_rtx (REG, HImode, REG_A1); + xoperands[0] = gen_rtx_REG (HImode, REG_A1); xoperands[1] = operands[1]; double_reg_from_memory (xoperands); } @@ -302,7 +302,7 @@ " { if (!dsp16xx_cmphf3_libcall) - dsp16xx_cmphf3_libcall = gen_rtx (SYMBOL_REF, Pmode, CMPHF3_LIBCALL); + dsp16xx_cmphf3_libcall = gen_rtx_SYMBOL_REF (Pmode, CMPHF3_LIBCALL); dsp16xx_compare_gen = gen_compare_reg; dsp16xx_compare_op0 = operands[0]; @@ -426,7 +426,7 @@ " { if (!dsp16xx_addhf3_libcall) - dsp16xx_addhf3_libcall = gen_rtx (SYMBOL_REF, Pmode, ADDHF3_LIBCALL); + dsp16xx_addhf3_libcall = gen_rtx_SYMBOL_REF (Pmode, ADDHF3_LIBCALL); emit_library_call (dsp16xx_addhf3_libcall, 1, HFmode, 2, operands[1], HFmode, @@ -506,7 +506,7 @@ " { if (!dsp16xx_subhf3_libcall) - dsp16xx_subhf3_libcall = gen_rtx (SYMBOL_REF, Pmode, SUBHF3_LIBCALL); + dsp16xx_subhf3_libcall = gen_rtx_SYMBOL_REF (Pmode, SUBHF3_LIBCALL); emit_library_call (dsp16xx_subhf3_libcall, 1, HFmode, 2, operands[1], HFmode, @@ -529,7 +529,7 @@ " { if (!dsp16xx_neghf2_libcall) - dsp16xx_neghf2_libcall = gen_rtx (SYMBOL_REF, Pmode, NEGHF2_LIBCALL); + dsp16xx_neghf2_libcall = gen_rtx_SYMBOL_REF (Pmode, NEGHF2_LIBCALL); emit_library_call (dsp16xx_neghf2_libcall, 1, HFmode, 1, operands[1], HFmode); @@ -553,7 +553,7 @@ " { if (!dsp16xx_mulhi3_libcall) - dsp16xx_mulhi3_libcall = gen_rtx (SYMBOL_REF, Pmode, MULHI3_LIBCALL); + dsp16xx_mulhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, MULHI3_LIBCALL); emit_library_call (dsp16xx_mulhi3_libcall, 1, HImode, 2, operands[1], HImode, @@ -595,7 +595,7 @@ " { if (!dsp16xx_mulhf3_libcall) - dsp16xx_mulhf3_libcall = gen_rtx (SYMBOL_REF, Pmode, MULHF3_LIBCALL); + dsp16xx_mulhf3_libcall = gen_rtx_SYMBOL_REF (Pmode, MULHF3_LIBCALL); emit_library_call (dsp16xx_mulhf3_libcall, 1, HFmode, 2, operands[1], HFmode, @@ -620,7 +620,7 @@ " { if (!dsp16xx_divhi3_libcall) - dsp16xx_divhi3_libcall = gen_rtx (SYMBOL_REF, Pmode, DIVHI3_LIBCALL); + dsp16xx_divhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, DIVHI3_LIBCALL); emit_library_call (dsp16xx_divhi3_libcall, 1, HImode, 2, operands[1], HImode, @@ -637,7 +637,7 @@ " { if (!dsp16xx_udivhi3_libcall) - dsp16xx_udivhi3_libcall = gen_rtx (SYMBOL_REF, Pmode, UDIVHI3_LIBCALL); + dsp16xx_udivhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UDIVHI3_LIBCALL); emit_library_call (dsp16xx_udivhi3_libcall, 1, HImode, 2, operands[1], HImode, @@ -654,7 +654,7 @@ " { if (!dsp16xx_divqi3_libcall) - dsp16xx_divqi3_libcall = gen_rtx (SYMBOL_REF, Pmode, DIVQI3_LIBCALL); + dsp16xx_divqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, DIVQI3_LIBCALL); emit_library_call (dsp16xx_divqi3_libcall, 1, QImode, 2, operands[1], QImode, @@ -671,7 +671,7 @@ " { if (!dsp16xx_udivqi3_libcall) - dsp16xx_udivqi3_libcall = gen_rtx (SYMBOL_REF, Pmode, UDIVQI3_LIBCALL); + dsp16xx_udivqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UDIVQI3_LIBCALL); emit_library_call (dsp16xx_udivqi3_libcall, 1, QImode, 2, operands[1], QImode, @@ -695,7 +695,7 @@ " { if (!dsp16xx_modhi3_libcall) - dsp16xx_modhi3_libcall = gen_rtx (SYMBOL_REF, Pmode, MODHI3_LIBCALL); + dsp16xx_modhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, MODHI3_LIBCALL); emit_library_call (dsp16xx_modhi3_libcall, 1, HImode, 2, operands[1], HImode, @@ -712,7 +712,7 @@ " { if (!dsp16xx_umodhi3_libcall) - dsp16xx_umodhi3_libcall = gen_rtx (SYMBOL_REF, Pmode, UMODHI3_LIBCALL); + dsp16xx_umodhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UMODHI3_LIBCALL); emit_library_call (dsp16xx_umodhi3_libcall, 1, HImode, 2, operands[1], HImode, @@ -729,7 +729,7 @@ " { if (!dsp16xx_modqi3_libcall) - dsp16xx_modqi3_libcall = gen_rtx (SYMBOL_REF, Pmode, MODQI3_LIBCALL); + dsp16xx_modqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, MODQI3_LIBCALL); emit_library_call (dsp16xx_modqi3_libcall, 1, QImode, 2, operands[1], QImode, @@ -746,7 +746,7 @@ " { if (!dsp16xx_umodqi3_libcall) - dsp16xx_umodqi3_libcall = gen_rtx (SYMBOL_REF, Pmode, UMODQI3_LIBCALL); + dsp16xx_umodqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UMODQI3_LIBCALL); emit_library_call (dsp16xx_umodqi3_libcall, 1, QImode, 2, operands[1], QImode, @@ -763,7 +763,7 @@ " { if (!dsp16xx_divhf3_libcall) - dsp16xx_divhf3_libcall = gen_rtx (SYMBOL_REF, Pmode, DIVHF3_LIBCALL); + dsp16xx_divhf3_libcall = gen_rtx_SYMBOL_REF (Pmode, DIVHF3_LIBCALL); emit_library_call (dsp16xx_divhf3_libcall, 1, HFmode, 2, operands[1], HFmode, @@ -1059,11 +1059,13 @@ emit_move_insn (operands[0], addr_reg); /* Then generate the add insn */ - emit_insn (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (PLUS, QImode, operands[0], offset)), - gen_rtx (CLOBBER, VOIDmode, operands[2])))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_PLUS (QImode, operands[0], + offset)), + gen_rtx_CLOBBER (VOIDmode, operands[2])))); DONE; }") @@ -1261,7 +1263,7 @@ " { operands[2] = gen_reg_rtx (HImode); - operands[3] = gen_rtx (SUBREG, QImode, operands[2], 1); + operands[3] = gen_rtx_SUBREG (QImode, operands[2], 1); }") ;;(define_insn "extendqihi2" @@ -1311,7 +1313,7 @@ " { operands[2] = gen_reg_rtx (HImode); - operands[3] = gen_rtx (SUBREG, QImode, operands[2], 1); + operands[3] = gen_rtx_SUBREG (QImode, operands[2], 1); }") @@ -1322,7 +1324,7 @@ " { if (!dsp16xx_floathihf2_libcall) - dsp16xx_floathihf2_libcall = gen_rtx (SYMBOL_REF, Pmode, FLOATHIHF2_LIBCALL); + dsp16xx_floathihf2_libcall = gen_rtx_SYMBOL_REF (Pmode, FLOATHIHF2_LIBCALL); emit_library_call (dsp16xx_floathihf2_libcall, 1, HFmode, 1, operands[1], HImode); @@ -1337,7 +1339,7 @@ " { if (!dsp16xx_fixhfhi2_libcall) - dsp16xx_fixhfhi2_libcall = gen_rtx (SYMBOL_REF, Pmode, FIXHFHI2_LIBCALL); + dsp16xx_fixhfhi2_libcall = gen_rtx_SYMBOL_REF (Pmode, FIXHFHI2_LIBCALL); emit_library_call (dsp16xx_fixhfhi2_libcall, 1, HImode, 1, operands[1], HFmode); @@ -1367,8 +1369,8 @@ emit_jump_insn (gen_bge (label1)); emit_insn (gen_fix_trunchfhi2 (operands[0], operands[1])); - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (LABEL_REF, VOIDmode, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, label2))); emit_barrier (); emit_label (label1); @@ -1382,7 +1384,7 @@ /* allow REG_NOTES to be set on last insn (labels don't have enough fields, and can't be used for REG_NOTES anyway). */ - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); DONE; } }") @@ -1448,7 +1450,8 @@ #if 0 if (!dsp16xx_ashrhi3_libcall) - dsp16xx_ashrhi3_libcall = gen_rtx (SYMBOL_REF, Pmode, ASHRHI3_LIBCALL); + dsp16xx_ashrhi3_libcall + = gen_rtx_SYMBOL_REF (Pmode, ASHRHI3_LIBCALL); emit_library_call (dsp16xx_ashrhi3_libcall, 1, HImode, 2, operands[1], HImode, @@ -1572,7 +1575,8 @@ rtx label2 = gen_label_rtx (); #if 0 if (!dsp16xx_lshrhi3_libcall) - dsp16xx_lshrhi3_libcall = gen_rtx (SYMBOL_REF, Pmode, LSHRHI3_LIBCALL); + dsp16xx_lshrhi3_libcall + = gen_rtx_SYMBOL_REF (Pmode, LSHRHI3_LIBCALL); emit_library_call (dsp16xx_lshrhi3_libcall, 1, HImode, 2, operands[1], HImode, @@ -1714,11 +1718,11 @@ rtx label2 = gen_label_rtx (); #if 0 if (!dsp16xx_ashlhi3_libcall) - dsp16xx_ashlhi3_libcall = gen_rtx (SYMBOL_REF, Pmode, ASHLHI3_LIBCALL); + dsp16xx_ashlhi3_libcall + = gen_rtx_SYMBOL_REF (Pmode, ASHLHI3_LIBCALL); emit_library_call (dsp16xx_ashlhi3_libcall, 1, HImode, 2, - operands[1], HImode, - operands[2], QImode); + operands[1], HImode, operands[2], QImode); emit_move_insn (operands[0], hard_libcall_value(HImode)); DONE; #else @@ -2038,8 +2042,8 @@ { if (GET_CODE (operands[0]) == MEM && ! call_address_operand (XEXP (operands[0], 0), QImode)) - operands[0] = gen_rtx (MEM, GET_MODE (operands[0]), - force_reg (Pmode, XEXP (operands[0], 0))); + operands[0] = gen_rtx_MEM (GET_MODE (operands[0]), + force_reg (Pmode, XEXP (operands[0], 0))); }") (define_insn "" @@ -2069,8 +2073,8 @@ { if (GET_CODE (operands[1]) == MEM && ! call_address_operand (XEXP (operands[1], 0), QImode)) - operands[1] = gen_rtx (MEM, GET_MODE (operands[1]), - force_reg (Pmode, XEXP (operands[1], 0))); + operands[1] = gen_rtx_MEM (GET_MODE (operands[1]), + force_reg (Pmode, XEXP (operands[1], 0))); }") (define_insn "" diff --git a/gcc/config/elxsi/elxsi.c b/gcc/config/elxsi/elxsi.c index b8818531b84..6485cbbe14c 100644 --- a/gcc/config/elxsi/elxsi.c +++ b/gcc/config/elxsi/elxsi.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for GNU compiler. Elxsi version. - Copyright (C) 1987, 1992, 1997 Free Software Foundation, Inc - This port, done by Mike Stump <mrs@cygnus.com> in 1988, and is the first + Copyright (C) 1987, 1992, 1998 Free Software Foundation, Inc + Contributrd by Mike Stump <mrs@cygnus.com> in 1988 and is the first 64 bit port of GNU CC. Based upon the VAX port. @@ -22,7 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" extern char *reg_names[]; diff --git a/gcc/config/elxsi/elxsi.h b/gcc/config/elxsi/elxsi.h index d0d4c73807d..4b21451f146 100644 --- a/gcc/config/elxsi/elxsi.h +++ b/gcc/config/elxsi/elxsi.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. Elxsi version. - Copyright (C) 1987, 1988, 1992, 1995, 1996 Free Software Foundation, Inc. - This port, contributed by Mike Stump <mrs@cygnus.com> in 1988, is the first + Copyright (C) 1987, 88, 92, 95, 96, 1998 Free Software Foundation, Inc. + Contributed by Mike Stump <mrs@cygnus.com> in 1988. This is the first 64 bit port of GNU CC. Based upon the VAX port. @@ -319,14 +319,14 @@ enum reg_class { NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES }; /* On the Vax the return value is in R0 regardless. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* On the Vax the return value is in R0 regardless. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* Define this if PCC uses the nonreentrant convention for returning structure and union values. */ @@ -482,11 +482,11 @@ enum reg_class { NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES }; else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \ { rtx other_reg = XEXP (ADDR, 1); \ offset = 0; \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \ { rtx other_reg = XEXP (ADDR, 0); \ offset = 0; \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ if (offset >= 0) \ { int regno; \ extern char call_used_regs[]; \ diff --git a/gcc/config/fx80/fx80.c b/gcc/config/fx80/fx80.c index 4e8f42086d3..075d38fab5e 100644 --- a/gcc/config/fx80/fx80.c +++ b/gcc/config/fx80/fx80.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Alliant FX computers. - Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 1991, 1997, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -21,7 +21,7 @@ Boston, MA 02111-1307, USA. */ /* Some output-actions in alliant.md need these. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -152,14 +152,14 @@ output_move_double (operands) { operands[0] = XEXP (XEXP (operands[0], 0), 0); output_asm_insn ("subq%.l %#8,%0", operands); - operands[0] = gen_rtx (MEM, DImode, operands[0]); + operands[0] = gen_rtx_MEM (DImode, operands[0]); optype0 = OFFSOP; } if (optype0 == POPOP && optype1 == PUSHOP) { operands[1] = XEXP (XEXP (operands[1], 0), 0); output_asm_insn ("subq%.l %#8,%1", operands); - operands[1] = gen_rtx (MEM, DImode, operands[1]); + operands[1] = gen_rtx_MEM (DImode, operands[1]); optype1 = OFFSOP; } @@ -182,14 +182,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) diff --git a/gcc/config/fx80/fx80.h b/gcc/config/fx80/fx80.h index b56834a372c..aa9abf5bf1a 100644 --- a/gcc/config/fx80/fx80.h +++ b/gcc/config/fx80/fx80.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Alliant FX version. - Copyright (C) 1989, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1989, 93, 94, 95, 96, 1998 Free Software Foundation, Inc. Adapted from m68k.h by Paul Petersen (petersen@uicsrd.csrd.uiuc.edu) and Joe Weening (weening@gang-of-four.stanford.edu). @@ -453,8 +453,8 @@ extern enum reg_class regno_reg_class[]; #define FUNCTION_VALUE(VALTYPE, FUNC) \ (TREE_CODE (VALTYPE) == REAL_TYPE \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0)) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ @@ -467,8 +467,8 @@ extern enum reg_class regno_reg_class[]; #define LIBCALL_VALUE(MODE) \ (((MODE) == DFmode || (MODE) == SFmode) \ - ? gen_rtx (REG, MODE, 16) \ - : gen_rtx (REG, MODE, 0)) + ? gen_rtx_REG (MODE, 16) \ + : gen_rtx_REG (MODE, 0)) /* 1 if N is a possible register number for a function value. On the Alliant, D0 and FP0 are the only registers thus used. diff --git a/gcc/config/fx80/fx80.md b/gcc/config/fx80/fx80.md index 6862767d764..fff50cd1eb4 100644 --- a/gcc/config/fx80/fx80.md +++ b/gcc/config/fx80/fx80.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU C compiler for Alliant FX systems -;; Copyright (C) 1989, 1994, 1996 Free Software Foundation, Inc. +;; Copyright (C) 1989, 1994, 1996, 1998 Free Software Foundation, Inc. ;; Adapted from m68k.md by Paul Petersen (petersen@uicsrd.csrd.uiuc.edu) ;; and Joe Weening (weening@gang-of-four.stanford.edu). @@ -244,7 +244,7 @@ && (unsigned) INTVAL (operands[1]) < 8" "* { - operands[1] = gen_rtx (CONST_INT, VOIDmode, 7 - INTVAL (operands[1])); + operands[1] = GEN_INT (7 - INTVAL (operands[1])); return output_btst (operands, operands[1], operands[0], insn, 7); }") @@ -260,12 +260,10 @@ { operands[0] = adj_offsettable_operand (operands[0], INTVAL (operands[1]) / 8); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - 7 - INTVAL (operands[1]) % 8); + operands[1] = GEN_INT (7 - INTVAL (operands[1]) % 8); return output_btst (operands, operands[1], operands[0], insn, 7); } - operands[1] = gen_rtx (CONST_INT, VOIDmode, - 31 - INTVAL (operands[1])); + operands[1] = GEN_INT (31 - INTVAL (operands[1])); return output_btst (operands, operands[1], operands[0], insn, 31); }") @@ -417,8 +415,7 @@ { xoperands[1] = operands[1]; xoperands[2] - = gen_rtx (MEM, QImode, - gen_rtx (PLUS, VOIDmode, stack_pointer_rtx, const1_rtx)); + = gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 1)); xoperands[3] = stack_pointer_rtx; /* Just pushing a byte puts it in the high byte of the halfword. */ /* We must put it in the low half, the second byte. */ @@ -430,8 +427,7 @@ xoperands[0] = operands[0]; xoperands[1] = operands[1]; xoperands[2] - = gen_rtx (MEM, QImode, - gen_rtx (PLUS, VOIDmode, stack_pointer_rtx, const1_rtx)); + = gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 1)); xoperands[3] = stack_pointer_rtx; output_asm_insn (\"mov%.w %1,%-\;mov%.b %2,%0\;addq%.w %#2,%3\", xoperands); return \"\"; @@ -539,7 +535,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"mov%.l %1,%-\", xoperands); output_asm_insn (\"mov%.l %1,%-\", operands); return \"fmove%.d %+,%0\"; @@ -551,7 +547,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmove%.d %1,%-\;mov%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"mov%.l %+,%0\"; } return \"fmove%.d %1,%0\"; @@ -572,7 +568,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"mov%.l %1,%-\", xoperands); output_asm_insn (\"mov%.l %1,%-\", operands); return \"fmove%.d %+,%0\"; @@ -584,7 +580,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmove%.d %1,%-\;mov%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"mov%.l %+,%0\"; } return \"fmove%.d %1,%0\"; @@ -951,8 +947,7 @@ if (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) >= -8) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - - INTVAL (operands[2])); + operands[2] = GEN_INT (- INTVAL (operands[2])); return (ADDRESS_REG_P (operands[0]) ? \"subq%.w %2,%0\" : \"subq%.l %2,%0\"); @@ -1343,8 +1338,7 @@ { if (GET_CODE (operands[0]) != REG) operands[0] = adj_offsettable_operand (operands[0], 2); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* Do not delete a following tstl %0 insn; that would be incorrect. */ CC_STATUS_INIT; if (operands[2] == const0_rtx) @@ -1396,11 +1390,12 @@ || offsettable_memref_p (operands[0]))) { if (DATA_REG_P (operands[0])) - operands[1] = gen_rtx (CONST_INT, VOIDmode, logval); + operands[1] = GEN_INT (logval); else { - operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8)); - operands[1] = gen_rtx (CONST_INT, VOIDmode, logval % 8); + operands[0] + = adj_offsettable_operand (operands[0], 3 - (logval / 8)); + operands[1] = GEN_INT (logval % 8); } return \"bset %1,%0\"; } @@ -1900,11 +1895,8 @@ && GET_CODE (operands[2]) == CONST_INT) { int width = GET_CODE (operands[0]) == REG ? 31 : 7; - return output_btst (operands, - gen_rtx (CONST_INT, VOIDmode, - width - INTVAL (operands[2])), - operands[0], - insn, 1000); + return output_btst (operands, GEN_INT (width - INTVAL (operands[2])), + operands[0], insn, 1000); /* Pass 1000 as SIGNPOS argument so that btst will not think we are testing the sign bit for an `and' and assume that nonzero implies a negative result. */ @@ -1927,11 +1919,8 @@ && GET_CODE (operands[2]) == CONST_INT) { int width = GET_CODE (operands[0]) == REG ? 31 : 7; - return output_btst (operands, - gen_rtx (CONST_INT, VOIDmode, - width - INTVAL (operands[2])), - operands[0], - insn, 1000); + return output_btst (operands, GEN_INT (width - INTVAL (operands[2])), + operands[0], insn, 1000); /* Pass 1000 as SIGNPOS argument so that btst will not think we are testing the sign bit for an `and' and assume that nonzero implies a negative result. */ @@ -2298,10 +2287,9 @@ table_elt_addr = memory_address_noforce (HImode, - gen_rtx (PLUS, Pmode, - gen_rtx (MULT, Pmode, index_diff, - gen_rtx (CONST_INT, VOIDmode, 2)), - gen_rtx (LABEL_REF, VOIDmode, operands[3]))); + gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, index_diff, GEN_INT (2)), + gen_rtx_LABEL_REF (Pmode, operands[3]))); /* Emit the last few insns. */ emit_insn (gen_casesi_2 (gen_reg_rtx (HImode), table_elt_addr, operands[3])); DONE; @@ -2404,11 +2392,11 @@ output_asm_insn (\"sub%.l a0,a0\;jbsr %0\", operands); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, size/4); + xoperands[1] = GEN_INT (size/4); output_asm_insn (\"mov%.l sp,a0\;pea %a1\", xoperands); output_asm_insn (\"jbsr %0\", operands); size = size + 4; - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, size); + xoperands[1] = GEN_INT (size); if (size <= 8) output_asm_insn (\"addq%.l %1,sp\", xoperands); else if (size < 0x8000) @@ -2435,11 +2423,11 @@ output_asm_insn(\"sub%.l a0,a0\;jbsr %1\", operands); else { - xoperands[2] = gen_rtx (CONST_INT, VOIDmode, size/4); + xoperands[2] = GEN_INT (size/4); output_asm_insn (\"mov%.l sp,a0\;pea %a2\", xoperands); output_asm_insn (\"jbsr %1\", operands); size = size + 4; - xoperands[2] = gen_rtx (CONST_INT, VOIDmode, size); + xoperands[2] = GEN_INT (size); if (size <= 8) output_asm_insn (\"addq%.l %2,sp\", xoperands); else if (size < 0x8000) @@ -2514,7 +2502,7 @@ ; "* ;{ ; rtx xoperands[2]; -; xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); +; xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); ; output_asm_insn (\"mov%.l %1,%@\", xoperands); ; output_asm_insn (\"mov%.l %1,%-\", operands); ; return \"fmove%.d %+,%0\"; diff --git a/gcc/config/gmicro/gmicro.c b/gcc/config/gmicro/gmicro.c index 2911c9772c8..9dfbb9d25f7 100644 --- a/gcc/config/gmicro/gmicro.c +++ b/gcc/config/gmicro/gmicro.c @@ -1,9 +1,8 @@ /* Subroutines for insn-output.c for the Gmicro. - Ported by Masanobu Yuhara, Fujitsu Laboratories LTD. + Copyright (C) 1990, 1991, 1997, 1998 Free Software Foundation, Inc. + Contributed by Masanobu Yuhara, Fujitsu Laboratories LTD. (yuhara@flab.fujitsu.co.jp) - Copyright (C) 1990, 1991, 1997 Free Software Foundation, Inc. - This file is part of GNU CC. GNU CC is free software; you can redistribute it and/or modify @@ -24,9 +23,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -499,14 +497,14 @@ output_move_double (operands) { operands[0] = XEXP (XEXP (operands[0], 0), 0); output_asm_insn ("sub.w %#8,%0", operands); - operands[0] = gen_rtx (MEM, DImode, operands[0]); + operands[0] = gen_rtx_MEM (DImode, operands[0]); optype0 = OFFSOP; } if (optype0 == POPOP && optype1 == PUSHOP) { operands[1] = XEXP (XEXP (operands[1], 0), 0); output_asm_insn ("sub.w %#8,%1", operands); - operands[1] = gen_rtx (MEM, DImode, operands[1]); + operands[1] = gen_rtx_MEM (DImode, operands[1]); optype1 = OFFSOP; } @@ -529,14 +527,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -634,18 +632,14 @@ output_move_const_double (operands) else if (GREG_P (operands[0])) { rtx xoperands[2]; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[1])); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + xoperands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); output_asm_insn ("mov.w %1,%0", xoperands); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); return "mov.w %1,%0"; } else - { - return output_move_double (operands); /* ?????? */ - } + return output_move_double (operands); /* ?????? */ } char * @@ -760,7 +754,7 @@ add_imm_word (imm, dest, immp) if (imm < 0) { - *immp = gen_rtx (CONST_INT, VOIDmode, -imm); + *immp = GEN_INT (-imm); return sub_imm_word (-imm, dest); } @@ -795,7 +789,7 @@ sub_imm_word (imm, dest, immp) if (imm < 0 && imm != 0x80000000) { - *immp = gen_rtx (CONST_INT, VOIDmode, -imm); + *immp = GEN_INT (-imm); return add_imm_word (-imm, dest); } diff --git a/gcc/config/gmicro/gmicro.h b/gcc/config/gmicro/gmicro.h index 29701f25fd7..77771120e2c 100644 --- a/gcc/config/gmicro/gmicro.h +++ b/gcc/config/gmicro/gmicro.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Gmicro (TRON) version. - Copyright (C) 1987, 88, 89, 95, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 89, 95, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Masanobu Yuhara, Fujitsu Laboratories LTD. (yuhara@flab.fujitsu.co.jp) @@ -478,9 +478,10 @@ extern enum reg_class regno_reg_class[]; /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) \ - (gen_rtx (REG, (MODE), \ - ((TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0))) +#define LIBCALL_VALUE(MODE) \ + (gen_rtx_REG ((MODE), \ + ((TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode)) \ + ? 16 : 0))) /* 1 if N is a possible register number for a function value. @@ -547,7 +548,7 @@ extern enum reg_class regno_reg_class[]; It exists only to test register calling conventions. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ -((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) +((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0) /* For an arg passed partly in registers and partly in memory, this is the number of registers used. @@ -831,25 +832,25 @@ extern enum reg_class regno_reg_class[]; else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \ { rtx other_reg = XEXP (ADDR, 1); \ offset = 0; \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \ { rtx other_reg = XEXP (ADDR, 0); \ offset = 0; \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ else if (GET_CODE (ADDR) == PLUS \ && GET_CODE (XEXP (ADDR, 0)) == PLUS \ && XEXP (XEXP (ADDR, 0), 0) == frame_pointer_rtx \ && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \ { rtx other_reg = XEXP (XEXP (ADDR, 0), 1); \ offset = INTVAL (XEXP (ADDR, 1)); \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ else if (GET_CODE (ADDR) == PLUS \ && GET_CODE (XEXP (ADDR, 0)) == PLUS \ && XEXP (XEXP (ADDR, 0), 1) == frame_pointer_rtx \ && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \ { rtx other_reg = XEXP (XEXP (ADDR, 0), 0); \ offset = INTVAL (XEXP (ADDR, 1)); \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ if (offset >= 0) \ { int regno; \ extern char call_used_regs[]; \ diff --git a/gcc/config/gmicro/gmicro.md b/gcc/config/gmicro/gmicro.md index 0fc44875b6d..bbe1fbd3129 100644 --- a/gcc/config/gmicro/gmicro.md +++ b/gcc/config/gmicro/gmicro.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, Fujitsu Gmicro Version -;; Copyright (C) 1990, 1994, 1996 Free Software Foundation, Inc. +;; Copyright (C) 1990, 1994, 1996, 1998 Free Software Foundation, Inc. ;; Contributed by M.Yuhara, Fujitsu Laboratories LTD. ;; This file is part of GNU CC. @@ -271,7 +271,7 @@ "* { register int log = exact_log2 (INTVAL (operands[1])); - operands[1] = gen_rtx (CONST_INT, VOIDmode, log); + operands[1] = GEN_INT (log); return \"btst %1,%0.b\"; }") @@ -581,7 +581,7 @@ if (FPU_REG_P (operands[0])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"mov.w %1,%-\", xoperands); output_asm_insn (\"mov.w %1,%-\", operands); return \"fmov.d %+,%0\"; @@ -590,7 +590,7 @@ { output_asm_insn (\"fmov.d %f1,%-\", operands); output_asm_insn (\"mov.w %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"mov.w %+,%0\"; } } @@ -616,7 +616,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"mov.w %1,%-\", xoperands); output_asm_insn (\"mov.w %1,%-\", operands); return \"fmov.d %+,%0\"; @@ -630,7 +630,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmov.d %f1,%-\;mov.w %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"mov.w %+,%0\"; } else @@ -746,8 +746,7 @@ return \"mov.w @(12,r0),@(12,r1)\"; } - operands[2] = - gen_rtx (CONST_INT, VOIDmode, op2const); + operands[2] = GEN_INT (op2const); output_asm_insn (\"mov.w %2,r2\", operands); return \"smov/n/f.w\"; } @@ -833,7 +832,7 @@ } else { - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, wlen); + xoperands[0] = GEN_INT (wlen); output_asm_insn (\"mov.w %0,r2\", xoperands); output_asm_insn (\"smov/n/f.w\", operands); } @@ -1517,8 +1516,7 @@ { if (GET_CODE (operands[0]) != REG) operands[0] = adj_offsettable_operand (operands[0], 2); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* Do not delete a following tstl %0 insn; that would be incorrect. */ CC_STATUS_INIT; return \"and.h %2,%0\"; @@ -1595,16 +1593,17 @@ { if (logval < 7) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, 7 - logval); + operands[1] = GEN_INT (7 - logval); return \"bset.b %1,%0\"; } - operands[1] = gen_rtx (CONST_INT, VOIDmode, 31 - logval); + operands[1] = GEN_INT (31 - logval); return \"bset.w %1,%0\"; } else { - operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8)); - operands[1] = gen_rtx (CONST_INT, VOIDmode, 7 - (logval % 8)); + operands[0] + = adj_offsettable_operand (operands[0], 3 - (logval / 8)); + operands[1] = GEN_INT (7 - (logval % 8)); } return \"bset.b %1,%0\"; } @@ -1866,7 +1865,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1891,7 +1890,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, HImode, negate_rtx (HImode, operands[2])); + operands[2] = gen_rtx_NEG (HImode, negate_rtx (HImode, operands[2])); }") (define_insn "" @@ -1916,7 +1915,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -2255,7 +2254,7 @@ output_asm_insn (\"mov.w %1,%0\", operands); if (INTVAL (operands[3]) != 0) output_asm_insn (\"shl.w %3,%0\", operands); - operands[2] = gen_rtx (CONST_INT, VOIDmode, -(32 - INTVAL (operands[2]))); + operands[2] = GEN_INT (-(32 - INTVAL (operands[2]))); return \"sha.w %3,%0\"; }") @@ -2272,7 +2271,7 @@ output_asm_insn (\"mov.w %1,%0\", operands); if (INTVAL (operands[3]) != 0) output_asm_insn (\"shl.w %3,%0\", operands); - operands[2] = gen_rtx (CONST_INT, VOIDmode, -(32 - INTVAL (operands[2]))); + operands[2] = GEN_INT (- (32 - INTVAL (operands[2]))); return \"shl.w %3,%0\"; }") @@ -2732,7 +2731,7 @@ "* { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"mov.w %1,@sp\", xoperands); output_asm_insn (\"mov.w %1,%-\", operands); return \"fmov.d %+,%0\"; diff --git a/gcc/config/gofast.h b/gcc/config/gofast.h index 84bea516758..a33cba907d8 100644 --- a/gcc/config/gofast.h +++ b/gcc/config/gofast.h @@ -1,5 +1,5 @@ /* US Software GOFAST floating point library support. - Copyright (C) 1994 Free Software Foundation, Inc. + Copyright (C) 1994, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -44,33 +44,33 @@ Boston, MA 02111-1307, USA. */ } while (0) #define GOFAST_RENAME_LIBCALLS \ - add_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpadd"); \ - add_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpadd"); \ - sub_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpsub"); \ - sub_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpsub"); \ - smul_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpmul"); \ - smul_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpmul"); \ - flodiv_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpdiv"); \ - flodiv_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpdiv"); \ - cmp_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - cmp_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ + add_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpadd"); \ + add_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpadd"); \ + sub_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpsub"); \ + sub_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpsub"); \ + smul_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpmul"); \ + smul_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpmul"); \ + flodiv_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpdiv"); \ + flodiv_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpdiv"); \ + cmp_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + cmp_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ \ - extendsfdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fptodp"); \ - truncdfsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dptofp"); \ + extendsfdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fptodp"); \ + truncdfsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dptofp"); \ \ - eqsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - nesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - gtsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - gesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - ltsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - lesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ + eqsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + nesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + gtsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + gesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + ltsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + lesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ \ - eqdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ - nedf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ - gtdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ - gedf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ - ltdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ - ledf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ + eqdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ + nedf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ + gtdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ + gedf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ + ltdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ + ledf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ \ eqxf2_libfunc = NULL_RTX; \ nexf2_libfunc = NULL_RTX; \ diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c index c0941821947..67e2e2c5a6d 100644 --- a/gcc/config/h8300/h8300.c +++ b/gcc/config/h8300/h8300.c @@ -21,7 +21,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -39,7 +39,6 @@ Boston, MA 02111-1307, USA. */ /* Forward declarations. */ void print_operand_address (); -char *index (); static int h8300_interrupt_function_p PROTO ((tree)); static int h8300_monitor_function_p PROTO ((tree)); @@ -956,16 +955,16 @@ function_arg (cum, mode, type, named) switch (cum->nbytes / UNITS_PER_WORD) { case 0: - result = gen_rtx (REG, mode, 0); + result = gen_rtx_REG (mode, 0); break; case 1: - result = gen_rtx (REG, mode, 1); + result = gen_rtx_REG (mode, 1); break; case 2: - result = gen_rtx (REG, mode, 2); + result = gen_rtx_REG (mode, 2); break; case 3: - result = gen_rtx (REG, mode, 3); + result = gen_rtx_REG (mode, 3); break; default: result = 0; @@ -1843,12 +1842,14 @@ expand_a_shift (mode, code, operands) /* need a loop to get all the bits we want - we generate the code at emit time, but need to allocate a scratch reg now */ - emit_insn (gen_rtx - (PARALLEL, VOIDmode, + emit_insn (gen_rtx_PARALLEL + (VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (code, mode, operands[0], operands[2])), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0))))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (code, mode, operands[0], + operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode))))); return 1; } @@ -2338,7 +2339,7 @@ get_shift_alg (cpu, shift_type, mode, count, assembler_p, switch (shift_type) { case SHIFT_ASHIFT: - *assembler_p = "mov.b\t%y0,%z0n\tmov.b\t%x0,%y0\n\tmov.b\t%w0,%x0\n\tsub.b\t%w0,%w0"; + *assembler_p = "mov.b\t%y0,%z0\n\tmov.b\t%x0,%y0\n\tmov.b\t%w0,%x0\n\tsub.b\t%w0,%w0"; *cc_valid_p = 0; return SHIFT_SPECIAL; case SHIFT_LSHIFTRT: @@ -2776,9 +2777,9 @@ fix_bit_operand (operands, what, type) /* Ok to have a memory dest. */ if (GET_CODE (operands[0]) == MEM && !EXTRA_CONSTRAINT (operands[0], 'U')) { - rtx mem; - mem = gen_rtx (MEM, GET_MODE (operands[0]), - copy_to_mode_reg (Pmode, XEXP (operands[0], 0))); + rtx mem = gen_rtx_MEM (GET_MODE (operands[0]), + copy_to_mode_reg (Pmode, + XEXP (operands[0], 0))); RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (operands[0]); MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (operands[0]); MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (operands[0]); @@ -2787,9 +2788,9 @@ fix_bit_operand (operands, what, type) if (GET_CODE (operands[1]) == MEM && !EXTRA_CONSTRAINT (operands[1], 'U')) { - rtx mem; - mem = gen_rtx (MEM, GET_MODE (operands[1]), - copy_to_mode_reg (Pmode, XEXP (operands[1], 0))); + rtx mem = gen_rtx_MEM (GET_MODE (operands[1]), + copy_to_mode_reg (Pmode, + XEXP (operands[1], 0))); RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (operands[1]); MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (operands[1]); MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (operands[1]); @@ -2804,8 +2805,9 @@ fix_bit_operand (operands, what, type) operands[1] = force_reg (QImode, operands[1]); { rtx res = gen_reg_rtx (QImode); - emit_insn (gen_rtx (SET, VOIDmode, res, gen_rtx (type, QImode, operands[1], operands[2]))); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], res)); + emit_insn (gen_rtx_SET (VOIDmode, res, + gen_rtx (type, QImode, operands[1], operands[2]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], res)); } return 1; } diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h index 9002098777c..96308566464 100644 --- a/gcc/config/h8300/h8300.h +++ b/gcc/config/h8300/h8300.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. Hitachi H8/300 version generating coff - Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1992, 93, 94, 95, 96, 1998 Free Software Foundation, Inc. Contributed by Steve Chamberlain (sac@cygnus.com), Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com). @@ -526,7 +526,7 @@ enum reg_class { On the H8 the return value is in R0/R1. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ @@ -534,7 +534,7 @@ enum reg_class { /* On the h8 the return value is in R0/R1 */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, 0) + gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value. On the H8, R0 is the only register thus used. */ @@ -713,10 +713,11 @@ struct rtx_def *function_arg(); #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ enum machine_mode mode = TARGET_H8300H || TARGET_H8300S? SImode : HImode; \ - emit_move_insn (gen_rtx (MEM, mode, plus_constant ((TRAMP), 2)), CXT); \ - emit_move_insn (gen_rtx (MEM, mode, plus_constant ((TRAMP), 6)), FNADDR); \ - if (TARGET_H8300H || TARGET_H8300S) \ - emit_move_insn (gen_rtx (MEM, QImode, plus_constant ((TRAMP), 6)), GEN_INT (0x5A)); \ + emit_move_insn (gen_rtx_MEM (mode, plus_constant ((TRAMP), 2)), CXT); \ + emit_move_insn (gen_rtx_MEM (mode, plus_constant ((TRAMP), 6)), FNADDR); \ + if (TARGET_H8300H || TARGET_H8300S) \ + emit_move_insn (gen_rtx_MEM (QImode, plus_constant ((TRAMP), 6)), \ + GEN_INT (0x5A)); \ } /* Addressing modes, and classification of registers for them. */ @@ -1378,15 +1379,15 @@ do { char dstr[30]; \ #define INIT_TARGET_OPTABS \ do { \ smul_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, MULHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, MULHI3_LIBCALL); \ sdiv_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, DIVHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, DIVHI3_LIBCALL); \ udiv_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, UDIVHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, UDIVHI3_LIBCALL); \ smod_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, MODHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, MODHI3_LIBCALL); \ umod_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, UMODHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, UMODHI3_LIBCALL); \ } while (0) #define MOVE_RATIO 3 diff --git a/gcc/config/i370/i370.c b/gcc/config/i370/i370.c index 55189825540..b40c159d75d 100644 --- a/gcc/config/i370/i370.c +++ b/gcc/config/i370/i370.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for System/370. - Copyright (C) 1989, 1993, 1995, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 1993, 1995, 1997, 1998 Free Software Foundation, Inc. Contributed by Jan Stein (jan@cd.chalmers.se). Modified for MVS C/370 by Dave Pitts (dpitts@nyx.cs.du.edu) @@ -21,9 +21,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> -#include <string.h> -#include <ctype.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -35,12 +33,6 @@ Boston, MA 02111-1307, USA. */ #include "insn-attr.h" #include "flags.h" #include "recog.h" -#ifdef sun -#include <sys/types.h> -#include <ctype.h> -#endif -#include <time.h> - /* Label node, this structure is used to keep track of labels on the current page. */ diff --git a/gcc/config/i370/i370.h b/gcc/config/i370/i370.h index e3d540f08ac..4f8b905c333 100644 --- a/gcc/config/i370/i370.h +++ b/gcc/config/i370/i370.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. System/370 version. - Copyright (C) 1989, 1993, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 93, 95, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Jan Stein (jan@cd.chalmers.se). Modified for C/370 MVS by Dave Pitts (dpitts@nyx.cs.du.edu) @@ -467,12 +467,12 @@ enum reg_class /* On the 370 the return value is in R15 or R16. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx(REG, TYPE_MODE (VALTYPE), RET_REG(TYPE_MODE(VALTYPE))) + gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE))) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx(REG, MODE, RET_REG(MODE)) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE)) /* 1 if N is a possible register number for a function value. On the 370 under C/370, R15 and R16 are thus used. */ @@ -577,13 +577,12 @@ enum reg_class #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x05E0)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x5800 | \ - STATIC_CHAIN_REGNUM << 4)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00A)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x58F0)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00E)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x07FF)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x05E0)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00A)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x58F0)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00E)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x07FF)); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ @@ -598,8 +597,8 @@ enum reg_class #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \ } /* Output assembler code to FILE to increment profiler label # LABELNO @@ -770,17 +769,17 @@ enum reg_class #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ { \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - copy_to_mode_reg (SImode, XEXP (X, 1))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + copy_to_mode_reg (SImode, XEXP (X, 1))); \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - copy_to_mode_reg (SImode, XEXP (X, 0))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + copy_to_mode_reg (SImode, XEXP (X, 0))); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), 0)); \ if (memory_address_p (MODE, X)) \ goto WIN; \ } diff --git a/gcc/config/i386/cygwin32.h b/gcc/config/i386/cygwin32.h index 0e162869603..d639847c3b3 100644 --- a/gcc/config/i386/cygwin32.h +++ b/gcc/config/i386/cygwin32.h @@ -144,7 +144,7 @@ do \ if (lookup_attribute ("stdcall", \ TYPE_ATTRIBUTES (TREE_TYPE (DECL)))) \ XEXP (DECL_RTL (DECL), 0) = \ - gen_rtx (SYMBOL_REF, Pmode, gen_stdcall_suffix (DECL)); \ + gen_rtx_SYMBOL_REF (Pmode, gen_stdcall_suffix (DECL)); \ } \ while (0) #endif diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 6558bb9dfde..244d28a9521 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -19,9 +19,8 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include <setjmp.h> -#include <ctype.h> #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -100,7 +99,7 @@ struct processor_costs pentiumpro_cost = { struct processor_costs *ix86_cost = &pentium_cost; -#define AT_BP(mode) (gen_rtx (MEM, (mode), frame_pointer_rtx)) +#define AT_BP(mode) (gen_rtx_MEM ((mode), frame_pointer_rtx)) extern FILE *asm_out_file; extern char *strcat (); @@ -761,7 +760,7 @@ function_arg (cum, mode, type, named) case HImode: case QImode: if (words <= cum->nregs) - ret = gen_rtx (REG, mode, cum->regno); + ret = gen_rtx_REG (mode, cum->regno); break; } @@ -831,11 +830,11 @@ output_op_from_reg (src, template) if (size > 2 * UNITS_PER_WORD) { - high = gen_rtx (REG, SImode, REGNO (src) + 2); + high = gen_rtx_REG (SImode, REGNO (src) + 2); output_asm_insn (AS1 (push%L0,%0), &high); } - high = gen_rtx (REG, SImode, REGNO (src) + 1); + high = gen_rtx_REG (SImode, REGNO (src) + 1); output_asm_insn (AS1 (push%L0,%0), &high); } @@ -905,7 +904,7 @@ output_to_reg (dest, dies, scratch_mem) if (size > UNITS_PER_WORD) { - dest = gen_rtx (REG, SImode, REGNO (dest) + 1); + dest = gen_rtx_REG (SImode, REGNO (dest) + 1); if (! scratch_mem) output_asm_insn (AS1 (pop%L0,%0), &dest); else @@ -917,7 +916,7 @@ output_to_reg (dest, dies, scratch_mem) if (size > 2 * UNITS_PER_WORD) { - dest = gen_rtx (REG, SImode, REGNO (dest) + 1); + dest = gen_rtx_REG (SImode, REGNO (dest) + 1); if (! scratch_mem) output_asm_insn (AS1 (pop%L0,%0), &dest); else @@ -1071,11 +1070,11 @@ output_move_double (operands) operands[0] = XEXP (XEXP (operands[0], 0), 0); asm_add (-size, operands[0]); if (GET_MODE (operands[1]) == XFmode) - operands[0] = gen_rtx (MEM, XFmode, operands[0]); + operands[0] = gen_rtx_MEM (XFmode, operands[0]); else if (GET_MODE (operands[0]) == DFmode) - operands[0] = gen_rtx (MEM, DFmode, operands[0]); + operands[0] = gen_rtx_MEM (DFmode, operands[0]); else - operands[0] = gen_rtx (MEM, DImode, operands[0]); + operands[0] = gen_rtx_MEM (DImode, operands[0]); optype0 = OFFSOP; } @@ -1085,11 +1084,11 @@ output_move_double (operands) operands[1] = XEXP (XEXP (operands[1], 0), 0); asm_add (-size, operands[1]); if (GET_MODE (operands[1]) == XFmode) - operands[1] = gen_rtx (MEM, XFmode, operands[1]); + operands[1] = gen_rtx_MEM (XFmode, operands[1]); else if (GET_MODE (operands[1]) == DFmode) - operands[1] = gen_rtx (MEM, DFmode, operands[1]); + operands[1] = gen_rtx_MEM (DFmode, operands[1]); else - operands[1] = gen_rtx (MEM, DImode, operands[1]); + operands[1] = gen_rtx_MEM (DImode, operands[1]); optype1 = OFFSOP; } @@ -1115,8 +1114,8 @@ output_move_double (operands) { if (optype0 == REGOP) { - middlehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2); + middlehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2); } else if (optype0 == OFFSOP) { @@ -1131,8 +1130,8 @@ output_move_double (operands) if (optype1 == REGOP) { - middlehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2); + middlehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2); } else if (optype1 == OFFSOP) { @@ -1167,14 +1166,14 @@ output_move_double (operands) /* Size is not 12. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -1212,13 +1211,13 @@ output_move_double (operands) output_asm_insn (AS2 (lea%L0,%a1,%0), xops); if (GET_MODE (operands[1]) == XFmode) { - operands[1] = gen_rtx (MEM, XFmode, latehalf[0]); + operands[1] = gen_rtx_MEM (XFmode, latehalf[0]); middlehalf[1] = adj_offsettable_operand (operands[1], size-8); latehalf[1] = adj_offsettable_operand (operands[1], size-4); } else { - operands[1] = gen_rtx (MEM, DImode, latehalf[0]); + operands[1] = gen_rtx_MEM (DImode, latehalf[0]); latehalf[1] = adj_offsettable_operand (operands[1], size-4); } } @@ -1945,17 +1944,17 @@ load_pic_register (do_rtl) LABEL_NAME (pic_label_rtx) = pic_label_name; } - xops[1] = gen_rtx (MEM, QImode, - gen_rtx (SYMBOL_REF, Pmode, - LABEL_NAME (pic_label_rtx))); - + xops[1] = gen_rtx_MEM (QImode, + gen_rtx_SYMBOL_REF (Pmode, + LABEL_NAME (pic_label_rtx))); + if (do_rtl) { emit_insn (gen_prologue_get_pc (xops[0], xops[1])); - emit_insn (gen_prologue_set_got (xops[0], - gen_rtx (SYMBOL_REF, Pmode, - "$_GLOBAL_OFFSET_TABLE_"), - xops[1])); + emit_insn (gen_prologue_set_got + (xops[0], + gen_rtx_SYMBOL_REF (Pmode, "$_GLOBAL_OFFSET_TABLE_"), + xops[1])); } else { @@ -2016,11 +2015,12 @@ ix86_prologue (do_rtl) { if (do_rtl) { - insn = emit_insn (gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, - gen_rtx (PRE_DEC, SImode, - stack_pointer_rtx)), - frame_pointer_rtx)); + insn = emit_insn (gen_rtx_SET + (VOIDmode, + gen_rtx_MEM (SImode, + gen_rtx_PRE_DEC (SImode, + stack_pointer_rtx)), + frame_pointer_rtx)); RTX_FRAME_RELATED_P (insn) = 1; insn = emit_move_insn (xops[1], xops[0]); @@ -2077,17 +2077,17 @@ ix86_prologue (do_rtl) } else { - xops[3] = gen_rtx (REG, SImode, 0); + xops[3] = gen_rtx_REG (SImode, 0); if (do_rtl) emit_move_insn (xops[3], xops[2]); else output_asm_insn (AS2 (mov%L0,%2,%3), xops); - xops[3] = gen_rtx (MEM, FUNCTION_MODE, - gen_rtx (SYMBOL_REF, Pmode, "_alloca")); + xops[3] = gen_rtx_MEM (FUNCTION_MODE, + gen_rtx_SYMBOL_REF (Pmode, "_alloca")); if (do_rtl) - emit_call_insn (gen_rtx (CALL, VOIDmode, xops[3], const0_rtx)); + emit_call_insn (gen_rtx_CALL (VOIDmode, xops[3], const0_rtx)); else output_asm_insn (AS1 (call,%P3), xops); } @@ -2107,14 +2107,16 @@ ix86_prologue (do_rtl) if ((regs_ever_live[regno] && ! call_used_regs[regno]) || (regno == PIC_OFFSET_TABLE_REGNUM && pic_reg_used)) { - xops[0] = gen_rtx (REG, SImode, regno); + xops[0] = gen_rtx_REG (SImode, regno); if (do_rtl) { - insn = emit_insn (gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, - gen_rtx (PRE_DEC, SImode, - stack_pointer_rtx)), - xops[0])); + insn + = emit_insn (gen_rtx_SET + (VOIDmode, + gen_rtx_MEM (SImode, + gen_rtx_PRE_DEC (SImode, + stack_pointer_rtx)), + xops[0])); RTX_FRAME_RELATED_P (insn) = 1; } @@ -2268,7 +2270,7 @@ ix86_epilogue (do_rtl) if ((regs_ever_live[regno] && ! call_used_regs[regno]) || (regno == PIC_OFFSET_TABLE_REGNUM && pic_reg_used)) { - xops[0] = gen_rtx (REG, SImode, regno); + xops[0] = gen_rtx_REG (SImode, regno); if (do_rtl) emit_insn (gen_pop (xops[0])); @@ -2282,7 +2284,7 @@ ix86_epilogue (do_rtl) if ((regs_ever_live[regno] && ! call_used_regs[regno]) || (regno == PIC_OFFSET_TABLE_REGNUM && pic_reg_used)) { - xops[0] = gen_rtx (REG, SImode, regno); + xops[0] = gen_rtx_REG (SImode, regno); xops[1] = adj_offsettable_operand (AT_BP (Pmode), offset); if (do_rtl) @@ -2328,8 +2330,8 @@ ix86_epilogue (do_rtl) xops[0] = GEN_INT (tsize); if (do_rtl) - emit_insn (gen_rtx (SET, VOIDmode, xops[2], - gen_rtx (PLUS, SImode, xops[2], xops[0]))); + emit_insn (gen_rtx_SET (VOIDmode, xops[2], + gen_rtx_PLUS (SImode, xops[2], xops[0]))); else output_asm_insn (AS2 (add%L2,%0,%2), xops); } @@ -2352,13 +2354,14 @@ ix86_epilogue (do_rtl) if (current_function_pops_args >= 32768) { /* ??? Which register to use here? */ - xops[0] = gen_rtx (REG, SImode, 2); + xops[0] = gen_rtx_REG (SImode, 2); if (do_rtl) { emit_insn (gen_pop (xops[0])); - emit_insn (gen_rtx (SET, VOIDmode, xops[2], - gen_rtx (PLUS, SImode, xops[1], xops[2]))); + emit_insn (gen_rtx_SET (VOIDmode, xops[2], + gen_rtx_PLUS (SImode, xops[1], + xops[2]))); emit_jump_insn (xops[0]); } else @@ -2675,10 +2678,11 @@ legitimize_pic_address (orig, reg) if ((GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_FLAG (addr)) || GET_CODE (addr) == LABEL_REF) - new = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, orig); + new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, orig); else - new = gen_rtx (MEM, Pmode, - gen_rtx (PLUS, Pmode, pic_offset_table_rtx, orig)); + new = gen_rtx_MEM (Pmode, + gen_rtx_PLUS (Pmode, pic_offset_table_rtx, + orig)); emit_move_insn (reg, new); } @@ -2712,11 +2716,11 @@ legitimize_pic_address (orig, reg) if (GET_CODE (addr) == PLUS && CONSTANT_P (XEXP (addr, 1))) { - base = gen_rtx (PLUS, Pmode, base, XEXP (addr, 0)); + base = gen_rtx_PLUS (Pmode, base, XEXP (addr, 0)); addr = XEXP (addr, 1); } - return gen_rtx (PLUS, Pmode, base, addr); + return gen_rtx_PLUS (Pmode, base, addr); } return new; } @@ -2782,8 +2786,8 @@ legitimize_address (x, oldx, mode) && (log = (unsigned)exact_log2 (INTVAL (XEXP (x, 1)))) < 4) { changed = 1; - x = gen_rtx (MULT, Pmode, force_reg (Pmode, XEXP (x, 0)), - GEN_INT (1 << log)); + x = gen_rtx_MULT (Pmode, force_reg (Pmode, XEXP (x, 0)), + GEN_INT (1 << log)); } if (GET_CODE (x) == PLUS) @@ -2795,9 +2799,9 @@ legitimize_address (x, oldx, mode) && (log = (unsigned)exact_log2 (INTVAL (XEXP (XEXP (x, 0), 1)))) < 4) { changed = 1; - XEXP (x, 0) = gen_rtx (MULT, Pmode, - force_reg (Pmode, XEXP (XEXP (x, 0), 0)), - GEN_INT (1 << log)); + XEXP (x, 0) = gen_rtx_MULT (Pmode, + force_reg (Pmode, XEXP (XEXP (x, 0), 0)), + GEN_INT (1 << log)); } if (GET_CODE (XEXP (x, 1)) == ASHIFT @@ -2805,9 +2809,9 @@ legitimize_address (x, oldx, mode) && (log = (unsigned)exact_log2 (INTVAL (XEXP (XEXP (x, 1), 1)))) < 4) { changed = 1; - XEXP (x, 1) = gen_rtx (MULT, Pmode, - force_reg (Pmode, XEXP (XEXP (x, 1), 0)), - GEN_INT (1 << log)); + XEXP (x, 1) = gen_rtx_MULT (Pmode, + force_reg (Pmode, XEXP (XEXP (x, 1), 0)), + GEN_INT (1 << log)); } /* Put multiply first if it isn't already. */ @@ -2826,10 +2830,10 @@ legitimize_address (x, oldx, mode) if (GET_CODE (XEXP (x, 0)) == MULT && GET_CODE (XEXP (x, 1)) == PLUS) { changed = 1; - x = gen_rtx (PLUS, Pmode, - gen_rtx (PLUS, Pmode, XEXP (x, 0), - XEXP (XEXP (x, 1), 0)), - XEXP (XEXP (x, 1), 1)); + x = gen_rtx_PLUS (Pmode, + gen_rtx_PLUS (Pmode, XEXP (x, 0), + XEXP (XEXP (x, 1), 0)), + XEXP (XEXP (x, 1), 1)); } /* Canonicalize @@ -2858,10 +2862,10 @@ legitimize_address (x, oldx, mode) if (constant) { changed = 1; - x = gen_rtx (PLUS, Pmode, - gen_rtx (PLUS, Pmode, XEXP (XEXP (x, 0), 0), - XEXP (XEXP (XEXP (x, 0), 1), 0)), - plus_constant (other, INTVAL (constant))); + x = gen_rtx_PLUS (Pmode, + gen_rtx_PLUS (Pmode, XEXP (XEXP (x, 0), 0), + XEXP (XEXP (XEXP (x, 0), 1), 0)), + plus_constant (other, INTVAL (constant))); } } @@ -3670,8 +3674,8 @@ split_di (operands, num, lo_half, hi_half) { if (GET_CODE (operands[num]) == REG) { - lo_half[num] = gen_rtx (REG, SImode, REGNO (operands[num])); - hi_half[num] = gen_rtx (REG, SImode, REGNO (operands[num]) + 1); + lo_half[num] = gen_rtx_REG (SImode, REGNO (operands[num])); + hi_half[num] = gen_rtx_REG (SImode, REGNO (operands[num]) + 1); } else if (CONSTANT_P (operands[num])) split_double (operands[num], &lo_half[num], &hi_half[num]); @@ -4048,7 +4052,7 @@ output_fp_cc0_set (insn) rtx next; enum rtx_code code; - xops[0] = gen_rtx (REG, HImode, 0); + xops[0] = gen_rtx_REG (HImode, 0); output_asm_insn (AS1 (fnsts%W0,%0), xops); if (! TARGET_IEEE_FP) @@ -4107,7 +4111,7 @@ output_fp_cc0_set (insn) else abort (); - xops[0] = gen_rtx (REG, QImode, 0); + xops[0] = gen_rtx_REG (QImode, 0); switch (code) { @@ -4383,10 +4387,11 @@ rewrite_address (mem_rtx) { /* This part is utilized by the combiner. */ ret_rtx - = gen_rtx (PLUS, GET_MODE (mem_addr), - gen_rtx (PLUS, GET_MODE (XEXP (mem_addr, 1)), - XEXP (mem_addr, 0), XEXP (XEXP (mem_addr, 1), 0)), - XEXP (XEXP (mem_addr, 1), 1)); + = gen_rtx_PLUS (GET_MODE (mem_addr), + gen_rtx_PLUS (GET_MODE (XEXP (mem_addr, 1)), + XEXP (mem_addr, 0), + XEXP (XEXP (mem_addr, 1), 0)), + XEXP (XEXP (mem_addr, 1), 1)); if (memory_address_p (GET_MODE (mem_rtx), ret_rtx)) { @@ -4561,38 +4566,38 @@ rewrite_address (mem_rtx) { if (scale != 1) { - ret_rtx = gen_rtx (PLUS, GET_MODE (base_rtx), - gen_rtx (MULT, GET_MODE (index_rtx), - index_rtx, scale_rtx), - base_rtx); + ret_rtx = gen_rtx_PLUS (GET_MODE (base_rtx), + gen_rtx_MULT (GET_MODE (index_rtx), + index_rtx, scale_rtx), + base_rtx); if (GET_CODE (offset_rtx) != CONST_INT || INTVAL (offset_rtx) != 0) - ret_rtx = gen_rtx (PLUS, GET_MODE (ret_rtx), - ret_rtx, offset_rtx); + ret_rtx = gen_rtx_PLUS (GET_MODE (ret_rtx), + ret_rtx, offset_rtx); } else { - ret_rtx = gen_rtx (PLUS, GET_MODE (index_rtx), - index_rtx, base_rtx); + ret_rtx = gen_rtx_PLUS (GET_MODE (index_rtx), + index_rtx, base_rtx); if (GET_CODE (offset_rtx) != CONST_INT || INTVAL (offset_rtx) != 0) - ret_rtx = gen_rtx (PLUS, GET_MODE (ret_rtx), - ret_rtx, offset_rtx); + ret_rtx = gen_rtx_PLUS (GET_MODE (ret_rtx), + ret_rtx, offset_rtx); } } else { if (scale != 1) { - ret_rtx = gen_rtx (MULT, GET_MODE (index_rtx), - index_rtx, scale_rtx); + ret_rtx = gen_rtx_MULT (GET_MODE (index_rtx), + index_rtx, scale_rtx); if (GET_CODE (offset_rtx) != CONST_INT || INTVAL (offset_rtx) != 0) - ret_rtx = gen_rtx (PLUS, GET_MODE (ret_rtx), - ret_rtx, offset_rtx); + ret_rtx = gen_rtx_PLUS (GET_MODE (ret_rtx), + ret_rtx, offset_rtx); } else { diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 77bf539ce99..77789f6d0a6 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -945,14 +945,14 @@ enum reg_class If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), \ - VALUE_REGNO (TYPE_MODE (VALTYPE))) + gen_rtx_REG (TYPE_MODE (VALTYPE), \ + VALUE_REGNO (TYPE_MODE (VALTYPE))) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, VALUE_REGNO (MODE)) + gen_rtx_REG (MODE, VALUE_REGNO (MODE)) /* Define the size of the result block used for communication between untyped_call and untyped_return. The block contains a DImode value @@ -1145,9 +1145,9 @@ do \ \ ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \ \ - xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \ + xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \ xops[5] = stack_pointer_rtx; \ - xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \ + xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \ \ CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \ \ @@ -1157,7 +1157,9 @@ do \ case 2: \ \ xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \ - xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_trace_func")); \ + xops[3] = gen_rtx_MEM (Pmode, \ + gen_rtx_SYMBOL_REF (VOIDmode, \ + "__bb_init_trace_func")); \ xops[6] = GEN_INT (8); \ \ output_asm_insn (AS1(push%L2,%2), xops); \ @@ -1179,9 +1181,12 @@ do \ ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \ \ xops[0] = const0_rtx; \ - xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \ - xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \ - xops[4] = gen_rtx (MEM, Pmode, xops[1]); \ + xops[2] = gen_rtx_MEM (Pmode, \ + gen_rtx_SYMBOL_REF (VOIDmode, false_label)); \ + xops[3] = gen_rtx_MEM (Pmode, \ + gen_rtx_SYMBOL_REF (VOIDmode, \ + "__bb_init_func")); \ + xops[4] = gen_rtx_MEM (Pmode, xops[1]); \ xops[6] = GEN_INT (4); \ \ CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \ @@ -1287,13 +1292,15 @@ do \ \ ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \ \ - xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \ + xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \ xops[2] = GEN_INT ((BLOCKNO)); \ - xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_func")); \ - xops[4] = gen_rtx (SYMBOL_REF, VOIDmode, "__bb"); \ + xops[3] = gen_rtx_MEM (Pmode, \ + gen_rtx_SYMBOL_REF (VOIDmode, \ + "__bb_trace_func")); \ + xops[4] = gen_rtx_SYMBOL_REF (VOIDmode, "__bb"); \ xops[5] = plus_constant (xops[4], 4); \ - xops[0] = gen_rtx (MEM, SImode, xops[4]); \ - xops[6] = gen_rtx (MEM, SImode, xops[5]); \ + xops[0] = gen_rtx_MEM (SImode, xops[4]); \ + xops[6] = gen_rtx_MEM (SImode, xops[5]); \ \ CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \ \ @@ -1301,7 +1308,7 @@ do \ output_asm_insn (AS2(mov%L0,%2,%0), xops); \ if (flag_pic) \ { \ - xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \ + xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \ output_asm_insn (AS1(push%L7,%7), xops); \ output_asm_insn (AS2(lea%L7,%a1,%7), xops); \ output_asm_insn (AS2(mov%L6,%7,%6), xops); \ @@ -1317,16 +1324,16 @@ do \ default: \ \ ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \ - cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \ + cnt_rtx = gen_rtx_SYMBOL_REF (VOIDmode, counts); \ SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \ \ if (BLOCKNO) \ cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \ \ if (flag_pic) \ - cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \ + cnt_rtx = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, cnt_rtx); \ \ - xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \ + xops[0] = gen_rtx_MEM (SImode, cnt_rtx); \ output_asm_insn (AS1(inc%L0,%0), xops); \ \ break; \ @@ -1362,7 +1369,8 @@ do \ { \ rtx xops[1]; \ \ - xops[0] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_ret")); \ + xops[0] = gen_rtx_MEM (Pmode, \ + gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_ret")); \ \ output_asm_insn (AS1(call,%P0), xops); \ \ @@ -1470,8 +1478,8 @@ do { \ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), FNADDR); \ } /* Definitions for register eliminations. @@ -1805,10 +1813,10 @@ while (0) in one reasonably fast instruction. */ #define MOVE_MAX 4 -/* The number of scalar move insns which should be generated instead - of a string move insn or a library call. Increasing the value - will always make code faster, but eventually incurs high cost in - increased code size. +/* If a memory-to-memory move would take MOVE_RATIO or more simple + move-instruction pairs, we will do a movstr or libcall instead. + Increasing the value will always make code faster, but eventually + incurs high cost in increased code size. If you don't define this, a reasonable default is used. @@ -2366,13 +2374,13 @@ number as al, and ax. /* Before the prologue, RA is at 0(%esp). */ #define INCOMING_RETURN_ADDR_RTX \ - gen_rtx (MEM, VOIDmode, gen_rtx (REG, VOIDmode, STACK_POINTER_REGNUM)) - + gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) + /* After the prologue, RA is at -4(AP) in the current frame. */ #define RETURN_ADDR_RTX(COUNT, FRAME) \ ((COUNT) == 0 \ - ? gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, arg_pointer_rtx, GEN_INT(-4)))\ - : gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, (FRAME), GEN_INT(4)))) + ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -4))\ + : gen_rtx_MEM (Pmode, plus_constant (FRAME, 4))) /* PC is dbx register 8; let's use that column for RA. */ #define DWARF_FRAME_RETURN_COLUMN 8 @@ -2625,7 +2633,7 @@ extern char *qi_high_reg_name[]; #define ASM_OPERAND_LETTER '#' #define RET return "" -#define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx)) +#define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx)) /* Helper macros to expand a binary/unary operator if needed */ #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \ diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index c324a8be705..0d7b603dbd1 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1043,7 +1043,7 @@ "" "* { - operands[1] = gen_rtx (REG, HImode, REGNO (operands[1])); + operands[1] = gen_rtx_REG (HImode, REGNO (operands[1])); return AS1 (push%W0,%1); }") @@ -1220,13 +1220,14 @@ if (flag_pic) current_function_uses_pic_offset_table = 1; - insn = emit_insn (gen_rtx (SET, SFmode, operands[0], fp_const)); + insn = emit_insn (gen_rtx_SET (SFmode, operands[0], fp_const)); note = find_reg_note (insn, REG_EQUAL, NULL_RTX); if (note) XEXP (note, 0) = operands[1]; else - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, operands[1], REG_NOTES (insn)); + REG_NOTES (insn) + = gen_rtx_EXPR_LIST (REG_EQUAL, operands[1], REG_NOTES (insn)); } }") @@ -1368,13 +1369,14 @@ if (flag_pic) current_function_uses_pic_offset_table = 1; - insn = emit_insn (gen_rtx (SET, DFmode, operands[0], fp_const)); + insn = emit_insn (gen_rtx_SET (DFmode, operands[0], fp_const)); note = find_reg_note (insn, REG_EQUAL, NULL_RTX); if (note) XEXP (note, 0) = operands[1]; else - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, operands[1], REG_NOTES (insn)); + REG_NOTES (insn) + = gen_rtx_EXPR_LIST (REG_EQUAL, operands[1], REG_NOTES (insn)); } }") @@ -1517,13 +1519,14 @@ if (flag_pic) current_function_uses_pic_offset_table = 1; - insn = emit_insn (gen_rtx (SET, XFmode, operands[0], fp_const)); + insn = emit_insn (gen_rtx_SET (XFmode, operands[0], fp_const)); note = find_reg_note (insn, REG_EQUAL, NULL_RTX); if (note) XEXP (note, 0) = operands[1]; else - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, operands[1], REG_NOTES (insn)); + REG_NOTES (insn) + = gen_rtx_EXPR_LIST (REG_EQUAL, operands[1], REG_NOTES (insn)); } }") @@ -1663,7 +1666,7 @@ if (TARGET_ZERO_EXTEND_WITH_AND) { xops[0] = operands[0]; - xops[1] = gen_rtx (CONST_INT, VOIDmode, 0xffff); + xops[1] = GEN_INT (0xffff); if (i386_aligned_p (operands[1])) output_asm_insn (AS2 (mov%L0,%k1,%k0),operands); else @@ -1687,7 +1690,7 @@ (const_int 0)) (set (strict_low_part (match_dup 2)) (match_dup 1))] - "operands[2] = gen_rtx (REG, HImode, true_regnum (operands[0]));") + "operands[2] = gen_rtx_REG (HImode, true_regnum (operands[0]));") (define_split @@ -1699,7 +1702,7 @@ (set (match_dup 0) (and:SI (match_dup 0) (const_int 65535)))] - "operands[2] = gen_rtx (REG, HImode, true_regnum (operands[0]));") + "operands[2] = gen_rtx_REG (HImode, true_regnum (operands[0]));") (define_insn "zero_extendqihi2" [(set (match_operand:HI 0 "register_operand" "=q,&q,?r") @@ -1728,7 +1731,7 @@ else { xops[0] = operands[0]; - xops[1] = gen_rtx (CONST_INT, VOIDmode, 0xff); + xops[1] = GEN_INT (0xff); output_asm_insn (AS2 (mov%B0,%1,%b0),operands); output_asm_insn (AS2 (and%L0,%1,%k0), xops); } @@ -1751,7 +1754,7 @@ (const_int 0)) (set (strict_low_part (match_dup 2)) (match_dup 1))] - "operands[2] = gen_rtx (REG, QImode, REGNO (operands[0]));") + "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));") (define_split @@ -1764,7 +1767,7 @@ (set (match_dup 0) (and:HI (match_dup 0) (const_int 255)))] - "operands[2] = gen_rtx (REG, QImode, REGNO (operands[0]));") + "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));") (define_split [(set (match_operand:HI 0 "register_operand" "") @@ -1780,7 +1783,7 @@ if (GET_CODE (operands[0]) != REG || GET_CODE (operands[1]) != REG || REGNO (operands[0]) == REGNO (operands[1])) FAIL; - operands[2] = gen_rtx (REG, HImode, REGNO (operands[1]));") + operands[2] = gen_rtx_REG (HImode, REGNO (operands[1]));") (define_insn "zero_extendqisi2" [(set (match_operand:SI 0 "register_operand" "=q,&q,?r") @@ -1809,7 +1812,7 @@ else { xops[0] = operands[0]; - xops[1] = gen_rtx (CONST_INT, VOIDmode, 0xff); + xops[1] = GEN_INT (0xff); output_asm_insn (AS2 (mov%B0,%1,%b0), operands); output_asm_insn (AS2 (and%L0,%1,%k0), xops); } @@ -1819,8 +1822,8 @@ if (TARGET_ZERO_EXTEND_WITH_AND && GET_CODE (operands[1]) == REG) { xops[0] = operands[0]; - xops[1] = gen_rtx (CONST_INT, VOIDmode, 0xff); - operands[1] = gen_rtx (REG, SImode, REGNO (operands[1])); + xops[1] = GEN_INT (0xff); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[1])); output_asm_insn (AS2 (mov%L0,%1,%0), operands); output_asm_insn (AS2 (and%L0,%1,%k0), xops); RET; @@ -1842,7 +1845,7 @@ (const_int 0)) (set (strict_low_part (match_dup 2)) (match_dup 1))] - "operands[2] = gen_rtx (REG, QImode, REGNO (operands[0]));") + "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));") (define_split @@ -1855,7 +1858,7 @@ (set (match_dup 0) (and:SI (match_dup 0) (const_int 255)))] - "operands[2] = gen_rtx (REG, QImode, REGNO (operands[0]));") + "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));") (define_split [(set (match_operand:SI 0 "register_operand" "") @@ -1867,7 +1870,7 @@ (set (match_dup 0) (and:SI (match_dup 0) (const_int 255)))] - "operands[2] = gen_rtx (REG, SImode, true_regnum (operands[1]));") + "operands[2] = gen_rtx_REG (SImode, true_regnum (operands[1]));") (define_insn "zero_extendsidi2" [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?m") @@ -1880,7 +1883,7 @@ if (REG_P (operands[0]) && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1])) { - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return AS2 (xor%L0,%0,%0); } @@ -1917,7 +1920,7 @@ #endif } - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); output_asm_insn (AS2 (mov%L0,%0,%1), operands); operands[0] = GEN_INT (31); @@ -3036,7 +3039,7 @@ ; xops[0] = operands[0]; ; xops[1] = operands[1]; ; xops[2] = operands[2]; -; xops[3] = gen_rtx (MEM, SImode, stack_pointer_rtx); +; xops[3] = gen_rtx_MEM (SImode, stack_pointer_rtx); ; output_asm_insn (\"push%z1 %1\", xops); ; output_asm_insn (AS2 (add%z3,%2,%3), xops); ; RET; @@ -4451,8 +4454,8 @@ byte_xor_operation: output_asm_insn (AS2 (mov%L0,%1,%0), operands); operands[1] = operands[0]; } - operands[1] = gen_rtx (MULT, SImode, operands[1], - GEN_INT (1 << INTVAL (operands[2]))); + operands[1] = gen_rtx_MULT (SImode, operands[1], + GEN_INT (1 << INTVAL (operands[2]))); return AS2 (lea%L0,%a1,%0); } } @@ -4912,7 +4915,7 @@ byte_xor_operation: } else { - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0])); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0])); if (INTVAL (operands[2])) output_asm_insn (AS2 (ror%L0,%2,%0), operands); output_asm_insn (AS3 (shrd%L0,%1,%3,%0), operands); @@ -5345,7 +5348,7 @@ byte_xor_operation: else if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x4000); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (jne,%l0); @@ -5385,7 +5388,7 @@ byte_xor_operation: else if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x4000); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (je,%l0); @@ -5419,7 +5422,7 @@ byte_xor_operation: if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x4100); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (je,%l0); @@ -5471,7 +5474,7 @@ byte_xor_operation: if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x100); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (jne,%l0); @@ -5522,7 +5525,7 @@ byte_xor_operation: return AS1 (je,%l0); if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x100); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (je,%l0); @@ -5573,7 +5576,7 @@ byte_xor_operation: return AS1 (jb,%l0); if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x4100); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (jne,%l0); @@ -5617,7 +5620,7 @@ byte_xor_operation: else if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x4000); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (je,%l0); @@ -5639,7 +5642,7 @@ byte_xor_operation: else if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x4000); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (jne,%l0); @@ -5661,7 +5664,7 @@ byte_xor_operation: return AS1 (jne,%l0); if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x4100); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (jne,%l0); @@ -5692,7 +5695,7 @@ byte_xor_operation: return AS1 (jne,%l0); if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x100); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (je,%l0); @@ -5724,7 +5727,7 @@ byte_xor_operation: return AS1 (jne,%l0); if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x100); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (jne,%l0); @@ -5756,7 +5759,7 @@ byte_xor_operation: if (cc_prev_status.flags & CC_TEST_AX) { - operands[1] = gen_rtx (REG, SImode, 0); + operands[1] = gen_rtx_REG (SImode, 0); operands[2] = GEN_INT (0x4100); output_asm_insn (AS2 (testl,%2,%1), operands); return AS1 (je,%l0); @@ -6302,8 +6305,8 @@ byte_xor_operation: value. */ emit_call_insn (TARGET_80387 - ? gen_call_value (gen_rtx (REG, XCmode, FIRST_FLOAT_REG), - operands[0], const0_rtx) + ? gen_call_value (gen_rtx_REG (XCmode, FIRST_FLOAT_REG), + operands[0], const0_rtx) : gen_call (operands[0], const0_rtx)); for (i = 0; i < XVECLEN (operands[2], 0); i++) @@ -6566,7 +6569,7 @@ byte_xor_operation: operands[3] = gen_reg_rtx (SImode); operands[5] = addr0; - operands[0] = gen_rtx (MEM, BLKmode, addr0); + operands[0] = gen_rtx_MEM (BLKmode, addr0); }") ;; It might seem that operand 0 could use predicate register_operand. @@ -6632,9 +6635,8 @@ byte_xor_operation: operands[5] = addr1; operands[6] = addr2; - operands[1] = gen_rtx (MEM, BLKmode, addr1); - operands[2] = gen_rtx (MEM, BLKmode, addr2); - + operands[1] = gen_rtx_MEM (BLKmode, addr1); + operands[2] = gen_rtx_MEM (BLKmode, addr2); }") ;; memcmp recognizers. The `cmpsb' opcode does nothing if the count is @@ -6697,7 +6699,7 @@ byte_xor_operation: cc_status.flags |= CC_NOT_SIGNED; - xops[0] = gen_rtx (REG, QImode, 0); + xops[0] = gen_rtx_REG (QImode, 0); xops[1] = CONST0_RTX (QImode); output_asm_insn (\"cld\", operands); diff --git a/gcc/config/i386/mingw32.h b/gcc/config/i386/mingw32.h index 5ae1926d1cd..c15ad64553f 100644 --- a/gcc/config/i386/mingw32.h +++ b/gcc/config/i386/mingw32.h @@ -66,14 +66,6 @@ do { \ char c; \ \ putc ('\"', asm_file); \ - if (STRING[1] == ':' \ - && (STRING[2] == '/' || STRING[2] == '\\')) \ - { \ - putc ('/', asm_file); \ - putc ('/', asm_file); \ - putc (*string, asm_file); \ - string += 2; \ - } \ \ while ((c = *string++) != 0) \ { \ diff --git a/gcc/config/i386/osfrose.h b/gcc/config/i386/osfrose.h index fd4c3a8eb28..6c2dd3e85a0 100644 --- a/gcc/config/i386/osfrose.h +++ b/gcc/config/i386/osfrose.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. Intel 386 (OSF/1 with OSF/rose) version. - Copyright (C) 1991, 1992, 1993, 1996 Free Software Foundation, Inc. + Copyright (C) 1991, 1992, 1993, 1996, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -221,8 +221,8 @@ do \ rtx symref; \ \ HALF_PIC_EXTERNAL ("_mcount_ptr"); \ - symref = HALF_PIC_PTR (gen_rtx (SYMBOL_REF, Pmode, \ - "_mcount_ptr")); \ + symref = HALF_PIC_PTR (gen_rtx_SYMBOL_REF (Pmode, \ + "_mcount_ptr")); \ \ fprintf (FILE, "\tmovl $%sP%d,%%edx\n", lprefix, labelno); \ fprintf (FILE, "\tmovl %s%s,%%eax\n", prefix, \ @@ -294,7 +294,7 @@ do \ rtx symdef; \ \ HALF_PIC_EXTERNAL ("mcount"); \ - symdef = HALF_PIC_PTR (gen_rtx (SYMBOL_REF, Pmode, "mcount")); \ + symdef = HALF_PIC_PTR (gen_rtx_SYMBOL_REF (Pmode, "mcount")); \ fprintf (FILE, "\tmovl $%sP%d,%%edx\n", lprefix, labelno); \ fprintf (FILE, "\tcall *%s%s\n", prefix, XSTR (symdef, 0)); \ } \ diff --git a/gcc/config/i386/win-nt.h b/gcc/config/i386/win-nt.h index 60c0bb6a1f6..d87d8e4ed4a 100644 --- a/gcc/config/i386/win-nt.h +++ b/gcc/config/i386/win-nt.h @@ -1,6 +1,6 @@ /* Operating system specific defines to be used when targeting GCC for Windows NT 3.x on an i386. - Copyright (C) 1994, 1995 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1998 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (drupp@cs.washington.edu). This file is part of GNU CC. @@ -118,7 +118,7 @@ do \ if (lookup_attribute ("stdcall", \ TYPE_ATTRIBUTES (TREE_TYPE (DECL)))) \ XEXP (DECL_RTL (DECL), 0) = \ - gen_rtx (SYMBOL_REF, Pmode, gen_stdcall_suffix (DECL)); \ + gen_rtx_SYMBOL_REF (Pmode, gen_stdcall_suffix (DECL)); \ } \ while (0) #endif diff --git a/gcc/config/i860/i860.c b/gcc/config/i860/i860.c index dd9a6f56329..12e916469b6 100644 --- a/gcc/config/i860/i860.c +++ b/gcc/config/i860/i860.c @@ -26,7 +26,7 @@ Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "flags.h" #include "rtl.h" #include "regs.h" @@ -519,7 +519,7 @@ singlemove_string (operands) rtx xoperands[2]; cc_status.flags &= ~CC_F0_IS_0; - xoperands[0] = gen_rtx (REG, SFmode, 32); + xoperands[0] = gen_rtx_REG (SFmode, 32); xoperands[1] = operands[1]; output_asm_insn (singlemove_string (xoperands), xoperands); xoperands[1] = xoperands[0]; @@ -624,14 +624,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -690,7 +690,7 @@ output_move_double (operands) xops[0] = latehalf[0]; xops[1] = operands[0]; output_asm_insn ("adds %1,%0,%1", xops); - operands[1] = gen_rtx (MEM, DImode, operands[0]); + operands[1] = gen_rtx_MEM (DImode, operands[0]); latehalf[1] = adj_offsettable_operand (operands[1], 4); addreg1 = 0; highest_first = 1; @@ -744,7 +744,7 @@ output_fp_move_double (operands) /* If the source operand is any sort of zero, use f0 instead. */ if (operands[1] == CONST0_RTX (GET_MODE (operands[1]))) - operands[1] = gen_rtx (REG, DFmode, F0_REGNUM); + operands[1] = gen_rtx_REG (DFmode, F0_REGNUM); if (FP_REG_P (operands[0])) { @@ -753,8 +753,8 @@ output_fp_move_double (operands) if (GET_CODE (operands[1]) == REG) { output_asm_insn ("ixfr %1,%0", operands); - operands[0] = gen_rtx (REG, VOIDmode, REGNO (operands[0]) + 1); - operands[1] = gen_rtx (REG, VOIDmode, REGNO (operands[1]) + 1); + operands[0] = gen_rtx_REG (VOIDmode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (VOIDmode, REGNO (operands[1]) + 1); return "ixfr %1,%0"; } if (operands[1] == CONST0_RTX (DFmode)) @@ -779,8 +779,8 @@ output_fp_move_double (operands) if (GET_CODE (operands[0]) == REG) { output_asm_insn ("fxfr %1,%0", operands); - operands[0] = gen_rtx (REG, VOIDmode, REGNO (operands[0]) + 1); - operands[1] = gen_rtx (REG, VOIDmode, REGNO (operands[1]) + 1); + operands[0] = gen_rtx_REG (VOIDmode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (VOIDmode, REGNO (operands[1]) + 1); return "fxfr %1,%0"; } if (CONSTANT_ADDRESS_P (XEXP (operands[0], 0))) @@ -1113,8 +1113,7 @@ output_size_for_block_move (size, reg, align) output_asm_insn ("sub %2,%1,%0", xoperands); else { - xoperands[1] - = gen_rtx (CONST_INT, VOIDmode, INTVAL (size) - INTVAL (align)); + xoperands[1] = GEN_INT (INTVAL (size) - INTVAL (align)); cc_status.flags &= ~ CC_KNOW_HI_R31; output_asm_insn ("mov %1,%0", xoperands); } @@ -1153,7 +1152,7 @@ output_block_move (operands) if (align > 4) { align = 4; - alignrtx = gen_rtx (CONST_INT, VOIDmode, 4); + alignrtx = GEN_INT (4); } /* Recognize special cases of block moves. These occur @@ -1238,7 +1237,7 @@ output_block_move (operands) /* Generate number for unique label. */ - xoperands[3] = gen_rtx (CONST_INT, VOIDmode, movstrsi_label++); + xoperands[3] = GEN_INT (movstrsi_label++); /* Calculate the size of the chunks we will be trying to move first. */ @@ -1253,7 +1252,7 @@ output_block_move (operands) /* Copy the increment (negative) to a register for bla insn. */ - xoperands[4] = gen_rtx (CONST_INT, VOIDmode, - chunk_size); + xoperands[4] = GEN_INT (- chunk_size); xoperands[5] = operands[5]; output_asm_insn ("adds %4,%?r0,%5", xoperands); @@ -1425,8 +1424,8 @@ output_delayed_branch (template, operands, insn) else { int insn_code_number; - rtx pat = gen_rtx (SET, VOIDmode, dest, src); - rtx delay_insn = gen_rtx (INSN, VOIDmode, 0, 0, 0, pat, -1, 0, 0); + rtx pat = gen_rtx_SET (VOIDmode, dest, src); + rtx delay_insn = gen_rtx_INSN (VOIDmode, 0, 0, 0, pat, -1, 0, 0); int i; /* Output the branch instruction first. */ diff --git a/gcc/config/i860/i860.h b/gcc/config/i860/i860.h index 47eb7dcfd1d..cc1495a58af 100644 --- a/gcc/config/i860/i860.h +++ b/gcc/config/i860/i860.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for Intel 860. - Copyright (C) 1989, 91, 93, 95, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 91, 93, 95-97, 1998 Free Software Foundation, Inc. Hacked substantially by Ron Guilmette (rfg@monkeys.com) to cater to the whims of the System V Release 4 assembler. @@ -428,17 +428,17 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES }; /* On the i860, the value register depends on the mode. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), \ - (GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT \ - ? 40 : 16)) + gen_rtx_REG (TYPE_MODE (VALTYPE), \ + (GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT \ + ? 40 : 16)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, \ - (GET_MODE_CLASS ((MODE)) == MODE_FLOAT \ - ? 40 : 16)) + gen_rtx_REG (MODE, \ + (GET_MODE_CLASS ((MODE)) == MODE_FLOAT \ + ? 40 : 16)) /* 1 if N is a possible register number for a function value as seen by the caller. */ @@ -523,17 +523,17 @@ struct cumulative_args { int ints, floats; }; ? 0 \ : GET_MODE_CLASS ((MODE)) == MODE_FLOAT || (MODE) == DImode \ ? (ROUNDUP ((CUM).floats, GET_MODE_SIZE ((MODE))) < 32 \ - ? gen_rtx (REG, (MODE), \ - 40+(ROUNDUP ((CUM).floats, \ - GET_MODE_SIZE ((MODE))) \ - / 4)) \ + ? gen_rtx_REG ((MODE), \ + 40 + (ROUNDUP ((CUM).floats, \ + GET_MODE_SIZE ((MODE))) \ + / 4)) \ : 0) \ : GET_MODE_CLASS ((MODE)) == MODE_INT \ ? (ROUNDUP ((CUM).ints, GET_MODE_SIZE ((MODE))) < 48 \ - ? gen_rtx (REG, (MODE), \ - 16+(ROUNDUP ((CUM).ints, \ - GET_MODE_SIZE ((MODE))) \ - / 4)) \ + ? gen_rtx_REG ((MODE), \ + 16 + (ROUNDUP ((CUM).ints, \ + GET_MODE_SIZE ((MODE))) \ + / 4)) \ : 0) \ : 0) @@ -618,11 +618,11 @@ struct cumulative_args { int ints, floats; }; or #BOTTOM_OF_STATIC,r29,r29 */ #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xec1f0000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xe7ff0000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xec1d0000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4000f800)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xe7bd0000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0xec1f0000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0xe7ff0000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0xec1d0000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x4000f800)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0xe7bd0000)); \ } /* Length in units of the trampoline for entering a nested function. */ @@ -644,13 +644,13 @@ struct cumulative_args { int ints, floats; }; size_int (16), 0, 0); \ rtx hi_fn = expand_shift (RSHIFT_EXPR, SImode, fn, \ size_int (16), 0, 0); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 16)), \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 16)), \ gen_lowpart (HImode, cxt)); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 4)), \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 4)), \ gen_lowpart (HImode, fn)); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 8)), \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 8)), \ gen_lowpart (HImode, hi_cxt)); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 0)), \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 0)), \ gen_lowpart (HImode, hi_fn)); \ } @@ -803,25 +803,25 @@ struct cumulative_args { int ints, floats; }; #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) != REG \ && GET_CODE (XEXP (X, 0)) != CONST_INT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - copy_to_mode_reg (SImode, XEXP (X, 0))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + copy_to_mode_reg (SImode, XEXP (X, 0))); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) != REG \ && GET_CODE (XEXP (X, 1)) != CONST_INT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - copy_to_mode_reg (SImode, XEXP (X, 1))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + copy_to_mode_reg (SImode, XEXP (X, 1))); \ if (GET_CODE (x) == SYMBOL_REF) \ (X) = copy_to_reg (X); \ if (GET_CODE (x) == CONST) \ diff --git a/gcc/config/i860/i860.md b/gcc/config/i860/i860.md index b5649f59e49..bc91febacac 100644 --- a/gcc/config/i860/i860.md +++ b/gcc/config/i860/i860.md @@ -1,5 +1,5 @@ ;;- Machine description for Intel 860 chip for GNU C compiler -;; Copyright (C) 1989, 1990, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1989, 1990, 1997, 1998 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -88,8 +88,7 @@ int pos = 8 - width - INTVAL (operands[1]); CC_STATUS_PARTIAL_INIT; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - ~((-1) << width) << pos); + operands[2] = GEN_INT (~((-1) << width) << pos); return \"and %2,%0,%?r0\"; }") @@ -136,7 +135,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"adds %1,%0,%?r0\"; } }") @@ -153,7 +152,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[0] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[0])); + operands[0] = GEN_INT (- INTVAL (operands[0])); return \"adds %0,%1,%?r0\"; } }") @@ -171,7 +170,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[0] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[0])); + operands[0] = GEN_INT (- INTVAL (operands[0])); return \"adds %0,%1,%?r0\"; } }") @@ -189,7 +188,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"adds %1,%0,%?r0\"; } }") @@ -228,7 +227,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"addu %1,%0,%?r0\"; } } @@ -250,7 +249,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[0] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[0])); + operands[0] = GEN_INT (- INTVAL (operands[0])); return \"addu %0,%1,%?r0\"; } } @@ -1528,8 +1527,7 @@ "* { CC_STATUS_PARTIAL_INIT; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (INTVAL (operands[2]) << INTVAL (operands[1]))); + operands[2] = GEN_INT (INTVAL (operands[2]) << INTVAL (operands[1])); return \"and %2,%0,%?r0\"; }") @@ -1544,8 +1542,7 @@ "* { CC_STATUS_PARTIAL_INIT; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (INTVAL (operands[2]) << INTVAL (operands[1]))); + operands[2] = GEN_INT (INTVAL (operands[2]) << INTVAL (operands[1])); return \"and %2,%0,%?r0\"; }") @@ -1682,7 +1679,7 @@ CC_STATUS_PARTIAL_INIT; if (REG_P (operands[2])) return \"subu %1,%2,%0\"; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2])); + operands[2] = GEN_INT (- INTVAL (operands[2])); return \"addu %2,%1,%0\"; }") @@ -1769,16 +1766,15 @@ return \"and %2,%1,%0\"; if ((INTVAL (operands[2]) & 0xffff) == 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[2]) >> 16); + operands[2] + = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"andh %2,%1,%0\"; } xop[0] = operands[0]; xop[1] = operands[1]; - xop[2] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (operands[2]) & 0xffff); + xop[2] = GEN_INT (~INTVAL (operands[2]) & 0xffff); output_asm_insn (\"andnot %2,%1,%0\", xop); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - ~(unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT (~(unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"andnoth %2,%0,%0\"; }") @@ -1796,16 +1792,15 @@ return \"andnot %1,%2,%0\"; if ((INTVAL (operands[1]) & 0xffff) == 0) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[1]) >> 16); + operands[1] + = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[1]) >> 16); return \"andnoth %1,%2,%0\"; } xop[0] = operands[0]; - xop[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) & 0xffff)); + xop[1] = GEN_INT (INTVAL (operands[1]) & 0xffff); xop[2] = operands[2]; output_asm_insn (\"andnot %1,%2,%0\", xop); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[1]) >> 16); + operands[1] = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[1]) >> 16); return \"andnoth %1,%0,%0\"; }") @@ -1823,16 +1818,15 @@ return \"or %2,%1,%0\"; if ((INTVAL (operands[2]) & 0xffff) == 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[2]) >> 16); + operands[2] + = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"orh %2,%1,%0\"; } xop[0] = operands[0]; xop[1] = operands[1]; - xop[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) & 0xffff)); + xop[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); output_asm_insn (\"or %2,%1,%0\", xop); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"orh %2,%0,%0\"; }") @@ -1850,16 +1844,15 @@ return \"xor %2,%1,%0\"; if ((INTVAL (operands[2]) & 0xffff) == 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[2]) >> 16); + operands[2] + = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"xorh %2,%1,%0\"; } xop[0] = operands[0]; xop[1] = operands[1]; - xop[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) & 0xffff)); + xop[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); output_asm_insn (\"xor %2,%1,%0\", xop); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"xorh %2,%0,%0\"; }") @@ -2128,7 +2121,7 @@ fmul.ss %1,%0,%4\;fmul.ss %3,%4,%0\"; if (INTVAL (operands[1]) > 0) { emit_move_insn (arg_pointer_rtx, stack_pointer_rtx); - emit_insn (gen_rtx (USE, VOIDmode, arg_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, arg_pointer_rtx)); } }") @@ -2196,7 +2189,7 @@ fmul.ss %1,%0,%4\;fmul.ss %3,%4,%0\"; if (INTVAL (operands[2]) > 0) { emit_move_insn (arg_pointer_rtx, stack_pointer_rtx); - emit_insn (gen_rtx (USE, VOIDmode, arg_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, arg_pointer_rtx)); } }") diff --git a/gcc/config/i960/i960.c b/gcc/config/i960/i960.c index 902ed0bbb01..490884807f3 100644 --- a/gcc/config/i960/i960.c +++ b/gcc/config/i960/i960.c @@ -22,7 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -509,9 +509,9 @@ gen_compare_reg (code, x, y) y = force_reg (SImode, y); } - cc_reg = gen_rtx (REG, ccmode, 36); - emit_insn (gen_rtx (SET, VOIDmode, cc_reg, - gen_rtx (COMPARE, ccmode, x, y))); + cc_reg = gen_rtx_REG (ccmode, 36); + emit_insn (gen_rtx_SET (VOIDmode, cc_reg, + gen_rtx_COMPARE (ccmode, x, y))); return cc_reg; } @@ -600,12 +600,12 @@ emit_move_sequence (operands, mode) && REGNO (operands[1]) < FIRST_PSEUDO_REGISTER && ! HARD_REGNO_MODE_OK (REGNO (operands[1]), mode)) { - emit_insn (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, - gen_rtx (SET, VOIDmode, - operands[0], operands[1]), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, Pmode))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_SET (VOIDmode, operands[0], operands[1]), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (Pmode))))); return 1; } @@ -656,8 +656,8 @@ i960_output_move_double (dst, src) edge conditions. */ operands[0] = dst; operands[1] = src; - operands[2] = gen_rtx (REG, Pmode, REGNO (dst) + 1); - operands[3] = gen_rtx (MEM, word_mode, operands[2]); + operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 1); + operands[3] = gen_rtx_MEM (word_mode, operands[2]); operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD); output_asm_insn ("lda %1,%2\n\tld %3,%0\n\tld %4,%D0", operands); return ""; @@ -725,8 +725,8 @@ i960_output_move_quad (dst, src) edge conditions. */ operands[0] = dst; operands[1] = src; - operands[2] = gen_rtx (REG, Pmode, REGNO (dst) + 3); - operands[3] = gen_rtx (MEM, word_mode, operands[2]); + operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 3); + operands[3] = gen_rtx_MEM (word_mode, operands[2]); operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD); operands[5] = adj_offsettable_operand (operands[4], UNITS_PER_WORD); operands[6] = adj_offsettable_operand (operands[5], UNITS_PER_WORD); @@ -789,7 +789,7 @@ i960_output_ldconst (dst, src) for (i = 0; i < 3; i++) { - operands[0] = gen_rtx (REG, SImode, REGNO (dst) + i); + operands[0] = gen_rtx_REG (SImode, REGNO (dst) + i); operands[1] = GEN_INT (value_long[i]); output_asm_insn (i960_output_ldconst (operands[0], operands[1]), operands); @@ -808,11 +808,11 @@ i960_output_ldconst (dst, src) output_asm_insn ("# ldconst %1,%0",operands); - operands[0] = gen_rtx (REG, SImode, REGNO (dst)); + operands[0] = gen_rtx_REG (SImode, REGNO (dst)); operands[1] = first; output_asm_insn (i960_output_ldconst (operands[0], operands[1]), operands); - operands[0] = gen_rtx (REG, SImode, REGNO (dst) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (dst) + 1); operands[1] = second; output_asm_insn (i960_output_ldconst (operands[0], operands[1]), operands); @@ -827,8 +827,8 @@ i960_output_ldconst (dst, src) REAL_VALUE_TO_TARGET_SINGLE (d, value); output_asm_insn ("# ldconst %1,%0",operands); - operands[0] = gen_rtx (REG, SImode, REGNO (dst)); - operands[1] = gen_rtx (CONST_INT, VOIDmode, value); + operands[0] = gen_rtx_REG (SImode, REGNO (dst)); + operands[1] = GEN_INT (value); output_asm_insn (i960_output_ldconst (operands[0], operands[1]), operands); return ""; @@ -863,7 +863,7 @@ i960_output_ldconst (dst, src) return "movl %1,%0"; /* Output the upper half with a recursive call. */ - xoperands[0] = gen_rtx (REG, SImode, REGNO (dst) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (dst) + 1); xoperands[1] = upperhalf; output_asm_insn (i960_output_ldconst (xoperands[0], xoperands[1]), xoperands); @@ -899,7 +899,7 @@ i960_output_ldconst (dst, src) { if (i960_last_insn_type == I_TYPE_REG && TARGET_C_SERIES) return "lda %1,%0"; - operands[1] = gen_rtx (CONST_INT, VOIDmode, rsrc1 - 31); + operands[1] = GEN_INT (rsrc1 - 31); output_asm_insn ("addo\t31,%1,%0\t# ldconst %3,%0", operands); return ""; } @@ -910,7 +910,7 @@ i960_output_ldconst (dst, src) if (rsrc1 >= -31) { /* return 'sub -(%1),0,%0' */ - operands[1] = gen_rtx (CONST_INT, VOIDmode, - rsrc1); + operands[1] = GEN_INT (- rsrc1); output_asm_insn ("subo\t%1,0,%0\t# ldconst %3,%0", operands); return ""; } @@ -918,7 +918,7 @@ i960_output_ldconst (dst, src) /* ldconst -32 -> not 31,X */ if (rsrc1 == -32) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, ~rsrc1); + operands[1] = GEN_INT (~rsrc1); output_asm_insn ("not\t%1,%0 # ldconst %3,%0", operands); return ""; } @@ -927,7 +927,7 @@ i960_output_ldconst (dst, src) /* If const is a single bit. */ if (bitpos (rsrc1) >= 0) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, bitpos (rsrc1)); + operands[1] = GEN_INT (bitpos (rsrc1)); output_asm_insn ("setbit\t%1,0,%0\t# ldconst %3,%0", operands); return ""; } @@ -940,8 +940,8 @@ i960_output_ldconst (dst, src) if (bitstr (rsrc1, &s, &e) < 6) { rsrc2 = ((unsigned int) rsrc1) >> s; - operands[1] = gen_rtx (CONST_INT, VOIDmode, rsrc2); - operands[2] = gen_rtx (CONST_INT, VOIDmode, s); + operands[1] = GEN_INT (rsrc2); + operands[2] = GEN_INT (s); output_asm_insn ("shlo\t%2,%1,%0\t# ldconst %3,%0", operands); return ""; } @@ -2008,9 +2008,9 @@ legitimize_address (x, oldx, mode) similar optimizations. */ if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == MULT && GET_CODE (XEXP (x, 1)) == PLUS) - x = gen_rtx (PLUS, Pmode, - gen_rtx (PLUS, Pmode, XEXP (x, 0), XEXP (XEXP (x, 1), 0)), - XEXP (XEXP (x, 1), 1)); + x = gen_rtx_PLUS (Pmode, + gen_rtx_PLUS (Pmode, XEXP (x, 0), XEXP (XEXP (x, 1), 0)), + XEXP (XEXP (x, 1), 1)); /* Canonicalize (plus (plus (mult (reg) (const)) (plus (reg) (const))) const) into (plus (plus (mult (reg) (const)) (reg)) (const)). */ @@ -2035,10 +2035,10 @@ legitimize_address (x, oldx, mode) constant = 0; if (constant) - x = gen_rtx (PLUS, Pmode, - gen_rtx (PLUS, Pmode, XEXP (XEXP (x, 0), 0), - XEXP (XEXP (XEXP (x, 0), 1), 0)), - plus_constant (other, INTVAL (constant))); + x = gen_rtx_PLUS (Pmode, + gen_rtx_PLUS (Pmode, XEXP (XEXP (x, 0), 0), + XEXP (XEXP (XEXP (x, 0), 1), 0)), + plus_constant (other, INTVAL (constant))); } return x; @@ -2330,7 +2330,7 @@ i960_function_arg (cum, mode, type, named) else { cum->ca_nregparms = ROUND_PARM (cum->ca_nregparms, align); - ret = gen_rtx (REG, mode, cum->ca_nregparms); + ret = gen_rtx_REG (mode, cum->ca_nregparms); } return ret; @@ -2462,17 +2462,17 @@ i960_setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) va_start assumes it. */ emit_insn (gen_cmpsi (arg_pointer_rtx, const0_rtx)); emit_jump_insn (gen_bne (label)); - emit_insn (gen_rtx (SET, VOIDmode, arg_pointer_rtx, - stack_pointer_rtx)); - emit_insn (gen_rtx (SET, VOIDmode, stack_pointer_rtx, - memory_address (SImode, - plus_constant (stack_pointer_rtx, - 48)))); + emit_insn (gen_rtx_SET (VOIDmode, arg_pointer_rtx, + stack_pointer_rtx)); + emit_insn (gen_rtx_SET (VOIDmode, stack_pointer_rtx, + memory_address (SImode, + plus_constant (stack_pointer_rtx, + 48)))); emit_label (label); /* ??? Note that we unnecessarily store one extra register for stdarg fns. We could optimize this, but it's kept as for now. */ - regblock = gen_rtx (MEM, BLKmode, + regblock = gen_rtx_MEM (BLKmode, plus_constant (arg_pointer_rtx, first_reg * 4)); move_block_from_reg (first_reg, regblock, diff --git a/gcc/config/i960/i960.h b/gcc/config/i960/i960.h index bd4330db514..c3076d31b5d 100644 --- a/gcc/config/i960/i960.h +++ b/gcc/config/i960/i960.h @@ -755,7 +755,7 @@ enum reg_class { NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx ((REG), (MODE), 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG ((MODE), 0) /* 1 if N is a possible register number for a function value as seen by the caller. @@ -859,7 +859,7 @@ extern struct rtx_def *i960_function_arg (); otherwise, FUNC is 0. */ #define FUNCTION_VALUE(TYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (TYPE), 0) + gen_rtx_REG (TYPE_MODE (TYPE), 0) /* Force aggregates and objects larger than 16 bytes to be returned in memory, since we only have 4 registers available for return values. */ @@ -1469,11 +1469,11 @@ extern struct rtx_def *gen_compare_reg (); #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x8C203000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x8C183000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x84212000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x8C203000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x8C183000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x84212000)); \ } /* Length in units of the trampoline for entering a nested function. */ @@ -1486,10 +1486,8 @@ extern struct rtx_def *gen_compare_reg (); #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), \ - FNADDR); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), \ - CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \ } /* Generate RTL to flush the register windows so as to make arbitrary frames diff --git a/gcc/config/i960/i960.md b/gcc/config/i960/i960.md index 6cd13dbd9f2..b86205b6908 100644 --- a/gcc/config/i960/i960.md +++ b/gcc/config/i960/i960.md @@ -876,7 +876,7 @@ if (which_alternative == 0) return i960_output_move_double (operands[0], operands[1]); - operands[3] = gen_rtx (MEM, word_mode, operands[2]); + operands[3] = gen_rtx_MEM (word_mode, operands[2]); operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD); return \"lda %0,%2\;st %1,%3\;st %D1,%4\"; }" @@ -958,7 +958,7 @@ if (which_alternative == 0) return i960_output_move_quad (operands[0], operands[1]); - operands[3] = gen_rtx (MEM, word_mode, operands[2]); + operands[3] = gen_rtx_MEM (word_mode, operands[2]); operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD); operands[5] = adj_offsettable_operand (operands[4], UNITS_PER_WORD); operands[6] = adj_offsettable_operand (operands[5], UNITS_PER_WORD); @@ -991,27 +991,27 @@ from = memory_address (SImode, XEXP (operands[0], 0)); while (count >= 4 && ((regno & 3) == 0)) { - emit_insn (gen_rtx (SET, VOIDmode, - gen_rtx (MEM, TImode, from), - gen_rtx (REG, TImode, regno))); + emit_insn (gen_rtx_SET (VOIDmode, + gen_rtx_MEM (TImode, from), + gen_rtx_REG (TImode, regno))); count -= 4; regno += 4; from = memory_address (TImode, plus_constant (from, 16)); } while (count >= 2 && ((regno & 1) == 0)) { - emit_insn (gen_rtx (SET, VOIDmode, - gen_rtx (MEM, DImode, from), - gen_rtx (REG, DImode, regno))); + emit_insn (gen_rtx_SET (VOIDmode, + gen_rtx_MEM (DImode, from), + gen_rtx_REG (DImode, regno))); count -= 2; regno += 2; from = memory_address (DImode, plus_constant (from, 8)); } while (count > 0) { - emit_insn (gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, from), - gen_rtx (REG, SImode, regno))); + emit_insn (gen_rtx_SET (VOIDmode, + gen_rtx_MEM (SImode, from), + gen_rtx_REG (SImode, regno))); count -= 1; regno += 1; from = memory_address (SImode, plus_constant (from, 4)); @@ -1185,7 +1185,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_16 = gen_rtx (CONST_INT, VOIDmode, 16); + rtx shift_16 = GEN_INT (16); int op1_subreg_word = 0; if (GET_CODE (operand1) == SUBREG) @@ -1193,7 +1193,7 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); + operand1 = gen_rtx_SUBREG (SImode, operand1, op1_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_16)); emit_insn (gen_ashrsi3 (operand0, temp, shift_16)); @@ -1219,7 +1219,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op1_subreg_word = 0; if (GET_CODE (operand1) == SUBREG) @@ -1227,7 +1227,7 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word), + operand1 = gen_rtx_SUBREG (SImode, operand1, op1_subreg_word), emit_insn (gen_ashlsi3 (temp, operand1, shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); @@ -1254,7 +1254,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op0_subreg_word = 0; int op1_subreg_word = 0; @@ -1263,7 +1263,7 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); + operand1 = gen_rtx_SUBREG (SImode, operand1, op1_subreg_word); if (GET_CODE (operand0) == SUBREG) { @@ -1271,7 +1271,7 @@ operand0 = SUBREG_REG (operand0); } if (GET_MODE (operand0) != SImode) - operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subreg_word); + operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); @@ -1298,7 +1298,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_16 = gen_rtx (CONST_INT, VOIDmode, 16); + rtx shift_16 = GEN_INT (16); int op1_subreg_word = 0; if (GET_CODE (operand1) == SUBREG) @@ -1306,7 +1306,7 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); + operand1 = gen_rtx_SUBREG (SImode, operand1, op1_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_16)); emit_insn (gen_lshrsi3 (operand0, temp, shift_16)); @@ -1337,7 +1337,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op1_subreg_word = 0; if (GET_CODE (operand1) == SUBREG) @@ -1345,7 +1345,7 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); + operand1 = gen_rtx_SUBREG (SImode, operand1, op1_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_24)); emit_insn (gen_lshrsi3 (operand0, temp, shift_24)); @@ -1372,7 +1372,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op0_subreg_word = 0; int op1_subreg_word = 0; @@ -1381,7 +1381,7 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); + operand1 = gen_rtx_SUBREG (SImode, operand1, op1_subreg_word); if (GET_CODE (operand0) == SUBREG) { @@ -1389,7 +1389,7 @@ operand0 = SUBREG_REG (operand0); } if (GET_MODE (operand0) != SImode) - operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subreg_word); + operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_24)); emit_insn (gen_lshrsi3 (operand0, temp, shift_24)); @@ -1472,11 +1472,12 @@ " { rtx temp = gen_reg_rtx (DImode); - emit_insn (gen_rtx (SET, VOIDmode, temp, - gen_rtx (UNSIGNED_FIX, DImode, - gen_rtx (FIX, DFmode, operands[1])))); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (SUBREG, SImode, temp, 0))); + emit_insn (gen_rtx_SET (VOIDmode, temp, + gen_rtx_UNSIGNED_FIX (DImode, + gen_rtx_FIX (DFmode, + operands[1])))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_SUBREG (SImode, temp, 0))); DONE; }") @@ -1494,11 +1495,12 @@ " { rtx temp = gen_reg_rtx (DImode); - emit_insn (gen_rtx (SET, VOIDmode, temp, - gen_rtx (UNSIGNED_FIX, DImode, - gen_rtx (FIX, SFmode, operands[1])))); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (SUBREG, SImode, temp, 0))); + emit_insn (gen_rtx_SET (VOIDmode, temp, + gen_rtx_UNSIGNED_FIX (DImode, + gen_rtx_FIX (SFmode, + operands[1])))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_SUBREG (SImode, temp, 0))); DONE; }") @@ -1626,7 +1628,7 @@ ;; (match_operand:SI 2 "power2_operand" "nI")))] ;; "" ;; "*{ -;; operands[2] = gen_rtx(CONST_INT, VOIDmode,bitpos (INTVAL (operands[2]))); +;; operands[2] = GEN_INT (bitpos (INTVAL (operands[2]))); ;; return \"shrdi %2,%1,%0\"; ;; }" @@ -1688,8 +1690,7 @@ "" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - bitpos (~INTVAL (operands[2]))); + operands[2] = GEN_INT (bitpos (~INTVAL (operands[2]))); return \"clrbit %2,%1,%0\"; }") @@ -1740,8 +1741,7 @@ "" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - bitpos (INTVAL (operands[2]))); + operands[2] = GEN_INT (bitpos (INTVAL (operands[2]))); return \"setbit %2,%1,%0\"; }") @@ -1792,8 +1792,7 @@ "" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - bitpos (INTVAL (operands[2]))); + operands[2] = GEN_INT (bitpos (INTVAL (operands[2]))); return \"notbit %2,%1,%0\"; }") @@ -2342,22 +2341,18 @@ saved $rip value on the stack. Once we ret below, that value will be loaded into the pc (IP). */ - emit_move_insn (gen_rtx (MEM, SImode, - plus_constant (fp, 8)), - new_pc); + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (fp, 8)), new_pc); /* Next, we put the value into the static chain register's save area on the stack. After the ret below, this will be loaded into r3 (the static chain). */ - emit_move_insn (gen_rtx (MEM, SImode, - plus_constant (fp, 12)), - val); + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (fp, 12)), val); /* We now load pfp (the previous frame pointer) with the value that we want fp to be. */ - emit_move_insn (gen_rtx (REG, SImode, 16), fp); + emit_move_insn (gen_rtx_REG (SImode, 16), fp); /* And finally, we can now just ret to get all the values saved above into all the right registers, and also, all the local diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index 48504a06e14..0684dc15bc3 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on the Mitsubishi M32R cpu. - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -19,7 +19,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "tree.h" #include "rtl.h" #include "regs.h" @@ -941,7 +941,7 @@ gen_compare (code, x, y) { enum machine_mode mode = SELECT_CC_MODE (code, x, y); enum rtx_code compare_code, branch_code; - rtx cc_reg = gen_rtx (REG, mode, CARRY_REGNUM); + rtx cc_reg = gen_rtx_REG (mode, CARRY_REGNUM); int swap_p = 0; switch (code) @@ -1077,9 +1077,9 @@ m32r_setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) int size = M32R_MAX_PARM_REGS - first_reg_offset; rtx regblock; - regblock = gen_rtx (MEM, BLKmode, - plus_constant (arg_pointer_rtx, - FIRST_PARM_OFFSET (0))); + regblock = gen_rtx_MEM (BLKmode, + plus_constant (arg_pointer_rtx, + FIRST_PARM_OFFSET (0))); move_block_from_reg (first_reg_offset, regblock, size, size * UNITS_PER_WORD); diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h index c0df171dcfe..7019f45a794 100644 --- a/gcc/config/m32r/m32r.h +++ b/gcc/config/m32r/m32r.h @@ -678,10 +678,12 @@ M32R_STACK_ALIGN (current_function_outgoing_args_size) /* The current return address is in r14. */ #if 0 /* The default value should work. */ #define RETURN_ADDR_RTX(COUNT, FRAME) \ -(((COUNT) == -1) \ - ? gen_rtx (REG, Pmode, 14) \ - : copy_to_reg (gen_rtx (MEM, Pmode, \ - memory_address (Pmode, plus_constant ((FRAME), UNITS_PER_WORD))))) +(((COUNT) == -1) \ + ? gen_rtx_REG (Pmode, 14) \ + : copy_to_reg (gen_rtx_MEM (Pmode, \ + memory_address (Pmode, \ + plus_constant ((FRAME), \ + UNITS_PER_WORD))))) #endif /* Register to use for pushing function arguments. */ @@ -883,14 +885,14 @@ M32R_STACK_ALIGN (current_function_outgoing_args_size) and the rest are pushed. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \ - ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ + ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ : 0) /* ??? Quick hack to try to get varargs working the normal way. */ #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ (((! current_function_varargs || (NAMED)) \ && PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED))) \ - ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ + ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ : 0) /* A C expression for the number of words, at the beginning of an @@ -988,11 +990,11 @@ m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL) VALTYPE is the data type of the value (as a tree). If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */ -#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0) +#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value as seen by the caller. */ @@ -1072,13 +1074,13 @@ m32r_output_function_epilogue (FILE, SIZE) CXT is an RTX for the static chain value for the function. */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ do { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 0)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \ plus_constant ((CXT), 0xe7000000)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \ plus_constant ((FNADDR), 0xe6000000)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \ GEN_INT (0x1fc67000)); \ - emit_insn (gen_flush_icache (validize_mem (gen_rtx (MEM, SImode, TRAMP)))); \ + emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \ } while (0) /* Library calls. */ diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md index 4c8b2e54ffb..43baf114857 100644 --- a/gcc/config/m32r/m32r.md +++ b/gcc/config/m32r/m32r.md @@ -1,5 +1,5 @@ ;; Machine description of the Mitsubishi M32R cpu for GNU C compiler -;; Copyright (C) 1996, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -340,7 +340,8 @@ rtx mem = force_const_mem (DImode, operands[1]); rtx reg = ((reload_in_progress || reload_completed) ? copy_to_suggested_reg (XEXP (mem, 0), - gen_rtx (REG, Pmode, REGNO (operands[0])), + gen_rtx_REG (Pmode, + REGNO (operands[0])), Pmode) : force_reg (Pmode, XEXP (mem, 0))); operands[1] = change_address (mem, DImode, reg); @@ -408,8 +409,8 @@ (set (match_dup 3) (match_dup 5))] " { - operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); - operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); + operands[2] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN == 0); + operands[3] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN != 0); split_double (operands[1], operands + 4, operands + 5); }") @@ -477,7 +478,8 @@ rtx mem = force_const_mem (DFmode, operands[1]); rtx reg = ((reload_in_progress || reload_completed) ? copy_to_suggested_reg (XEXP (mem, 0), - gen_rtx (REG, Pmode, REGNO (operands[0])), + gen_rtx_REG (Pmode, + REGNO (operands[0])), Pmode) : force_reg (Pmode, XEXP (mem, 0))); operands[1] = change_address (mem, DFmode, reg); @@ -598,7 +600,7 @@ " { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op1_subword = 0; int op0_subword = 0; @@ -612,11 +614,11 @@ op0_subword = SUBREG_WORD (operand0); operand0 = XEXP (operand0, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, + op1_subword), shift_24)); if (GET_MODE (operand0) != SImode) - operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subword); + operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subword); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); DONE; }") @@ -635,7 +637,7 @@ " { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op1_subword = 0; if (GET_CODE (operand1) == SUBREG) @@ -644,8 +646,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); DONE; @@ -665,7 +666,7 @@ " { rtx temp = gen_reg_rtx (SImode); - rtx shift_16 = gen_rtx (CONST_INT, VOIDmode, 16); + rtx shift_16 = GEN_INT (16); int op1_subword = 0; if (GET_CODE (operand1) == SUBREG) @@ -674,8 +675,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_16)); emit_insn (gen_ashrsi3 (operand0, temp, shift_16)); DONE; diff --git a/gcc/config/m68k/a-ux.h b/gcc/config/m68k/a-ux.h index 69ecb537224..2af1b9468cf 100644 --- a/gcc/config/m68k/a-ux.h +++ b/gcc/config/m68k/a-ux.h @@ -116,14 +116,14 @@ crt2.o%s " #undef FUNCTION_VALUE #define FUNCTION_VALUE(VALTYPE, FUNC) \ (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \ : (POINTER_TYPE_P (VALTYPE) \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0))) #undef LIBCALL_VALUE #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), ((TARGET_68881 && \ + gen_rtx_REG ((MODE), ((TARGET_68881 && \ ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0)) /* 1 if N is a possible register number for a function value. @@ -167,9 +167,9 @@ crt2.o%s " #undef FINALIZE_TRAMPOLINE #define FINALIZE_TRAMPOLINE(TRAMP) \ - emit_library_call(gen_rtx(SYMBOL_REF, Pmode, "__clear_cache"), \ - 0, VOIDmode, 2, TRAMP, Pmode, \ - plus_constant(TRAMP, TRAMPOLINE_SIZE), Pmode); + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \ + 0, VOIDmode, 2, TRAMP, Pmode, \ + plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); /* Clear the instruction cache from `beg' to `end'. This makes an inline system call to SYS_sysm68k. The arguments are as follows: diff --git a/gcc/config/m68k/crds.h b/gcc/config/m68k/crds.h index 441b285b4ee..44101c850bd 100644 --- a/gcc/config/m68k/crds.h +++ b/gcc/config/m68k/crds.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler; Charles River Data Systems UNiverse/32. - Copyright (C) 1987, 1993, 1994, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 93, 94, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Gary E. Miller (Gary_Edmunds_Miller@cup.portal.com) This file is part of GNU CC. @@ -79,7 +79,7 @@ Boston, MA 02111-1307, USA. */ #if 0 #define HAVE_probe 1 -#define gen_probe() gen_rtx(ASM_INPUT, VOIDmode, "tstb -2048(sp)\t;probe\n") +#define gen_probe() gen_rtx_ASM_INPUT (VOIDmode, "tstb -2048(sp)\t;probe\n") #else #undef NEED_PROBE #define NEED_PROBE (-2048) @@ -109,7 +109,7 @@ Boston, MA 02111-1307, USA. */ /* unos uses ".comm c.sac" returns &c.sac in d0 */ /* make pointer to c.sac ? #undef STRUCT_VALUE_REGNUM -#define STRUCT_VALUE gen_rtx(MEM, Pmode, gen_rtx( , , ) ) +#define STRUCT_VALUE gen_rtx_MEM (Pmode, gen_rtx( , , ) ) */ #define BSS_SECTION_ASM_OP ".bss" diff --git a/gcc/config/m68k/isi.h b/gcc/config/m68k/isi.h index a458cf9e080..9bce32b5496 100644 --- a/gcc/config/m68k/isi.h +++ b/gcc/config/m68k/isi.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. ISI 68000/68020 version. Intended only for use with GAS, and not ISI's assembler, which is buggy - Copyright (C) 1988, 1996 Free Software Foundation, Inc. + Copyright (C) 1988, 1996, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -74,7 +74,7 @@ Boston, MA 02111-1307, USA. */ #define FUNCTION_VALUE(VALTYPE,FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE)) #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), ((TARGET_68881 && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0)) + gen_rtx_REG ((MODE), ((TARGET_68881 && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0)) /* 1 if N is a possible register number for a function value. D0 may be used, and F0 as well if -m68881 is specified. */ diff --git a/gcc/config/m68k/linux.h b/gcc/config/m68k/linux.h index 9f2399da1e1..e2d01ad9d37 100644 --- a/gcc/config/m68k/linux.h +++ b/gcc/config/m68k/linux.h @@ -1,6 +1,6 @@ /* Definitions for Motorola 68k running Linux-based GNU systems with ELF format. - Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -266,10 +266,10 @@ Boston, MA 02111-1307, USA. */ #undef FUNCTION_VALUE #define FUNCTION_VALUE(VALTYPE, FUNC) \ (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \ : (POINTER_TYPE_P (VALTYPE) \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0))) /* For compatibility with the large body of existing code which does not always properly declare external functions returning pointer @@ -295,8 +295,8 @@ do { \ #define LIBCALL_VALUE(MODE) \ ((((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode) \ && TARGET_68881) \ - ? gen_rtx (REG, (MODE), 16) \ - : gen_rtx (REG, (MODE), 0)) + ? gen_rtx_REG ((MODE), 16) \ + : gen_rtx_REG ((MODE), 0)) /* In m68k svr4, a symbol_ref rtx can be a valid PIC operand if it is an operand of a function call. */ @@ -326,7 +326,7 @@ do { \ #undef FINALIZE_TRAMPOLINE #define FINALIZE_TRAMPOLINE(TRAMP) \ - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__clear_cache"), \ + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \ 0, VOIDmode, 2, TRAMP, Pmode, \ plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); diff --git a/gcc/config/m68k/lynx.h b/gcc/config/m68k/lynx.h index 8c54b8bc13f..2a786127dc6 100644 --- a/gcc/config/m68k/lynx.h +++ b/gcc/config/m68k/lynx.h @@ -1,5 +1,5 @@ /* Definitions for Motorola 680x0 running LynxOS. - Copyright (C) 1993, 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1993, 1994, 1995, 1996, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -62,9 +62,10 @@ Boston, MA 02111-1307, USA. */ #undef LIBCALL_VALUE #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), \ - ((TARGET_68881 \ - && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \ + gen_rtx_REG ((MODE), \ + ((TARGET_68881 \ + && ((MODE) == SFmode || (MODE) == DFmode \ + || (MODE) == XFmode)) \ ? 16 : 0)) #undef FUNCTION_VALUE_REGNO_P diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c index 572ff14a303..111375c73db 100644 --- a/gcc/config/m68k/m68k.c +++ b/gcc/config/m68k/m68k.c @@ -18,10 +18,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -/* Some output-actions in m68k.md need these. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -135,7 +133,7 @@ finalize_pic () { if (flag_pic && current_function_uses_pic_offset_table) { - rtx insn = gen_rtx (USE, VOIDmode, pic_offset_table_rtx); + rtx insn = gen_rtx_USE (VOIDmode, pic_offset_table_rtx); emit_insn_after (insn, get_insns ()); emit_insn (insn); } @@ -1027,14 +1025,14 @@ output_scc_di(op, operand1, operand2, dest) } loperands[0] = operand1; if (GET_CODE (operand1) == REG) - loperands[1] = gen_rtx (REG, SImode, REGNO (operand1) + 1); + loperands[1] = gen_rtx_REG (SImode, REGNO (operand1) + 1); else loperands[1] = adj_offsettable_operand (operand1, 4); if (operand2 != const0_rtx) { loperands[2] = operand2; if (GET_CODE (operand2) == REG) - loperands[3] = gen_rtx (REG, SImode, REGNO (operand2) + 1); + loperands[3] = gen_rtx_REG (SImode, REGNO (operand2) + 1); else loperands[3] = adj_offsettable_operand (operand2, 4); } @@ -1308,9 +1306,9 @@ legitimize_pic_address (orig, mode, reg) if (reg == 0) abort (); - pic_ref = gen_rtx (MEM, Pmode, - gen_rtx (PLUS, Pmode, - pic_offset_table_rtx, orig)); + pic_ref = gen_rtx_MEM (Pmode, + gen_rtx_PLUS (Pmode, + pic_offset_table_rtx, orig)); current_function_uses_pic_offset_table = 1; if (reload_in_progress) regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; @@ -1341,7 +1339,7 @@ legitimize_pic_address (orig, mode, reg) if (GET_CODE (orig) == CONST_INT) return plus_constant_for_output (base, INTVAL (orig)); - pic_ref = gen_rtx (PLUS, Pmode, base, orig); + pic_ref = gen_rtx_PLUS (Pmode, base, orig); /* Likewise, should we set special REG_NOTEs here? */ } return pic_ref; @@ -1423,14 +1421,14 @@ output_move_const_into_data_reg (operands) return "moveq %1,%0"; #endif case NOTB : - operands[1] = gen_rtx (CONST_INT, VOIDmode, i ^ 0xff); + operands[1] = GEN_INT (i ^ 0xff); #if defined (MOTOROLA) && !defined (CRDS) return "moveq%.l %1,%0\n\tnot%.b %0"; #else return "moveq %1,%0\n\tnot%.b %0"; #endif case NOTW : - operands[1] = gen_rtx (CONST_INT, VOIDmode, i ^ 0xffff); + operands[1] = GEN_INT (i ^ 0xffff); #if defined (MOTOROLA) && !defined (CRDS) return "moveq%.l %1,%0\n\tnot%.w %0"; #else @@ -1446,7 +1444,7 @@ output_move_const_into_data_reg (operands) { unsigned u = i; - operands[1] = gen_rtx (CONST_INT, VOIDmode, (u << 16) | (u >> 16)); + operands[1] = GEN_INT ((u << 16) | (u >> 16)); #if defined (MOTOROLA) && !defined (CRDS) return "moveq%.l %1,%0\n\tswap %0"; #else @@ -1595,8 +1593,8 @@ output_move_qimode (operands) { xoperands[1] = operands[1]; xoperands[2] - = gen_rtx (MEM, QImode, - gen_rtx (PLUS, VOIDmode, stack_pointer_rtx, const1_rtx)); + = gen_rtx_MEM (QImode, + gen_rtx_PLUS (VOIDmode, stack_pointer_rtx, const1_rtx)); /* Just pushing a byte puts it in the high byte of the halfword. */ /* We must put it in the low-order, high-numbered byte. */ if (!reg_mentioned_p (stack_pointer_rtx, operands[1])) @@ -1765,11 +1763,11 @@ output_move_double (operands) else output_asm_insn ("subq%.l %#8,%0", operands); if (GET_MODE (operands[1]) == XFmode) - operands[0] = gen_rtx (MEM, XFmode, operands[0]); + operands[0] = gen_rtx_MEM (XFmode, operands[0]); else if (GET_MODE (operands[0]) == DFmode) - operands[0] = gen_rtx (MEM, DFmode, operands[0]); + operands[0] = gen_rtx_MEM (DFmode, operands[0]); else - operands[0] = gen_rtx (MEM, DImode, operands[0]); + operands[0] = gen_rtx_MEM (DImode, operands[0]); optype0 = OFFSOP; } if (optype0 == POPOP && optype1 == PUSHOP) @@ -1780,11 +1778,11 @@ output_move_double (operands) else output_asm_insn ("subq%.l %#8,%1", operands); if (GET_MODE (operands[1]) == XFmode) - operands[1] = gen_rtx (MEM, XFmode, operands[1]); + operands[1] = gen_rtx_MEM (XFmode, operands[1]); else if (GET_MODE (operands[1]) == DFmode) - operands[1] = gen_rtx (MEM, DFmode, operands[1]); + operands[1] = gen_rtx_MEM (DFmode, operands[1]); else - operands[1] = gen_rtx (MEM, DImode, operands[1]); + operands[1] = gen_rtx_MEM (DImode, operands[1]); optype1 = OFFSOP; } @@ -1810,8 +1808,8 @@ output_move_double (operands) { if (optype0 == REGOP) { - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2); - middlehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2); + middlehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); } else if (optype0 == OFFSOP) { @@ -1826,8 +1824,8 @@ output_move_double (operands) if (optype1 == REGOP) { - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2); - middlehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2); + middlehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); } else if (optype1 == OFFSOP) { @@ -1868,14 +1866,14 @@ output_move_double (operands) /* size is not 12: */ { if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], size - 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], size - 4); else if (optype1 == CNSTOP) @@ -1900,7 +1898,7 @@ output_move_double (operands) if (optype0 == REGOP && (optype1 == OFFSOP || optype1 == MEMOP)) { - rtx testlow = gen_rtx (REG, SImode, REGNO (operands[0])); + rtx testlow = gen_rtx_REG (SImode, REGNO (operands[0])); if (reg_overlap_mentioned_p (testlow, XEXP (operands[1], 0)) && reg_overlap_mentioned_p (latehalf[0], XEXP (operands[1], 0))) @@ -1914,13 +1912,13 @@ compadr: output_asm_insn ("lea %a1,%0", xops); if( GET_MODE (operands[1]) == XFmode ) { - operands[1] = gen_rtx (MEM, XFmode, latehalf[0]); + operands[1] = gen_rtx_MEM (XFmode, latehalf[0]); middlehalf[1] = adj_offsettable_operand (operands[1], size-8); latehalf[1] = adj_offsettable_operand (operands[1], size-4); } else { - operands[1] = gen_rtx (MEM, DImode, latehalf[0]); + operands[1] = gen_rtx_MEM (DImode, latehalf[0]); latehalf[1] = adj_offsettable_operand (operands[1], size-4); } } @@ -2123,8 +2121,7 @@ output_addsi3 (operands) if (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) >= -8) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - - INTVAL (operands[2])); + operands[2] = GEN_INT (- INTVAL (operands[2])); return "subq%.l %2,%0"; } /* On the CPU32 it is faster to use two addql instructions to @@ -2135,15 +2132,13 @@ output_addsi3 (operands) if (INTVAL (operands[2]) > 8 && INTVAL (operands[2]) <= 16) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) - 8); + operands[2] = GEN_INT (INTVAL (operands[2]) - 8); return "addq%.l %#8,%0\n\taddq%.l %2,%0"; } if (INTVAL (operands[2]) < -8 && INTVAL (operands[2]) >= -16) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - - INTVAL (operands[2]) - 8); + operands[2] = GEN_INT (- INTVAL (operands[2]) - 8); return "subq%.l %#8,%0\n\tsubq%.l %2,%0"; } } @@ -3255,8 +3250,7 @@ output_andsi3 (operands) { if (GET_CODE (operands[0]) != REG) operands[0] = adj_offsettable_operand (operands[0], 2); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* Do not delete a following tstl %0 insn; that would be incorrect. */ CC_STATUS_INIT; if (operands[2] == const0_rtx) @@ -3270,12 +3264,12 @@ output_andsi3 (operands) { if (DATA_REG_P (operands[0])) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, logval); + operands[1] = GEN_INT (logval); } else { operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8)); - operands[1] = gen_rtx (CONST_INT, VOIDmode, logval % 8); + operands[1] = GEN_INT (logval % 8); } /* This does not set condition codes in a standard way. */ CC_STATUS_INIT; @@ -3310,12 +3304,12 @@ output_iorsi3 (operands) { if (DATA_REG_P (operands[0])) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, logval); + operands[1] = GEN_INT (logval); } else { operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8)); - operands[1] = gen_rtx (CONST_INT, VOIDmode, logval % 8); + operands[1] = GEN_INT (logval % 8); } CC_STATUS_INIT; return "bset %1,%0"; @@ -3348,12 +3342,12 @@ output_xorsi3 (operands) { if (DATA_REG_P (operands[0])) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, logval); + operands[1] = GEN_INT (logval); } else { operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8)); - operands[1] = gen_rtx (CONST_INT, VOIDmode, logval % 8); + operands[1] = GEN_INT (logval % 8); } CC_STATUS_INIT; return "bchg %1,%0"; diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index 1ede7cf453d..7782c73f40b 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -887,14 +887,14 @@ extern enum reg_class regno_reg_class[]; /* On the 68000 the return value is in D0 regardless. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* On the 68000 the return value is in D0 regardless. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value. On the 68000, d0 is the only register thus used. */ @@ -964,7 +964,7 @@ extern enum reg_class regno_reg_class[]; It exists only to test register calling conventions. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ -((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) +((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0) /* For an arg passed partly in registers and partly in memory, this is the number of registers used. @@ -1234,11 +1234,11 @@ while(0) #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, HImode, TRAMP), GEN_INT(0x207C)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), CXT); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 6)), \ + emit_move_insn (gen_rtx_MEM (HImode, TRAMP), GEN_INT(0x207C)); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 2)), CXT); \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 6)), \ GEN_INT(0x4EF9)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), FNADDR); \ FINALIZE_TRAMPOLINE(TRAMP); \ } @@ -1798,7 +1798,7 @@ __transfer_from_trampoline () \ /* Before the prologue, RA is at 0(%sp). */ #define INCOMING_RETURN_ADDR_RTX \ - gen_rtx (MEM, VOIDmode, gen_rtx (REG, VOIDmode, STACK_POINTER_REGNUM)) + gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) /* We must not use the DBX register numbers for the DWARF 2 CFA column numbers because that maps to numbers beyond FIRST_PSEUDO_REGISTER. diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 7b9d3860594..5424f53e46f 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -813,7 +813,7 @@ "(unsigned) INTVAL (operands[1]) < 8 && !TARGET_5200" "* { - operands[1] = gen_rtx (CONST_INT, VOIDmode, 7 - INTVAL (operands[1])); + operands[1] = GEN_INT (7 - INTVAL (operands[1])); return output_btst (operands, operands[1], operands[0], insn, 7); }") @@ -828,12 +828,10 @@ { operands[0] = adj_offsettable_operand (operands[0], INTVAL (operands[1]) / 8); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - 7 - INTVAL (operands[1]) % 8); + operands[1] = GEN_INT (7 - INTVAL (operands[1]) % 8); return output_btst (operands, operands[1], operands[0], insn, 7); } - operands[1] = gen_rtx (CONST_INT, VOIDmode, - 31 - INTVAL (operands[1])); + operands[1] = GEN_INT (31 - INTVAL (operands[1])); return output_btst (operands, operands[1], operands[0], insn, 31); }") @@ -851,12 +849,10 @@ { operands[0] = adj_offsettable_operand (operands[0], INTVAL (operands[1]) / 8); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - 7 - INTVAL (operands[1]) % 8); + operands[1] = GEN_INT (7 - INTVAL (operands[1]) % 8); return output_btst (operands, operands[1], operands[0], insn, 7); } - operands[1] = gen_rtx (CONST_INT, VOIDmode, - 31 - INTVAL (operands[1])); + operands[1] = GEN_INT (31 - INTVAL (operands[1])); return output_btst (operands, operands[1], operands[0], insn, 31); }") @@ -1182,7 +1178,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"move%.l %1,%-\", xoperands); output_asm_insn (\"move%.l %1,%-\", operands); return \"f%&move%.d %+,%0\"; @@ -1196,7 +1192,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmove%.d %f1,%-\;move%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"move%.l %+,%0\"; } else @@ -1240,9 +1236,9 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2); output_asm_insn (\"move%.l %1,%-\", xoperands); - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"move%.l %1,%-\", xoperands); output_asm_insn (\"move%.l %1,%-\", operands); return \"fmove%.x %+,%0\"; @@ -1254,9 +1250,9 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmove%.x %f1,%-\;move%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); output_asm_insn (\"move%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"move%.l %+,%0\"; } return \"fmove%.x %f1,%0\"; @@ -1276,9 +1272,9 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2); output_asm_insn (\"move%.l %1,%-\", xoperands); - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"move%.l %1,%-\", xoperands); output_asm_insn (\"move%.l %1,%-\", operands); return \"fmove%.x %+,%0\"; @@ -1292,9 +1288,9 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmove%.x %f1,%-\;move%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); output_asm_insn (\"move%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"move%.l %+,%0\"; } else @@ -1340,7 +1336,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"move%.l %1,%-\", xoperands); output_asm_insn (\"move%.l %1,%-\", operands); return \"fmove%.d %+,%0\"; @@ -1354,7 +1350,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmove%.d %f1,%-\;move%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"move%.l %+,%0\"; } else @@ -1456,7 +1452,7 @@ "* { CC_STATUS_INIT; - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"moveq %#0,%0\;moveq %#0,%2\;move%.b %1,%2\"; }") @@ -1467,7 +1463,7 @@ "* { CC_STATUS_INIT; - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"moveq %#0,%0\;moveq %#0,%2\;move%.w %1,%2\"; }") @@ -1480,7 +1476,7 @@ { CC_STATUS_INIT; if (GET_CODE (operands[0]) == REG) - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) return \"move%.l %1,%0\;clr%.l %0\"; else if (GET_CODE (XEXP (operands[0], 0)) == POST_INC) @@ -1506,10 +1502,10 @@ { operands[1] = make_safe_from (operands[1], operands[0]); if (GET_CODE (operands[0]) == SUBREG) - operands[2] = gen_rtx (SUBREG, HImode, SUBREG_REG (operands[0]), - SUBREG_WORD (operands[0])); + operands[2] = gen_rtx_SUBREG (HImode, SUBREG_REG (operands[0]), + SUBREG_WORD (operands[0])); else - operands[2] = gen_rtx (SUBREG, HImode, operands[0], 0); + operands[2] = gen_rtx_SUBREG (HImode, operands[0], 0); }") (define_expand "zero_extendqihi2" @@ -1522,10 +1518,10 @@ { operands[1] = make_safe_from (operands[1], operands[0]); if (GET_CODE (operands[0]) == SUBREG) - operands[2] = gen_rtx (SUBREG, QImode, SUBREG_REG (operands[0]), - SUBREG_WORD (operands[0])); + operands[2] = gen_rtx_SUBREG (QImode, SUBREG_REG (operands[0]), + SUBREG_WORD (operands[0])); else - operands[2] = gen_rtx (SUBREG, QImode, operands[0], 0); + operands[2] = gen_rtx_SUBREG (QImode, operands[0], 0); }") (define_expand "zero_extendqisi2" @@ -1538,10 +1534,10 @@ { operands[1] = make_safe_from (operands[1], operands[0]); if (GET_CODE (operands[0]) == SUBREG) - operands[2] = gen_rtx (SUBREG, QImode, SUBREG_REG (operands[0]), - SUBREG_WORD (operands[0])); + operands[2] = gen_rtx_SUBREG (QImode, SUBREG_REG (operands[0]), + SUBREG_WORD (operands[0])); else - operands[2] = gen_rtx (SUBREG, QImode, operands[0], 0); + operands[2] = gen_rtx_SUBREG (QImode, operands[0], 0); }") ;; Patterns to recognize zero-extend insns produced by the combiner. @@ -1600,8 +1596,8 @@ == STACK_POINTER_REGNUM) { output_asm_insn (\"clr%.w %-\", operands); - operands[0] = gen_rtx (MEM, GET_MODE (operands[0]), - plus_constant (stack_pointer_rtx, 1)); + operands[0] = gen_rtx_MEM (GET_MODE (operands[0]), + plus_constant (stack_pointer_rtx, 1)); return \"move%.b %1,%0\"; } else @@ -1678,7 +1674,7 @@ "* { CC_STATUS_INIT; - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (TARGET_68020 || TARGET_5200) return \"move%.b %1,%2\;extb%.l %2\;smi %0\;extb%.l %0\"; else @@ -1693,7 +1689,7 @@ "* { CC_STATUS_INIT; - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (TARGET_68020 || TARGET_5200) return \"move%.w %1,%2\;ext%.l %2\;smi %0\;extb%.l %0\"; else @@ -1708,7 +1704,7 @@ "* { CC_STATUS_INIT; - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (TARGET_68020 || TARGET_5200) return \"move%.l %1,%2\;smi %0\;extb%.l %0\"; else @@ -1727,7 +1723,7 @@ "* { CC_STATUS_INIT; - operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (GET_CODE (operands[1]) == CONST_INT && (unsigned) INTVAL (operands[1]) > 8) { @@ -1811,7 +1807,7 @@ if (DATA_REG_P (operands[0]) && FP_REG_P (operands[1])) { output_asm_insn (\"fmove%.d %f1,%-\;move%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"move%.l %+,%0\"; } return \"fmove%.d %f1,%0\"; @@ -2052,12 +2048,12 @@ "" "* { - operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[1]) && REGNO (operands[1]) == REGNO (operands[0])) return \"move%.l %1,%2\;add%.l %2,%2\;subx%.l %2,%2\;sub%.l %2,%3\;subx%.l %2,%0\"; if (GET_CODE (operands[1]) == REG) - operands[4] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + operands[4] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (GET_CODE (XEXP (operands[1], 0)) == POST_INC || GET_CODE (XEXP (operands[1], 0)) == PRE_DEC) operands[4] = operands[1]; @@ -2109,7 +2105,7 @@ { CC_STATUS_INIT; if (GET_CODE (operands[0]) == REG) - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[2] = adj_offsettable_operand (operands[0], 4); return \"add%.l %1,%2\;negx%.l %0\;neg%.l %0\"; @@ -2128,7 +2124,7 @@ { CC_STATUS_INIT; if (GET_CODE (operands[1]) == REG) - operands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else operands[1] = adj_offsettable_operand (operands[1], 4); return \"add%.l %1,%0\"; @@ -2148,32 +2144,33 @@ return \"add%.l %R2,%R0\;addx%.l %2,%0\"; else if (GET_CODE (operands[2]) == MEM && GET_CODE (XEXP (operands[2], 0)) == POST_INC) - { - return \"move%.l %2,%3\;add%.l %2,%R0\;addx%.l %3,%0\"; - } + return \"move%.l %2,%3\;add%.l %2,%R0\;addx%.l %3,%0\"; else { + rtx high, low; rtx xoperands[2]; + if (GET_CODE (operands[2]) == REG) - operands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); - else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); - operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); + low = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); + high = operands[2]; } - else if (GET_CODE (operands[2]) == CONST_INT) + else if (CONSTANT_P (operands[2])) + split_double (operands[2], &high, &low); + else { - operands[1] = operands[2]; - operands[2] = INTVAL (operands[2]) < 0 ? constm1_rtx : const0_rtx; + low = adj_offsettable_operand (operands[2], 4); + high = operands[2]; } - else - operands[1] = adj_offsettable_operand (operands[2], 4); + + operands[1] = low, operands[2] = high; xoperands[0] = operands[3]; if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) >= -8 && INTVAL (operands[1]) < 0) xoperands[1] = GEN_INT (-INTVAL (operands[2]) - 1); else xoperands[1] = operands[2]; + output_asm_insn (output_move_simode (xoperands), xoperands); if (GET_CODE (operands[1]) == CONST_INT) { @@ -2206,9 +2203,8 @@ CC_STATUS_INIT; if (GET_CODE (XEXP (operands[0], 0)) == POST_INC) { - operands[1] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, VOIDmode, XEXP(operands[0], 0), - gen_rtx (CONST_INT, VOIDmode, -8))); + operands[1] = gen_rtx_MEM (SImode, + plus_constant (XEXP(operands[0], 0), -8)); return \"move%.l %0,%3\;add%.l %R2,%0\;addx%.l %2,%3\;move%.l %3,%1\"; } else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) @@ -2237,9 +2233,9 @@ if (GET_CODE (operands[0]) == MEM) { if (GET_CODE (XEXP (operands[0], 0)) == POST_INC) - operands[0] = gen_rtx (MEM, SImode, XEXP (XEXP (operands[0], 0), 0)); + operands[0] = gen_rtx_MEM (SImode, XEXP (XEXP (operands[0], 0), 0)); else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) - operands[2] = gen_rtx (MEM, SImode, XEXP (XEXP (operands[0], 0), 0)); + operands[2] = gen_rtx_MEM (SImode, XEXP (XEXP (operands[0], 0), 0)); } output_asm_insn (\"move%.l %1,%0\", operands); #ifdef MOTOROLA @@ -2306,8 +2302,7 @@ which could confuse us. */ if (INTVAL (operands[2]) >= 32768) - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) - 65536); + operands[2] = GEN_INT (INTVAL (operands[2]) - 65536); if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 8) @@ -2315,8 +2310,7 @@ if (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) >= -8) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - - INTVAL (operands[2])); + operands[2] = GEN_INT (- INTVAL (operands[2])); return \"subq%.w %2,%0\"; } /* On the CPU32 it is faster to use two addqw instructions to @@ -2327,15 +2321,13 @@ if (INTVAL (operands[2]) > 8 && INTVAL (operands[2]) <= 16) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) - 8); + operands[2] = GEN_INT (INTVAL (operands[2]) - 8); return \"addq%.w %#8,%0\;addq%.w %2,%0\"; } if (INTVAL (operands[2]) < -8 && INTVAL (operands[2]) >= -16) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - - INTVAL (operands[2]) - 8); + operands[2] = GEN_INT (- INTVAL (operands[2]) - 8); return \"subq%.w %#8,%0\;subq%.w %2,%0\"; } } @@ -2372,8 +2364,7 @@ which could confuse us. */ if (INTVAL (operands[1]) >= 32768) - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1]) - 65536); + operands[1] = GEN_INT (INTVAL (operands[1]) - 65536); if (INTVAL (operands[1]) > 0 && INTVAL (operands[1]) <= 8) @@ -2381,8 +2372,7 @@ if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - - INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"subq%.w %1,%0\"; } /* On the CPU32 it is faster to use two addqw instructions to @@ -2393,15 +2383,13 @@ if (INTVAL (operands[1]) > 8 && INTVAL (operands[1]) <= 16) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1]) - 8); + operands[1] = GEN_INT (INTVAL (operands[1]) - 8); return \"addq%.w %#8,%0\;addq%.w %1,%0\"; } if (INTVAL (operands[1]) < -8 && INTVAL (operands[1]) >= -16) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - - INTVAL (operands[1]) - 8); + operands[1] = GEN_INT (- INTVAL (operands[1]) - 8); return \"subq%.w %#8,%0\;subq%.w %1,%0\"; } } @@ -2432,8 +2420,7 @@ which could confuse us. */ if (INTVAL (operands[1]) >= 32768) - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1]) - 65536); + operands[1] = GEN_INT (INTVAL (operands[1]) - 65536); if (INTVAL (operands[1]) > 0 && INTVAL (operands[1]) <= 8) @@ -2441,8 +2428,7 @@ if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - - INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"subq%.w %1,%0\"; } /* On the CPU32 it is faster to use two addqw instructions to @@ -2453,15 +2439,13 @@ if (INTVAL (operands[1]) > 8 && INTVAL (operands[1]) <= 16) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1]) - 8); + operands[1] = GEN_INT (INTVAL (operands[1]) - 8); return \"addq%.w %#8,%0\;addq%.w %1,%0\"; } if (INTVAL (operands[1]) < -8 && INTVAL (operands[1]) >= -16) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - - INTVAL (operands[1]) - 8); + operands[1] = GEN_INT (- INTVAL (operands[1]) - 8); return \"subq%.w %#8,%0\;subq%.w %1,%0\"; } } @@ -2487,15 +2471,14 @@ if (GET_CODE (operands[2]) == CONST_INT) { if (INTVAL (operands[2]) >= 128) - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) - 256); + operands[2] = GEN_INT (INTVAL (operands[2]) - 256); if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 8) return \"addq%.b %2,%0\"; if (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) >= -8) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2])); + operands[2] = GEN_INT (- INTVAL (operands[2])); return \"subq%.b %2,%0\"; } } @@ -2514,15 +2497,14 @@ if (GET_CODE (operands[1]) == CONST_INT) { if (INTVAL (operands[1]) >= 128) - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1]) - 256); + operands[1] = GEN_INT (INTVAL (operands[1]) - 256); if (INTVAL (operands[1]) > 0 && INTVAL (operands[1]) <= 8) return \"addq%.b %1,%0\"; if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"subq%.b %1,%0\"; } } @@ -2541,15 +2523,14 @@ if (GET_CODE (operands[1]) == CONST_INT) { if (INTVAL (operands[1]) >= 128) - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1]) - 256); + operands[1] = GEN_INT (INTVAL (operands[1]) - 256); if (INTVAL (operands[1]) > 0 && INTVAL (operands[1]) <= 8) return \"addq%.b %1,%0\"; if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"subq%.b %1,%0\"; } } @@ -2699,7 +2680,7 @@ { CC_STATUS_INIT; if (GET_CODE (operands[1]) == REG) - operands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else operands[1] = adj_offsettable_operand (operands[1], 4); return \"sub%.l %1,%0\"; @@ -2724,27 +2705,30 @@ } else { + rtx high, low; rtx xoperands[2]; + if (GET_CODE (operands[2]) == REG) - operands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); - else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); - operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); + low = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); + high = operands[2]; } - else if (GET_CODE (operands[2]) == CONST_INT) + else if (CONSTANT_P (operands[2])) + split_double (operands[2], &high, &low); + else { - operands[1] = operands[2]; - operands[2] = INTVAL (operands[2]) < 0 ? constm1_rtx : const0_rtx; + low = adj_offsettable_operand (operands[2], 4); + high = operands[2]; } - else - operands[1] = adj_offsettable_operand (operands[2], 4); + + operands[1] = low, operands[2] = high; xoperands[0] = operands[3]; if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) >= -8 && INTVAL (operands[1]) < 0) xoperands[1] = GEN_INT (-INTVAL (operands[2]) - 1); else xoperands[1] = operands[2]; + output_asm_insn (output_move_simode (xoperands), xoperands); if (GET_CODE (operands[1]) == CONST_INT) { @@ -2777,9 +2761,8 @@ CC_STATUS_INIT; if (GET_CODE (XEXP (operands[0], 0)) == POST_INC) { - operands[1] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, VOIDmode, XEXP(operands[0], 0), - gen_rtx (CONST_INT, VOIDmode, -8))); + operands[1] + = gen_rtx_MEM (SImode, plus_constant (XEXP (operands[0], 0), -8)); return \"move%.l %0,%3\;sub%.l %R2,%0\;subx%.l %2,%3\;move%.l %3,%1\"; } else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) @@ -3276,7 +3259,7 @@ && floating_exact_log2 (operands[2]) && !TARGET_68040 && !TARGET_68060) { int i = floating_exact_log2 (operands[2]); - operands[2] = gen_rtx (CONST_INT, VOIDmode, i); + operands[2] = GEN_INT (i); return \"fscale%.l %2,%0\"; } if (REG_P (operands[2])) @@ -3598,21 +3581,12 @@ { CC_STATUS_INIT; /* We can get CONST_DOUBLE, but also const1_rtx etc. */ - if (GET_CODE (operands[2]) == CONST_DOUBLE - || GET_CODE (operands[2]) == CONST_INT) + if (CONSTANT_P (operands[2])) { rtx hi, lo; - if (GET_CODE (operands[2]) == CONST_DOUBLE) - { - hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); - lo = GEN_INT (CONST_DOUBLE_LOW (operands[2])); - } - else - { - lo = operands[2]; - hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx; - } + split_double (operands[2], &hi, &lo); + switch (INTVAL (hi)) { case 0 : @@ -3630,7 +3604,7 @@ } } if (GET_CODE (operands[0]) == REG) - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 4); switch (INTVAL (lo)) @@ -3747,7 +3721,7 @@ CC_STATUS_INIT; if (GET_CODE (operands[0]) == REG) - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 4); if (GET_MODE (operands[1]) == SImode) @@ -3771,21 +3745,12 @@ { CC_STATUS_INIT; /* We can get CONST_DOUBLE, but also const1_rtx etc. */ - if (GET_CODE (operands[2]) == CONST_DOUBLE - || GET_CODE (operands[2]) == CONST_INT) + if (CONSTANT_P (operands[2])) { rtx hi, lo; - if (GET_CODE (operands[2]) == CONST_DOUBLE) - { - hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); - lo = GEN_INT (CONST_DOUBLE_LOW (operands[2])); - } - else - { - lo = operands[2]; - hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx; - } + split_double (operands[2], &hi, &lo); + switch (INTVAL (hi)) { case 0 : @@ -3805,7 +3770,7 @@ } } if (GET_CODE (operands[0]) == REG) - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 4); switch (INTVAL (lo)) @@ -3958,21 +3923,13 @@ { CC_STATUS_INIT; /* We can get CONST_DOUBLE, but also const1_rtx etc. */ - if (GET_CODE (operands[2]) == CONST_DOUBLE - || GET_CODE (operands[2]) == CONST_INT) + + if (CONSTANT_P (operands[2])) { rtx hi, lo; - if (GET_CODE (operands[2]) == CONST_DOUBLE) - { - hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); - lo = GEN_INT (CONST_DOUBLE_LOW (operands[2])); - } - else - { - lo = operands[2]; - hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx; - } + split_double (operands[2], &hi, &lo); + switch (INTVAL (hi)) { case 0 : @@ -3992,7 +3949,7 @@ } } if (GET_CODE (operands[0]) == REG) - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 4); switch (INTVAL (lo)) @@ -4120,7 +4077,7 @@ if (which_alternative == 0) return \"neg%.l %0\;negx%.l %0\"; if (GET_CODE (operands[0]) == REG) - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[1] = adj_offsettable_operand (operands[0], 4); if (ADDRESS_REG_P (operands[0])) @@ -4135,7 +4092,7 @@ "TARGET_5200" "* { - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"neg%.l %1\;negx%.l %0\"; } ") @@ -4204,7 +4161,7 @@ target = operand_subword_force (operands[0], 0, SFmode); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, SFmode), - GEN_INT(0x80000000), target, 0, OPTAB_WIDEN); + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -4231,7 +4188,7 @@ { if (DATA_REG_P (operands[0])) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, 31); + operands[1] = GEN_INT (31); return \"bchg %1,%0\"; } if (REG_P (operands[1]) && ! DATA_REG_P (operands[1])) @@ -4255,7 +4212,7 @@ target = operand_subword (operands[0], 0, 1, DFmode); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, DFmode), - GEN_INT(0x80000000), target, 0, OPTAB_WIDEN); + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -4287,7 +4244,7 @@ { if (DATA_REG_P (operands[0])) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, 31); + operands[1] = GEN_INT (31); return \"bchg %1,%0\"; } if (REG_P (operands[1]) && ! DATA_REG_P (operands[1])) @@ -4338,7 +4295,7 @@ target = operand_subword_force (operands[0], 0, SFmode); result = expand_binop (SImode, and_optab, operand_subword_force (operands[1], 0, SFmode), - GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN); + GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -4384,7 +4341,7 @@ target = operand_subword (operands[0], 0, 1, DFmode); result = expand_binop (SImode, and_optab, operand_subword_force (operands[1], 0, DFmode), - GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN); + GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -4430,7 +4387,7 @@ { CC_STATUS_INIT; if (GET_CODE (operands[0]) == REG) - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (XEXP (operands[0], 0)) == POST_INC || GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) operands[1] = operands[0]; @@ -4502,7 +4459,7 @@ { CC_STATUS_INIT; if (GET_CODE (operands[0]) == REG) - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[2] = adj_offsettable_operand (operands[0], 4); if (ADDRESS_REG_P (operands[0])) @@ -4547,11 +4504,11 @@ { CC_STATUS_INIT; if (GET_CODE (operands[1]) == REG) - operands[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + operands[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else operands[3] = adj_offsettable_operand (operands[1], 4); if (GET_CODE (operands[0]) == REG) - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) return \"clr%.l %0\;move%.l %3,%0\"; else if (GET_CODE (XEXP (operands[0], 0)) == POST_INC) @@ -4574,7 +4531,7 @@ || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))" "* { - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (INTVAL (operands[2]) == 1) return \"add%.l %1,%1\;addx%.l %0,%0\"; else if (INTVAL (operands[2]) == 8) @@ -4589,7 +4546,7 @@ return \"add%.l %1,%1\;addx%.l %0,%0\;add%.l %1,%1\;addx%.l %0,%0\;add%.l %1,%1\;addx%.l %0,%0\"; else /* 32 < INTVAL (operands[2]) <= 63 */ { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32); + operands[2] = GEN_INT (INTVAL (operands[2]) - 32); output_asm_insn (INTVAL (operands[2]) <= 8 ? \"asl%.l %2,%1\" : \"moveq %2,%0\;asl%.l %0,%1\", operands); return \"mov%.l %1,%0\;moveq %#0,%1\"; @@ -4638,7 +4595,7 @@ { CC_STATUS_INIT; - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 16); + operands[2] = GEN_INT (INTVAL (operands[2]) - 16); return \"lsl%.w %2,%0\;swap %0\;clr%.w %0\"; }") @@ -4704,7 +4661,7 @@ && INTVAL (operands[2]) > 16 && INTVAL (operands[2]) <= 24)" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 16); + operands[2] = GEN_INT (INTVAL (operands[2]) - 16); return \"swap %0\;asr%.w %2,%0\;ext%.l %0\"; }") @@ -4738,7 +4695,7 @@ "* { CC_STATUS_INIT; - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (TARGET_68020) return \"move%.l %1,%2\;smi %0\;extb%.l %0\"; else @@ -4776,7 +4733,7 @@ || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))" "* { - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (INTVAL (operands[2]) == 63) return \"add%.l %0,%0\;subx%.l %0,%0\;move%.l %0,%1\"; CC_STATUS_INIT; @@ -4796,7 +4753,7 @@ return \"asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\"; else /* 32 < INTVAL (operands[2]) <= 63 */ { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32); + operands[2] = GEN_INT (INTVAL (operands[2]) - 32); output_asm_insn (INTVAL (operands[2]) <= 8 ? \"asr%.l %2,%0\" : \"moveq %2,%1\;asr%.l %1,%0\", operands); output_asm_insn (\"mov%.l %0,%1\;smi %0\", operands); @@ -4893,7 +4850,7 @@ ;; "* ;;{ ;; if (GET_CODE (operands[1]) == REG) -;; operands[2] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); +;; operands[2] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); ;; else ;; operands[2] = adj_offsettable_operand (operands[1], 4); ;; return \"move%.l %0,%2\;clr%.l %1\"; @@ -4922,11 +4879,11 @@ if (which_alternative == 2) return \"clr%.l %0\;move%.l %1,%0\"; if (GET_CODE (operands[0]) == REG) - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[2] = adj_offsettable_operand (operands[0], 4); if (GET_CODE (operands[1]) == REG) - operands[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + operands[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else operands[3] = adj_offsettable_operand (operands[1], 4); if (ADDRESS_REG_P (operands[0])) @@ -4946,7 +4903,7 @@ || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))" "* { - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (INTVAL (operands[2]) == 63) return \"add%.l %0,%0\;clr%.l %0\;clr%.l %1\;addx%.l %1,%1\"; CC_STATUS_INIT; @@ -4964,7 +4921,7 @@ return \"lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\"; else /* 32 < INTVAL (operands[2]) <= 63 */ { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32); + operands[2] = GEN_INT (INTVAL (operands[2]) - 32); output_asm_insn (INTVAL (operands[2]) <= 8 ? \"lsr%.l %2,%0\" : \"moveq %2,%1\;lsr%.l %1,%0\", operands); return \"mov%.l %0,%1\;moveq %#0,%0\"; @@ -5021,7 +4978,7 @@ "* { /* I think lsr%.w sets the CC properly. */ - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 16); + operands[2] = GEN_INT (INTVAL (operands[2]) - 16); return \"clr%.w %0\;swap %0\;lsr%.w %2,%0\"; }") @@ -5073,7 +5030,7 @@ return \"swap %0\"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 16) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, 32 - INTVAL (operands[2])); + operands[2] = GEN_INT (32 - INTVAL (operands[2])); return \"ror%.l %2,%0\"; } else @@ -5089,7 +5046,7 @@ { if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 8) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, 16 - INTVAL (operands[2])); + operands[2] = GEN_INT (16 - INTVAL (operands[2])); return \"ror%.w %2,%0\"; } else @@ -5105,7 +5062,7 @@ { if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 8) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, 16 - INTVAL (operands[2])); + operands[2] = GEN_INT (16 - INTVAL (operands[2])); return \"ror%.w %2,%0\"; } else @@ -5121,7 +5078,7 @@ { if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 4) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, 8 - INTVAL (operands[2])); + operands[2] = GEN_INT (8 - INTVAL (operands[2])); return \"ror%.b %2,%0\"; } else @@ -5137,7 +5094,7 @@ { if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 4) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, 8 - INTVAL (operands[2])); + operands[2] = GEN_INT (8 - INTVAL (operands[2])); return \"ror%.b %2,%0\"; } else @@ -5593,10 +5550,8 @@ { int width = GET_CODE (operands[0]) == REG ? 31 : 7; return output_btst (operands, - gen_rtx (CONST_INT, VOIDmode, - width - INTVAL (operands[2])), - operands[0], - insn, 1000); + GEN_INT (width - INTVAL (operands[2])), + operands[0], insn, 1000); /* Pass 1000 as SIGNPOS argument so that btst will not think we are testing the sign bit for an `and' and assume that nonzero implies a negative result. */ @@ -5620,11 +5575,8 @@ && GET_CODE (operands[2]) == CONST_INT) { int width = GET_CODE (operands[0]) == REG ? 31 : 7; - return output_btst (operands, - gen_rtx (CONST_INT, VOIDmode, - width - INTVAL (operands[2])), - operands[0], - insn, 1000); + return output_btst (operands, GEN_INT (width - INTVAL (operands[2])), + operands[0], insn, 1000); /* Pass 1000 as SIGNPOS argument so that btst will not think we are testing the sign bit for an `and' and assume that nonzero implies a negative result. */ @@ -5898,7 +5850,7 @@ #endif } if (GET_CODE (operands[0]) == REG) - operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[3] = adj_offsettable_operand (operands[0], 4); if (! ADDRESS_REG_P (operands[0])) @@ -5959,7 +5911,7 @@ } CC_STATUS_INIT; if (GET_CODE (operands[0]) == REG) - operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[3] = adj_offsettable_operand (operands[0], 4); if (!ADDRESS_REG_P (operands[0])) @@ -6425,8 +6377,8 @@ " { #ifdef CASE_VECTOR_PC_RELATIVE - operands[0] = gen_rtx (PLUS, SImode, pc_rtx, - gen_rtx (SIGN_EXTEND, SImode, operands[0])); + operands[0] = gen_rtx_PLUS (SImode, pc_rtx, + gen_rtx_SIGN_EXTEND (SImode, operands[0])); #endif }") @@ -6904,8 +6856,7 @@ "NEED_PROBE" "* { - operands[0] = gen_rtx (PLUS, SImode, stack_pointer_rtx, - gen_rtx (CONST_INT, VOIDmode, NEED_PROBE)); + operands[0] = plus_constant (stack_pointer_rtx, NEED_PROBE); return \"tstl %a0\"; }") @@ -6917,7 +6868,7 @@ { if (current_function_pops_args == 0) return \"rts\"; - operands[0] = gen_rtx (CONST_INT, VOIDmode, current_function_pops_args); + operands[0] = GEN_INT (current_function_pops_args); return \"rtd %0\"; }") @@ -6981,7 +6932,7 @@ "* { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"move%.l %1,%@\", xoperands); output_asm_insn (\"move%.l %1,%-\", operands); return \"fmove%.d %+,%0\"; @@ -7005,7 +6956,7 @@ { rtx xoperands[2]; xoperands[0] = stack_pointer_rtx; - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[0]) - 4); + xoperands[1] = GEN_INT (INTVAL (operands[0]) - 4); #ifndef NO_ADDSUB_Q if (INTVAL (xoperands[1]) <= 8) { @@ -7016,8 +6967,7 @@ } else if (TARGET_CPU32 && INTVAL (xoperands[1]) <= 16) { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (xoperands[1]) - 8); + xoperands[1] = GEN_INT (INTVAL (xoperands[1]) - 8); output_asm_insn (\"addq%.w %#8,%0\;addq%.w %1,%0\", xoperands); } else @@ -7056,7 +7006,7 @@ { rtx xoperands[2]; xoperands[0] = stack_pointer_rtx; - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[0]) - 4); + xoperands[1] = GEN_INT (INTVAL (operands[0]) - 4); #ifndef NO_ADDSUB_Q if (INTVAL (xoperands[1]) <= 8) { @@ -7067,8 +7017,7 @@ } else if (TARGET_CPU32 && INTVAL (xoperands[1]) <= 16) { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (xoperands[1]) - 8); + xoperands[1] = GEN_INT (INTVAL (xoperands[1]) - 8); output_asm_insn (\"addq%.w %#8,%0\;addq%.w %1,%0\", xoperands); } else @@ -7110,9 +7059,7 @@ xoperands[1] = operands[1]; xoperands[2] - = gen_rtx (MEM, QImode, - gen_rtx (PLUS, VOIDmode, stack_pointer_rtx, - gen_rtx (CONST_INT, VOIDmode, 3))); + = gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 3)); xoperands[3] = stack_pointer_rtx; if (!TARGET_5200) output_asm_insn (\"subq%.w %#4,%3\;move%.b %1,%2\", xoperands); @@ -7455,7 +7402,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"move%.l %1,%-\", xoperands); output_asm_insn (\"move%.l %1,%-\", operands); return \"f%&move%.d %+,%0\"; @@ -7477,7 +7424,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmove%.d %f1,%-\;move%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"move%.l %+,%0\"; } return \"fmove%.d %f1,%0\"; @@ -7687,7 +7634,7 @@ target = operand_subword (operands[0], 0, 1, XFmode); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, XFmode), - GEN_INT(0x80000000), target, 0, OPTAB_WIDEN); + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -7736,7 +7683,7 @@ target = operand_subword (operands[0], 0, 1, XFmode); result = expand_binop (SImode, and_optab, operand_subword_force (operands[1], 0, XFmode), - GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN); + GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN); if (result == 0) abort (); diff --git a/gcc/config/m68k/m68kemb.h b/gcc/config/m68k/m68kemb.h index 4c02e1be6e6..79b47a28487 100644 --- a/gcc/config/m68k/m68kemb.h +++ b/gcc/config/m68k/m68kemb.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. "embedded" 68XXX. This is meant to be included after m68k.h. - Copyright (C) 1994, 1995 Free Software Foundation, Inc. */ + Copyright (C) 1994, 1995, 1998 Free Software Foundation, Inc. */ #define PTRDIFF_TYPE "long int" #define SIZE_TYPE "long unsigned int" @@ -26,10 +26,11 @@ #define FUNCTION_VALUE(VALTYPE,FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE)) #undef LIBCALL_VALUE -#define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), \ - ((TARGET_68881 \ - && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \ +#define LIBCALL_VALUE(MODE) \ + gen_rtx_REG ((MODE), \ + ((TARGET_68881 \ + && ((MODE) == SFmode || (MODE) == DFmode \ + || (MODE) == XFmode)) \ ? 16 : 0)) #undef FUNCTION_VALUE_REGNO_P diff --git a/gcc/config/m68k/m68kv4.h b/gcc/config/m68k/m68kv4.h index a40d919990d..90cef1d2688 100644 --- a/gcc/config/m68k/m68kv4.h +++ b/gcc/config/m68k/m68kv4.h @@ -1,5 +1,5 @@ /* Target definitions for GNU compiler for mc680x0 running System V.4 - Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1991, 93, 94, 95, 96, 1998 Free Software Foundation, Inc. Contributed by Ron Guilmette (rfg@monkeys.com) and Fred Fish (fnf@cygnus.com). @@ -167,10 +167,10 @@ while (0) #undef FUNCTION_VALUE #define FUNCTION_VALUE(VALTYPE, FUNC) \ (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \ : (POINTER_TYPE_P (VALTYPE) \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0))) /* For compatibility with the large body of existing code which does not always properly declare external functions returning pointer types, the @@ -196,8 +196,8 @@ do { \ #define LIBCALL_VALUE(MODE) \ ((((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode) \ && TARGET_68881) \ - ? gen_rtx (REG, (MODE), 16) \ - : gen_rtx (REG, (MODE), 0)) + ? gen_rtx_REG ((MODE), 16) \ + : gen_rtx_REG ((MODE), 0)) /* Boundary (in *bits*) on which stack pointer should be aligned. The m68k/SVR4 convention is to keep the stack pointer longword aligned. */ @@ -321,13 +321,13 @@ int switch_table_difference_label_flag; #undef TRAMPOLINE_TEMPLATE #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x227a)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 8)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x2f3a)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 8)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4e75)); \ - ASM_OUTPUT_INT (FILE, const0_rtx); \ - ASM_OUTPUT_INT (FILE, const0_rtx); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x227a)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x2f3a)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x4e75)); \ + ASM_OUTPUT_INT (FILE, const0_rtx); \ + ASM_OUTPUT_INT (FILE, const0_rtx); \ } /* Redefine since we are using a different trampoline */ @@ -341,6 +341,6 @@ int switch_table_difference_label_flag; #undef INITIALIZE_TRAMPOLINE #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 10)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 14)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 10)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 14)), FNADDR); \ } diff --git a/gcc/config/m68k/mot3300.h b/gcc/config/m68k/mot3300.h index 65c2f476043..a90332efff5 100644 --- a/gcc/config/m68k/mot3300.h +++ b/gcc/config/m68k/mot3300.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, SysV68 Motorola 3300 Delta Series. - Copyright (C) 1987, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Abramo and Roberto Bagnara (bagnara@dipisa.di.unipi.it) based on Alex Crain's 3B1 definitions. Maintained by Philippe De Muyter (phdm@info.ucl.ac.be). @@ -295,20 +295,21 @@ dtors_section () \ /* sysV68 (brain damaged) cc convention support. */ #define FUNCTION_VALUE(VALTYPE,FUNC) \ (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \ : (POINTER_TYPE_P (VALTYPE) \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0))) /* If TARGET_68881, SF and DF values are returned in fp0 instead of d0. */ /* Is LIBCALL_VALUE never called with a pointer ? */ #undef LIBCALL_VALUE -#define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), \ - ((TARGET_68881 \ - && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \ - ? 16 : 0)) +#define LIBCALL_VALUE(MODE) \ + gen_rtx_REG ((MODE), \ + ((TARGET_68881 \ + && ((MODE) == SFmode || (MODE) == DFmode \ + || (MODE) == XFmode)) \ + ? 16 : 0)) /* 1 if N is a possible register number for a function value. d0 may be used, and fp0 as well if -msoft-float is not specified. */ @@ -769,8 +770,8 @@ do {(CUM).offset = 0;\ #undef FUNCTION_ARG #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ -(((CUM).libcall && (CUM).offset == 0) ? gen_rtx(REG, (MODE), 0)\ -: (TARGET_REGPARM && (CUM).offset < 8) ? gen_rtx (REG, (MODE), (CUM).offset / 4) : 0) +(((CUM).libcall && (CUM).offset == 0) ? gen_rtx_REG ((MODE), 0)\ +: (TARGET_REGPARM && (CUM).offset < 8) ? gen_rtx_REG ((MODE), (CUM).offset / 4) : 0) #undef FUNCTION_ARG_PARTIAL_NREGS #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ @@ -812,5 +813,5 @@ do {(CUM).offset = 0;\ if (!TARGET_68040) \ ; \ else \ - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__clear_insn_cache"), \ + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_insn_cache"), \ 0, VOIDmode, 0) diff --git a/gcc/config/m68k/news.h b/gcc/config/m68k/news.h index f83524cc0cf..c786b33e96f 100644 --- a/gcc/config/m68k/news.h +++ b/gcc/config/m68k/news.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. SONY NEWS-OS 4 version. - Copyright (C) 1987, 89, 93, 94, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 89, 93, 94, 96, 97, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -126,11 +126,12 @@ Boston, MA 02111-1307, USA. */ #define FUNCTION_VALUE(VALTYPE,FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE)) -#define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), \ - ((TARGET_68881 \ - && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \ - ? 16 : 0)) +#define LIBCALL_VALUE(MODE) \ + gen_rtx_REG ((MODE), \ + ((TARGET_68881 \ + && ((MODE) == SFmode || (MODE) == DFmode \ + || (MODE) == XFmode)) \ + ? 16 : 0)) #define ASM_OUTPUT_ALIGN(FILE,LOG) \ fprintf (FILE, "\t.align %d\n", (LOG)) diff --git a/gcc/config/m68k/next.h b/gcc/config/m68k/next.h index 8391ab50cb1..562820c6c3b 100644 --- a/gcc/config/m68k/next.h +++ b/gcc/config/m68k/next.h @@ -1,5 +1,5 @@ /* Target definitions for GNU compiler for mc680x0 running NeXTSTEP - Copyright (C) 1989, 90-94, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 90-94, 96, 97, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -186,8 +186,8 @@ Boston, MA 02111-1307, USA. */ #undef FINALIZE_TRAMPOLINE #define FINALIZE_TRAMPOLINE(TRAMP) \ - emit_library_call(gen_rtx(SYMBOL_REF, Pmode, "__enable_execute_stack"), \ - 0, VOIDmode, 1, memory_address(SImode, (TRAMP)), Pmode) + emit_library_call(gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"), \ + 0, VOIDmode, 1, memory_address (SImode, (TRAMP)), Pmode) /* A C expression used to clear the instruction cache from address BEG to address END. On NeXTSTEP this i a system trap. */ diff --git a/gcc/config/m68k/sun3.h b/gcc/config/m68k/sun3.h index 13e927ede4d..63daa6537ce 100644 --- a/gcc/config/m68k/sun3.h +++ b/gcc/config/m68k/sun3.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Sun 68000/68020 version. - Copyright (C) 1987, 1988, 1993, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 93, 95, 96, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -171,11 +171,12 @@ Boston, MA 02111-1307, USA. */ /* This is not a good idea. It prevents interoperation between files compiled with -m68881 and those compiled with -msoft-float. */ #if 0 -#define FUNCTION_VALUEX(MODE) \ - gen_rtx (REG, (MODE), \ - ((TARGET_68881 \ - && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \ - ? 16 : 0)) +#define FUNCTION_VALUEX(MODE) \ + gen_rtx_REG ((MODE), \ + ((TARGET_68881 \ + && ((MODE) == SFmode || (MODE) == DFmode \ + || (MODE) == XFmode)) \ + ? 16 : 0)) #undef FUNCTION_VALUE #define FUNCTION_VALUE(VALTYPE,FUNC) FUNCTION_VALUEX (TYPE_MODE (VALTYPE)) diff --git a/gcc/config/m88k/m88k.c b/gcc/config/m88k/m88k.c index 7c2debe018e..c11dadc9186 100644 --- a/gcc/config/m88k/m88k.c +++ b/gcc/config/m88k/m88k.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Motorola 88000. - Copyright (C) 1988, 92, 93, 94, 95, 16, 1997 Free Software Foundation, Inc. + Copyright (C) 1988, 92-97, 1998 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@mcc.com) Currently maintained by (gcc@dg-rtp.dg.com) @@ -21,12 +21,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" - -#include <stdio.h> -#include <sys/types.h> -#include <time.h> -#include <ctype.h> - +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -42,8 +37,6 @@ Boston, MA 02111-1307, USA. */ #include "flags.h" extern char *version_string; -extern time_t time (); -extern char *ctime (); extern int flag_traditional; extern FILE *asm_out_file; @@ -238,7 +231,7 @@ emit_move_sequence (operands, mode, scratch) || GET_CODE (operand1) == MEM) { /* Run this case quickly. */ - emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1)); + emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); return 1; } } @@ -248,7 +241,7 @@ emit_move_sequence (operands, mode, scratch) || (operand1 == const0_rtx && GET_MODE_SIZE (mode) <= UNITS_PER_WORD)) { /* Run this case quickly. */ - emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1)); + emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); return 1; } if (! reload_in_progress && ! reload_completed) @@ -270,7 +263,7 @@ emit_move_sequence (operands, mode, scratch) && symbolic_address_p (operand1), operand1, temp, scratch); if (mode != SImode) - operands[1] = gen_rtx (SUBREG, mode, operands[1], 0); + operands[1] = gen_rtx_SUBREG (mode, operands[1], 0); } } @@ -317,28 +310,33 @@ legitimize_address (pic, orig, reg, scratch) temp = ((reload_in_progress || reload_completed) ? reg : gen_reg_rtx (Pmode)); - emit_insn (gen_rtx (SET, VOIDmode, temp, - gen_rtx (HIGH, SImode, - gen_rtx (UNSPEC, SImode, - gen_rtvec (1, addr), - 0)))); - emit_insn (gen_rtx (SET, VOIDmode, temp, - gen_rtx (LO_SUM, SImode, temp, - gen_rtx (UNSPEC, SImode, - gen_rtvec (1, addr), - 0)))); + emit_insn (gen_rtx_SET + (VOIDmode, temp, + gen_rtx_HIGH (SImode, + gen_rtx_UNSPEC (SImode, + gen_rtvec (1, addr), + 0)))); + + emit_insn (gen_rtx_SET + (VOIDmode, temp, + gen_rtx_LO_SUM (SImode, temp, + gen_rtx_UNSPEC (SImode, + gen_rtvec (1, addr), + 0)))); addr = temp; } - new = gen_rtx (MEM, Pmode, - gen_rtx (PLUS, SImode, - pic_offset_table_rtx, addr)); + + new = gen_rtx_MEM (Pmode, + gen_rtx_PLUS (SImode, + pic_offset_table_rtx, addr)); + current_function_uses_pic_offset_table = 1; RTX_UNCHANGING_P (new) = 1; insn = emit_move_insn (reg, new); /* Put a REG_EQUAL note on this insn, so that it can be optimized by loop. */ - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, orig, - REG_NOTES (insn)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig, + REG_NOTES (insn)); new = reg; } else if (GET_CODE (addr) == CONST) @@ -382,7 +380,7 @@ legitimize_address (pic, orig, reg, scratch) for this address. */ abort (); } - new = gen_rtx (PLUS, SImode, base, addr); + new = gen_rtx_PLUS (SImode, base, addr); /* Should we set special REG_NOTEs here? */ } } @@ -396,15 +394,15 @@ legitimize_address (pic, orig, reg, scratch) reg = gen_reg_rtx (Pmode); } - emit_insn (gen_rtx (SET, VOIDmode, - reg, gen_rtx (HIGH, SImode, addr))); - new = gen_rtx (LO_SUM, SImode, reg, addr); + emit_insn (gen_rtx_SET (VOIDmode, + reg, gen_rtx_HIGH (SImode, addr))); + new = gen_rtx_LO_SUM (SImode, reg, addr); } if (new != orig && GET_CODE (orig) == MEM) { - new = gen_rtx (MEM, GET_MODE (orig), new); + new = gen_rtx_MEM (GET_MODE (orig), new); RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (orig); MEM_VOLATILE_P (new) = MEM_VOLATILE_P (orig); MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (orig); @@ -529,7 +527,7 @@ expand_block_move (dest_mem, src_mem, operands) else { #ifdef TARGET_MEM_FUNCTIONS - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0, + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0, VOIDmode, 3, operands[0], Pmode, operands[1], Pmode, @@ -537,7 +535,7 @@ expand_block_move (dest_mem, src_mem, operands) TREE_UNSIGNED (sizetype)), TYPE_MODE (sizetype)); #else - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "bcopy"), 0, + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "bcopy"), 0, VOIDmode, 3, operands[1], Pmode, operands[0], Pmode, @@ -596,26 +594,25 @@ block_move_loop (dest, dest_mem, src, src_mem, size, align) GET_MODE_NAME (mode), MOVSTR_LOOP, units * align); entry_name = get_identifier (entry); - offset_rtx = gen_rtx (CONST_INT, VOIDmode, - MOVSTR_LOOP + (1 - units) * align); + offset_rtx = GEN_INT (MOVSTR_LOOP + (1 - units) * align); - value_rtx = gen_rtx (MEM, MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode, - gen_rtx (PLUS, Pmode, - gen_rtx (REG, Pmode, 3), - offset_rtx)); + value_rtx = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode, + gen_rtx_PLUS (Pmode, + gen_rtx_REG (Pmode, 3), + offset_rtx)); RTX_UNCHANGING_P (value_rtx) = RTX_UNCHANGING_P (src_mem); MEM_VOLATILE_P (value_rtx) = MEM_VOLATILE_P (src_mem); MEM_IN_STRUCT_P (value_rtx) = MEM_IN_STRUCT_P (src_mem); emit_insn (gen_call_movstrsi_loop - (gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (entry_name)), + (gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name)), dest, src, offset_rtx, value_rtx, - gen_rtx (REG, mode, ((units & 1) ? 4 : 5)), - gen_rtx (CONST_INT, VOIDmode, count))); + gen_rtx_REG (mode, ((units & 1) ? 4 : 5)), + GEN_INT (count))); if (remainder) - block_move_sequence (gen_rtx (REG, Pmode, 2), dest_mem, - gen_rtx (REG, Pmode, 3), src_mem, + block_move_sequence (gen_rtx_REG (Pmode, 2), dest_mem, + gen_rtx_REG (Pmode, 3), src_mem, remainder, align, MOVSTR_LOOP + align); } @@ -654,12 +651,13 @@ block_move_no_loop (dest, dest_mem, src, src_mem, size, align) GET_MODE_NAME (mode), most, size - remainder); entry_name = get_identifier (entry); - offset_rtx = gen_rtx (CONST_INT, VOIDmode, most - (size - remainder)); + offset_rtx = GEN_INT (most - (size - remainder)); + + value_rtx = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode, + gen_rtx_PLUS (Pmode, + gen_rtx_REG (Pmode, 3), + offset_rtx)); - value_rtx = gen_rtx (MEM, MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode, - gen_rtx (PLUS, Pmode, - gen_rtx (REG, Pmode, 3), - offset_rtx)); RTX_UNCHANGING_P (value_rtx) = RTX_UNCHANGING_P (src_mem); MEM_VOLATILE_P (value_rtx) = MEM_VOLATILE_P (src_mem); MEM_IN_STRUCT_P (value_rtx) = MEM_IN_STRUCT_P (src_mem); @@ -668,13 +666,13 @@ block_move_no_loop (dest, dest_mem, src, src_mem, size, align) ? (align == 8 ? 6 : 5) : 4); emit_insn (gen_call_block_move - (gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (entry_name)), + (gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name)), dest, src, offset_rtx, value_rtx, - gen_rtx (REG, mode, value_reg))); + gen_rtx_REG (mode, value_reg))); if (remainder) - block_move_sequence (gen_rtx (REG, Pmode, 2), dest_mem, - gen_rtx (REG, Pmode, 3), src_mem, + block_move_sequence (gen_rtx_REG (Pmode, 2), dest_mem, + gen_rtx_REG (Pmode, 3), src_mem, remainder, align, most); } @@ -729,14 +727,13 @@ block_move_sequence (dest, dest_mem, src, src_mem, size, align, offset) temp[next] = gen_reg_rtx (mode[next]); } size -= amount[next]; - srcp = gen_rtx (MEM, - MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode, - gen_rtx (PLUS, Pmode, src, - gen_rtx (CONST_INT, SImode, offset_ld))); + srcp = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode, + plus_constant (src, offset_ld)); + RTX_UNCHANGING_P (srcp) = RTX_UNCHANGING_P (src_mem); MEM_VOLATILE_P (srcp) = MEM_VOLATILE_P (src_mem); MEM_IN_STRUCT_P (srcp) = MEM_IN_STRUCT_P (src_mem); - emit_insn (gen_rtx (SET, VOIDmode, temp[next], srcp)); + emit_insn (gen_rtx_SET (VOIDmode, temp[next], srcp)); offset_ld += amount[next]; active[next] = TRUE; } @@ -744,14 +741,14 @@ block_move_sequence (dest, dest_mem, src, src_mem, size, align, offset) if (active[phase]) { active[phase] = FALSE; - dstp = gen_rtx (MEM, - MEM_IN_STRUCT_P (dest_mem) ? mode[phase] : BLKmode, - gen_rtx (PLUS, Pmode, dest, - gen_rtx (CONST_INT, SImode, offset_st))); + dstp + = gen_rtx_MEM (MEM_IN_STRUCT_P (dest_mem) ? mode[phase] : BLKmode, + plus_constant (dest, offset_st)); + RTX_UNCHANGING_P (dstp) = RTX_UNCHANGING_P (dest_mem); MEM_VOLATILE_P (dstp) = MEM_VOLATILE_P (dest_mem); MEM_IN_STRUCT_P (dstp) = MEM_IN_STRUCT_P (dest_mem); - emit_insn (gen_rtx (SET, VOIDmode, dstp, temp[phase])); + emit_insn (gen_rtx_SET (VOIDmode, dstp, temp[phase])); offset_st += amount[phase]; } } @@ -934,9 +931,9 @@ output_call (operands, addr) } /* Record the values to be computed later as "def name,high-low". */ - sb_name = gen_rtx (EXPR_LIST, VOIDmode, operands[0], sb_name); - sb_high = gen_rtx (EXPR_LIST, VOIDmode, high, sb_high); - sb_low = gen_rtx (EXPR_LIST, VOIDmode, low, sb_low); + sb_name = gen_rtx_EXPR_LIST (VOIDmode, operands[0], sb_name); + sb_high = gen_rtx_EXPR_LIST (VOIDmode, high, sb_high); + sb_low = gen_rtx_EXPR_LIST (VOIDmode, low, sb_low); #endif /* Don't USE_GAS */ return last; @@ -1167,7 +1164,7 @@ legitimize_operand (op, mode) && (u.s.exponent1 == 0x8 || u.s.exponent1 == 0x7) /* Exponent fits */ && (temp = simplify_unary_operation (FLOAT_TRUNCATE, SFmode, op, mode)) != 0) - return gen_rtx (FLOAT_EXTEND, mode, force_reg (SFmode, temp)); + return gen_rtx_FLOAT_EXTEND (mode, force_reg (SFmode, temp)); } else if (register_operand (op, mode)) return op; @@ -1993,13 +1990,13 @@ m88k_expand_prologue () if (flag_pic && save_regs[PIC_OFFSET_TABLE_REGNUM]) { - rtx return_reg = gen_rtx (REG, SImode, 1); + rtx return_reg = gen_rtx_REG (SImode, 1); rtx label = gen_label_rtx (); rtx temp_reg; if (! save_regs[1]) { - temp_reg = gen_rtx (REG, SImode, TEMP_REGNUM); + temp_reg = gen_rtx_REG (SImode, TEMP_REGNUM); emit_move_insn (temp_reg, return_reg); } emit_insn (gen_locate1 (pic_offset_table_rtx, label)); @@ -2102,10 +2099,11 @@ emit_add (dstreg, srcreg, amount) rtx srcreg; int amount; { - rtx incr = gen_rtx (CONST_INT, VOIDmode, abs (amount)); + rtx incr = GEN_INT (abs (amount)); + if (! ADD_INTVAL (amount)) { - rtx temp = gen_rtx (REG, SImode, TEMP_REGNUM); + rtx temp = gen_rtx_REG (SImode, TEMP_REGNUM); emit_move_insn (temp, incr); incr = temp; } @@ -2218,22 +2216,23 @@ emit_ldst (store_p, regno, mode, offset) enum machine_mode mode; int offset; { - rtx reg = gen_rtx (REG, mode, regno); + rtx reg = gen_rtx_REG (mode, regno); rtx mem; if (SMALL_INTVAL (offset)) { - mem = gen_rtx (MEM, mode, plus_constant (stack_pointer_rtx, offset)); + mem = gen_rtx_MEM (mode, plus_constant (stack_pointer_rtx, offset)); } else { /* offset is too large for immediate index must use register */ - rtx disp = gen_rtx (CONST_INT, VOIDmode, offset); - rtx temp = gen_rtx (REG, SImode, TEMP_REGNUM); - rtx regi = gen_rtx (PLUS, SImode, stack_pointer_rtx, temp); + rtx disp = GEN_INT (offset); + rtx temp = gen_rtx_REG (SImode, TEMP_REGNUM); + rtx regi = gen_rtx_PLUS (SImode, stack_pointer_rtx, temp); + emit_move_insn (temp, disp); - mem = gen_rtx (MEM, mode, regi); + mem = gen_rtx_MEM (mode, regi); } if (store_p) @@ -2572,9 +2571,8 @@ m88k_function_arg (args_so_far, mode, type, named) || bytes != UNITS_PER_WORD)) return (rtx) 0; - return gen_rtx (REG, - ((mode == BLKmode) ? TYPE_MODE (type) : mode), - 2 + args_so_far); + return gen_rtx_REG (((mode == BLKmode) ? TYPE_MODE (type) : mode), + 2 + args_so_far); } /* Do what is necessary for `va_start'. The argument is ignored; @@ -2599,7 +2597,7 @@ m88k_builtin_saveregs (arglist) { fixed = (XINT (current_function_arg_offset_rtx, 0) + argadj) / UNITS_PER_WORD; - argsize = gen_rtx (CONST_INT, VOIDmode, fixed); + argsize = GEN_INT (fixed); } else { @@ -2645,7 +2643,7 @@ m88k_builtin_saveregs (arglist) UNITS_PER_WORD * (8 - fixed)); } - if (flag_check_memory_usage) + if (current_function_check_memory_usage) { emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, block, ptr_mode, @@ -2691,15 +2689,14 @@ emit_bcnd (op, label) rtx label; { if (m88k_compare_op1 == const0_rtx) - emit_jump_insn( gen_bcnd ( - gen_rtx (op, VOIDmode,m88k_compare_op0, const0_rtx), - label)); + emit_jump_insn (gen_bcnd + (gen_rtx (op, VOIDmode,m88k_compare_op0, const0_rtx), + label)); else if (m88k_compare_op0 == const0_rtx) - emit_jump_insn( gen_bcnd( - gen_rtx( - swap_condition (op), - VOIDmode, m88k_compare_op1, const0_rtx), - label)); + emit_jump_insn (gen_bcnd + (gen_rtx (swap_condition (op), + VOIDmode, m88k_compare_op1, const0_rtx), + label)); else if (op != EQ && op != NE) emit_jump_insn (gen_bxx (emit_test (op, VOIDmode), label)); else @@ -2728,7 +2725,7 @@ emit_bcnd (op, label) { if (SMALL_INTVAL (-value)) emit_insn (gen_addsi3 (zero, reg, - gen_rtx (CONST_INT, VOIDmode, -value))); + GEN_INT (-value))); else emit_insn (gen_xorsi3 (zero, reg, constant)); diff --git a/gcc/config/m88k/m88k.h b/gcc/config/m88k/m88k.h index 100922de129..5c069a51847 100644 --- a/gcc/config/m88k/m88k.h +++ b/gcc/config/m88k/m88k.h @@ -198,13 +198,13 @@ extern char * reg_names[]; Redefined in sysv4.h, and luna.h. */ #define VERSION_INFO1 "m88k, " #ifndef VERSION_INFO2 -#define VERSION_INFO2 "$Revision: 1.76 $" +#define VERSION_INFO2 "$Revision: 1.77 $" #endif #ifndef VERSION_STRING #define VERSION_STRING version_string #ifdef __STDC__ -#define TM_RCS_ID "@(#)" __FILE__ " $Revision: 1.76 $ " __DATE__ +#define TM_RCS_ID "@(#)" __FILE__ " $Revision: 1.77 $ " __DATE__ #else #define TM_RCS_ID "$What: <@(#) m88k.h,v 1.1.1.2.2.2> $" #endif /* __STDC__ */ @@ -992,9 +992,8 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, \ - TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \ - 2) + gen_rtx_REG (TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \ + 2) /* Define this if it differs from FUNCTION_VALUE. */ /* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */ @@ -1014,7 +1013,7 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2) /* True if N is a possible register number for a function value as seen by the caller. */ @@ -1241,8 +1240,8 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 40)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 36)), CXT); \ } /*** Library Subroutine Names ***/ @@ -1420,23 +1419,23 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ { \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - copy_to_mode_reg (SImode, XEXP (X, 1))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + copy_to_mode_reg (SImode, XEXP (X, 1))); \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - copy_to_mode_reg (SImode, XEXP (X, 0))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + copy_to_mode_reg (SImode, XEXP (X, 0))); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \ - (X) = gen_rtx (PLUS, Pmode, force_operand (XEXP (X, 0), NULL_RTX),\ - XEXP (X, 1)); \ + (X) = gen_rtx_PLUS (Pmode, force_operand (XEXP (X, 0), NULL_RTX),\ + XEXP (X, 1)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \ - (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), NULL_RTX)); \ + (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), NULL_RTX)); \ if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \ || GET_CODE (X) == LABEL_REF) \ (X) = legitimize_address (flag_pic, X, 0, 0); \ diff --git a/gcc/config/m88k/m88k.md b/gcc/config/m88k/m88k.md index 9bf439cbc76..9af9d17e17a 100644 --- a/gcc/config/m88k/m88k.md +++ b/gcc/config/m88k/m88k.md @@ -1,5 +1,5 @@ ;;- Machine description for the Motorola 88000 for GNU C compiler -;;; Copyright (C) 1988, 92, 93, 94, 95, 1996 Free Software Foundation, Inc. +;; Copyright (C) 1988, 92, 93, 94, 95, 96, 1998 Free Software Foundation, Inc. ;; Contributed by Michael Tiemann (tiemann@mcc.com) ;; Currently maintained by (gcc@dg-rtp.dg.com) @@ -367,8 +367,7 @@ "mak_mask_p (INTVAL (operands[3]) >> INTVAL (operands[2]))" "* { - operands[4] = gen_rtx (CONST_INT, SImode, - exact_log2 (1 + (INTVAL (operands[3]) + operands[4] = GEN_INT (exact_log2 (1 + (INTVAL (operands[3]) >> INTVAL(operands[2])))); return \"mak %0,%1,%4<%2>\"; }" @@ -386,8 +385,7 @@ "* { operands[2] - = gen_rtx (CONST_INT, SImode, - ((1 << INTVAL (operands[2])) - 1) << INTVAL (operands[4])); + = GEN_INT (((1 << INTVAL (operands[2])) - 1) << INTVAL (operands[4])); return output_and (operands); }" [(set_attr "type" "marith")]) ; arith,bit,marith. length is 1 or 2. @@ -434,25 +432,25 @@ (match_dup 2))) (set (match_dup 0) (neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == GET_CODE (operands[3])) ; /* The conditions match. */ else if (GET_CODE (operands[1]) == reverse_condition (GET_CODE (operands[3]))) /* Reverse the condition by complimenting the compare word. */ - operands[4] = gen_rtx (NOT, CCmode, operands[4]); + operands[4] = gen_rtx_NOT (CCmode, operands[4]); else { /* Make the condition pairs line up by rotating the compare word. */ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - gen_rtx (CONST_INT, VOIDmode, - ((cv2 & ~1) - (cv1 & ~1)) & 0x1f)); + operands[4] = gen_rtx_ROTATE (CCmode, operands[4], + GEN_INT (((cv2 & ~1) - (cv1 & ~1)) + & 0x1f)); /* Reverse the condition if needed. */ if ((cv1 & 1) != (cv2 & 1)) - operands[4] = gen_rtx (NOT, CCmode, operands[4]); + operands[4] = gen_rtx_NOT (CCmode, operands[4]); }") (define_split @@ -472,7 +470,7 @@ (match_dup 2))) (set (match_dup 0) (neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == GET_CODE (operands[3])) ; /* The conditions match. */ else @@ -481,9 +479,8 @@ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - gen_rtx (CONST_INT, VOIDmode, - (cv2 - cv1) & 0x1f)); + operands[4] = gen_rtx_ROTATE (CCmode, operands[4], + GEN_INT ((cv2 - cv1) & 0x1f)); }") (define_split @@ -503,7 +500,7 @@ (match_dup 4))) (set (match_dup 0) (neg:SI (match_op_dup 3 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == reverse_condition (GET_CODE (operands[3]))) ; @@ -513,9 +510,9 @@ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[2] = gen_rtx (ROTATE, CCmode, operands[2], - gen_rtx (CONST_INT, VOIDmode, - ((cv1 & ~1) - (cv2 & ~1)) & 0x1f)); + operands[2] = gen_rtx_ROTATE (CCmode, operands[2], + GEN_INT (((cv1 & ~1) - (cv2 & ~1)) + & 0x1f)); }") (define_split @@ -534,10 +531,10 @@ (match_dup 2))) (set (match_dup 0) (match_op_dup 1 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); /* Reverse the condition by complimenting the compare word. */ if (GET_CODE (operands[1]) != GET_CODE (operands[3])) - operands[4] = gen_rtx (NOT, CCmode, operands[4]);") + operands[4] = gen_rtx_NOT (CCmode, operands[4]);") (define_split [(set (match_operand:SI 0 "register_operand" "=r") @@ -554,7 +551,7 @@ (match_dup 2))) (set (match_dup 0) (match_op_dup 1 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);") + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);") (define_split [(set (match_operand:SI 0 "register_operand" "=r") @@ -571,7 +568,7 @@ (match_dup 2))) (set (match_dup 0) (match_op_dup 1 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);") + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);") (define_split [(set (match_operand:SI 0 "register_operand" "=r") @@ -590,24 +587,24 @@ (match_dup 2))) (set (match_dup 0) (neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == GET_CODE (operands[3])) ; /* The conditions match. */ else if (GET_CODE (operands[1]) == reverse_condition (GET_CODE (operands[3]))) /* Reverse the condition by complimenting the compare word. */ - operands[4] = gen_rtx (NOT, CCmode, operands[4]); + operands[4] = gen_rtx_NOT (CCmode, operands[4]); else { /* Make the condition pairs line up by rotating the compare word. */ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - gen_rtx (CONST_INT, VOIDmode, - ((cv2 & ~1) - (cv1 & ~1)) & 0x1f)); + operands[4] = gen_rtx_ROTATE (CCmode, operands[4], + GEN_INT (((cv2 & ~1) - (cv1 & ~1)) + & 0x1f)); /* Reverse the condition if needed. */ if ((cv1 & 1) != (cv2 & 1)) - operands[4] = gen_rtx (NOT, CCmode, operands[4]); + operands[4] = gen_rtx_NOT (CCmode, operands[4]); }") (define_split @@ -627,7 +624,7 @@ (match_dup 2))) (set (match_dup 0) (neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == GET_CODE (operands[3])) ; /* The conditions match. */ else @@ -635,9 +632,8 @@ /* Make the condition pairs line up by rotating the compare word. */ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - gen_rtx (CONST_INT, VOIDmode, - (cv2 - cv1) & 0x1f)); + operands[4] = gen_rtx_ROTATE (CCmode, operands[4], + GEN_INT ((cv2 - cv1) & 0x1f)); }") (define_split @@ -657,7 +653,7 @@ (match_dup 4))) (set (match_dup 0) (neg:SI (match_op_dup 3 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == reverse_condition (GET_CODE (operands[3]))) ; @@ -666,9 +662,9 @@ /* Make the condition pairs line up by rotating the compare word. */ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[2] = gen_rtx (ROTATE, CCmode, operands[2], - gen_rtx (CONST_INT, VOIDmode, - ((cv1 & ~1) - (cv2 & ~1)) & 0x1f)); + operands[2] = gen_rtx_ROTATE (CCmode, operands[2], + GEN_INT (((cv1 & ~1) - (cv2 & ~1)) + & 0x1f)); }") (define_split @@ -687,10 +683,10 @@ (match_dup 2))) (set (match_dup 0) (match_op_dup 1 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); /* Reverse the condition by complimenting the compare word. */ if (GET_CODE (operands[1]) != GET_CODE (operands[3])) - operands[4] = gen_rtx (NOT, CCmode, operands[4]);") + operands[4] = gen_rtx_NOT (CCmode, operands[4]);") (define_split [(set (match_operand:SI 0 "register_operand" "=r") @@ -707,7 +703,7 @@ (match_dup 2))) (set (match_dup 0) (match_op_dup 1 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);") + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);") (define_split [(set (match_operand:SI 0 "register_operand" "=r") @@ -724,7 +720,7 @@ (match_dup 4))) (set (match_dup 0) (match_op_dup 3 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);") + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);") ;; Logical operations on compare words. @@ -1794,7 +1790,7 @@ DONE; /* We don't want the clobber emitted, so handle this ourselves. */ - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -2298,8 +2294,8 @@ { operands[1] = legitimize_address (flag_pic, operands[1], 0, 0); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (ZERO_EXTEND, SImode, operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_ZERO_EXTEND (SImode, operands[1]))); DONE; } }") @@ -2871,7 +2867,7 @@ if (TARGET_USE_DIV) { - emit_move_insn (op0, gen_rtx (DIV, SImode, op1, op2)); + emit_move_insn (op0, gen_rtx_DIV (SImode, op1, op2)); if (TARGET_CHECK_ZERO_DIV && GET_CODE (op2) != CONST_INT) { rtx label = gen_label_rtx (); @@ -2892,7 +2888,7 @@ if (INTVAL (op1) < 0) { neg = TRUE; - op1 = gen_rtx (CONST_INT, VOIDmode, -INTVAL (op1)); + op1 = GEN_INT (-INTVAL (op1)); } op1 = force_reg (SImode, op1); @@ -2900,7 +2896,7 @@ emit_insn (gen_cmpsi (op2, const0_rtx)); emit_jump_insn (gen_bgt (label1)); /* constant / 0-or-negative */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, neg_op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, neg_op2)); if (!neg) emit_insn (gen_negsi2 (op0, op0)); @@ -2910,7 +2906,7 @@ emit_barrier (); emit_label (label1); /* constant / positive */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, op2)); if (neg) emit_insn (gen_negsi2 (op0, op0)); } @@ -2924,7 +2920,7 @@ if (INTVAL (op2) < 0) { neg = TRUE; - op2 = gen_rtx (CONST_INT, VOIDmode, -INTVAL (op2)); + op2 = GEN_INT (-INTVAL (op2)); } else if (! SMALL_INT (operands[2])) op2 = force_reg (SImode, op2); @@ -2933,7 +2929,7 @@ emit_insn (gen_cmpsi (op1, const0_rtx)); emit_jump_insn (gen_bge (label1)); /* 0-or-negative / constant */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, neg_op1, op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, neg_op1, op2)); if (!neg) emit_insn (gen_negsi2 (op0, op0)); @@ -2941,7 +2937,7 @@ emit_barrier (); emit_label (label1); /* positive / constant */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, op2)); if (neg) emit_insn (gen_negsi2 (op0, op0)); } @@ -2963,7 +2959,7 @@ emit_insn (gen_cmpsi (op1, const0_rtx)); emit_jump_insn (gen_bge (label2)); /* negative / negative-or-0 */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, neg_op1, neg_op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, neg_op1, neg_op2)); if (TARGET_CHECK_ZERO_DIV) { @@ -2977,7 +2973,7 @@ emit_barrier (); emit_label (label2); /* pos.-or-0 / neg.-or-0 */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, neg_op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, neg_op2)); if (TARGET_CHECK_ZERO_DIV) { @@ -2994,13 +2990,13 @@ emit_insn (gen_cmpsi (op1, const0_rtx)); emit_jump_insn (gen_bge (label3)); /* negative / positive */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, neg_op1, op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, neg_op1, op2)); emit_insn (gen_negsi2 (op0, op0)); emit_jump_insn (gen_jump (join_label)); emit_barrier (); emit_label (label3); /* positive-or-0 / positive */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, op2)); } emit_label (join_label); @@ -3035,8 +3031,8 @@ else if (GET_CODE (op2) != CONST_INT && TARGET_CHECK_ZERO_DIV) { rtx label = gen_label_rtx (); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (UDIV, SImode, operands[1], op2))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_UDIV (SImode, operands[1], op2))); emit_insn (gen_tcnd_divide_by_zero (op2, label)); emit_label (label); emit_insn (gen_dummy (operands[0])); @@ -3204,10 +3200,9 @@ || integer_ok_for_set (~value))) { emit_insn (gen_andsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, - value | 0xffff))); + GEN_INT (value | 0xffff))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, value | 0xffff0000); + operands[2] = GEN_INT (value | 0xffff0000); } } }") @@ -3276,10 +3271,9 @@ || integer_ok_for_set (value))) { emit_insn (gen_iorsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, - value & 0xffff0000))); + GEN_INT (value & 0xffff0000))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, value & 0xffff); + operands[2] = GEN_INT (value & 0xffff); } } }") @@ -3351,10 +3345,9 @@ || (value & 0xffff) == 0)) { emit_insn (gen_xorsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, - value & 0xffff0000))); + GEN_INT (value & 0xffff0000))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, value & 0xffff); + operands[2] = GEN_INT (value & 0xffff); } } }") @@ -3487,7 +3480,7 @@ { if (TARGET_TRAP_LARGE_SHIFT) emit_insn (gen_tbnd (force_reg (SImode, operands[2]), - gen_rtx (CONST_INT, VOIDmode, 31))); + GEN_INT (31))); else emit_move_insn (operands[0], const0_rtx); DONE; @@ -3495,12 +3488,12 @@ } else if (TARGET_TRAP_LARGE_SHIFT) - emit_insn (gen_tbnd (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_tbnd (operands[2], GEN_INT (31))); else if (TARGET_HANDLE_LARGE_SHIFT) { rtx reg = gen_reg_rtx (SImode); - emit_insn (gen_cmpsi (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_cmpsi (operands[2], GEN_INT (31))); emit_insn (gen_sleu (reg)); emit_insn (gen_andsi3 (reg, operands[1], reg)); operands[1] = reg; @@ -3531,21 +3524,21 @@ if (TARGET_TRAP_LARGE_SHIFT) { emit_insn (gen_tbnd (force_reg (SImode, operands[2]), - gen_rtx (CONST_INT, VOIDmode, 31))); + GEN_INT (31))); DONE; } else - operands[2] = gen_rtx (CONST_INT, VOIDmode, 31); + operands[2] = GEN_INT (31); } } else if (TARGET_TRAP_LARGE_SHIFT) - emit_insn (gen_tbnd (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_tbnd (operands[2], GEN_INT (31))); else if (TARGET_HANDLE_LARGE_SHIFT) { rtx reg = gen_reg_rtx (SImode); - emit_insn (gen_cmpsi (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_cmpsi (operands[2], GEN_INT (31))); emit_insn (gen_sgtu (reg)); emit_insn (gen_iorsi3 (reg, operands[2], reg)); operands[2] = reg; @@ -3578,7 +3571,7 @@ { if (TARGET_TRAP_LARGE_SHIFT) emit_insn (gen_tbnd (force_reg (SImode, operands[2]), - gen_rtx (CONST_INT, VOIDmode, 31))); + GEN_INT (31))); else emit_move_insn (operands[0], const0_rtx); DONE; @@ -3586,12 +3579,12 @@ } else if (TARGET_TRAP_LARGE_SHIFT) - emit_insn (gen_tbnd (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_tbnd (operands[2], GEN_INT (31))); else if (TARGET_HANDLE_LARGE_SHIFT) { rtx reg = gen_reg_rtx (SImode); - emit_insn (gen_cmpsi (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_cmpsi (operands[2], GEN_INT (31))); emit_insn (gen_sleu (reg)); emit_insn (gen_andsi3 (reg, operands[1], reg)); operands[1] = reg; @@ -3619,8 +3612,7 @@ { if (GET_CODE (operands[2]) == CONST_INT && (unsigned) INTVAL (operands[2]) >= 32) - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (32 - INTVAL (operands[2])) % 32); + operands[2] = GEN_INT ((32 - INTVAL (operands[2])) % 32); else { rtx op = gen_reg_rtx (SImode); @@ -3674,8 +3666,7 @@ "" "* { - operands[4] = gen_rtx (CONST_INT, SImode, - (32 - INTVAL (operands[2])) - INTVAL (operands[3])); + operands[4] = GEN_INT ((32 - INTVAL (operands[2])) - INTVAL (operands[3])); return \"ext %0,%1,%2<%4>\"; /* <(32-%2-%3)> */ }" [(set_attr "type" "bit")]) @@ -3696,8 +3687,7 @@ "" "* { - operands[4] = gen_rtx (CONST_INT, SImode, - (32 - INTVAL (operands[2])) - INTVAL (operands[3])); + operands[4] = GEN_INT ((32 - INTVAL (operands[2])) - INTVAL (operands[3])); return \"extu %0,%1,%2<%4>\"; /* <(32-%2-%3)> */ }" [(set_attr "type" "bit")]) @@ -3710,8 +3700,7 @@ "" "* { - operands[3] = gen_rtx (CONST_INT, SImode, - (32 - INTVAL (operands[1])) - INTVAL (operands[2])); + operands[3] = GEN_INT ((32 - INTVAL (operands[1])) - INTVAL (operands[2])); return \"clr %0,%0,%1<%3>\"; /* <(32-%1-%2)> */ }" [(set_attr "type" "bit")]) @@ -3724,8 +3713,7 @@ "" "* { - operands[3] = gen_rtx (CONST_INT, SImode, - (32 - INTVAL (operands[1])) - INTVAL (operands[2])); + operands[3] = GEN_INT ((32 - INTVAL (operands[1])) - INTVAL (operands[2])); return \"set %0,%0,%1<%3>\"; /* <(32-%1-%2)> */ }" [(set_attr "type" "bit")]) @@ -3743,11 +3731,10 @@ if (INTVAL (operands[1]) < 32) value &= (1 << INTVAL (operands[1])) - 1; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - 32 - (INTVAL(operands[1]) + INTVAL(operands[2]))); + operands[2] = GEN_INT (32 - (INTVAL(operands[1]) + INTVAL(operands[2]))); value <<= INTVAL (operands[2]); - operands[3] = gen_rtx (CONST_INT, VOIDmode, value); + operands[3] = GEN_INT (value); if (SMALL_INTVAL (value)) return \"clr %0,%0,%1<%2>\;or %0,%0,%3\"; @@ -3828,8 +3815,8 @@ " { register rtx index_diff = gen_reg_rtx (SImode); - register rtx low = gen_rtx (CONST_INT, VOIDmode, -INTVAL (operands[1])); - register rtx label = gen_rtx (LABEL_REF, VOIDmode, operands[3]); + register rtx low = GEN_INT (-INTVAL (operands[1])); + register rtx label = gen_rtx_LABEL_REF (Pmode, operands[3]); register rtx base; if (! CASE_VECTOR_INSNS) @@ -3907,8 +3894,8 @@ { if (GET_CODE (operands[0]) == MEM && ! call_address_operand (XEXP (operands[0], 0), SImode)) - operands[0] = gen_rtx (MEM, GET_MODE (operands[0]), - force_reg (Pmode, XEXP (operands[0], 0))); + operands[0] = gen_rtx_MEM (GET_MODE (operands[0]), + force_reg (Pmode, XEXP (operands[0], 0))); }") (define_insn "" @@ -3929,8 +3916,8 @@ { if (GET_CODE (operands[1]) == MEM && ! call_address_operand (XEXP (operands[1], 0), SImode)) - operands[1] = gen_rtx (MEM, GET_MODE (operands[1]), - force_reg (Pmode, XEXP (operands[1], 0))); + operands[1] = gen_rtx_MEM (GET_MODE (operands[1]), + force_reg (Pmode, XEXP (operands[1], 0))); }") (define_insn "" diff --git a/gcc/config/m88k/sysv3.h b/gcc/config/m88k/sysv3.h index ef351897398..edf37a44099 100644 --- a/gcc/config/m88k/sysv3.h +++ b/gcc/config/m88k/sysv3.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. Motorola m88100 running the AT&T/Unisoft/Motorola V.3 reference port. - Copyright (C) 1990, 1991, 1997 Free Software Foundation, Inc. + Copyright (C) 1990, 1991, 1997, 1998 Free Software Foundation, Inc. Contributed by Ray Essick (ressick@mot.com) Enhanced by Tom Wood (Tom_Wood@NeXT.com) @@ -141,10 +141,11 @@ do { \ #undef INITIALIZE_TRAMPOLINE #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \ - emit_call_insn (gen_call (gen_rtx (MEM, SImode, \ - gen_rtx (SYMBOL_REF, Pmode, \ - "__enable_execute_stack")), \ - const0_rtx)); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 40)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 36)), CXT); \ + emit_call_insn (gen_call \ + (gen_rtx_MEM \ + (SImode, \ + gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack")), \ + const0_rtx)); \ } diff --git a/gcc/config/mips/abi64.h b/gcc/config/mips/abi64.h index 188939497ce..280435d0401 100644 --- a/gcc/config/mips/abi64.h +++ b/gcc/config/mips/abi64.h @@ -127,7 +127,7 @@ extern struct rtx_def *mips_function_value (); ptr = plus_constant (virtual_incoming_args_rtx, \ - (mips_save_gp_regs \ * UNITS_PER_WORD)); \ - mem = gen_rtx (MEM, BLKmode, ptr); \ + mem = gen_rtx_MEM (BLKmode, ptr); \ /* va_arg is an array access in this case, which causes \ it to get MEM_IN_STRUCT_P set. We must set it here \ so that the insn scheduler won't assume that these \ @@ -160,15 +160,15 @@ extern struct rtx_def *mips_function_value (); for (i = 0; i < mips_save_fp_regs; i++) \ { \ rtx tem = \ - gen_rtx (MEM, mode, \ - plus_constant (virtual_incoming_args_rtx, \ - off)); \ + gen_rtx_MEM (mode, \ + plus_constant (virtual_incoming_args_rtx, \ + off)); \ emit_move_insn (tem, \ - gen_rtx (REG, mode, \ - ((CUM).fp_arg_words \ - + FP_ARG_FIRST \ - + i \ - + mips_fp_off))); \ + gen_rtx_REG (mode, \ + ((CUM).fp_arg_words \ + + FP_ARG_FIRST \ + + i \ + + mips_fp_off))); \ off += size; \ if (! TARGET_FLOAT64 || TARGET_SINGLE_FLOAT) \ ++i; \ @@ -186,8 +186,7 @@ extern struct rtx_def *mips_function_value (); argument itself. The pointer is passed in whatever way is appropriate for passing a pointer to that type. */ #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ - (mips_abi == ABI_EABI \ - && function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED)) + function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED) /* A C expression that indicates when it is the called function's responsibility to make a copy of arguments passed by invisible diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 14d4d1ad4e7..9c6fa741e41 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -27,7 +27,7 @@ Boston, MA 02111-1307, USA. */ be replaced with something better designed. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -44,19 +44,10 @@ Boston, MA 02111-1307, USA. */ #undef MIN #include <signal.h> -#include <sys/types.h> -#include <sys/file.h> -#include <ctype.h> #include "tree.h" #include "expr.h" #include "flags.h" -#ifndef R_OK -#define R_OK 4 -#define W_OK 2 -#define X_OK 1 -#endif - #if defined(USG) || defined(NO_STAB_H) #include "gstab.h" /* If doing DBX on sysV, use our own stab.h. */ #else @@ -69,9 +60,6 @@ Boston, MA 02111-1307, USA. */ #define STAB_CODE_TYPE int #endif -extern void abort (); -extern int atoi (); -extern char *getenv (); extern char *mktemp (); extern rtx adj_offsettable_operand (); @@ -965,14 +953,14 @@ mips_fill_delay_slot (ret, type, operands, cur_insn) mips_load_reg = set_reg; if (GET_MODE_SIZE (mode) > (FP_REG_P (REGNO (set_reg)) ? UNITS_PER_FPREG : UNITS_PER_WORD)) - mips_load_reg2 = gen_rtx (REG, SImode, REGNO (set_reg) + 1); + mips_load_reg2 = gen_rtx_REG (SImode, REGNO (set_reg) + 1); else mips_load_reg2 = 0; if (type == DELAY_HILO) { - mips_load_reg3 = gen_rtx (REG, SImode, MD_REG_FIRST); - mips_load_reg4 = gen_rtx (REG, SImode, MD_REG_FIRST+1); + mips_load_reg3 = gen_rtx_REG (SImode, MD_REG_FIRST); + mips_load_reg4 = gen_rtx_REG (SImode, MD_REG_FIRST+1); } else { @@ -1133,9 +1121,10 @@ embedded_pic_offset (x) pop_topmost_sequence (); } - return gen_rtx (CONST, Pmode, - gen_rtx (MINUS, Pmode, x, - XEXP (DECL_RTL (current_function_decl), 0))); + return + gen_rtx_CONST (Pmode, + gen_rtx_MINUS (Pmode, x, + XEXP (DECL_RTL (current_function_decl), 0))); } /* Return the appropriate instructions to move one operand to another. */ @@ -2169,19 +2158,19 @@ gen_int_relational (test_code, result, cmp0, cmp1, p_invert) if (test == ITEST_NE) { - convert_move (result, gen_rtx (GTU, mode, reg, const0_rtx), 0); + convert_move (result, gen_rtx_GTU (mode, reg, const0_rtx), 0); invert = 0; } else if (test == ITEST_EQ) { reg2 = invert ? gen_reg_rtx (mode) : result; - convert_move (reg2, gen_rtx (LTU, mode, reg, const1_rtx), 0); + convert_move (reg2, gen_rtx_LTU (mode, reg, const1_rtx), 0); reg = reg2; } if (invert) - convert_move (result, gen_rtx (XOR, mode, reg, const1_rtx), 0); + convert_move (result, gen_rtx_XOR (mode, reg, const1_rtx), 0); return result; } @@ -2227,7 +2216,7 @@ gen_conditional_branch (operands, test_code) case CMP_SF: case CMP_DF: if (mips_isa < 4) - reg = gen_rtx (REG, CCmode, FPSW_REGNUM); + reg = gen_rtx_REG (CCmode, FPSW_REGNUM); else reg = gen_reg_rtx (CCmode); @@ -2235,10 +2224,10 @@ gen_conditional_branch (operands, test_code) 0 in the instruction built below. The MIPS FPU handles inequality testing by testing for equality and looking for a false result. */ - emit_insn (gen_rtx (SET, VOIDmode, reg, - gen_rtx (test_code == NE ? EQ : test_code, - CCmode, cmp0, cmp1))); - + emit_insn (gen_rtx_SET (VOIDmode, reg, + gen_rtx (test_code == NE ? EQ : test_code, + CCmode, cmp0, cmp1))); + test_code = test_code == NE ? EQ : NE; mode = CCmode; cmp0 = reg; @@ -2252,7 +2241,7 @@ gen_conditional_branch (operands, test_code) /* Generate the branch. */ - label1 = gen_rtx (LABEL_REF, VOIDmode, operands[0]); + label1 = gen_rtx_LABEL_REF (VOIDmode, operands[0]); label2 = pc_rtx; if (invert) @@ -2261,10 +2250,11 @@ gen_conditional_branch (operands, test_code) label1 = pc_rtx; } - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (IF_THEN_ELSE, VOIDmode, - gen_rtx (test_code, mode, cmp0, cmp1), - label1, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_IF_THEN_ELSE (VOIDmode, + gen_rtx (test_code, mode, + cmp0, cmp1), + label1, label2))); } /* Emit the common code for conditional moves. OPERANDS is the array @@ -2343,14 +2333,15 @@ gen_conditional_move (operands) abort (); cmp_reg = gen_reg_rtx (cmp_mode); - emit_insn (gen_rtx (SET, cmp_mode, cmp_reg, - gen_rtx (cmp_code, cmp_mode, op0, op1))); - - emit_insn (gen_rtx (SET, op_mode, operands[0], - gen_rtx (IF_THEN_ELSE, op_mode, - gen_rtx (move_code, VOIDmode, - cmp_reg, CONST0_RTX (SImode)), - operands[2], operands[3]))); + emit_insn (gen_rtx_SET (cmp_mode, cmp_reg, + gen_rtx (cmp_code, cmp_mode, op0, op1))); + + emit_insn (gen_rtx_SET (op_mode, operands[0], + gen_rtx_IF_THEN_ELSE (op_mode, + gen_rtx (move_code, VOIDmode, + cmp_reg, + CONST0_RTX (SImode)), + operands[2], operands[3]))); } /* Write a loop to move a constant number of bytes. @@ -2467,13 +2458,13 @@ block_move_call (dest_reg, src_reg, bytes_rtx) bytes_rtx = convert_to_mode (Pmode, bytes_rtx, 1); #ifdef TARGET_MEM_FUNCTIONS - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0, + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0, VOIDmode, 3, dest_reg, Pmode, src_reg, Pmode, convert_to_mode (TYPE_MODE (sizetype), bytes_rtx, TREE_UNSIGNED (sizetype)), TYPE_MODE (sizetype)); #else - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "bcopy"), 0, + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "bcopy"), 0, VOIDmode, 3, src_reg, Pmode, dest_reg, Pmode, convert_to_mode (TYPE_MODE (integer_type_node), bytes_rtx, TREE_UNSIGNED (integer_type_node)), @@ -2867,23 +2858,23 @@ output_block_move (insn, operands, num_regs, move_type) abort (); if (GET_MODE (operands[i + 4]) != load_store[i].mode) - operands[i + 4] = gen_rtx (REG, load_store[i].mode, - REGNO (operands[i + 4])); + operands[i + 4] = gen_rtx_REG (load_store[i].mode, + REGNO (operands[i + 4])); offset = load_store[i].offset; xoperands[0] = operands[i + 4]; - xoperands[1] = gen_rtx (MEM, load_store[i].mode, - plus_constant (src_reg, offset)); + xoperands[1] = gen_rtx_MEM (load_store[i].mode, + plus_constant (src_reg, offset)); if (use_lwl_lwr) { int extra_offset = GET_MODE_SIZE (load_store[i].mode) - 1; - xoperands[2] = gen_rtx (MEM, load_store[i].mode, - plus_constant (src_reg, - extra_offset - + offset)); + xoperands[2] = gen_rtx_MEM (load_store[i].mode, + plus_constant (src_reg, + extra_offset + + offset)); } output_asm_insn (load_store[i].load, xoperands); @@ -2896,17 +2887,17 @@ output_block_move (insn, operands, num_regs, move_type) int offset = load_store[i].offset; xoperands[0] = operands[i + 4]; - xoperands[1] = gen_rtx (MEM, load_store[i].mode, - plus_constant (dest_reg, offset)); + xoperands[1] = gen_rtx_MEM (load_store[i].mode, + plus_constant (dest_reg, offset)); if (use_lwl_lwr) { int extra_offset = GET_MODE_SIZE (load_store[i].mode) - 1; - xoperands[2] = gen_rtx (MEM, load_store[i].mode, - plus_constant (dest_reg, - extra_offset - + offset)); + xoperands[2] = gen_rtx_MEM (load_store[i].mode, + plus_constant (dest_reg, + extra_offset + + offset)); } if (move_type == BLOCK_MOVE_NORMAL) @@ -3166,7 +3157,7 @@ function_arg (cum, mode, type, named) if (! type || TREE_CODE (type) != RECORD_TYPE || mips_abi == ABI_32 || mips_abi == ABI_EABI || ! named) - ret = gen_rtx (REG, mode, regbase + *arg_words + bias); + ret = gen_rtx_REG (mode, regbase + *arg_words + bias); else { /* The Irix 6 n32/n64 ABIs say that if any 64 bit chunk of the @@ -3186,7 +3177,7 @@ function_arg (cum, mode, type, named) /* If the whole struct fits a DFmode register, we don't need the PARALLEL. */ if (! field || mode == DFmode) - ret = gen_rtx (REG, mode, regbase + *arg_words + bias); + ret = gen_rtx_REG (mode, regbase + *arg_words + bias); else { /* Now handle the special case by returning a PARALLEL @@ -3205,7 +3196,7 @@ function_arg (cum, mode, type, named) /* assign_parms checks the mode of ENTRY_PARM, so we must use the actual mode here. */ - ret = gen_rtx (PARALLEL, mode, rtvec_alloc (chunks)); + ret = gen_rtx_PARALLEL (mode, rtvec_alloc (chunks)); bitpos = 0; regno = regbase + *arg_words + bias; @@ -3224,14 +3215,14 @@ function_arg (cum, mode, type, named) && TREE_INT_CST_LOW (DECL_FIELD_BITPOS (field)) == bitpos && TREE_CODE (TREE_TYPE (field)) == REAL_TYPE && TYPE_PRECISION (TREE_TYPE (field)) == BITS_PER_WORD) - reg = gen_rtx (REG, DFmode, - regno + FP_ARG_FIRST - GP_ARG_FIRST); + reg = gen_rtx_REG (DFmode, + regno + FP_ARG_FIRST - GP_ARG_FIRST); else - reg = gen_rtx (REG, word_mode, regno); - + reg = gen_rtx_REG (word_mode, regno); + XVECEXP (ret, 0, i) - = gen_rtx (EXPR_LIST, VOIDmode, reg, - GEN_INT (bitpos / BITS_PER_UNIT)); + = gen_rtx_EXPR_LIST (VOIDmode, reg, + GEN_INT (bitpos / BITS_PER_UNIT)); bitpos += 64; regno++; @@ -3267,7 +3258,7 @@ function_arg (cum, mode, type, named) { rtx amount = GEN_INT (BITS_PER_WORD - int_size_in_bytes (type) * BITS_PER_UNIT); - rtx reg = gen_rtx (REG, word_mode, regbase + *arg_words + bias); + rtx reg = gen_rtx_REG (word_mode, regbase + *arg_words + bias); if (TARGET_64BIT) cum->adjust[cum->num_adjusts++] = gen_ashldi3 (reg, reg, amount); @@ -3277,8 +3268,8 @@ function_arg (cum, mode, type, named) } if (mode == VOIDmode && cum->num_adjusts > 0) - ret = gen_rtx (PARALLEL, VOIDmode, - gen_rtvec_v (cum->num_adjusts, cum->adjust)); + ret = gen_rtx_PARALLEL (VOIDmode, + gen_rtvec_v (cum->num_adjusts, cum->adjust)); return ret; } @@ -4871,7 +4862,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) && (unsigned HOST_WIDE_INT) (large_offset - gp_offset) < 32768 && (unsigned HOST_WIDE_INT) (large_offset - end_offset) < 32768) { - base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM); + base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = large_offset; if (file == 0) { @@ -4894,7 +4885,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) else { - base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM); + base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = gp_offset; if (file == 0) { @@ -4949,11 +4940,11 @@ save_restore_insns (store_p, large_reg, large_offset, file) { if (file == 0) { - rtx reg_rtx = gen_rtx (REG, word_mode, regno); + rtx reg_rtx = gen_rtx_REG (word_mode, regno); rtx mem_rtx - = gen_rtx (MEM, word_mode, - gen_rtx (PLUS, Pmode, base_reg_rtx, - GEN_INT (gp_offset - base_offset))); + = gen_rtx_MEM (word_mode, + plus_constant (base_reg_rtx, + gp_offset - base_offset)); if (store_p) { @@ -5010,7 +5001,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) && (unsigned HOST_WIDE_INT) (large_offset - fp_offset) < 32768 && (unsigned HOST_WIDE_INT) (large_offset - end_offset) < 32768) { - base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM); + base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = large_offset; if (file == 0) { @@ -5034,7 +5025,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) else { - base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM); + base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = fp_offset; if (file == 0) { @@ -5092,11 +5083,11 @@ save_restore_insns (store_p, large_reg, large_offset, file) { enum machine_mode sz = TARGET_SINGLE_FLOAT ? SFmode : DFmode; - rtx reg_rtx = gen_rtx (REG, sz, regno); - rtx mem_rtx = gen_rtx (MEM, sz, - gen_rtx (PLUS, Pmode, base_reg_rtx, - GEN_INT (fp_offset - - base_offset))); + rtx reg_rtx = gen_rtx_REG (sz, regno); + rtx mem_rtx = gen_rtx_MEM (sz, + plus_constant (base_reg_rtx, + fp_offset + - base_offset)); if (store_p) { @@ -5323,9 +5314,10 @@ mips_expand_prologue () for (; regno <= GP_ARG_LAST; regno++) { if (offset != 0) - ptr = gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (offset)); - emit_move_insn (gen_rtx (MEM, word_mode, ptr), - gen_rtx (REG, word_mode, regno)); + ptr = plus_constant (stack_pointer_rtx, offset); + + emit_move_insn (gen_rtx_MEM (word_mode, ptr), + gen_rtx_REG (word_mode, regno)); offset += UNITS_PER_WORD; } } @@ -5341,7 +5333,7 @@ mips_expand_prologue () if (tsize > 32767) { - tmp_rtx = gen_rtx (REG, Pmode, MIPS_TEMP1_REGNUM); + tmp_rtx = gen_rtx_REG (Pmode, MIPS_TEMP1_REGNUM); /* Instruction splitting doesn't preserve the RTX_FRAME_RELATED_P bit, so make sure that we don't emit anything that can be @@ -5394,7 +5386,7 @@ mips_expand_prologue () if (TARGET_ABICALLS && mips_abi != ABI_32) emit_insn (gen_loadgp (XEXP (DECL_RTL (current_function_decl), 0), - gen_rtx (REG, DImode, 25))); + gen_rtx_REG (DImode, 25))); } /* If we are profiling, make sure no instructions are scheduled before @@ -5511,7 +5503,7 @@ mips_expand_epilogue () if (tsize > 32767) { - tmp_rtx = gen_rtx (REG, Pmode, MIPS_TEMP1_REGNUM); + tmp_rtx = gen_rtx_REG (Pmode, MIPS_TEMP1_REGNUM); emit_move_insn (tmp_rtx, tsize_rtx); tsize_rtx = tmp_rtx; } @@ -5711,12 +5703,13 @@ mips_function_value (valtype, func) strictly necessary. */ enum machine_mode field_mode = TYPE_MODE (TREE_TYPE (fields[0])); - return gen_rtx (PARALLEL, mode, - gen_rtvec (1, - gen_rtx (EXPR_LIST, VOIDmode, - gen_rtx (REG, field_mode, - FP_RETURN), - const0_rtx))); + return gen_rtx_PARALLEL + (mode, + gen_rtvec (1, + gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_REG (field_mode, + FP_RETURN), + const0_rtx))); } else if (i == 2) @@ -5730,23 +5723,24 @@ mips_function_value (valtype, func) int second_offset = TREE_INT_CST_LOW (DECL_FIELD_BITPOS (fields[1])); - return gen_rtx (PARALLEL, mode, - gen_rtvec (2, - gen_rtx (EXPR_LIST, VOIDmode, - gen_rtx (REG, first_mode, - FP_RETURN), - GEN_INT (first_offset - / BITS_PER_UNIT)), - gen_rtx (EXPR_LIST, VOIDmode, - gen_rtx (REG, second_mode, - FP_RETURN + 2), - GEN_INT (second_offset - / BITS_PER_UNIT)))); + return gen_rtx_PARALLEL + (mode, + gen_rtvec (2, + gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_REG (first_mode, + FP_RETURN), + GEN_INT (first_offset + / BITS_PER_UNIT)), + gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_REG (second_mode, + FP_RETURN + 2), + GEN_INT (second_offset + / BITS_PER_UNIT)))); } } } - return gen_rtx (REG, mode, reg); + return gen_rtx_REG (mode, reg); } /* The implementation of FUNCTION_ARG_PASS_BY_REFERENCE. Return @@ -5761,6 +5755,18 @@ function_arg_pass_by_reference (cum, mode, type, named) { int size; + /* We must pass by reference if we would be both passing in registers + and the stack. This is because any subsequent partial arg would be + handled incorrectly in this case. + + ??? This is really a kludge. We should either fix GCC so that such + a situation causes an abort and then do something in the MIPS port + to prevent it, or add code to function.c to properly handle the case. */ + if (FUNCTION_ARG (*cum, mode, type, named) != 0 + && MUST_PASS_IN_STACK (mode, type)) + return 1; + + /* Otherwise, we only do this if EABI is selected. */ if (mips_abi != ABI_EABI) return 0; diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 611319b5afe..0e5123dd327 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -991,7 +991,7 @@ while (0) #define DWARF_FRAME_RETURN_COLUMN (FP_REG_LAST + 1) /* Before the prologue, RA lives in r31. */ -#define INCOMING_RETURN_ADDR_RTX gen_rtx (REG, VOIDmode, GP_REG_FIRST + 31) +#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31) /* Overrides for the COFF debug format. */ #define PUT_SDB_SCL(a) \ @@ -1904,7 +1904,7 @@ extern enum reg_class mips_secondary_reload_class (); #define RETURN_ADDR_RTX(count, frame) \ ((count == 0) \ - ? gen_rtx (MEM, Pmode, gen_rtx (REG, Pmode, RETURN_ADDRESS_POINTER_REGNUM))\ + ? gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM))\ : (rtx) 0) /* Structure to be filled in by compute_frame_size with register @@ -2124,12 +2124,12 @@ extern struct mips_frame_info current_frame_info; assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, \ - ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ - && (! TARGET_SINGLE_FLOAT \ - || GET_MODE_SIZE (MODE) <= 4)) \ - ? FP_RETURN \ - : GP_RETURN)) + gen_rtx_REG (MODE, \ + ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ + && (! TARGET_SINGLE_FLOAT \ + || GET_MODE_SIZE (MODE) <= 4)) \ + ? FP_RETURN \ + : GP_RETURN)) /* Define how to find the value returned by a function. VALTYPE is the data type of the value (as a tree). @@ -2382,19 +2382,19 @@ typedef struct mips_args { rtx addr = ADDR; \ if (TARGET_LONG64) \ { \ - emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 32)), FUNC); \ - emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 40)), CHAIN);\ + emit_move_insn (gen_rtx_MEM (DImode, plus_constant (addr, 32)), FUNC); \ + emit_move_insn (gen_rtx_MEM (DImode, plus_constant (addr, 40)), CHAIN);\ } \ else \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), FUNC); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 36)), CHAIN);\ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 32)), FUNC); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 36)), CHAIN);\ } \ \ /* Flush both caches. We need to flush the data cache in case \ the system has a write-back cache. */ \ /* ??? Should check the return value for errors. */ \ - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, CACHE_FLUSH_FUNC), \ + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, CACHE_FLUSH_FUNC), \ 0, VOIDmode, 3, addr, Pmode, \ GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\ GEN_INT (3), TYPE_MODE (integer_type_node)); \ @@ -2686,8 +2686,10 @@ typedef struct mips_args { if (mips_split_addresses && mips_check_split (X, MODE)) \ { \ /* ??? Is this ever executed? */ \ - X = gen_rtx (LO_SUM, Pmode, \ - copy_to_mode_reg (Pmode, gen_rtx (HIGH, Pmode, X)), X); \ + X = gen_rtx_LO_SUM (Pmode, \ + copy_to_mode_reg (Pmode, \ + gen_rtx (HIGH, Pmode, X)), \ + X); \ goto WIN; \ } \ \ @@ -2701,7 +2703,7 @@ typedef struct mips_args { \ emit_move_insn (ptr_reg, XEXP (XEXP (xinsn, 0), 0)); \ \ - X = gen_rtx (PLUS, Pmode, ptr_reg, constant); \ + X = gen_rtx_PLUS (Pmode, ptr_reg, constant); \ if (SMALL_INT (constant)) \ goto WIN; \ /* Otherwise we fall through so the code below will fix the \ @@ -2733,12 +2735,12 @@ typedef struct mips_args { emit_move_insn (int_reg, \ GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \ \ - emit_insn (gen_rtx (SET, VOIDmode, \ - ptr_reg, \ - gen_rtx (PLUS, Pmode, xplus0, int_reg))); \ + emit_insn (gen_rtx_SET (VOIDmode, \ + ptr_reg, \ + gen_rtx_PLUS (Pmode, xplus0, int_reg))); \ \ - X = gen_rtx (PLUS, Pmode, ptr_reg, \ - GEN_INT (INTVAL (xplus1) & 0x7fff)); \ + X = gen_rtx_PLUS (Pmode, ptr_reg, \ + GEN_INT (INTVAL (xplus1) & 0x7fff)); \ goto WIN; \ } \ } \ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 3254cc5973d..560eed76451 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -1,9 +1,9 @@ ;; Mips.md Machine Description for MIPS based processors +;; Copyright (C) 1989, 90-97, 1998 Free Software Foundation, Inc. ;; Contributed by A. Lichnewsky, lich@inria.inria.fr ;; Changes by Michael Meissner, meissner@osf.org ;; 64 bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and ;; Brendan Eich, brendan@microunity.com. -;; Copyright (C) 1989, 90-97, 1998 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1079,7 +1079,7 @@ rtx xoperands[10]; xoperands[0] = operands[0]; - xoperands[1] = gen_rtx (REG, SImode, LO_REGNUM); + xoperands[1] = gen_rtx_REG (SImode, LO_REGNUM); output_asm_insn (\"mult\\t%1,%2\", operands); output_asm_insn (mips_move_1word (xoperands, insn, FALSE), xoperands); @@ -1148,7 +1148,7 @@ rtx xoperands[10]; xoperands[0] = operands[0]; - xoperands[1] = gen_rtx (REG, DImode, LO_REGNUM); + xoperands[1] = gen_rtx_REG (DImode, LO_REGNUM); output_asm_insn (\"dmult\\t%1,%2\", operands); output_asm_insn (mips_move_1word (xoperands, insn, FALSE), xoperands); @@ -2439,7 +2439,7 @@ move\\t%0,%z4\\n\\ { rtx op1 = gen_lowpart (DImode, operands[1]); rtx temp = gen_reg_rtx (DImode); - rtx shift = gen_rtx (CONST_INT, VOIDmode, 32); + rtx shift = GEN_INT (32); emit_insn (gen_ashldi3 (temp, op1, shift)); emit_insn (gen_lshrdi3 (operands[0], temp, shift)); @@ -2603,7 +2603,7 @@ move\\t%0,%z4\\n\\ { rtx op1 = gen_lowpart (DImode, operands[1]); rtx temp = gen_reg_rtx (DImode); - rtx shift = gen_rtx (CONST_INT, VOIDmode, 48); + rtx shift = GEN_INT (48); emit_insn (gen_ashldi3 (temp, op1, shift)); emit_insn (gen_ashrdi3 (operands[0], temp, shift)); @@ -2633,7 +2633,7 @@ move\\t%0,%z4\\n\\ { rtx op1 = gen_lowpart (SImode, operands[1]); rtx temp = gen_reg_rtx (SImode); - rtx shift = gen_rtx (CONST_INT, VOIDmode, 16); + rtx shift = GEN_INT (16); emit_insn (gen_ashlsi3 (temp, op1, shift)); emit_insn (gen_ashrsi3 (operands[0], temp, shift)); @@ -2664,7 +2664,7 @@ move\\t%0,%z4\\n\\ rtx op0 = gen_lowpart (SImode, operands[0]); rtx op1 = gen_lowpart (SImode, operands[1]); rtx temp = gen_reg_rtx (SImode); - rtx shift = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift = GEN_INT (24); emit_insn (gen_ashlsi3 (temp, op1, shift)); emit_insn (gen_ashrsi3 (op0, temp, shift)); @@ -2695,7 +2695,7 @@ move\\t%0,%z4\\n\\ { rtx op1 = gen_lowpart (SImode, operands[1]); rtx temp = gen_reg_rtx (SImode); - rtx shift = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift = GEN_INT (24); emit_insn (gen_ashlsi3 (temp, op1, shift)); emit_insn (gen_ashrsi3 (operands[0], temp, shift)); @@ -2725,7 +2725,7 @@ move\\t%0,%z4\\n\\ { rtx op1 = gen_lowpart (DImode, operands[1]); rtx temp = gen_reg_rtx (DImode); - rtx shift = gen_rtx (CONST_INT, VOIDmode, 56); + rtx shift = GEN_INT (56); emit_insn (gen_ashldi3 (temp, op1, shift)); emit_insn (gen_ashrdi3 (operands[0], temp, shift)); @@ -2971,13 +2971,13 @@ move\\t%0,%z4\\n\\ emit_jump_insn (gen_bge (label1)); emit_insn (gen_fix_truncdfsi2 (operands[0], operands[1])); - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (LABEL_REF, VOIDmode, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, label2))); emit_barrier (); emit_label (label1); - emit_move_insn (reg2, gen_rtx (MINUS, DFmode, operands[1], reg1)); - emit_move_insn (reg3, gen_rtx (CONST_INT, VOIDmode, 0x80000000)); + emit_move_insn (reg2, gen_rtx_MINUS (DFmode, operands[1], reg1)); + emit_move_insn (reg3, GEN_INT (0x80000000)); emit_insn (gen_fix_truncdfsi2 (operands[0], reg2)); emit_insn (gen_iorsi3 (operands[0], operands[0], reg3)); @@ -2986,7 +2986,7 @@ move\\t%0,%z4\\n\\ /* allow REG_NOTES to be set on last insn (labels don't have enough fields, and can't be used for REG_NOTES anyway). */ - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); DONE; } }") @@ -3014,13 +3014,13 @@ move\\t%0,%z4\\n\\ emit_jump_insn (gen_bge (label1)); emit_insn (gen_fix_truncdfdi2 (operands[0], operands[1])); - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (LABEL_REF, VOIDmode, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, label2))); emit_barrier (); emit_label (label1); - emit_move_insn (reg2, gen_rtx (MINUS, DFmode, operands[1], reg1)); - emit_move_insn (reg3, gen_rtx (CONST_INT, VOIDmode, 0x80000000)); + emit_move_insn (reg2, gen_rtx_MINUS (DFmode, operands[1], reg1)); + emit_move_insn (reg3, GEN_INT (0x80000000)); emit_insn (gen_ashldi3 (reg3, reg3, GEN_INT (32))); emit_insn (gen_fix_truncdfdi2 (operands[0], reg2)); @@ -3030,7 +3030,7 @@ move\\t%0,%z4\\n\\ /* allow REG_NOTES to be set on last insn (labels don't have enough fields, and can't be used for REG_NOTES anyway). */ - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); DONE; } }") @@ -3058,13 +3058,13 @@ move\\t%0,%z4\\n\\ emit_jump_insn (gen_bge (label1)); emit_insn (gen_fix_truncsfsi2 (operands[0], operands[1])); - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (LABEL_REF, VOIDmode, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, label2))); emit_barrier (); emit_label (label1); - emit_move_insn (reg2, gen_rtx (MINUS, SFmode, operands[1], reg1)); - emit_move_insn (reg3, gen_rtx (CONST_INT, VOIDmode, 0x80000000)); + emit_move_insn (reg2, gen_rtx_MINUS (SFmode, operands[1], reg1)); + emit_move_insn (reg3, GEN_INT (0x80000000)); emit_insn (gen_fix_truncsfsi2 (operands[0], reg2)); emit_insn (gen_iorsi3 (operands[0], operands[0], reg3)); @@ -3073,7 +3073,7 @@ move\\t%0,%z4\\n\\ /* allow REG_NOTES to be set on last insn (labels don't have enough fields, and can't be used for REG_NOTES anyway). */ - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); DONE; } }") @@ -3101,13 +3101,13 @@ move\\t%0,%z4\\n\\ emit_jump_insn (gen_bge (label1)); emit_insn (gen_fix_truncsfdi2 (operands[0], operands[1])); - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (LABEL_REF, VOIDmode, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, label2))); emit_barrier (); emit_label (label1); - emit_move_insn (reg2, gen_rtx (MINUS, SFmode, operands[1], reg1)); - emit_move_insn (reg3, gen_rtx (CONST_INT, VOIDmode, 0x80000000)); + emit_move_insn (reg2, gen_rtx_MINUS (SFmode, operands[1], reg1)); + emit_move_insn (reg3, GEN_INT (0x80000000)); emit_insn (gen_ashldi3 (reg3, reg3, GEN_INT (32))); emit_insn (gen_fix_truncsfdi2 (operands[0], reg2)); @@ -3117,7 +3117,7 @@ move\\t%0,%z4\\n\\ /* allow REG_NOTES to be set on last insn (labels don't have enough fields, and can't be used for REG_NOTES anyway). */ - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); DONE; } }") @@ -3319,10 +3319,10 @@ move\\t%0,%z4\\n\\ rtx tem = ((reload_in_progress | reload_completed) ? operands[0] : gen_reg_rtx (mode)); - emit_insn (gen_rtx (SET, VOIDmode, tem, - gen_rtx (HIGH, mode, operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, tem, + gen_rtx_HIGH (mode, operands[1]))); - operands[1] = gen_rtx (LO_SUM, mode, tem, operands[1]); + operands[1] = gen_rtx_LO_SUM (mode, tem, operands[1]); } /* If we are generating embedded PIC code, and we are referring to a @@ -3336,8 +3336,8 @@ move\\t%0,%z4\\n\\ rtx temp; temp = embedded_pic_offset (operands[1]); - temp = gen_rtx (PLUS, Pmode, embedded_pic_fnaddr_rtx, - force_reg (DImode, temp)); + temp = gen_rtx_PLUS (Pmode, embedded_pic_fnaddr_rtx, + force_reg (DImode, temp)); emit_move_insn (operands[0], force_reg (DImode, temp)); DONE; } @@ -3352,7 +3352,7 @@ move\\t%0,%z4\\n\\ if (! SMALL_INT (temp2)) temp2 = force_reg (DImode, temp2); - emit_move_insn (operands[0], gen_rtx (PLUS, DImode, temp, temp2)); + emit_move_insn (operands[0], gen_rtx_PLUS (DImode, temp, temp2)); DONE; } @@ -3421,10 +3421,10 @@ move\\t%0,%z4\\n\\ "TARGET_64BIT" " { - rtx scratch = gen_rtx (REG, DImode, - (REGNO (operands[0]) == REGNO (operands[2]) - ? REGNO (operands[2]) + 1 - : REGNO (operands[2]))); + rtx scratch = gen_rtx_REG (DImode, + (REGNO (operands[0]) == REGNO (operands[2]) + ? REGNO (operands[2]) + 1 + : REGNO (operands[2]))); if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == HILO_REGNUM) { @@ -3434,7 +3434,7 @@ move\\t%0,%z4\\n\\ rtx addr = find_replacement (&XEXP (operands[1], 0)); rtx op1 = change_address (operands[1], VOIDmode, addr); - scratch = gen_rtx (REG, SImode, REGNO (scratch)); + scratch = gen_rtx_REG (SImode, REGNO (scratch)); memword = change_address (op1, SImode, NULL_RTX); offword = change_address (adj_offsettable_operand (op1, 4), SImode, NULL_RTX); @@ -3449,26 +3449,26 @@ move\\t%0,%z4\\n\\ loword = memword; } emit_move_insn (scratch, hiword); - emit_move_insn (gen_rtx (REG, SImode, 64), scratch); + emit_move_insn (gen_rtx_REG (SImode, 64), scratch); emit_move_insn (scratch, loword); - emit_move_insn (gen_rtx (REG, SImode, 65), scratch); + emit_move_insn (gen_rtx_REG (SImode, 65), scratch); } else { emit_insn (gen_ashrdi3 (scratch, operands[1], GEN_INT (32))); - emit_insn (gen_movdi (gen_rtx (REG, DImode, 64), scratch)); + emit_insn (gen_movdi (gen_rtx_REG (DImode, 64), scratch)); emit_insn (gen_ashldi3 (scratch, operands[1], GEN_INT (32))); emit_insn (gen_ashrdi3 (scratch, scratch, GEN_INT (32))); - emit_insn (gen_movdi (gen_rtx (REG, DImode, 65), scratch)); + emit_insn (gen_movdi (gen_rtx_REG (DImode, 65), scratch)); } DONE; } if (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == HILO_REGNUM) { - emit_insn (gen_movdi (scratch, gen_rtx (REG, DImode, 65))); + emit_insn (gen_movdi (scratch, gen_rtx_REG (DImode, 65))); emit_insn (gen_ashldi3 (scratch, scratch, GEN_INT (32))); emit_insn (gen_lshrdi3 (scratch, scratch, GEN_INT (32))); - emit_insn (gen_movdi (operands[0], gen_rtx (REG, DImode, 64))); + emit_insn (gen_movdi (operands[0], gen_rtx_REG (DImode, 64))); emit_insn (gen_ashldi3 (operands[0], operands[0], GEN_INT (32))); emit_insn (gen_iordi3 (operands[0], operands[0], scratch)); DONE; @@ -3491,10 +3491,10 @@ move\\t%0,%z4\\n\\ if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == HILO_REGNUM) { emit_insn (gen_ashrdi3 (operands[2], operands[1], GEN_INT (32))); - emit_insn (gen_movdi (gen_rtx (REG, DImode, 64), operands[2])); + emit_insn (gen_movdi (gen_rtx_REG (DImode, 64), operands[2])); emit_insn (gen_ashldi3 (operands[2], operands[1], GEN_INT (32))); emit_insn (gen_ashrdi3 (operands[2], operands[2], GEN_INT (32))); - emit_insn (gen_movdi (gen_rtx (REG, DImode, 65), operands[2])); + emit_insn (gen_movdi (gen_rtx_REG (DImode, 65), operands[2])); DONE; } if (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == HILO_REGNUM) @@ -3505,7 +3505,7 @@ move\\t%0,%z4\\n\\ rtx addr = find_replacement (&XEXP (operands[0], 0)); rtx op0 = change_address (operands[0], VOIDmode, addr); - scratch = gen_rtx (REG, SImode, REGNO (operands[2])); + scratch = gen_rtx_REG (SImode, REGNO (operands[2])); memword = change_address (op0, SImode, NULL_RTX); offword = change_address (adj_offsettable_operand (op0, 4), SImode, NULL_RTX); @@ -3519,17 +3519,17 @@ move\\t%0,%z4\\n\\ hiword = offword; loword = memword; } - emit_move_insn (scratch, gen_rtx (REG, SImode, 64)); + emit_move_insn (scratch, gen_rtx_REG (SImode, 64)); emit_move_insn (hiword, scratch); - emit_move_insn (scratch, gen_rtx (REG, SImode, 65)); + emit_move_insn (scratch, gen_rtx_REG (SImode, 65)); emit_move_insn (loword, scratch); } else { - emit_insn (gen_movdi (operands[2], gen_rtx (REG, DImode, 65))); + emit_insn (gen_movdi (operands[2], gen_rtx_REG (DImode, 65))); emit_insn (gen_ashldi3 (operands[2], operands[2], GEN_INT (32))); emit_insn (gen_lshrdi3 (operands[2], operands[2], GEN_INT (32))); - emit_insn (gen_movdi (operands[0], gen_rtx (REG, DImode, 64))); + emit_insn (gen_movdi (operands[0], gen_rtx_REG (DImode, 64))); emit_insn (gen_ashldi3 (operands[0], operands[0], GEN_INT (32))); emit_insn (gen_iordi3 (operands[0], operands[0], operands[2])); } @@ -3554,8 +3554,8 @@ move\\t%0,%z4\\n\\ (match_dup 3)))] " { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 0xffff0000); - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 0x0000ffff); + operands[2] = GEN_INT (INTVAL (operands[1]) & 0xffff0000); + operands[3] = GEN_INT (INTVAL (operands[1]) & 0x0000ffff); }") ;; Unlike most other insns, the move insns can't be split with @@ -3574,10 +3574,10 @@ move\\t%0,%z4\\n\\ rtx tem = ((reload_in_progress | reload_completed) ? operands[0] : gen_reg_rtx (mode)); - emit_insn (gen_rtx (SET, VOIDmode, tem, - gen_rtx (HIGH, mode, operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, tem, + gen_rtx_HIGH (mode, operands[1]))); - operands[1] = gen_rtx (LO_SUM, mode, tem, operands[1]); + operands[1] = gen_rtx_LO_SUM (mode, tem, operands[1]); } /* If we are generating embedded PIC code, and we are referring to a @@ -3591,8 +3591,8 @@ move\\t%0,%z4\\n\\ rtx temp; temp = embedded_pic_offset (operands[1]); - temp = gen_rtx (PLUS, Pmode, embedded_pic_fnaddr_rtx, - force_reg (SImode, temp)); + temp = gen_rtx_PLUS (Pmode, embedded_pic_fnaddr_rtx, + force_reg (SImode, temp)); emit_move_insn (operands[0], force_reg (SImode, temp)); DONE; } @@ -3607,7 +3607,7 @@ move\\t%0,%z4\\n\\ if (! SMALL_INT (temp2)) temp2 = force_reg (SImode, temp2); - emit_move_insn (operands[0], gen_rtx (PLUS, SImode, temp, temp2)); + emit_move_insn (operands[0], gen_rtx_PLUS (SImode, temp, temp2)); DONE; } @@ -3661,9 +3661,9 @@ move\\t%0,%z4\\n\\ { if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == HILO_REGNUM) { - emit_insn (gen_movsi (gen_rtx (REG, SImode, 65), operands[1])); + emit_insn (gen_movsi (gen_rtx_REG (SImode, 65), operands[1])); emit_insn (gen_ashrsi3 (operands[2], operands[1], GEN_INT (31))); - emit_insn (gen_movsi (gen_rtx (REG, SImode, 64), operands[2])); + emit_insn (gen_movsi (gen_rtx_REG (SImode, 64), operands[2])); DONE; } /* This handles moves between a float register and HI/LO. */ @@ -3711,17 +3711,17 @@ move\\t%0,%z4\\n\\ if (GET_CODE (operands[1]) == MEM) source = change_address (operands[1], SFmode, NULL_RTX); else if (GET_CODE (operands[1]) == REG || GET_CODE (operands[1]) == SUBREG) - source = gen_rtx (REG, SFmode, true_regnum (operands[1])); + source = gen_rtx_REG (SFmode, true_regnum (operands[1])); else source = operands[1]; - fp1 = gen_rtx (REG, SFmode, REGNO (operands[2])); - fp2 = gen_rtx (REG, SFmode, REGNO (operands[2]) + 1); + fp1 = gen_rtx_REG (SFmode, REGNO (operands[2])); + fp2 = gen_rtx_REG (SFmode, REGNO (operands[2]) + 1); emit_insn (gen_move_insn (fp1, source)); - emit_insn (gen_move_insn (fp2, gen_rtx (REG, SFmode, 0))); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (LT, CCmode, fp2, fp1))); + emit_insn (gen_move_insn (fp2, gen_rtx_REG (SFmode, 0))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_LT (CCmode, fp2, fp1))); DONE; }") @@ -3811,7 +3811,7 @@ move\\t%0,%z4\\n\\ (define_insn "" [(set (mem:SF (plus:SI (match_operand:SI 1 "register_operand" "d") (match_operand:SI 2 "register_operand" "d"))) - (match_operand:SF 0 "register_operand" "=f"))] + (match_operand:SF 0 "register_operand" "f"))] "mips_isa >= 4 && TARGET_HARD_FLOAT" "swxc1\\t%0,%1(%2)" [(set_attr "type" "store") @@ -3821,7 +3821,7 @@ move\\t%0,%z4\\n\\ (define_insn "" [(set (mem:SF (plus:DI (match_operand:DI 1 "se_register_operand" "d") (match_operand:DI 2 "se_register_operand" "d"))) - (match_operand:SF 0 "register_operand" "=f"))] + (match_operand:SF 0 "register_operand" "f"))] "mips_isa >= 4 && TARGET_HARD_FLOAT" "swxc1\\t%0,%1(%2)" [(set_attr "type" "store") @@ -3831,7 +3831,7 @@ move\\t%0,%z4\\n\\ (define_insn "" [(set (mem:DF (plus:SI (match_operand:SI 1 "register_operand" "d") (match_operand:SI 2 "register_operand" "d"))) - (match_operand:DF 0 "register_operand" "=f"))] + (match_operand:DF 0 "register_operand" "f"))] "mips_isa >= 4 && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" "sdxc1\\t%0,%1(%2)" [(set_attr "type" "store") @@ -3841,7 +3841,7 @@ move\\t%0,%z4\\n\\ (define_insn "" [(set (mem:DF (plus:DI (match_operand:DI 1 "se_register_operand" "d") (match_operand:DI 2 "se_register_operand" "d"))) - (match_operand:DF 0 "register_operand" "=f"))] + (match_operand:DF 0 "register_operand" "f"))] "mips_isa >= 4 && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" "sdxc1\\t%0,%1(%2)" [(set_attr "type" "store") @@ -4218,7 +4218,7 @@ move\\t%0,%z4\\n\\ "* { if (GET_CODE (operands[2]) == CONST_INT) - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f); return \"sll\\t%0,%1,%2\"; }" @@ -4288,7 +4288,7 @@ move\\t%0,%z4\\n\\ "!TARGET_64BIT && !TARGET_DEBUG_G_MODE && (INTVAL (operands[2]) & 32) != 0" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f); operands[4] = const0_rtx; return \"sll\\t%M0,%L1,%2\;move\\t%L0,%z4\"; }" @@ -4310,7 +4310,7 @@ move\\t%0,%z4\\n\\ [(set (subreg:SI (match_dup 0) 1) (ashift:SI (subreg:SI (match_dup 1) 0) (match_dup 2))) (set (subreg:SI (match_dup 0) 0) (const_int 0))] - "operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f);") + "operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);") (define_split @@ -4326,7 +4326,7 @@ move\\t%0,%z4\\n\\ [(set (subreg:SI (match_dup 0) 0) (ashift:SI (subreg:SI (match_dup 1) 1) (match_dup 2))) (set (subreg:SI (match_dup 0) 1) (const_int 0))] - "operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f);") + "operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);") (define_insn "ashldi3_internal3" @@ -4341,9 +4341,9 @@ move\\t%0,%z4\\n\\ { int amount = INTVAL (operands[2]); - operands[2] = gen_rtx (CONST_INT, VOIDmode, (amount & 31)); + operands[2] = GEN_INT (amount & 31); operands[4] = const0_rtx; - operands[5] = gen_rtx (CONST_INT, VOIDmode, ((-amount) & 31)); + operands[5] = GEN_INT ((-amount) & 31); return \"sll\\t%M0,%M1,%2\;srl\\t%3,%L1,%5\;or\\t%M0,%M0,%3\;sll\\t%L0,%L1,%2\"; }" @@ -4381,8 +4381,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = gen_rtx (CONST_INT, VOIDmode, (amount & 31)); - operands[4] = gen_rtx (CONST_INT, VOIDmode, ((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -4415,8 +4415,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = gen_rtx (CONST_INT, VOIDmode, (amount & 31)); - operands[4] = gen_rtx (CONST_INT, VOIDmode, ((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -4445,7 +4445,7 @@ move\\t%0,%z4\\n\\ "* { if (GET_CODE (operands[2]) == CONST_INT) - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f); return \"sra\\t%0,%1,%2\"; }" @@ -4515,7 +4515,7 @@ move\\t%0,%z4\\n\\ "!TARGET_64BIT && !TARGET_DEBUG_G_MODE && (INTVAL (operands[2]) & 32) != 0" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f); return \"sra\\t%L0,%M1,%2\;sra\\t%M0,%M1,31\"; }" [(set_attr "type" "darith") @@ -4536,7 +4536,7 @@ move\\t%0,%z4\\n\\ [(set (subreg:SI (match_dup 0) 0) (ashiftrt:SI (subreg:SI (match_dup 1) 1) (match_dup 2))) (set (subreg:SI (match_dup 0) 1) (ashiftrt:SI (subreg:SI (match_dup 1) 1) (const_int 31)))] - "operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f);") + "operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);") (define_split @@ -4552,7 +4552,7 @@ move\\t%0,%z4\\n\\ [(set (subreg:SI (match_dup 0) 1) (ashiftrt:SI (subreg:SI (match_dup 1) 0) (match_dup 2))) (set (subreg:SI (match_dup 0) 0) (ashiftrt:SI (subreg:SI (match_dup 1) 0) (const_int 31)))] - "operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f);") + "operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);") (define_insn "ashrdi3_internal3" @@ -4567,8 +4567,8 @@ move\\t%0,%z4\\n\\ { int amount = INTVAL (operands[2]); - operands[2] = gen_rtx (CONST_INT, VOIDmode, (amount & 31)); - operands[4] = gen_rtx (CONST_INT, VOIDmode, ((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); return \"srl\\t%L0,%L1,%2\;sll\\t%3,%M1,%4\;or\\t%L0,%L0,%3\;sra\\t%M0,%M1,%2\"; }" @@ -4606,8 +4606,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = gen_rtx (CONST_INT, VOIDmode, (amount & 31)); - operands[4] = gen_rtx (CONST_INT, VOIDmode, ((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -4640,8 +4640,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = gen_rtx (CONST_INT, VOIDmode, (amount & 31)); - operands[4] = gen_rtx (CONST_INT, VOIDmode, ((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -4670,7 +4670,7 @@ move\\t%0,%z4\\n\\ "* { if (GET_CODE (operands[2]) == CONST_INT) - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f); return \"srl\\t%0,%1,%2\"; }" @@ -4740,7 +4740,7 @@ move\\t%0,%z4\\n\\ "!TARGET_64BIT && !TARGET_DEBUG_G_MODE && (INTVAL (operands[2]) & 32) != 0" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f); operands[4] = const0_rtx; return \"srl\\t%L0,%M1,%2\;move\\t%M0,%z4\"; }" @@ -4762,7 +4762,7 @@ move\\t%0,%z4\\n\\ [(set (subreg:SI (match_dup 0) 0) (lshiftrt:SI (subreg:SI (match_dup 1) 1) (match_dup 2))) (set (subreg:SI (match_dup 0) 1) (const_int 0))] - "operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f);") + "operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);") (define_split @@ -4778,7 +4778,7 @@ move\\t%0,%z4\\n\\ [(set (subreg:SI (match_dup 0) 1) (lshiftrt:SI (subreg:SI (match_dup 1) 0) (match_dup 2))) (set (subreg:SI (match_dup 0) 0) (const_int 0))] - "operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0x1f);") + "operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);") (define_insn "lshrdi3_internal3" @@ -4793,8 +4793,8 @@ move\\t%0,%z4\\n\\ { int amount = INTVAL (operands[2]); - operands[2] = gen_rtx (CONST_INT, VOIDmode, (amount & 31)); - operands[4] = gen_rtx (CONST_INT, VOIDmode, ((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); return \"srl\\t%L0,%L1,%2\;sll\\t%3,%M1,%4\;or\\t%L0,%L0,%3\;srl\\t%M0,%M1,%2\"; }" @@ -4832,8 +4832,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = gen_rtx (CONST_INT, VOIDmode, (amount & 31)); - operands[4] = gen_rtx (CONST_INT, VOIDmode, ((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -4866,8 +4866,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = gen_rtx (CONST_INT, VOIDmode, (amount & 31)); - operands[4] = gen_rtx (CONST_INT, VOIDmode, ((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -5732,7 +5732,7 @@ move\\t%0,%z4\\n\\ "INTVAL (operands[2]) < 32767" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2])+1); + operands[2] = GEN_INT (INTVAL (operands[2])+1); return \"slt\\t%0,%1,%2\"; }" [(set_attr "type" "arith") @@ -5746,7 +5746,7 @@ move\\t%0,%z4\\n\\ "TARGET_64BIT && INTVAL (operands[2]) < 32767" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2])+1); + operands[2] = GEN_INT (INTVAL (operands[2])+1); return \"slt\\t%0,%1,%2\"; }" [(set_attr "type" "arith") @@ -5990,7 +5990,7 @@ move\\t%0,%z4\\n\\ "INTVAL (operands[2]) < 32767" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2])+1); + operands[2] = GEN_INT (INTVAL (operands[2]) + 1); return \"sltu\\t%0,%1,%2\"; }" [(set_attr "type" "arith") @@ -6004,7 +6004,7 @@ move\\t%0,%z4\\n\\ "TARGET_64BIT && INTVAL (operands[2]) < 32767" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2])+1); + operands[2] = GEN_INT (INTVAL (operands[2]) + 1); return \"sltu\\t%0,%1,%2\"; }" [(set_attr "type" "arith") @@ -6478,8 +6478,8 @@ move\\t%0,%z4\\n\\ rtx label = gen_label_rtx (); emit_label (label); - emit_insn (gen_loadgp (gen_rtx (LABEL_REF, Pmode, label), - gen_rtx (REG, DImode, 31))); + emit_insn (gen_loadgp (gen_rtx_LABEL_REF (Pmode, label), + gen_rtx_REG (DImode, 31))); emit_insn (gen_blockage ()); }") @@ -6607,7 +6607,8 @@ move\\t%0,%z4\\n\\ } emit_call_insn (gen_call_internal0 (operands[0], operands[1], - gen_rtx (REG, SImode, GP_REG_FIRST + 31))); + gen_rtx_REG (SImode, + GP_REG_FIRST + 31))); DONE; } }") @@ -6763,7 +6764,7 @@ move\\t%0,%z4\\n\\ (XEXP (XVECEXP (operands[0], 0, 0), 0), operands[1], operands[2], XEXP (XVECEXP (operands[0], 0, 1), 0), - gen_rtx (REG, SImode, GP_REG_FIRST + 31))); + gen_rtx_REG (SImode, GP_REG_FIRST + 31))); DONE; } @@ -6773,7 +6774,8 @@ move\\t%0,%z4\\n\\ operands[0] = XEXP (XVECEXP (operands[0], 0, 0), 0); emit_call_insn (gen_call_value_internal0 (operands[0], operands[1], operands[2], - gen_rtx (REG, SImode, GP_REG_FIRST + 31))); + gen_rtx_REG (SImode, + GP_REG_FIRST + 31))); DONE; } @@ -6990,7 +6992,7 @@ move\\t%0,%z4\\n\\ ;; " ;; { ;; operands[0] = gen_reg_rtx (SImode); -;; operands[1] = gen_rtx (MEM, SImode, stack_pointer_rtx); +;; operands[1] = gen_rtx_MEM (SImode, stack_pointer_rtx); ;; MEM_VOLATILE_P (operands[1]) = TRUE; ;; ;; /* fall through and generate default code */ diff --git a/gcc/config/mn10200/mn10200.c b/gcc/config/mn10200/mn10200.c index 5435f773c8d..cfb96ed4670 100644 --- a/gcc/config/mn10200/mn10200.c +++ b/gcc/config/mn10200/mn10200.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Matsushita MN10200 series - Copyright (C) 1997 Free Software Foundation, Inc. + Copyright (C) 1997, 1998 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GNU CC. @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -275,7 +275,7 @@ print_operand (file, x, code) if (GET_CODE (x) != MEM) abort (); if (GET_CODE (XEXP (x, 0)) == REG) - x = gen_rtx (PLUS, PSImode, XEXP (x, 0), GEN_INT (0)); + x = gen_rtx_PLUS (PSImode, XEXP (x, 0), GEN_INT (0)); else x = XEXP (x, 0); fputc ('(', file); @@ -594,12 +594,12 @@ expand_prologue () if (!regs_ever_live[2]) { regs_ever_live[2] = 1; - zero_dreg = gen_rtx (REG, HImode, 2); + zero_dreg = gen_rtx_REG (HImode, 2); } if (!regs_ever_live[3]) { regs_ever_live[3] = 1; - zero_dreg = gen_rtx (REG, HImode, 3); + zero_dreg = gen_rtx_REG (HImode, 3); } } @@ -611,12 +611,12 @@ expand_prologue () if (!regs_ever_live[5]) { regs_ever_live[5] = 1; - zero_areg = gen_rtx (REG, HImode, 5); + zero_areg = gen_rtx_REG (HImode, 5); } if (!regs_ever_live[6]) { regs_ever_live[6] = 1; - zero_areg = gen_rtx (REG, HImode, 6); + zero_areg = gen_rtx_REG (HImode, 6); } } @@ -638,14 +638,14 @@ expand_prologue () { emit_insn (gen_addpsi3 (stack_pointer_rtx, stack_pointer_rtx, GEN_INT (-4))); - emit_move_insn (gen_rtx (MEM, PSImode, stack_pointer_rtx), - gen_rtx (REG, PSImode, STATIC_CHAIN_REGNUM)); + emit_move_insn (gen_rtx_MEM (PSImode, stack_pointer_rtx), + gen_rtx_REG (PSImode, STATIC_CHAIN_REGNUM)); } if (frame_pointer_needed) { /* Store a2 into a0 temporarily. */ - emit_move_insn (gen_rtx (REG, PSImode, 4), frame_pointer_rtx); + emit_move_insn (gen_rtx_REG (PSImode, 4), frame_pointer_rtx); /* Set up the frame pointer. */ emit_move_insn (frame_pointer_rtx, stack_pointer_rtx); @@ -670,11 +670,10 @@ expand_prologue () register 4 (a0). */ regno = (i == FRAME_POINTER_REGNUM && frame_pointer_needed) ? 4 : i; - emit_move_insn (gen_rtx (MEM, PSImode, - gen_rtx (PLUS, Pmode, - stack_pointer_rtx, - GEN_INT (offset))), - gen_rtx (REG, PSImode, regno)); + emit_move_insn (gen_rtx_MEM (PSImode, + plus_constant (stack_pointer_rtx, + offset)), + gen_rtx_REG (PSImode, regno)); offset += 4; } } @@ -683,10 +682,10 @@ expand_prologue () expects to find it. */ if (current_function_needs_context) { - emit_move_insn (gen_rtx (REG, PSImode, STATIC_CHAIN_REGNUM), + emit_move_insn (gen_rtx_REG (PSImode, STATIC_CHAIN_REGNUM), gen_rtx (MEM, PSImode, - gen_rtx (PLUS, PSImode, stack_pointer_rtx, - GEN_INT (size)))); + gen_rtx_PLUS (PSImode, stack_pointer_rtx, + GEN_INT (size)))); } } @@ -764,11 +763,9 @@ expand_epilogue () regno = ((i == FRAME_POINTER_REGNUM && frame_pointer_needed) ? temp_regno : i); - emit_move_insn (gen_rtx (REG, PSImode, regno), - gen_rtx (MEM, PSImode, - gen_rtx (PLUS, Pmode, - basereg, - GEN_INT (offset)))); + emit_move_insn (gen_rtx_REG (PSImode, regno), + gen_rtx_MEM (PSImode, + plus_constant (basereg, offset))); offset += 4; } } @@ -778,7 +775,7 @@ expand_epilogue () /* Deallocate this frame's stack. */ emit_move_insn (stack_pointer_rtx, frame_pointer_rtx); /* Restore the old frame pointer. */ - emit_move_insn (frame_pointer_rtx, gen_rtx (REG, PSImode, temp_regno)); + emit_move_insn (frame_pointer_rtx, gen_rtx_REG (PSImode, temp_regno)); } else if (size) { @@ -972,14 +969,14 @@ expand_a_shift (mode, code, operands) /* need a loop to get all the bits we want - we generate the code at emit time, but need to allocate a scratch reg now */ - emit_insn (gen_rtx - (PARALLEL, VOIDmode, + emit_insn (gen_rtx_PARALLEL + (VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (code, mode, - operands[0], operands[2])), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, HImode, 0))))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (code, mode, + operands[0], operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (HImode))))); return 1; } @@ -1374,10 +1371,10 @@ function_arg (cum, mode, type, named) switch (cum->nbytes / UNITS_PER_WORD) { case 0: - result = gen_rtx (REG, mode, 0); + result = gen_rtx_REG (mode, 0); break; case 1: - result = gen_rtx (REG, mode, 1); + result = gen_rtx_REG (mode, 1); break; default: result = 0; diff --git a/gcc/config/mn10200/mn10200.h b/gcc/config/mn10200/mn10200.h index 7eb26dd7c0d..b191a0a76a6 100644 --- a/gcc/config/mn10200/mn10200.h +++ b/gcc/config/mn10200/mn10200.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Matsushita MN10200 series - Copyright (C) 1997 Free Software Foundation, Inc. + Copyright (C) 1997, 1998 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GNU CC. @@ -524,12 +524,12 @@ extern struct rtx_def *function_arg(); otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), TYPE_MODE (VALTYPE) == PSImode ? 4 : 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), TYPE_MODE (VALTYPE) == PSImode ? 4 : 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, (MODE) == PSImode ? 4 : 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, (MODE) == PSImode ? 4 : 0) /* 1 if N is a possible register number for a function value. */ @@ -590,9 +590,9 @@ extern struct rtx_def *function_arg(); #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, PSImode, plus_constant ((TRAMP), 20)), \ + emit_move_insn (gen_rtx_MEM (PSImode, plus_constant ((TRAMP), 20)), \ (CXT)); \ - emit_move_insn (gen_rtx (MEM, PSImode, plus_constant ((TRAMP), 24)), \ + emit_move_insn (gen_rtx_MEM (PSImode, plus_constant ((TRAMP), 24)), \ (FNADDR)); \ } @@ -601,7 +601,7 @@ extern struct rtx_def *function_arg(); #define RETURN_ADDR_RTX(COUNT, FRAME) \ ((COUNT == 0) \ - ? gen_rtx (MEM, Pmode, frame_pointer_rtx) \ + ? gen_rtx_MEM (Pmode, frame_pointer_rtx) \ : (rtx) 0) @@ -1052,9 +1052,9 @@ do { char dstr[30]; \ #define INIT_TARGET_OPTABS \ do { \ sdiv_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, DIVHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, DIVHI3_LIBCALL); \ smod_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, MODHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, MODHI3_LIBCALL); \ } while (0) /* The assembler op to get a word. */ diff --git a/gcc/config/mn10200/mn10200.md b/gcc/config/mn10200/mn10200.md index 9dc753c3023..fe719f756f8 100644 --- a/gcc/config/mn10200/mn10200.md +++ b/gcc/config/mn10200/mn10200.md @@ -1,6 +1,5 @@ ;; GCC machine description for Matsushita MN10200 -;; Copyright (C) 1997 Free Software Foundation, Inc. - +;; Copyright (C) 1997, 1998 Free Software Foundation, Inc. ;; Contributed by Jeff Law (law@cygnus.com). ;; This file is part of GNU CC. @@ -399,13 +398,13 @@ extern rtx emit_library_call_value (); start_sequence (); - ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__addsi3\"), + ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__addsi3\"), NULL_RTX, 1, SImode, 2, operands[1], SImode, operands[2], SImode); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, - gen_rtx (ASHIFT, SImode, operands[1], operands[2])); + gen_rtx_ASHIFT (SImode, operands[1], operands[2])); DONE; } else @@ -477,13 +476,13 @@ extern rtx emit_library_call_value (); start_sequence (); - ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__subsi3\"), + ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__subsi3\"), NULL_RTX, 1, SImode, 2, operands[1], SImode, operands[2], SImode); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, - gen_rtx (ASHIFT, SImode, operands[1], operands[2])); + gen_rtx_ASHIFT (SImode, operands[1], operands[2])); DONE; } else @@ -1274,9 +1273,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, HImode, operands[0], - gen_rtx (ASHIFT, HImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (HImode, operands[0], + gen_rtx_ASHIFT (HImode, + operands[0], GEN_INT (1)))); count--; } DONE; @@ -1313,9 +1312,10 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, HImode, operands[0], - gen_rtx (LSHIFTRT, HImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (HImode, operands[0], + gen_rtx_LSHIFTRT (HImode, + operands[0], + GEN_INT (1)))); count--; } DONE; @@ -1352,9 +1352,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, HImode, operands[0], - gen_rtx (ASHIFTRT, HImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (HImode, operands[0], + gen_rtx_ASHIFTRT (HImode, operands[0], + GEN_INT (1)))); count--; } DONE; @@ -1406,9 +1406,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, PSImode, operands[0], - gen_rtx (ASHIFT, PSImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (PSImode, operands[0], + gen_rtx_ASHIFT (PSImode, + operands[0], GEN_INT (1)))); count--; } DONE; @@ -1483,9 +1483,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, SImode, operands[0], - gen_rtx (ASHIFT, SImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (SImode, operands[0], + gen_rtx_ASHIFT (SImode, + operands[0], GEN_INT (1)))); count--; } DONE; @@ -1498,13 +1498,13 @@ extern rtx emit_library_call_value (); start_sequence (); - ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__ashlsi3\"), + ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__ashlsi3\"), NULL_RTX, 1, SImode, 2, operands[1], SImode, operands[2], HImode); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, - gen_rtx (ASHIFT, SImode, operands[1], operands[2])); + gen_rtx_ASHIFT (SImode, operands[1], operands[2])); DONE; } else @@ -1542,9 +1542,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, SImode, operands[0], - gen_rtx (LSHIFTRT, SImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (SImode, operands[0], + gen_rtx_LSHIFTRT (SImode, operands[0], + GEN_INT (1)))); count--; } DONE; @@ -1557,13 +1557,13 @@ extern rtx emit_library_call_value (); start_sequence (); - ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__lshrsi3\"), + ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__lshrsi3\"), NULL_RTX, 1, SImode, 2, operands[1], SImode, operands[2], HImode); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, - gen_rtx (LSHIFTRT, SImode, operands[1], operands[2])); + gen_rtx_LSHIFTRT (SImode, operands[1], operands[2])); DONE; } else @@ -1601,9 +1601,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, SImode, operands[0], - gen_rtx (ASHIFTRT, SImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (SImode, operands[0], + gen_rtx_ASHIFTRT (SImode, operands[0], + GEN_INT (1)))); count--; } DONE; @@ -1616,13 +1616,13 @@ extern rtx emit_library_call_value (); start_sequence (); - ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__ashrsi3\"), + ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__ashrsi3\"), NULL_RTX, 1, SImode, 2, operands[1], SImode, operands[2], HImode); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, - gen_rtx (ASHIFTRT, SImode, operands[1], operands[2])); + gen_rtx_ASHIFTRT (SImode, operands[1], operands[2])); DONE; } else diff --git a/gcc/config/mn10200/xm-mn10200.h b/gcc/config/mn10200/xm-mn10200.h index 7ebac70ed3f..325ee5a5a6b 100644 --- a/gcc/config/mn10200/xm-mn10200.h +++ b/gcc/config/mn10200/xm-mn10200.h @@ -1,5 +1,5 @@ /* Configuration for Matsushita MN10200. - Copyright (C) 1997 Free Software Foundation, Inc. + Copyright (C) 1997, 1998 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -38,10 +38,3 @@ Boston, MA 02111-1307, USA. */ tm.h is a symbolic link to the actual target specific file. */ #include "tm.h" - -#ifndef __STDC__ -extern char *malloc (), *realloc (), *calloc (); -#else -extern void *malloc (), *realloc (), *calloc (); -#endif -extern void free (); diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c index f46e4232083..8e22aa7829f 100644 --- a/gcc/config/mn10300/mn10300.c +++ b/gcc/config/mn10300/mn10300.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Matsushita MN10300 series - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GNU CC. @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -244,7 +244,7 @@ print_operand (file, x, code) case 'A': fputc ('(', file); if (GET_CODE (XEXP (x, 0)) == REG) - output_address (gen_rtx (PLUS, SImode, XEXP (x, 0), GEN_INT (0))); + output_address (gen_rtx_PLUS (SImode, XEXP (x, 0), GEN_INT (0))); else output_address (XEXP (x, 0)); fputc (')', file); @@ -325,9 +325,9 @@ print_operand_address (file, addr) { case REG: if (addr == stack_pointer_rtx) - print_operand_address (file, gen_rtx (PLUS, SImode, - stack_pointer_rtx, - GEN_INT (0))); + print_operand_address (file, gen_rtx_PLUS (SImode, + stack_pointer_rtx, + GEN_INT (0))); else print_operand (file, addr, 0); break; @@ -456,12 +456,12 @@ expand_prologue () if (!regs_ever_live[2]) { regs_ever_live[2] = 1; - zero_dreg = gen_rtx (REG, SImode, 2); + zero_dreg = gen_rtx_REG (SImode, 2); } else { regs_ever_live[3] = 1; - zero_dreg = gen_rtx (REG, SImode, 3); + zero_dreg = gen_rtx_REG (SImode, 3); } } else @@ -475,12 +475,12 @@ expand_prologue () if (!regs_ever_live[6]) { regs_ever_live[6] = 1; - zero_areg = gen_rtx (REG, SImode, 6); + zero_areg = gen_rtx_REG (SImode, 6); } else { regs_ever_live[7] = 1; - zero_areg = gen_rtx (REG, SImode, 7); + zero_areg = gen_rtx_REG (SImode, 7); } } else @@ -503,14 +503,12 @@ expand_prologue () need to be flushed back to the stack. */ if (current_function_varargs) { - emit_move_insn (gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, stack_pointer_rtx, - GEN_INT (4))), - gen_rtx (REG, SImode, 0)); - emit_move_insn (gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, stack_pointer_rtx, - GEN_INT (8))), - gen_rtx (REG, SImode, 1)); + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, 4)), + gen_rtx_REG (SImode, 0)); + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, 8)), + gen_rtx_REG (SImode, 1)); } /* And now store all the registers onto the stack with a @@ -774,12 +772,12 @@ mn10300_builtin_saveregs (arglist) else offset = current_function_arg_offset_rtx; - emit_move_insn (gen_rtx (MEM, SImode, current_function_internal_arg_pointer), - gen_rtx (REG, SImode, 0)); - emit_move_insn (gen_rtx (MEM, SImode, - plus_constant - (current_function_internal_arg_pointer, 4)), - gen_rtx (REG, SImode, 1)); + emit_move_insn (gen_rtx_MEM (SImode, current_function_internal_arg_pointer), + gen_rtx_REG (SImode, 0)); + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant + (current_function_internal_arg_pointer, 4)), + gen_rtx_REG (SImode, 1)); return copy_to_reg (expand_binop (Pmode, add_optab, current_function_internal_arg_pointer, offset, 0, 0, OPTAB_LIB_WIDEN)); @@ -826,10 +824,10 @@ function_arg (cum, mode, type, named) switch (cum->nbytes / UNITS_PER_WORD) { case 0: - result = gen_rtx (REG, mode, 0); + result = gen_rtx_REG (mode, 0); break; case 1: - result = gen_rtx (REG, mode, 1); + result = gen_rtx_REG (mode, 1); break; default: result = 0; @@ -1058,7 +1056,7 @@ legitimize_address (x, oldx, mode) regy2 = force_reg (Pmode, force_operand (XEXP (y, 1), 0)); regx1 = force_reg (Pmode, gen_rtx (GET_CODE (y), Pmode, regx1, regy2)); - return force_reg (Pmode, gen_rtx (PLUS, Pmode, regx1, regy1)); + return force_reg (Pmode, gen_rtx_PLUS (Pmode, regx1, regy1)); } } return x; diff --git a/gcc/config/mn10300/mn10300.h b/gcc/config/mn10300/mn10300.h index 9ebcec147c1..d10f3d7ef59 100644 --- a/gcc/config/mn10300/mn10300.h +++ b/gcc/config/mn10300/mn10300.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Matsushita MN10300 series - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GNU CC. @@ -485,12 +485,12 @@ extern struct rtx_def *function_arg (); otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) ? 4 : 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) ? 4 : 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value. */ @@ -544,9 +544,9 @@ extern struct rtx_def *function_arg (); #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 0x14)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \ (CXT)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 0x18)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \ (FNADDR)); \ } /* A C expression whose value is RTL representing the value of the return @@ -560,7 +560,7 @@ extern struct rtx_def *function_arg (); #define RETURN_ADDR_RTX(COUNT, FRAME) \ ((COUNT == 0) \ - ? gen_rtx (MEM, Pmode, arg_pointer_rtx) \ + ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \ : (rtx) 0) /* Emit code for a call to builtin_saveregs. We must emit USE insns which diff --git a/gcc/config/mn10300/mn10300.md b/gcc/config/mn10300/mn10300.md index 2ff8a8162ea..3a08df606fe 100644 --- a/gcc/config/mn10300/mn10300.md +++ b/gcc/config/mn10300/mn10300.md @@ -1,7 +1,6 @@ ;; GCC machine description for Matsushita MN10300 -;; Copyright (C) 1996, 1997 Free Software Foundation, Inc. - -;; Contributed by Jeff Law (law@cygnus.com). +;; Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. +;; Contributed by Jeff Law (law@cygnus.com). ;; This file is part of GNU CC. @@ -171,8 +170,9 @@ && (GET_MODE_SIZE (GET_MODE (XEXP (operands[1], 1))) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (XEXP (operands[1], 1)))))) emit_move_insn (operands[2], - gen_rtx (ZERO_EXTEND, GET_MODE (XEXP (operands[1], 1)), - SUBREG_REG (XEXP (operands[1], 1)))); + gen_rtx_ZERO_EXTEND + (GET_MODE (XEXP (operands[1], 1)), + SUBREG_REG (XEXP (operands[1], 1)))); else emit_move_insn (operands[2], XEXP (operands[1], 1)); } @@ -183,8 +183,9 @@ && (GET_MODE_SIZE (GET_MODE (XEXP (operands[1], 0))) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (XEXP (operands[1], 0)))))) emit_move_insn (operands[2], - gen_rtx (ZERO_EXTEND, GET_MODE (XEXP (operands[1], 0)), - SUBREG_REG (XEXP (operands[1], 0)))); + gen_rtx_ZERO_EXTEND + (GET_MODE (XEXP (operands[1], 0)), + SUBREG_REG (XEXP (operands[1], 0)))); else emit_move_insn (operands[2], XEXP (operands[1], 0)); } @@ -382,7 +383,7 @@ if (GET_CODE (temp) != REG) abort (); - if (reg_overlap_mentioned_p (gen_rtx (REG, SImode, REGNO (temp)), + if (reg_overlap_mentioned_p (gen_rtx_REG (SImode, REGNO (temp)), XEXP (operands[1], 0))) return \"mov %H1,%H0\;mov %L1,%L0\"; else @@ -543,7 +544,7 @@ if (GET_CODE (temp) != REG) abort (); - if (reg_overlap_mentioned_p (gen_rtx (REG, SImode, REGNO (temp)), + if (reg_overlap_mentioned_p (gen_rtx_REG (SImode, REGNO (temp)), XEXP (operands[1], 0))) return \"mov %H1,%H0\;mov %L1,%L0\"; else @@ -675,7 +676,7 @@ && GET_CODE (operands[2]) != CONST_INT) { rtx temp = gen_reg_rtx (SImode); - emit_move_insn (temp, gen_rtx (PLUS, SImode, operands[1], operands[2])); + emit_move_insn (temp, gen_rtx_PLUS (SImode, operands[1], operands[2])); emit_move_insn (operands[0], temp); DONE; } diff --git a/gcc/config/mn10300/xm-mn10300.h b/gcc/config/mn10300/xm-mn10300.h index 63d61c276c2..bdbe17c5d37 100644 --- a/gcc/config/mn10300/xm-mn10300.h +++ b/gcc/config/mn10300/xm-mn10300.h @@ -1,5 +1,5 @@ /* Configuration for Matsushita MN10300. - Copyright (C) 1996 Free Software Foundation, Inc. + Copyright (C) 1996, 1998 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -38,10 +38,3 @@ Boston, MA 02111-1307, USA. */ tm.h is a symbolic link to the actual target specific file. */ #include "tm.h" - -#ifndef __STDC__ -extern char *malloc (), *realloc (), *calloc (); -#else -extern void *malloc (), *realloc (), *calloc (); -#endif -extern void free (); diff --git a/gcc/config/ns32k/ns32k.c b/gcc/config/ns32k/ns32k.c index 2e8a4a24de6..0d2d2ef343a 100644 --- a/gcc/config/ns32k/ns32k.c +++ b/gcc/config/ns32k/ns32k.c @@ -1,5 +1,5 @@ /* Subroutines for assembler code output on the NS32000. - Copyright (C) 1988, 1994, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1988, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -18,9 +18,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* Some output-actions in ns32k.md need these. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -206,10 +205,10 @@ gen_indexed_expr (base, index, scale) /* This generates an invalid addressing mode, if BASE is fp or sp. This is handled by PRINT_OPERAND_ADDRESS. */ if (GET_CODE (base) != REG && GET_CODE (base) != CONST_INT) - base = gen_rtx (MEM, SImode, base); - addr = gen_rtx (MULT, SImode, index, - gen_rtx (CONST_INT, VOIDmode, 1 << INTVAL (scale))); - addr = gen_rtx (PLUS, SImode, base, addr); + base = gen_rtx_MEM (SImode, base); + addr = gen_rtx_MULT (SImode, index, + GEN_INT (1 << INTVAL (scale))); + addr = gen_rtx_PLUS (SImode, base, addr); return addr; } @@ -243,8 +242,8 @@ split_di (operands, num, lo_half, hi_half) { if (GET_CODE (operands[num]) == REG) { - lo_half[num] = gen_rtx (REG, SImode, REGNO (operands[num])); - hi_half[num] = gen_rtx (REG, SImode, REGNO (operands[num]) + 1); + lo_half[num] = gen_rtx_REG (SImode, REGNO (operands[num])); + hi_half[num] = gen_rtx_REG (SImode, REGNO (operands[num]) + 1); } else if (CONSTANT_P (operands[num])) { @@ -321,14 +320,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -379,7 +378,7 @@ output_move_double (operands) xops[0] = XEXP (operands[1], 0); xops[1] = operands[0]; output_asm_insn ("addr %a0,%1", xops); - operands[1] = gen_rtx (MEM, DImode, operands[0]); + operands[1] = gen_rtx_MEM (DImode, operands[0]); latehalf[1] = adj_offsettable_operand (operands[1], 4); /* The first half has the overlap, Do the late half first. */ output_asm_insn (singlemove_string (latehalf), latehalf); @@ -677,7 +676,7 @@ print_operand_address (file, addr) case CONST_INT: case LABEL_REF: if (offset) - offset = gen_rtx (PLUS, SImode, tmp, offset); + offset = gen_rtx_PLUS (SImode, tmp, offset); else offset = tmp; break; @@ -772,7 +771,7 @@ print_operand_address (file, addr) case SYMBOL_REF: case LABEL_REF: if (offset) - offset = gen_rtx (PLUS, SImode, tmp, offset); + offset = gen_rtx_PLUS (SImode, tmp, offset); else offset = tmp; break; diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h index 70cd9f201ae..5c2d8b8a0d1 100644 --- a/gcc/config/ns32k/ns32k.h +++ b/gcc/config/ns32k/ns32k.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. NS32000 version. - Copyright (C) 1988, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1988, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@cygnus.com) This file is part of GNU CC. @@ -421,8 +421,8 @@ enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, GEN_AND_FP_REGS, #define FUNCTION_VALUE(VALTYPE, FUNC) \ (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_32081 \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0)) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ @@ -432,8 +432,8 @@ enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, GEN_AND_FP_REGS, #define LIBCALL_VALUE(MODE) \ (((MODE) == DFmode || (MODE) == SFmode) && TARGET_32081 \ - ? gen_rtx (REG, MODE, 8) \ - : gen_rtx (REG, MODE, 0)) + ? gen_rtx_REG (MODE, 8) \ + : gen_rtx_REG (MODE, 0)) /* Define this if PCC uses the nonreentrant convention for returning structure and union values. */ @@ -498,7 +498,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, GEN_AND_FP_REGS, It exists only to test register calling conventions. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ -((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) +((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0) /* For an arg passed partly in registers and partly in memory, this is the number of registers used. @@ -784,8 +784,8 @@ operands on the 32k are stored). */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \ } /* This is the library routine that is used diff --git a/gcc/config/ns32k/ns32k.md b/gcc/config/ns32k/ns32k.md index 28e65e6df91..56e18d22dcd 100644 --- a/gcc/config/ns32k/ns32k.md +++ b/gcc/config/ns32k/ns32k.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, ns32000 Version -;; Copyright (C) 1988, 1994, 1996 Free Software Foundation, Inc. +;; Copyright (C) 1988, 1994, 1996, 1998 Free Software Foundation, Inc. ;; Contributed by Michael Tiemann (tiemann@cygnus.com) ;; This file is part of GNU CC. @@ -125,7 +125,7 @@ { cc_status.flags |= CC_REVERSED; if (INTVAL (operands[1]) > 7) - operands[1] = gen_rtx(CONST_INT, VOIDmode, i); + operands[1] = GEN_INT (i); return \"cmpqw %1,%0\"; } } @@ -136,7 +136,7 @@ if (i <= 7 && i >= -8) { if (INTVAL (operands[0]) > 7) - operands[0] = gen_rtx(CONST_INT, VOIDmode, i); + operands[0] = GEN_INT (i); return \"cmpqw %0,%1\"; } } @@ -157,7 +157,7 @@ { cc_status.flags |= CC_REVERSED; if (INTVAL (operands[1]) > 7) - operands[1] = gen_rtx(CONST_INT, VOIDmode, i); + operands[1] = GEN_INT (i); return \"cmpqb %1,%0\"; } } @@ -168,7 +168,7 @@ if (i <= 7 && i >= -8) { if (INTVAL (operands[0]) > 7) - operands[0] = gen_rtx(CONST_INT, VOIDmode, i); + operands[0] = GEN_INT (i); return \"cmpqb %0,%1\"; } } @@ -202,7 +202,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"movd %1,tos\", xoperands); output_asm_insn (\"movd %1,tos\", operands); return \"movl tos,%0\"; @@ -214,7 +214,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"movl %1,tos\;movd tos,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"movd tos,%0\"; } else @@ -259,7 +259,7 @@ convrt.f = convrt.d; /* Is there a better machine-independent way to to this? */ - operands[1] = gen_rtx (CONST_INT, VOIDmode, convrt.i[0]); + operands[1] = GEN_INT (convrt.i[0]); return \"movd %1,%0\"; } #endif @@ -285,7 +285,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"movd %1,tos\", xoperands); output_asm_insn (\"movd %1,tos\", operands); return \"movl tos,%0\"; @@ -297,7 +297,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"movl %1,tos\;movd tos,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"movd tos,%0\"; } else @@ -338,8 +338,7 @@ && REGNO (operands[0]) == FRAME_POINTER_REGNUM) return \"lprd fp,%1\"; if (GET_CODE (operands[1]) == CONST_DOUBLE) - operands[1] - = gen_rtx (CONST_INT, VOIDmode, CONST_DOUBLE_LOW (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); if (GET_CODE (operands[1]) == CONST_INT) { int i = INTVAL (operands[1]); @@ -400,7 +399,7 @@ rtx xoperands[3]; xoperands[0] = operands[0]; xoperands[1] = XEXP (operands[1], 0); - xoperands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (XEXP (operands[1], 1)) >> 1); + xoperands[2] = GEN_INT (INTVAL (XEXP (operands[1], 1)) >> 1); return output_shift_insn (xoperands); } return \"addr %a1,%0\"; @@ -418,8 +417,7 @@ if (i <= 7 && i >= -8) { if (INTVAL (operands[1]) > 7) - operands[1] = - gen_rtx (CONST_INT, VOIDmode, i); + operands[1] = GEN_INT (i); return \"movqw %1,%0\"; } return \"movw %1,%0\"; @@ -464,8 +462,7 @@ if (char_val <= 7 && char_val >= -8) { if (INTVAL (operands[1]) > 7) - operands[1] = - gen_rtx (CONST_INT, VOIDmode, char_val); + operands[1] = GEN_INT (char_val); return \"movqb %1,%0\"; } return \"movb %1,%0\"; @@ -543,7 +540,7 @@ #ifdef UTEK_ASM if (GET_CODE (operands[2]) == CONST_INT && (INTVAL (operands[2]) & 0x3) == 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) >> 2); + operands[2] = GEN_INT (INTVAL (operands[2]) >> 2); if ((unsigned) INTVAL (operands[2]) <= 7) return \"movqd %2,r0\;movsd $0\"; else @@ -556,7 +553,7 @@ #else if (GET_CODE (operands[2]) == CONST_INT && (INTVAL (operands[2]) & 0x3) == 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) >> 2); + operands[2] = GEN_INT (INTVAL (operands[2]) >> 2); if ((unsigned) INTVAL (operands[2]) <= 7) return \"movqd %2,r0\;movsd\"; else @@ -1217,7 +1214,7 @@ "" "* { - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"deid %2,%0\;movd %1,%0\"; }") @@ -1228,7 +1225,7 @@ "" "* { - operands[1] = gen_rtx (REG, HImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); return \"deiw %2,%0\;movw %1,%0\"; }") @@ -1239,7 +1236,7 @@ "" "* { - operands[1] = gen_rtx (REG, QImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (QImode, REGNO (operands[0]) + 1); return \"deib %2,%0\;movb %1,%0\"; }") @@ -1314,8 +1311,7 @@ return \"movqb %$0,%0\"; else { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff); return \"andb %2,%0\"; } } @@ -1325,8 +1321,7 @@ return \"movqw %$0,%0\"; else { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); return \"andw %2,%0\"; } } @@ -1348,8 +1343,7 @@ return \"movqb %$0,%0\"; else { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff); return \"andb %2,%0\"; } } @@ -1602,7 +1596,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1627,7 +1621,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1652,7 +1646,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1680,7 +1674,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1705,7 +1699,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1730,7 +1724,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1779,7 +1773,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1804,7 +1798,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1829,7 +1823,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1865,7 +1859,7 @@ rtx xoperands[3]; xoperands[0] = operands[0]; xoperands[1] = XEXP (operands[1], 0); - xoperands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (XEXP (operands[1], 1)) >> 1); + xoperands[2] = GEN_INT (INTVAL (XEXP (operands[1], 1)) >> 1); return output_shift_insn (xoperands); } return \"addr %a1,%0\"; @@ -2040,7 +2034,7 @@ { operands[0] = adj_offsettable_operand (operands[0], INTVAL (operands[2]) / 8); - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) % 8); + operands[2] = GEN_INT (INTVAL (operands[2]) % 8); } if (INTVAL (operands[1]) <= 8) return \"inssb %3,%0,%2,%1\"; diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index d2265e6efba..98d481ca6f0 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -602,13 +602,18 @@ legitimize_pic_address (orig, mode, reg) if (flag_pic == 2) { emit_insn (gen_pic2_highpart (reg, pic_offset_table_rtx, orig)); - pic_ref = gen_rtx (MEM, Pmode, - gen_rtx (LO_SUM, Pmode, reg, - gen_rtx (UNSPEC, SImode, gen_rtvec (1, orig), 0))); + pic_ref + = gen_rtx_MEM (Pmode, + gen_rtx_LO_SUM (Pmode, reg, + gen_rtx_UNSPEC (SImode, + gen_rtvec (1, orig), + 0))); } else - pic_ref = gen_rtx (MEM, Pmode, - gen_rtx (PLUS, Pmode, pic_offset_table_rtx, orig)); + pic_ref = gen_rtx_MEM (Pmode, + gen_rtx_PLUS (Pmode, pic_offset_table_rtx, + orig)); + current_function_uses_pic_offset_table = 1; RTX_UNCHANGING_P (pic_ref) = 1; emit_move_insn (reg, pic_ref); @@ -638,7 +643,7 @@ legitimize_pic_address (orig, mode, reg) return plus_constant_for_output (base, INTVAL (orig)); orig = force_reg (Pmode, orig); } - pic_ref = gen_rtx (PLUS, Pmode, base, orig); + pic_ref = gen_rtx_PLUS (Pmode, base, orig); /* Likewise, should we set special REG_NOTEs here? */ } return pic_ref; @@ -716,7 +721,7 @@ hppa_legitimize_address (x, oldx, mode) && GET_CODE (XEXP (x, 1)) == SYMBOL_REF) { rtx reg = force_reg (SImode, XEXP (x, 1)); - return force_reg (SImode, gen_rtx (PLUS, SImode, reg, XEXP (x, 0))); + return force_reg (SImode, gen_rtx_PLUS (SImode, reg, XEXP (x, 0))); } /* Note we must reject symbols which represent function addresses @@ -748,17 +753,14 @@ hppa_legitimize_address (x, oldx, mode) if (! VAL_14_BITS_P (newoffset) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) { - rtx const_part = gen_rtx (CONST, VOIDmode, - gen_rtx (PLUS, Pmode, - XEXP (x, 0), - GEN_INT (newoffset))); + rtx const_part = plus_constant (XEXP (x, 0), newoffset); rtx tmp_reg = force_reg (Pmode, - gen_rtx (HIGH, Pmode, const_part)); + gen_rtx_HIGH (Pmode, const_part)); ptr_reg = force_reg (Pmode, - gen_rtx (LO_SUM, Pmode, - tmp_reg, const_part)); + gen_rtx_LO_SUM (Pmode, + tmp_reg, const_part)); } else { @@ -768,9 +770,9 @@ hppa_legitimize_address (x, oldx, mode) int_part = GEN_INT (newoffset); ptr_reg = force_reg (Pmode, - gen_rtx (PLUS, Pmode, - force_reg (Pmode, XEXP (x, 0)), - int_part)); + gen_rtx_PLUS (Pmode, + force_reg (Pmode, XEXP (x, 0)), + int_part)); } return plus_constant (ptr_reg, offset - newoffset); } @@ -795,10 +797,11 @@ hppa_legitimize_address (x, oldx, mode) if (GET_CODE (reg2) != REG) reg2 = force_reg (Pmode, force_operand (reg2, 0)); - return force_reg (Pmode, gen_rtx (PLUS, Pmode, - gen_rtx (MULT, Pmode, - reg2, GEN_INT (val)), - reg1)); + return force_reg (Pmode, gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, + reg2, + GEN_INT (val)), + reg1)); } /* Similarly for (plus (plus (mult (a) (shadd_constant)) (b)) (c)). @@ -837,11 +840,11 @@ hppa_legitimize_address (x, oldx, mode) { base = reg1; orig_base = XEXP (XEXP (x, 0), 1); - idx = gen_rtx (PLUS, Pmode, - gen_rtx (MULT, Pmode, - XEXP (XEXP (XEXP (x, 0), 0), 0), - XEXP (XEXP (XEXP (x, 0), 0), 1)), - XEXP (x, 1)); + idx = gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, + XEXP (XEXP (XEXP (x, 0), 0), 0), + XEXP (XEXP (XEXP (x, 0), 0), 1)), + XEXP (x, 1)); } else if (GET_CODE (reg2) == REG && REGNO_POINTER_FLAG (REGNO (reg2))) @@ -869,13 +872,15 @@ hppa_legitimize_address (x, oldx, mode) if (GET_CODE (reg1) != REG) reg1 = force_reg (Pmode, force_operand (reg1, 0)); - reg1 = force_reg (Pmode, gen_rtx (PLUS, Pmode, reg1, GEN_INT (val))); + reg1 = force_reg (Pmode, gen_rtx_PLUS (Pmode, reg1, GEN_INT (val))); /* We can now generate a simple scaled indexed address. */ - return force_reg (Pmode, gen_rtx (PLUS, Pmode, - gen_rtx (MULT, Pmode, reg1, - XEXP (XEXP (idx, 0), 1)), - base)); + return + force_reg + (Pmode, gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, reg1, + XEXP (XEXP (idx, 0), 1)), + base)); } /* If B + C is still a valid base register, then add them. */ @@ -886,16 +891,17 @@ hppa_legitimize_address (x, oldx, mode) int val = INTVAL (XEXP (XEXP (idx, 0), 1)); rtx reg1, reg2; - reg1 = force_reg (Pmode, gen_rtx (PLUS, Pmode, base, XEXP (idx, 1))); + reg1 = force_reg (Pmode, gen_rtx_PLUS (Pmode, base, XEXP (idx, 1))); reg2 = XEXP (XEXP (idx, 0), 0); if (GET_CODE (reg2) != CONST_INT) reg2 = force_reg (Pmode, force_operand (reg2, 0)); - return force_reg (Pmode, gen_rtx (PLUS, Pmode, - gen_rtx (MULT, Pmode, - reg2, GEN_INT (val)), - reg1)); + return force_reg (Pmode, gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, + reg2, + GEN_INT (val)), + reg1)); } /* Get the index into a register, then add the base + index and @@ -911,13 +917,14 @@ hppa_legitimize_address (x, oldx, mode) if (GET_CODE (reg2) != REG) reg2 = force_reg (Pmode, force_operand (reg2, 0)); - reg1 = force_reg (Pmode, gen_rtx (PLUS, Pmode, - gen_rtx (MULT, Pmode, reg1, - XEXP (XEXP (idx, 0), 1)), - reg2)); + reg1 = force_reg (Pmode, + gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, reg1, + XEXP (XEXP (idx, 0), 1)), + reg2)); /* Add the result to our base register and return. */ - return force_reg (Pmode, gen_rtx (PLUS, Pmode, base, reg1)); + return force_reg (Pmode, gen_rtx_PLUS (Pmode, base, reg1)); } @@ -976,10 +983,12 @@ hppa_legitimize_address (x, oldx, mode) if (GET_CODE (reg2) != REG) reg2 = force_reg (Pmode, force_operand (reg2, 0)); - return force_reg (Pmode, gen_rtx (PLUS, Pmode, - gen_rtx (MULT, Pmode, - reg2, GEN_INT (val)), - reg1)); + return force_reg (Pmode, + gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, + reg2, + GEN_INT (val)), + reg1)); } else if ((mode == DFmode || mode == SFmode) && GET_CODE (XEXP (y, 0)) == SYMBOL_REF @@ -997,10 +1006,11 @@ hppa_legitimize_address (x, oldx, mode) regx2 = force_reg (Pmode, force_operand (regx2, 0)); regx2 = force_reg (Pmode, gen_rtx (GET_CODE (y), Pmode, regx2, regx1)); - return force_reg (Pmode, - gen_rtx (PLUS, Pmode, - gen_rtx (MULT, Pmode, regx2, - XEXP (XEXP (x, 0), 1)), + return + force_reg (Pmode, + gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, regx2, + XEXP (XEXP (x, 0), 1)), force_reg (Pmode, XEXP (y, 0)))); } else if (GET_CODE (XEXP (y, 1)) == CONST_INT @@ -1020,7 +1030,7 @@ hppa_legitimize_address (x, oldx, mode) regy2 = force_reg (Pmode, force_operand (XEXP (y, 1), 0)); regx1 = force_reg (Pmode, gen_rtx (GET_CODE (y), Pmode, regx1, regy2)); - return force_reg (Pmode, gen_rtx (PLUS, Pmode, regx1, regy1)); + return force_reg (Pmode, gen_rtx_PLUS (Pmode, regx1, regy1)); } } } @@ -1089,11 +1099,11 @@ emit_move_sequence (operands, mode, scratch_reg) if (reload_in_progress && GET_CODE (operand0) == MEM && ((tem = find_replacement (&XEXP (operand0, 0))) != XEXP (operand0, 0))) - operand0 = gen_rtx (MEM, GET_MODE (operand0), tem); + operand0 = gen_rtx_MEM (GET_MODE (operand0), tem); if (reload_in_progress && GET_CODE (operand1) == MEM && ((tem = find_replacement (&XEXP (operand1, 0))) != XEXP (operand1, 0))) - operand1 = gen_rtx (MEM, GET_MODE (operand1), tem); + operand1 = gen_rtx_MEM (GET_MODE (operand1), tem); /* Handle secondary reloads for loads/stores of FP registers from REG+D addresses where D does not fit in 5 bits, including @@ -1109,7 +1119,7 @@ emit_move_sequence (operands, mode, scratch_reg) if (GET_CODE (operand1) == SUBREG) operand1 = XEXP (operand1, 0); - scratch_reg = gen_rtx (REG, SImode, REGNO (scratch_reg)); + scratch_reg = gen_rtx_REG (SImode, REGNO (scratch_reg)); /* D might not fit in 14 bits either; for such cases load D into scratch reg. */ @@ -1123,8 +1133,8 @@ emit_move_sequence (operands, mode, scratch_reg) } else emit_move_insn (scratch_reg, XEXP (operand1, 0)); - emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (MEM, mode, - scratch_reg))); + emit_insn (gen_rtx_SET (VOIDmode, operand0, + gen_rtx_MEM (mode, scratch_reg))); return 1; } else if (fp_reg_operand (operand1, mode) @@ -1138,7 +1148,7 @@ emit_move_sequence (operands, mode, scratch_reg) if (GET_CODE (operand0) == SUBREG) operand0 = XEXP (operand0, 0); - scratch_reg = gen_rtx (REG, SImode, REGNO (scratch_reg)); + scratch_reg = gen_rtx_REG (SImode, REGNO (scratch_reg)); /* D might not fit in 14 bits either; for such cases load D into scratch reg. */ if (!memory_address_p (SImode, XEXP (operand0, 0))) @@ -1151,8 +1161,8 @@ emit_move_sequence (operands, mode, scratch_reg) } else emit_move_insn (scratch_reg, XEXP (operand0, 0)); - emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (MEM, mode, scratch_reg), - operand1)); + emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_MEM (mode, scratch_reg), + operand1)); return 1; } /* Handle secondary reloads for loads of FP registers from constant @@ -1177,8 +1187,8 @@ emit_move_sequence (operands, mode, scratch_reg) emit_move_sequence (xoperands, Pmode, 0); /* Now load the destination register. */ - emit_insn (gen_rtx (SET, mode, operand0, - gen_rtx (MEM, mode, scratch_reg))); + emit_insn (gen_rtx_SET (mode, operand0, + gen_rtx_MEM (mode, scratch_reg))); return 1; } /* Handle secondary reloads for SAR. These occur when trying to load @@ -1201,8 +1211,8 @@ emit_move_sequence (operands, mode, scratch_reg) SImode, XEXP (XEXP (operand1, 0), 0), scratch_reg)); - emit_move_insn (scratch_reg, gen_rtx (MEM, GET_MODE (operand1), - scratch_reg)); + emit_move_insn (scratch_reg, gen_rtx_MEM (GET_MODE (operand1), + scratch_reg)); } else emit_move_insn (scratch_reg, operand1); @@ -1221,7 +1231,7 @@ emit_move_sequence (operands, mode, scratch_reg) || GET_CODE (operand1) == MEM) { /* Run this case quickly. */ - emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1)); + emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); return 1; } } @@ -1232,14 +1242,14 @@ emit_move_sequence (operands, mode, scratch_reg) { rtx temp = gen_reg_rtx (DFmode); - emit_insn (gen_rtx (SET, VOIDmode, temp, operand1)); - emit_insn (gen_rtx (SET, VOIDmode, operand0, temp)); + emit_insn (gen_rtx_SET (VOIDmode, temp, operand1)); + emit_insn (gen_rtx_SET (VOIDmode, operand0, temp)); return 1; } if (register_operand (operand1, mode) || operand1 == CONST0_RTX (mode)) { /* Run this case quickly. */ - emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1)); + emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); return 1; } if (! (reload_in_progress || reload_completed)) @@ -1301,7 +1311,7 @@ emit_move_sequence (operands, mode, scratch_reg) /* Now load from the memory location into our destination register. */ - operands[1] = gen_rtx (MEM, Pmode, operands[0]); + operands[1] = gen_rtx_MEM (Pmode, operands[0]); emit_move_sequence (operands, mode, scratch_reg); /* And add back in the constant part. */ @@ -1337,7 +1347,7 @@ emit_move_sequence (operands, mode, scratch_reg) else { operands[1] = legitimize_pic_address (operand1, mode, temp); - emit_insn (gen_rtx (SET, VOIDmode, operand0, operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operand0, operands[1])); } } /* On the HPPA, references to data space are supposed to use dp, @@ -1362,15 +1372,15 @@ emit_move_sequence (operands, mode, scratch_reg) if (REGNO (temp) >= FIRST_PSEUDO_REGISTER) REGNO_POINTER_FLAG (REGNO (temp)) = 1; if (ishighonly) - set = gen_rtx (SET, mode, operand0, temp); + set = gen_rtx_SET (mode, operand0, temp); else - set = gen_rtx (SET, VOIDmode, - operand0, - gen_rtx (LO_SUM, mode, temp, operand1)); + set = gen_rtx_SET (VOIDmode, + operand0, + gen_rtx_LO_SUM (mode, temp, operand1)); - emit_insn (gen_rtx (SET, VOIDmode, - temp, - gen_rtx (HIGH, mode, operand1))); + emit_insn (gen_rtx_SET (VOIDmode, + temp, + gen_rtx_HIGH (mode, operand1))); emit_insn (set); } @@ -1386,9 +1396,9 @@ emit_move_sequence (operands, mode, scratch_reg) else temp = gen_reg_rtx (mode); - emit_insn (gen_rtx (SET, VOIDmode, temp, - gen_rtx (HIGH, mode, operand1))); - operands[1] = gen_rtx (LO_SUM, mode, temp, operand1); + emit_insn (gen_rtx_SET (VOIDmode, temp, + gen_rtx_HIGH (mode, operand1))); + operands[1] = gen_rtx_LO_SUM (mode, temp, operand1); } } /* Now have insn-emit do whatever it normally does. */ @@ -1597,7 +1607,7 @@ output_move_double (operands) rtx addr = XEXP (operands[0], 0); if (GET_CODE (addr) == POST_INC || GET_CODE (addr) == POST_DEC) { - rtx high_reg = gen_rtx (SUBREG, SImode, operands[1], 0); + rtx high_reg = gen_rtx_SUBREG (SImode, operands[1], 0); operands[0] = XEXP (addr, 0); if (GET_CODE (operands[1]) != REG || GET_CODE (operands[0]) != REG) @@ -1617,7 +1627,7 @@ output_move_double (operands) } else if (GET_CODE (addr) == PRE_INC || GET_CODE (addr) == PRE_DEC) { - rtx high_reg = gen_rtx (SUBREG, SImode, operands[1], 0); + rtx high_reg = gen_rtx_SUBREG (SImode, operands[1], 0); operands[0] = XEXP (addr, 0); if (GET_CODE (operands[1]) != REG || GET_CODE (operands[0]) != REG) @@ -1644,7 +1654,7 @@ output_move_double (operands) rtx addr = XEXP (operands[1], 0); if (GET_CODE (addr) == POST_INC || GET_CODE (addr) == POST_DEC) { - rtx high_reg = gen_rtx (SUBREG, SImode, operands[0], 0); + rtx high_reg = gen_rtx_SUBREG (SImode, operands[0], 0); operands[1] = XEXP (addr, 0); if (GET_CODE (operands[0]) != REG || GET_CODE (operands[1]) != REG) @@ -1671,7 +1681,7 @@ output_move_double (operands) } else if (GET_CODE (addr) == PRE_INC || GET_CODE (addr) == PRE_DEC) { - rtx high_reg = gen_rtx (SUBREG, SImode, operands[0], 0); + rtx high_reg = gen_rtx_SUBREG (SImode, operands[0], 0); operands[1] = XEXP (addr, 0); if (GET_CODE (operands[0]) != REG || GET_CODE (operands[1]) != REG) @@ -1699,7 +1709,7 @@ output_move_double (operands) else if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 0)) == MULT) { - rtx high_reg = gen_rtx (SUBREG, SImode, operands[0], 0); + rtx high_reg = gen_rtx_SUBREG (SImode, operands[0], 0); if (!reg_overlap_mentioned_p (high_reg, addr)) { @@ -1744,14 +1754,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -1842,7 +1852,7 @@ output_fp_move_double (operands) if (GET_CODE (operands[0]) == REG) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xoperands[0] = operands[0]; output_asm_insn ("copy %%r0,%0\n\tcopy %%r0,%1", xoperands); } @@ -2383,28 +2393,26 @@ remove_useless_addtr_insns (insns, check_notes) Note in DISP > 8k case, we will leave the high part of the address in %r1. There is code in expand_hppa_{prologue,epilogue} that knows this.*/ + static void store_reg (reg, disp, base) int reg, disp, base; { if (VAL_14_BITS_P (disp)) - { - emit_move_insn (gen_rtx (MEM, SImode, - gen_rtx (PLUS, SImode, - gen_rtx (REG, SImode, base), - GEN_INT (disp))), - gen_rtx (REG, SImode, reg)); - } + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (gen_rtx_REG (SImode, base), + disp)), + gen_rtx_REG (SImode, reg)); else { - emit_insn (gen_add_high_const (gen_rtx (REG, SImode, 1), - gen_rtx (REG, SImode, base), + emit_insn (gen_add_high_const (gen_rtx_REG (SImode, 1), + gen_rtx_REG (SImode, base), GEN_INT (disp))); - emit_move_insn (gen_rtx (MEM, SImode, - gen_rtx (LO_SUM, SImode, - gen_rtx (REG, SImode, 1), - GEN_INT (disp))), - gen_rtx (REG, SImode, reg)); + emit_move_insn (gen_rtx_MEM (SImode, + gen_rtx_LO_SUM (SImode, + gen_rtx_REG (SImode, 1), + GEN_INT (disp))), + gen_rtx_REG (SImode, reg)); } } @@ -2413,28 +2421,26 @@ store_reg (reg, disp, base) Note in DISP > 8k case, we will leave the high part of the address in %r1. There is code in expand_hppa_{prologue,epilogue} that knows this.*/ + static void load_reg (reg, disp, base) int reg, disp, base; { if (VAL_14_BITS_P (disp)) - { - emit_move_insn (gen_rtx (REG, SImode, reg), - gen_rtx (MEM, SImode, - gen_rtx (PLUS, SImode, - gen_rtx (REG, SImode, base), - GEN_INT (disp)))); - } + emit_move_insn (gen_rtx_REG (SImode, reg), + gen_rtx_MEM (SImode, + plus_constant (gen_rtx_REG (SImode, base), + disp))); else { - emit_insn (gen_add_high_const (gen_rtx (REG, SImode, 1), - gen_rtx (REG, SImode, base), + emit_insn (gen_add_high_const (gen_rtx_REG (SImode, 1), + gen_rtx_REG (SImode, base), GEN_INT (disp))); - emit_move_insn (gen_rtx (REG, SImode, reg), - gen_rtx (MEM, SImode, - gen_rtx (LO_SUM, SImode, - gen_rtx (REG, SImode, 1), - GEN_INT (disp)))); + emit_move_insn (gen_rtx_REG (SImode, reg), + gen_rtx_MEM (SImode, + gen_rtx_LO_SUM (SImode, + gen_rtx_REG (SImode, 1), + GEN_INT (disp)))); } } @@ -2443,26 +2449,23 @@ load_reg (reg, disp, base) Note in DISP > 8k case, we will leave the high part of the address in %r1. There is code in expand_hppa_{prologue,epilogue} that knows this.*/ + static void -set_reg_plus_d(reg, base, disp) +set_reg_plus_d (reg, base, disp) int reg, base, disp; { if (VAL_14_BITS_P (disp)) - { - emit_move_insn (gen_rtx (REG, SImode, reg), - gen_rtx (PLUS, SImode, - gen_rtx (REG, SImode, base), - GEN_INT (disp))); - } + emit_move_insn (gen_rtx_REG (SImode, reg), + plus_constant (gen_rtx_REG (SImode, base), disp)); else { - emit_insn (gen_add_high_const (gen_rtx (REG, SImode, 1), - gen_rtx (REG, SImode, base), + emit_insn (gen_add_high_const (gen_rtx_REG (SImode, 1), + gen_rtx_REG (SImode, base), GEN_INT (disp))); - emit_move_insn (gen_rtx (REG, SImode, reg), - gen_rtx (LO_SUM, SImode, - gen_rtx (REG, SImode, 1), - GEN_INT (disp))); + emit_move_insn (gen_rtx_REG (SImode, reg), + gen_rtx_LO_SUM (SImode, + gen_rtx_REG (SImode, 1), + GEN_INT (disp))); } } @@ -2604,7 +2607,7 @@ hppa_expand_prologue() actual_fsize = compute_frame_size (size, &save_fregs); /* Compute a few things we will use often. */ - tmpreg = gen_rtx (REG, SImode, 1); + tmpreg = gen_rtx_REG (SImode, 1); size_rtx = GEN_INT (actual_fsize); /* Handle out of line prologues and epilogues. */ @@ -2667,16 +2670,16 @@ hppa_expand_prologue() if (inline_insn_count > outline_insn_count) { /* Put the local_fisze into %r19. */ - operands[0] = gen_rtx (REG, SImode, 19); + operands[0] = gen_rtx_REG (SImode, 19); operands[1] = GEN_INT (local_fsize); emit_move_insn (operands[0], operands[1]); /* Put the stack size into %r21. */ - operands[0] = gen_rtx (REG, SImode, 21); + operands[0] = gen_rtx_REG (SImode, 21); operands[1] = size_rtx; emit_move_insn (operands[0], operands[1]); - operands[0] = gen_rtx (REG, SImode, 22); + operands[0] = gen_rtx_REG (SImode, 22); operands[1] = GEN_INT (saves); emit_move_insn (operands[0], operands[1]); @@ -2780,8 +2783,8 @@ hppa_expand_prologue() place to get the expected results. sprintf here is just to put something in the name. */ sprintf(hp_profile_label_name, "LP$%04d", -1); - hp_profile_label_rtx = gen_rtx (SYMBOL_REF, SImode, - hp_profile_label_name); + hp_profile_label_rtx = gen_rtx_SYMBOL_REF (SImode, + hp_profile_label_name); if (current_function_returns_struct) store_reg (STRUCT_VALUE_REGNUM, - 12 - offsetadj, basereg); @@ -2793,10 +2796,10 @@ hppa_expand_prologue() pc_offset += VAL_14_BITS_P (arg_offset) ? 4 : 8; } - emit_move_insn (gen_rtx (REG, SImode, 26), gen_rtx (REG, SImode, 2)); - emit_move_insn (tmpreg, gen_rtx (HIGH, SImode, hp_profile_label_rtx)); - emit_move_insn (gen_rtx (REG, SImode, 24), - gen_rtx (LO_SUM, SImode, tmpreg, hp_profile_label_rtx)); + emit_move_insn (gen_rtx_REG (SImode, 26), gen_rtx_REG (SImode, 2)); + emit_move_insn (tmpreg, gen_rtx_HIGH (SImode, hp_profile_label_rtx)); + emit_move_insn (gen_rtx_REG (SImode, 24), + gen_rtx_LO_SUM (SImode, tmpreg, hp_profile_label_rtx)); /* %r25 is set from within the output pattern. */ emit_insn (gen_call_profiler (GEN_INT (- pc_offset - 20))); @@ -2838,7 +2841,7 @@ hppa_expand_prologue() { merge_sp_adjust_with_store = 0; emit_insn (gen_post_stwm (stack_pointer_rtx, - gen_rtx (REG, SImode, i), + gen_rtx_REG (SImode, i), GEN_INT (-offset))); } else @@ -2873,9 +2876,9 @@ hppa_expand_prologue() { if (regs_ever_live[i] || regs_ever_live[i + 1]) { - emit_move_insn (gen_rtx (MEM, DFmode, - gen_rtx (POST_INC, DFmode, tmpreg)), - gen_rtx (REG, DFmode, i)); + emit_move_insn (gen_rtx_MEM (DFmode, + gen_rtx_POST_INC (DFmode, tmpreg)), + gen_rtx_REG (DFmode, i)); fr_saved++; } } @@ -2899,8 +2902,8 @@ hppa_expand_prologue() Avoid this if the callee saved register wasn't used (these are leaf functions). */ if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM_SAVED]) - emit_move_insn (gen_rtx (REG, SImode, PIC_OFFSET_TABLE_REGNUM_SAVED), - gen_rtx (REG, SImode, PIC_OFFSET_TABLE_REGNUM)); + emit_move_insn (gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM_SAVED), + gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM)); } @@ -2973,16 +2976,16 @@ hppa_expand_epilogue () emit_insn (gen_blockage ()); /* Put the local_fisze into %r19. */ - operands[0] = gen_rtx (REG, SImode, 19); + operands[0] = gen_rtx_REG (SImode, 19); operands[1] = GEN_INT (local_fsize); emit_move_insn (operands[0], operands[1]); /* Put the stack size into %r21. */ - operands[0] = gen_rtx (REG, SImode, 21); + operands[0] = gen_rtx_REG (SImode, 21); operands[1] = GEN_INT (actual_fsize); emit_move_insn (operands[0], operands[1]); - operands[0] = gen_rtx (REG, SImode, 22); + operands[0] = gen_rtx_REG (SImode, 22); operands[1] = GEN_INT (saves); emit_move_insn (operands[0], operands[1]); @@ -2992,7 +2995,7 @@ hppa_expand_epilogue () } /* We will use this often. */ - tmpreg = gen_rtx (REG, SImode, 1); + tmpreg = gen_rtx_REG (SImode, 1); /* Try to restore RP early to avoid load/use interlocks when RP gets used in the return (bv) instruction. This appears to still @@ -3054,9 +3057,9 @@ hppa_expand_epilogue () { if (regs_ever_live[i] || regs_ever_live[i + 1]) { - emit_move_insn (gen_rtx (REG, DFmode, i), - gen_rtx (MEM, DFmode, - gen_rtx (POST_INC, DFmode, tmpreg))); + emit_move_insn (gen_rtx_REG (DFmode, i), + gen_rtx_MEM (DFmode, + gen_rtx_POST_INC (DFmode, tmpreg))); } } } @@ -3098,8 +3101,8 @@ hppa_expand_epilogue () } /* If we were deferring a callee register restore, do it now. */ else if (! frame_pointer_needed && merge_sp_adjust_with_load) - emit_insn (gen_pre_ldwm (gen_rtx (REG, SImode, - merge_sp_adjust_with_load), + emit_insn (gen_pre_ldwm (gen_rtx_REG (SImode, + merge_sp_adjust_with_load), stack_pointer_rtx, GEN_INT (- actual_fsize))); else if (actual_fsize != 0) @@ -3155,9 +3158,9 @@ return_addr_rtx (count, frameaddr) privilege level from the two low order bits of the return address pointer here so that ins will point to the start of the first instruction that would have been executed if we returned. */ - ins = copy_to_reg (gen_rtx (AND, Pmode, - copy_to_reg (gen_rtx (MEM, Pmode, saved_rp)), - MASK_RETURN_ADDR)); + ins = copy_to_reg (gen_rtx_AND (Pmode, + copy_to_reg (gen_rtx_MEM (Pmode, saved_rp)), + MASK_RETURN_ADDR)); label = gen_label_rtx (); /* Check the instruction stream at the normal return address for the @@ -3171,22 +3174,22 @@ return_addr_rtx (count, frameaddr) If it is an export stub, than our return address is really in -24[frameaddr]. */ - emit_cmp_insn (gen_rtx (MEM, SImode, ins), + emit_cmp_insn (gen_rtx_MEM (SImode, ins), GEN_INT (0x4bc23fd1), NE, NULL_RTX, SImode, 1, 0); emit_jump_insn (gen_bne (label)); - emit_cmp_insn (gen_rtx (MEM, SImode, plus_constant (ins, 4)), + emit_cmp_insn (gen_rtx_MEM (SImode, plus_constant (ins, 4)), GEN_INT (0x004010a1), NE, NULL_RTX, SImode, 1, 0); emit_jump_insn (gen_bne (label)); - emit_cmp_insn (gen_rtx (MEM, SImode, plus_constant (ins, 8)), + emit_cmp_insn (gen_rtx_MEM (SImode, plus_constant (ins, 8)), GEN_INT (0x00011820), NE, NULL_RTX, SImode, 1, 0); emit_jump_insn (gen_bne (label)); - emit_cmp_insn (gen_rtx (MEM, SImode, plus_constant (ins, 12)), + emit_cmp_insn (gen_rtx_MEM (SImode, plus_constant (ins, 12)), GEN_INT (0xe0400002), NE, NULL_RTX, SImode, 1, 0); @@ -3203,7 +3206,7 @@ return_addr_rtx (count, frameaddr) emit_move_insn (saved_rp, plus_constant (frameaddr, -6 * UNITS_PER_WORD)); emit_label (label); - return gen_rtx (MEM, Pmode, memory_address (Pmode, saved_rp)); + return gen_rtx_MEM (Pmode, memory_address (Pmode, saved_rp)); } /* This is only valid once reload has completed because it depends on @@ -3228,13 +3231,15 @@ emit_bcond_fp (code, operand0) enum rtx_code code; rtx operand0; { - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (IF_THEN_ELSE, VOIDmode, - gen_rtx (code, VOIDmode, - gen_rtx (REG, CCFPmode, 0), - const0_rtx), - gen_rtx (LABEL_REF, VOIDmode, operand0), - pc_rtx))); + emit_jump_insn (gen_rtx_SET + (VOIDmode, pc_rtx, + gen_rtx_IF_THEN_ELSE (VOIDmode, + gen_rtx (code, VOIDmode, + gen_rtx_REG (CCFPmode, 0), + const0_rtx), + gen_rtx_LABEL_REF (VOIDmode, + operand0), + pc_rtx))); } @@ -3243,8 +3248,8 @@ gen_cmp_fp (code, operand0, operand1) enum rtx_code code; rtx operand0, operand1; { - return gen_rtx (SET, VOIDmode, gen_rtx (REG, CCFPmode, 0), - gen_rtx (code, CCFPmode, operand0, operand1)); + return gen_rtx_SET (VOIDmode, gen_rtx_REG (CCFPmode, 0), + gen_rtx (code, CCFPmode, operand0, operand1)); } /* Adjust the cost of a scheduling dependency. Return the new cost of @@ -3943,8 +3948,8 @@ output_deferred_plabels (file) for (i = 0; i < n_deferred_plabels; i++) { ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (deferred_plabels[i].internal_label)); - assemble_integer (gen_rtx (SYMBOL_REF, VOIDmode, - deferred_plabels[i].name), 4, 1); + assemble_integer (gen_rtx_SYMBOL_REF (VOIDmode, + deferred_plabels[i].name), 4, 1); } } @@ -3981,7 +3986,7 @@ output_mul_insn (unsignedp, insn) rtx insn; { import_milli (mulI); - return output_millicode_call (insn, gen_rtx (SYMBOL_REF, SImode, "$$mulI")); + return output_millicode_call (insn, gen_rtx_SYMBOL_REF (SImode, "$$mulI")); } /* Emit the rtl for doing a division by a constant. */ @@ -4017,19 +4022,19 @@ emit_hpdiv_const (operands, unsignedp) && INTVAL (operands[2]) < 16 && magic_milli[INTVAL (operands[2])]) { - emit_move_insn ( gen_rtx (REG, SImode, 26), operands[1]); + emit_move_insn ( gen_rtx_REG (SImode, 26), operands[1]); emit - (gen_rtx - (PARALLEL, VOIDmode, - gen_rtvec (5, gen_rtx (SET, VOIDmode, gen_rtx (REG, SImode, 29), - gen_rtx (unsignedp ? UDIV : DIV, SImode, - gen_rtx (REG, SImode, 26), - operands[2])), - gen_rtx (CLOBBER, VOIDmode, operands[3]), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, SImode, 26)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, SImode, 25)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, SImode, 31))))); - emit_move_insn (operands[0], gen_rtx (REG, SImode, 29)); + (gen_rtx_PARALLEL (VOIDmode, + gen_rtvec (5, gen_rtx_SET (VOIDmode, + gen_rtx (REG, SImode, 29), + gen_rtx (unsignedp ? UDIV : DIV, SImode, + gen_rtx_REG (SImode, 26), + operands[2])), + gen_rtx_CLOBBER (VOIDmode, operands[3]), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, 26)), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, 25)), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, 31))))); + emit_move_insn (operands[0], gen_rtx_REG (SImode, 29)); return 1; } return 0; @@ -4061,13 +4066,13 @@ output_div_insn (operands, unsignedp, insn) { sprintf (buf, "$$divU_%d", INTVAL (operands[0])); return output_millicode_call (insn, - gen_rtx (SYMBOL_REF, SImode, buf)); + gen_rtx_SYMBOL_REF (SImode, buf)); } else { sprintf (buf, "$$divI_%d", INTVAL (operands[0])); return output_millicode_call (insn, - gen_rtx (SYMBOL_REF, SImode, buf)); + gen_rtx_SYMBOL_REF (SImode, buf)); } } /* Divisor isn't a special constant. */ @@ -4077,13 +4082,13 @@ output_div_insn (operands, unsignedp, insn) { import_milli (divU); return output_millicode_call (insn, - gen_rtx (SYMBOL_REF, SImode, "$$divU")); + gen_rtx_SYMBOL_REF (SImode, "$$divU")); } else { import_milli (divI); return output_millicode_call (insn, - gen_rtx (SYMBOL_REF, SImode, "$$divI")); + gen_rtx_SYMBOL_REF (SImode, "$$divI")); } } } @@ -4099,13 +4104,13 @@ output_mod_insn (unsignedp, insn) { import_milli (remU); return output_millicode_call (insn, - gen_rtx (SYMBOL_REF, SImode, "$$remU")); + gen_rtx_SYMBOL_REF (SImode, "$$remU")); } else { import_milli (remI); return output_millicode_call (insn, - gen_rtx (SYMBOL_REF, SImode, "$$remI")); + gen_rtx_SYMBOL_REF (SImode, "$$remI")); } } @@ -4321,8 +4326,9 @@ hppa_builtin_saveregs (arglist) offset = current_function_arg_offset_rtx; /* Store general registers on the stack. */ - dest = gen_rtx (MEM, BLKmode, - plus_constant (current_function_internal_arg_pointer, -16)); + dest = gen_rtx_MEM (BLKmode, + plus_constant (current_function_internal_arg_pointer, + -16)); move_block_from_reg (23, dest, 4, 4 * UNITS_PER_WORD); /* move_block_from_reg will emit code to store the argument registers @@ -4336,7 +4342,7 @@ hppa_builtin_saveregs (arglist) last argument register store. So we emit a blockage insn here. */ emit_insn (gen_blockage ()); - if (flag_check_memory_usage) + if (current_function_check_memory_usage) emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, dest, ptr_mode, GEN_INT (4 * UNITS_PER_WORD), TYPE_MODE (sizetype), @@ -5258,14 +5264,14 @@ output_call (insn, call_dest) if (arg_mode == SFmode) { xoperands[0] = XEXP (use, 0); - xoperands[1] = gen_rtx (REG, SImode, 26 - (regno - 32) / 2); + xoperands[1] = gen_rtx_REG (SImode, 26 - (regno - 32) / 2); output_asm_insn ("fstws %0,-16(%%sr0,%%r30)", xoperands); output_asm_insn ("ldw -16(%%sr0,%%r30),%1", xoperands); } else { xoperands[0] = XEXP (use, 0); - xoperands[1] = gen_rtx (REG, DImode, 25 - (regno - 34) / 2); + xoperands[1] = gen_rtx_REG (DImode, 25 - (regno - 34) / 2); output_asm_insn ("fstds %0,-16(%%sr0,%%r30)", xoperands); output_asm_insn ("ldw -12(%%sr0,%%r30),%R1", xoperands); output_asm_insn ("ldw -16(%%sr0,%%r30),%1", xoperands); @@ -6112,7 +6118,7 @@ pa_combine_instructions (insns) may be combined with "floating" insns. As the name implies, "anchor" instructions don't move, while "floating" insns may move around. */ - new = gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2, NULL_RTX, NULL_RTX)); + new = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, NULL_RTX, NULL_RTX)); new = make_insn_raw (new); for (anchor = get_insns (); anchor; anchor = NEXT_INSN (anchor)) @@ -6247,17 +6253,19 @@ pa_combine_instructions (insns) || anchor_attr == PA_COMBINE_TYPE_FMPY)) { /* Emit the new instruction and delete the old anchor. */ - emit_insn_before (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, PATTERN (anchor), - PATTERN (floater))), + emit_insn_before (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, PATTERN (anchor), + PATTERN (floater))), anchor); + PUT_CODE (anchor, NOTE); NOTE_LINE_NUMBER (anchor) = NOTE_INSN_DELETED; NOTE_SOURCE_FILE (anchor) = 0; /* Emit a special USE insn for FLOATER, then delete the floating insn. */ - emit_insn_before (gen_rtx (USE, VOIDmode, floater), floater); + emit_insn_before (gen_rtx_USE (VOIDmode, floater), floater); delete_insn (floater); continue; @@ -6267,10 +6275,13 @@ pa_combine_instructions (insns) { rtx temp; /* Emit the new_jump instruction and delete the old anchor. */ - temp = emit_jump_insn_before (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, PATTERN (anchor), - PATTERN (floater))), - anchor); + temp + = emit_jump_insn_before (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, PATTERN (anchor), + PATTERN (floater))), + anchor); + JUMP_LABEL (temp) = JUMP_LABEL (anchor); PUT_CODE (anchor, NOTE); NOTE_LINE_NUMBER (anchor) = NOTE_INSN_DELETED; @@ -6278,7 +6289,7 @@ pa_combine_instructions (insns) /* Emit a special USE insn for FLOATER, then delete the floating insn. */ - emit_insn_before (gen_rtx (USE, VOIDmode, floater), floater); + emit_insn_before (gen_rtx_USE (VOIDmode, floater), floater); delete_insn (floater); continue; } diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 79f2bfe4859..787360a3a77 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for the HP Spectrum. - Copyright (C) 1992, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1992, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for Software Science at the University of Utah. @@ -781,7 +781,7 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS, /* Return the stack location to use for secondary memory needed reloads. */ #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \ - gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16))) + gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16))) /* Return the maximum number of consecutive registers needed to represent mode MODE in a register of class CLASS. */ @@ -873,18 +873,18 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS, #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \ - && (TYPE_MODE (VALTYPE) == SFmode || \ - TYPE_MODE (VALTYPE) == DFmode)) ? \ - 32 : 28)) + gen_rtx_REG (TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \ + && (TYPE_MODE (VALTYPE) == SFmode || \ + TYPE_MODE (VALTYPE) == DFmode)) ? \ + 32 : 28)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, \ - (! TARGET_SOFT_FLOAT \ - && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28)) + gen_rtx_REG (MODE, \ + (! TARGET_SOFT_FLOAT \ + && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28)) /* 1 if N is a possible register number for a function value as seen by the caller. */ @@ -1008,42 +1008,43 @@ struct hppa_args {int words, nargs_prototype, indirect; }; ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \ || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \ || (CUM).nargs_prototype > 0) \ - ? gen_rtx (REG, (MODE), \ - (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ - ? (((!(CUM).indirect \ - || TARGET_PORTABLE_RUNTIME) \ - && (MODE) == DFmode \ - && ! TARGET_SOFT_FLOAT) \ - ? ((CUM).words ? 38 : 34) \ - : ((CUM).words ? 23 : 25)) \ - : (((!(CUM).indirect \ - || TARGET_PORTABLE_RUNTIME) \ - && (MODE) == SFmode \ - && ! TARGET_SOFT_FLOAT) \ - ? (32 + 2 * (CUM).words) \ - : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \ - (TYPE))))))\ + ? gen_rtx_REG ((MODE), \ + (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ + ? (((!(CUM).indirect \ + || TARGET_PORTABLE_RUNTIME) \ + && (MODE) == DFmode \ + && ! TARGET_SOFT_FLOAT) \ + ? ((CUM).words ? 38 : 34) \ + : ((CUM).words ? 23 : 25)) \ + : (((!(CUM).indirect \ + || TARGET_PORTABLE_RUNTIME) \ + && (MODE) == SFmode \ + && ! TARGET_SOFT_FLOAT) \ + ? (32 + 2 * (CUM).words) \ + : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\ + (TYPE))))))\ /* We are calling a non-prototyped function with floating point \ arguments using the portable conventions. */ \ - : gen_rtx (PARALLEL, (MODE), \ - gen_rtvec \ - (2, \ - gen_rtx (EXPR_LIST, VOIDmode, \ - gen_rtx (REG, (MODE), \ - (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ - ? ((CUM).words ? 38 : 34) \ - : (32 + 2 * (CUM).words))), \ - const0_rtx), \ - gen_rtx (EXPR_LIST, VOIDmode, \ - gen_rtx (REG, (MODE), \ - (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ - ? ((CUM).words ? 23 : 25) \ - : (27 - (CUM).words - \ - FUNCTION_ARG_SIZE ((MODE), \ - (TYPE))))), \ - const0_rtx))) \ - /* Pass this parameter in the stack. */ \ - : 0) + : (gen_rtx_PARALLEL \ + ((MODE), \ + gen_rtvec \ + (2, \ + gen_rtx_EXPR_LIST \ + (VOIDmode, \ + gen_rtx_REG ((MODE), \ + (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ + ? ((CUM).words ? 38 : 34) : (32 + 2 * (CUM).words))), \ + const0_rtx), \ + gen_rtx_EXPR_LIST \ + (VOIDmode, \ + gen_rtx_REG ((MODE), \ + (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ + ? ((CUM).words ? 23 : 25) \ + : (27 - (CUM).words - \ + FUNCTION_ARG_SIZE ((MODE), (TYPE))))), \ + const0_rtx)))) \ + /* Pass this parameter in the stack. */ \ + : 0) /* For an arg passed partly in registers and partly in memory, this is the number of registers used. @@ -1305,9 +1306,9 @@ extern union tree_node *current_function_decl; rtx start_addr, end_addr; \ \ start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \ - emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \ + emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \ start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \ - emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \ + emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \ /* fdc and fic only use registers for the address to flush, \ they do not accept integer displacements. */ \ start_addr = force_reg (SImode, (TRAMP)); \ diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 8e61fd46349..95285105825 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -1306,7 +1306,7 @@ DONE; /* We don't want the clobber emitted, so handle this ourselves. */ - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -1321,7 +1321,7 @@ DONE; /* We don't want the clobber emitted, so handle this ourselves. */ - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -2180,7 +2180,7 @@ DONE; /* We don't want the clobber emitted, so handle this ourselves. */ - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -2195,7 +2195,7 @@ DONE; /* We don't want the clobber emitted, so handle this ourselves. */ - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -2331,7 +2331,7 @@ DONE; /* We don't want the clobber emitted, so handle this ourselves. */ - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -2346,7 +2346,7 @@ DONE; /* We don't want the clobber emitted, so handle this ourselves. */ - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -2485,7 +2485,7 @@ DONE; /* We don't want the clobber emitted, so handle this ourselves. */ - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -2500,7 +2500,7 @@ DONE; /* We don't want the clobber emitted, so handle this ourselves. */ - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -2927,7 +2927,7 @@ } else if (cint_ok_for_move (-intval)) { - emit_insn (gen_rtx (SET, VOIDmode, operands[4], GEN_INT (-intval))); + emit_insn (gen_rtx_SET (VOIDmode, operands[4], GEN_INT (-intval))); emit_insn (gen_subsi3 (operands[0], operands[1], operands[4])); DONE; } @@ -3009,9 +3009,8 @@ operands[1] = force_reg (SImode, operands[1]); operands[2] = force_reg (SImode, operands[2]); emit_insn (gen_umulsidi3 (scratch, operands[1], operands[2])); - emit_insn (gen_rtx (SET, VOIDmode, - operands[0], - gen_rtx (SUBREG, SImode, scratch, 1))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_SUBREG (SImode, scratch, 1))); DONE; } operands[3] = gen_reg_rtx (SImode); @@ -4018,7 +4017,7 @@ if (TARGET_BIG_SWITCH) { rtx temp = gen_reg_rtx (SImode); - emit_move_insn (temp, gen_rtx (PLUS, SImode, operands[0], operands[0])); + emit_move_insn (temp, gen_rtx_PLUS (SImode, operands[0], operands[0])); operands[0] = temp; } emit_jump_insn (gen_casesi0 (operands[0], operands[3])); @@ -4063,7 +4062,7 @@ call_insn = emit_call_insn (gen_call_internal_symref (op, operands[1])); else { - rtx tmpreg = gen_rtx (REG, SImode, 22); + rtx tmpreg = gen_rtx_REG (SImode, 22); emit_move_insn (tmpreg, force_reg (SImode, op)); call_insn = emit_call_insn (gen_call_internal_reg (operands[1])); } @@ -4078,8 +4077,8 @@ This will set regs_ever_live for the callee saved register we stored the PIC register in. */ emit_move_insn (pic_offset_table_rtx, - gen_rtx (REG, SImode, PIC_OFFSET_TABLE_REGNUM_SAVED)); - emit_insn (gen_rtx (USE, VOIDmode, pic_offset_table_rtx)); + gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM_SAVED)); + emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx)); /* Gross. We have to keep the scheduler from moving the restore of the PIC register away from the call. SCHED_GROUP_P is @@ -4103,7 +4102,7 @@ "* { output_arg_descriptor (insn); - return output_call (insn, operands[0], gen_rtx (REG, SImode, 2)); + return output_call (insn, operands[0], gen_rtx_REG (SImode, 2)); }" [(set_attr "type" "call") (set (attr "length") @@ -4220,7 +4219,7 @@ operands[2])); else { - rtx tmpreg = gen_rtx (REG, SImode, 22); + rtx tmpreg = gen_rtx_REG (SImode, 22); emit_move_insn (tmpreg, force_reg (SImode, op)); call_insn = emit_call_insn (gen_call_value_internal_reg (operands[0], operands[2])); @@ -4235,8 +4234,8 @@ This will set regs_ever_live for the callee saved register we stored the PIC register in. */ emit_move_insn (pic_offset_table_rtx, - gen_rtx (REG, SImode, PIC_OFFSET_TABLE_REGNUM_SAVED)); - emit_insn (gen_rtx (USE, VOIDmode, pic_offset_table_rtx)); + gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM_SAVED)); + emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx)); /* Gross. We have to keep the scheduler from moving the restore of the PIC register away from the call. SCHED_GROUP_P is @@ -4262,7 +4261,7 @@ "* { output_arg_descriptor (insn); - return output_call (insn, operands[1], gen_rtx (REG, SImode, 2)); + return output_call (insn, operands[1], gen_rtx_REG (SImode, 2)); }" [(set_attr "type" "call") (set (attr "length") @@ -5103,7 +5102,7 @@ /* Else call $$sh_func_adrs to extract the function's real add24. */ return output_millicode_call (insn, - gen_rtx (SYMBOL_REF, SImode, + gen_rtx_SYMBOL_REF (SImode, \"$$sh_func_adrs\")); }" [(set_attr "type" "multi") @@ -5150,8 +5149,8 @@ /* Load the PIC register from the stack slot (in our caller's frame). */ emit_move_insn (pic_offset_table_rtx, - gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, -32))); + gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, -32))); emit_insn (gen_rtx (USE, VOIDmode, pic_offset_table_rtx)); emit_insn (gen_blockage ()); DONE; diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c index 20628d42792..2aea783a4b5 100644 --- a/gcc/config/pdp11/pdp11.c +++ b/gcc/config/pdp11/pdp11.c @@ -1,5 +1,5 @@ /* Subroutines for gcc2 for pdp11. - Copyright (C) 1994, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc. Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). This file is part of GNU CC. @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -365,14 +365,14 @@ output_move_double (operands) { operands[0] = XEXP (XEXP (operands[0], 0), 0); output_asm_insn ("sub $4,%0", operands); - operands[0] = gen_rtx (MEM, SImode, operands[0]); + operands[0] = gen_rtx_MEM (SImode, operands[0]); optype0 = OFFSOP; } if (optype0 == POPOP && optype1 == PUSHOP) { operands[1] = XEXP (XEXP (operands[1], 0), 0); output_asm_insn ("sub $4,%1", operands); - operands[1] = gen_rtx (MEM, SImode, operands[1]); + operands[1] = gen_rtx_MEM (SImode, operands[1]); optype1 = OFFSOP; } @@ -395,14 +395,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, HImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 2); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, HImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (HImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 2); else if (optype1 == CNSTOP) @@ -412,10 +412,8 @@ output_move_double (operands) /* now the mess begins, high word is in lower word??? that's what ashc makes me think, but I don't remember :-( */ - latehalf[1] = gen_rtx(CONST_INT, VOIDmode, - INTVAL(operands[1])>>16); - operands[1] = gen_rtx(CONST_INT, VOIDmode, - INTVAL(operands[1])&0xff); + latehalf[1] = GEN_INT (INTVAL(operands[1]) >> 16); + operands[1] = GEN_INT (INTVAL(operands[1]) & 0xff); } else if (GET_CODE (operands[1]) == CONST_DOUBLE) { @@ -579,14 +577,14 @@ output_move_quad (operands) { operands[0] = XEXP (XEXP (operands[0], 0), 0); output_asm_insn ("sub $8,%0", operands); - operands[0] = gen_rtx (MEM, DImode, operands[0]); + operands[0] = gen_rtx_MEM (DImode, operands[0]); optype0 = OFFSOP; } if (optype0 == POPOP && optype1 == PUSHOP) { operands[1] = XEXP (XEXP (operands[1], 0), 0); output_asm_insn ("sub $8,%1", operands); - operands[1] = gen_rtx (MEM, SImode, operands[1]); + operands[1] = gen_rtx_MEM (SImode, operands[1]); optype1 = OFFSOP; } @@ -609,14 +607,14 @@ output_move_quad (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -633,21 +631,15 @@ output_move_quad (operands) abort(); #ifndef HOST_WORDS_BIG_ENDIAN - latehalf[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[1])); + latehalf[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); #else /* HOST_WORDS_BIG_ENDIAN */ - latehalf[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[1])); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); + latehalf[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); #endif /* HOST_WORDS_BIG_ENDIAN */ } else if (GET_CODE(operands[1]) == CONST_INT) - { - latehalf[1] = gen_rtx (CONST_INT, VOIDmode, 0); - } + latehalf[1] = GEN_INT (0); else abort(); diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h index 9f755c1227e..a995f637ff2 100644 --- a/gcc/config/pdp11/pdp11.h +++ b/gcc/config/pdp11/pdp11.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for the pdp-11 - Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1996, 1998 Free Software Foundation, Inc. Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). This file is part of GNU CC. @@ -542,18 +542,18 @@ extern int current_first_parm_offset; not without FPU!!!! ) */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE))) + gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE))) /* and the called function leaves it in the first register. Difference only on machines with register windows. */ #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE))) + gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE))) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG(MODE)) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, BASE_RETURN_VALUE_REG(MODE)) /* 1 if N is a possible register number for a function value as seen by the caller. @@ -1256,14 +1256,14 @@ MV #STATIC, $4 0x940Y 0x0000 <- STATIC; Y = STATIC_CHAIN_REGNUM JMP FUNCTION 0x0058 0x0000 <- FUNCTION */ -#define TRAMPOLINE_TEMPLATE(FILE) \ -{ \ - if (TARGET_SPLIT) \ - abort(); \ - \ - ASM_OUTPUT_INT (FILE, gen_rtx(CONST_INT, VOIDmode, 0x9400+STATIC_CHAIN_REGNUM)); \ +#define TRAMPOLINE_TEMPLATE(FILE) \ +{ \ + if (TARGET_SPLIT) \ + abort(); \ + \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x9400+STATIC_CHAIN_REGNUM)); \ ASM_OUTPUT_INT (FILE, const0_rtx); \ - ASM_OUTPUT_INT (FILE, gen_rtx(CONST_INT, VOIDmode, 0x0058)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x0058)); \ ASM_OUTPUT_INT (FILE, const0_rtx); \ } @@ -1279,8 +1279,8 @@ JMP FUNCTION 0x0058 0x0000 <- FUNCTION if (TARGET_SPLIT) \ abort(); \ \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 2)), CXT); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 6)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 2)), CXT); \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 6)), FNADDR); \ } diff --git a/gcc/config/pdp11/pdp11.md b/gcc/config/pdp11/pdp11.md index ec6a43f66d1..a585ab34d1e 100644 --- a/gcc/config/pdp11/pdp11.md +++ b/gcc/config/pdp11/pdp11.md @@ -1,5 +1,5 @@ ;;- Machine description for the pdp11 for GNU C compiler -;; Copyright (C) 1994, 1995, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1994, 1995, 1997, 1998 Free Software Foundation, Inc. ;; Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). ;; This file is part of GNU CC. @@ -731,7 +731,7 @@ { output_asm_insn(\"stcdf %1, -(sp)\", operands); output_asm_insn(\"mov (sp)+, %0\", operands); - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0])+1); output_asm_insn(\"mov (sp)+, %0\", operands); return \"\"; } @@ -804,8 +804,8 @@ /* make register pair available */ latehalf[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); - + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0])+ 1); + output_asm_insn(\"movb %1, %0\", operands); output_asm_insn(\"sxt %0\", latehalf); @@ -856,7 +856,7 @@ /* make register pair available */ latehalf[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"mov %1, %0\", operands); output_asm_insn(\"sxt %0\", latehalf); @@ -882,7 +882,7 @@ rtx lateoperands[2]; lateoperands[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"tst %0\", operands); sprintf(buf, \"bge extendhisi%d\", count); @@ -917,7 +917,7 @@ rtx latehalf[2]; latehalf[0] = NULL; - latehalf[1] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + latehalf[1] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"mov %1, -(sp)\", latehalf); output_asm_insn(\"mov %1, -(sp)\", operands); @@ -951,7 +951,7 @@ output_asm_insn(\"stcdl %1, -(sp)\", operands); output_asm_insn(\"seti\", operands); output_asm_insn(\"mov (sp)+, %0\", operands); - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"mov (sp)+, %0\", operands); return \"\"; } @@ -997,7 +997,7 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); @@ -1006,7 +1006,7 @@ lateoperands[2] = operands[2]; if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); else operands[2] = adj_offsettable_operand(operands[2], 2); @@ -1016,8 +1016,8 @@ return \"\"; } - lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT (INTVAL (operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); if (INTVAL(operands[2])) { @@ -1096,14 +1096,14 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); lateoperands[2] = operands[2]; if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); else operands[2] = adj_offsettable_operand(operands[2], 2); @@ -1154,7 +1154,7 @@ { extern rtx expand_unop (); if (GET_CODE (operands[2]) == CONST_INT) - operands[2] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (operands[2])); + operands[2] = GEN_INT (~INTVAL (operands[2])); else operands[2] = expand_unop (SImode, one_cmpl_optab, operands[2], 0, 1); }") @@ -1168,7 +1168,7 @@ { extern rtx expand_unop (); if (GET_CODE (operands[2]) == CONST_INT) - operands[2] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (operands[2])); + operands[2] = GEN_INT (~INTVAL (operands[2])); else operands[2] = expand_unop (HImode, one_cmpl_optab, operands[2], 0, 1); }") @@ -1183,8 +1183,7 @@ extern rtx expand_unop (); rtx op = operands[2]; if (GET_CODE (op) == CONST_INT) - operands[2] = gen_rtx (CONST_INT, VOIDmode, - ((1 << 8) - 1) & ~INTVAL (op)); + operands[2] = GEN_INT (((1 << 8) - 1) & ~INTVAL (op)); else operands[2] = expand_unop (QImode, one_cmpl_optab, op, 0, 1); }") @@ -1205,7 +1204,7 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); @@ -1214,7 +1213,7 @@ lateoperands[2] = operands[2]; if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); else operands[2] = adj_offsettable_operand(operands[2], 2); @@ -1223,8 +1222,8 @@ return \"\"; } - lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL (operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* these have different lengths, so we should have different constraints! */ @@ -1271,26 +1270,26 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); if (! CONSTANT_P(operands[2])) - { - lateoperands[2] = operands[2]; + { + lateoperands[2] = operands[2]; - if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); - else - operands[2] = adj_offsettable_operand(operands[2], 2); + if (REG_P (operands[2])) + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); + else + operands[2] = adj_offsettable_operand (operands[2], 2); - output_asm_insn (\"bis %2, %0\", operands); - output_asm_insn (\"bis %2, %0\", lateoperands); - return \"\"; - } + output_asm_insn (\"bis %2, %0\", operands); + output_asm_insn (\"bis %2, %0\", lateoperands); + return \"\"; + } - lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL (operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* these have different lengths, so we should have different constraints! */ @@ -1332,26 +1331,26 @@ rtx lateoperands[3]; lateoperands[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); if (REG_P(operands[2])) - { - lateoperands[2] = operands[2]; - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); - - output_asm_insn (\"xor %2, %0\", operands); - output_asm_insn (\"xor %2, %0\", lateoperands); + { + lateoperands[2] = operands[2]; + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); - return \"\"; - } + output_asm_insn (\"xor %2, %0\", operands); + output_asm_insn (\"xor %2, %0\", lateoperands); + + return \"\"; + } - lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL (operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); - if (INTVAL(operands[2])) + if (INTVAL (operands[2])) output_asm_insn (\"xor %2, %0\", operands); - if (INTVAL(lateoperands[2])) + if (INTVAL (lateoperands[2])) output_asm_insn (\"xor %2, %0\", lateoperands); return \"\"; @@ -1608,7 +1607,7 @@ ; ; /* allow REG_NOTES to be set on last insn (labels don't have enough ; fields, and can't be used for REG_NOTES anyway). */ -; emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); +; emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); ; DONE; ;}") diff --git a/gcc/config/pyr/pyr.c b/gcc/config/pyr/pyr.c index 46ea25c0374..9c20d2f5e2a 100644 --- a/gcc/config/pyr/pyr.c +++ b/gcc/config/pyr/pyr.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Pyramid 90x, 9000, and MIServer Series. - Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 1991, 1997 Free, 1998 Software Foundation, Inc. This file is part of GNU CC. @@ -20,7 +20,7 @@ Boston, MA 02111-1307, USA. */ /* Some output-actions in pyr.md need these. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -256,9 +256,9 @@ extend_const (x, extop, from_mode, to_mode) else val = val & ~((-1) << (GET_MODE_BITSIZE (from_mode))); if (GET_MODE_BITSIZE (to_mode) == HOST_BITS_PER_INT) - return gen_rtx (CONST_INT, VOIDmode, val); - return gen_rtx (CONST_INT, VOIDmode, - val & ~((-1) << (GET_MODE_BITSIZE (to_mode)))); + return GEN_INT (val); + + return GEN_INT (val & ~((-1) << (GET_MODE_BITSIZE (to_mode)))); } rtx @@ -296,7 +296,7 @@ extend_and_branch (extop) if (op1 == 0) { op0 = ensure_extended (op0, extop, test_mode); - emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, op0)); + emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, op0)); } else { @@ -338,8 +338,8 @@ extend_and_branch (extop) op0 = force_reg (test_mode, op0); } - emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, - gen_rtx (COMPARE, VOIDmode, op0, op1))); + emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, + gen_rtx_COMPARE (VOIDmode, op0, op1))); } } @@ -625,16 +625,13 @@ output_move_double (operands) || (CONST_DOUBLE_HIGH (const_op) == -1 && CONST_DOUBLE_LOW (const_op) < 0)) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (const_op)); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (const_op)); return "movl %1,%0"; } - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (const_op)); + operands[1] = GEN_INT (CONST_DOUBLE_HIGH (const_op)); output_asm_insn ("movw %1,%0", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (const_op)); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (const_op)); return "movw %1,%0"; } else @@ -646,16 +643,13 @@ output_move_double (operands) || (CONST_DOUBLE_LOW (const_op) == -1 && CONST_DOUBLE_HIGH (const_op) < 0)) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (const_op)); + operands[1] = GEN_INT (CONST_DOUBLE_HIGH (const_op)); return "movl %1,%0"; } - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (const_op)); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (const_op)); output_asm_insn ("movw %1,%0", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (const_op)); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + operands[1] = GEN_INT (CONST_DOUBLE_HIGH (const_op)); return "movw %1,%0"; } } @@ -680,7 +674,7 @@ output_shift (pattern, op2, mod) cc_status = cc_prev_status; return ""; } - op2 = gen_rtx (CONST_INT, VOIDmode, cnt); + op2 = GEN_INT (cnt); } return pattern; } diff --git a/gcc/config/pyr/pyr.h b/gcc/config/pyr/pyr.h index ea88ee4ba10..2ed5ee534f5 100644 --- a/gcc/config/pyr/pyr.h +++ b/gcc/config/pyr/pyr.h @@ -1,6 +1,6 @@ /* Definitions of target machine parameters for GNU compiler, for Pyramid 90x, 9000, and MIServer Series. - Copyright (C) 1989, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 1995, 1996, 1997, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -511,19 +511,19 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; --> its type. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), PYR_TREG(0)) + gen_rtx_REG (TYPE_MODE (VALTYPE), PYR_TREG(0)) /* --> but the callee has to leave it in PR0(/PR1) */ #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), PYR_PREG(0)) + gen_rtx_REG (TYPE_MODE (VALTYPE), PYR_PREG(0)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* --> On Pyramid the return value is in TR0/TR1 regardless. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, PYR_TREG(0)) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, PYR_TREG(0)) /* Define this if PCC uses the nonreentrant convention for returning structure and union values. */ @@ -652,7 +652,7 @@ extern int inner_param_safe_helper(); + ((MODE) == BLKmode \ ? (int_size_in_bytes (TYPE) + 3) / 4 \ : (GET_MODE_SIZE (MODE) + 3) / 4)) \ - ? gen_rtx (REG, (MODE), PYR_TREG(CUM)) \ + ? gen_rtx_REG ((MODE), PYR_TREG(CUM)) \ : 0) \ : 0) #ifdef __GNUC__ @@ -673,7 +673,7 @@ extern void* pyr_function_arg (); + ((MODE) == BLKmode \ ? (int_size_in_bytes (TYPE) + 3) / 4 \ : (GET_MODE_SIZE (MODE) + 3) / 4)) \ - ? gen_rtx (REG, (MODE), PYR_PREG(CUM)) \ + ? gen_rtx_REG ((MODE), PYR_PREG(CUM)) \ : 0) \ : 0) @@ -736,10 +736,10 @@ extern void* pyr_function_arg (); jump $<func> # S2R */ #define TRAMPOLINE_TEMPLATE(FILE) \ -{ ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x2100001C)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x40000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); } +{ ASM_OUTPUT_INT (FILE, GEN_INT (0x2100001C)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x40000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); } #define TRAMPOLINE_SIZE 16 #define TRAMPOLINE_ALIGNMENT 32 @@ -749,12 +749,13 @@ extern void* pyr_function_arg (); CXT is an RTX for the static chain value for the function. */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ -{ emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 4)), CXT); \ +{ emit_move_insn (gen_rtx_MEM (Pmode, plus_constant (TRAMP, 4)), CXT); \ emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 12)), FNADDR); \ - emit_call_insn (gen_call (gen_rtx (MEM, QImode, \ - gen_rtx (SYMBOL_REF, Pmode, \ - "__enable_execute_stack")), \ - const0_rtx)); \ + emit_call_insn (gen_call \ + (gen_rtx_MEM \ + (QImode, \ + gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack")), \ + const0_rtx)); \ } /* Output assembler code to FILE to increment profiler label # LABELNO diff --git a/gcc/config/pyr/pyr.md b/gcc/config/pyr/pyr.md index 97d91014595..973e80acd5f 100644 --- a/gcc/config/pyr/pyr.md +++ b/gcc/config/pyr/pyr.md @@ -1,5 +1,5 @@ ;; GNU C machine description for Pyramid 90x, 9000, MIServer Series -;; Copyright (C) 1989, 1990, 1995, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1989, 1990, 1995, 1997, 1998 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -720,8 +720,7 @@ "* { if (GET_CODE (operands[1]) == CONST_DOUBLE) - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); return \"movl %1,%0\"; }") @@ -1097,7 +1096,7 @@ int dealloc_size = current_function_pretend_args_size; if (current_function_pops_args) dealloc_size += current_function_args_size; - operands[0] = gen_rtx (CONST_INT, VOIDmode, dealloc_size); + operands[0] = GEN_INT (dealloc_size); return \"retd %0\"; } else @@ -1258,15 +1257,13 @@ { rtx xoperands[2]; CC_STATUS_INIT; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[2])) - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[2])); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[2])); + xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); } output_asm_insn (\"addw %1,%0\", xoperands); return \"addwc %2,%0\"; @@ -1281,15 +1278,13 @@ { rtx xoperands[2]; CC_STATUS_INIT; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[2])) - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[2])); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[2])); + xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); } output_asm_insn (\"subw %1,%0\", xoperands); return \"subwb %2,%0\"; @@ -1304,15 +1299,13 @@ { rtx xoperands[2]; CC_STATUS_INIT; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[2])) - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[2])); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[2])); + xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); } output_asm_insn (\"orw %1,%0\", xoperands); return \"orw %2,%0\"; @@ -1327,15 +1320,13 @@ { rtx xoperands[2]; CC_STATUS_INIT; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[2])) - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[2])); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[2])); + xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); } output_asm_insn (\"andw %1,%0\", xoperands); return \"andw %2,%0\"; @@ -1350,15 +1341,13 @@ { rtx xoperands[2]; CC_STATUS_INIT; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[2])) - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[2])); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[2])); + xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); } output_asm_insn (\"xorw %1,%0\", xoperands); return \"xorw %2,%0\"; diff --git a/gcc/config/romp/romp.c b/gcc/config/romp/romp.c index ed36259f652..9a73d2360f5 100644 --- a/gcc/config/romp/romp.c +++ b/gcc/config/romp/romp.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on ROMP. - Copyright (C) 1990, 1991, 1992, 1993, 1997 Free Software Foundation, Inc. + Copyright (C) 1990, 91, 92, 93, 97, 1998 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@nyu.edu) This file is part of GNU CC. @@ -21,7 +21,7 @@ Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -824,8 +824,8 @@ print_operand (file, x, code) if (GET_CODE (x) == REG) fprintf (file, "%s", reg_names[REGNO (x) + 1]); else if (GET_CODE (x) == MEM) - print_operand (file, gen_rtx (MEM, GET_MODE (x), - plus_constant (XEXP (x, 0), 4)), 0); + print_operand (file, gen_rtx_MEM (GET_MODE (x), + plus_constant (XEXP (x, 0), 4)), 0); else abort (); break; @@ -1221,8 +1221,7 @@ output_epilog (file, size) /* Restore floating-point registers. */ if (write_code) output_loadsave_fpregs (file, CLOBBER, - gen_rtx (PLUS, Pmode, gen_rtx (REG, Pmode, 1), - gen_rtx (CONST_INT, VOIDmode, fp_save))); + plus_constant (gen_rtx_REG (Pmode, 1), fp_save)); /* If we push the stack and do not have size > 32K, adjust the register save location to the current position of sp. Otherwise, if long frame, @@ -1348,9 +1347,9 @@ get_symref (name) end_temporary_allocation (); p = *last_p = (struct symref_hashent *) permalloc (sizeof (struct symref_hashent)); - p->symref = gen_rtx (SYMBOL_REF, Pmode, - obstack_copy0 (&permanent_obstack, - name, strlen (name))); + p->symref = gen_rtx_SYMBOL_REF (Pmode, + obstack_copy0 (&permanent_obstack, + name, strlen (name))); p->next = 0; resume_temporary_allocation (); } @@ -1739,8 +1738,7 @@ output_loadsave_fpregs (file, code, addr) if (mask) fprintf (file, "\t%s\n", - output_fpop (code, gen_rtx (CONST_INT, VOIDmode, mask), - gen_rtx (MEM, Pmode, addr), + output_fpop (code, GEN_INT (mask), gen_rtx_MEM (Pmode, addr), 0, const0_rtx)); } diff --git a/gcc/config/romp/romp.h b/gcc/config/romp/romp.h index be12d367fbb..727ed363292 100644 --- a/gcc/config/romp/romp.h +++ b/gcc/config/romp/romp.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for ROMP chip. - Copyright (C) 1989, 1991, 1993, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1989, 91, 93, 95, 96, 1998 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@nyu.edu) This file is part of GNU CC. @@ -271,13 +271,11 @@ extern int target_flags; /* Place to put static chain when calling a function that requires it. */ #define STATIC_CHAIN \ - gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, stack_pointer_rtx, \ - gen_rtx (CONST_INT, VOIDmode, -36))) + gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, -36)) /* Place where static chain is found upon entry to routine. */ #define STATIC_CHAIN_INCOMING \ - gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, arg_pointer_rtx, \ - gen_rtx (CONST_INT, VOIDmode, -20))) + gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -20)) /* Place that structure value return address is placed. @@ -520,15 +518,16 @@ enum reg_class { NO_REGS, R0_REGS, R15_REGS, BASE_REGS, GENERAL_REGS, On ROMP the value is found in r2, unless the machine specific option fp-arg-in-fpregs is selected, in which case FP return values are in fr1 */ -#define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), \ - (TARGET_FP_REGS && \ - GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) ? 18 : 2) +#define FUNCTION_VALUE(VALTYPE, FUNC) \ + gen_rtx_REG (TYPE_MODE (VALTYPE), \ + (TARGET_FP_REG \ + && GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) \ + ? 18 : 2) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2) /* The definition of this macro implies that there are cases where a scalar value cannot be returned in registers. @@ -628,8 +627,8 @@ struct rt_cargs {int gregs, fregs; }; #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ (! (NAMED) ? 0 \ : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \ - : USE_FP_REG(MODE,CUM) ? gen_rtx(REG, (MODE),(CUM.fregs) + 17) \ - : (CUM).gregs < 4 ? gen_rtx(REG, (MODE), 2 + (CUM).gregs) : 0) + : USE_FP_REG(MODE,CUM) ? gen_rtx_REG ((MODE), (CUM.fregs) + 17) \ + : (CUM).gregs < 4 ? gen_rtx_REG ((MODE), 2 + (CUM).gregs) : 0) /* For an arg passed partly in registers and partly in memory, this is the number of registers used. @@ -672,9 +671,9 @@ struct rt_cargs {int gregs, fregs; }; if (! NO_RTL && first_reg_offset != 4) \ move_block_from_reg \ (2 + first_reg_offset, \ - gen_rtx (MEM, BLKmode, \ - plus_constant (virtual_incoming_args_rtx, \ - first_reg_offset * 4)), \ + gen_rtx_MEM (BLKmode, \ + plus_constant (virtual_incoming_args_rtx, \ + first_reg_offset * 4)), \ 4 - first_reg_offset, (4 - first_reg_offset) * UNITS_PER_WORD); \ PRETEND_SIZE = (4 - first_reg_offset) * UNITS_PER_WORD; \ } \ @@ -812,29 +811,29 @@ struct rt_cargs {int gregs, fregs; }; rtx _val; \ \ _temp = expand_binop (SImode, add_optab, ADDR, \ - gen_rtx (CONST_INT, VOIDmode, 4), \ + GEN_INT (4), \ 0, 1, OPTAB_LIB_WIDEN); \ - emit_move_insn (gen_rtx (MEM, SImode, \ - memory_address (SImode, ADDR)), _temp); \ + emit_move_insn (gen_rtx_MEM (SImode, \ + memory_address (SImode, ADDR)), _temp); \ \ _val = force_reg (SImode, CXT); \ _addr = memory_address (HImode, plus_constant (ADDR, 10)); \ - emit_move_insn (gen_rtx (MEM, HImode, _addr), \ + emit_move_insn (gen_rtx_MEM (HImode, _addr), \ gen_lowpart (HImode, _val)); \ _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ build_int_2 (16, 0), 0, 1); \ _addr = memory_address (HImode, plus_constant (ADDR, 6)); \ - emit_move_insn (gen_rtx (MEM, HImode, _addr), \ + emit_move_insn (gen_rtx_MEM (HImode, _addr), \ gen_lowpart (HImode, _temp)); \ \ _val = force_reg (SImode, FNADDR); \ _addr = memory_address (HImode, plus_constant (ADDR, 24)); \ - emit_move_insn (gen_rtx (MEM, HImode, _addr), \ + emit_move_insn (gen_rtx_MEM (HImode, _addr), \ gen_lowpart (HImode, _val)); \ _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ build_int_2 (16, 0), 0, 1); \ _addr = memory_address (HImode, plus_constant (ADDR, 20)); \ - emit_move_insn (gen_rtx (MEM, HImode, _addr), \ + emit_move_insn (gen_rtx_MEM (HImode, _addr), \ gen_lowpart (HImode, _temp)); \ \ } @@ -1074,12 +1073,10 @@ struct rt_cargs {int gregs, fregs; }; low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ if (low_int & 0x8000) \ high_int += 1, low_int |= 0xffff0000; \ - (X) = gen_rtx (PLUS, SImode, \ - force_operand \ - (gen_rtx (PLUS, SImode, XEXP (X, 0), \ - gen_rtx (CONST_INT, VOIDmode, \ - high_int << 16)), 0),\ - gen_rtx (CONST_INT, VOIDmode, low_int)); \ + (X) = gen_rtx_PLUS (SImode, \ + force_operand (plus_constant (XEXP (X, 0), \ + high_int << 16)), \ + GEN_INT (low_int)); \ } \ } @@ -1130,7 +1127,7 @@ struct rt_cargs {int gregs, fregs; }; && GET_CODE (op2) == REG && FP_REGNO_P (REGNO (op2)) \ && REGNO (op0) == REGNO (op2)) \ { \ - tem = gen_rtx (REG, GET_MODE (op0), 17); \ + tem = gen_rtx_REG (GET_MODE (op0), 17); \ emit_insn_after (gen_move_insn (op0, tem), INSN); \ SET_DEST (XVECEXP (PATTERN (INSN), 0, 0)) = tem; \ OPERANDS[0] = tem; \ @@ -1584,8 +1581,8 @@ extern int romp_debugger_arg_correction(); else if (GET_CODE (addr) == SYMBOL_REF \ && CONSTANT_POOL_ADDRESS_P (addr)) \ { \ - offset = gen_rtx (CONST_INT, VOIDmode, get_pool_offset (addr) + 12); \ - base = gen_rtx (REG, SImode, 14); \ + offset = GEN_INT (get_pool_offset (addr) + 12); \ + base = gen_rtx_REG (SImode, 14); \ } \ else if (GET_CODE (addr) == CONST \ && GET_CODE (XEXP (addr, 0)) == PLUS \ @@ -1596,7 +1593,7 @@ extern int romp_debugger_arg_correction(); offset = plus_constant (XEXP (XEXP (addr, 0), 1), \ (get_pool_offset (XEXP (XEXP (addr, 0), 0)) \ + 12)); \ - base = gen_rtx (REG, SImode, 14); \ + base = gen_rtx_REG (SImode, 14); \ } \ output_addr_const (FILE, offset); \ if (base) \ diff --git a/gcc/config/romp/romp.md b/gcc/config/romp/romp.md index 2177c191065..10b7365ec38 100644 --- a/gcc/config/romp/romp.md +++ b/gcc/config/romp/romp.md @@ -1,5 +1,5 @@ ;;- Machine description for ROMP chip for GNU C compiler -;; Copyright (C) 1988, 1991, 1993, 1994, 1995 Free Software Foundation, Inc. +;; Copyright (C) 1988, 91, 93, 94, 95, 1998 Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; This file is part of GNU CC. @@ -180,8 +180,7 @@ || (unsigned) ((- const_val) + 0x8000) < 0x10000) { /* Can do this by loading the negative constant and then negating. */ - emit_move_insn (operands[0], - gen_rtx (CONST_INT, VOIDmode, - const_val)); + emit_move_insn (operands[0], GEN_INT (- const_val)); emit_insn (gen_negsi2 (operands[0], operands[0])); DONE; } @@ -195,10 +194,9 @@ if (low_part >= 0x10 && exact_log2 (low_part) >= 0) i = high_part, high_part = low_part, low_part = i; - emit_move_insn (operands[0], - gen_rtx (CONST_INT, VOIDmode, low_part)); + emit_move_insn (operands[0], GEN_INT (low_part)); emit_insn (gen_iorsi3 (operands[0], operands[0], - gen_rtx (CONST_INT, VOIDmode, high_part))); + GEN_INT (high_part))); DONE; } } @@ -482,11 +480,9 @@ { operands[2] = operand_subword (operands[0], 1, 0, DImode); operands[3] = XEXP (operands[1], 0); operands[4] = operand_subword (operands[0], 0, 0, DImode); - operands[5] = gen_rtx (MEM, SImode, operands[2]); + operands[5] = gen_rtx_MEM (SImode, operands[2]); operands[6] = operands[2]; - operands[7] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, SImode, operands[2], - gen_rtx (CONST_INT, VOIDmode, 4))); + operands[7] = gen_rtx_MEM (SImode, plus_constant (operands[2], 4)); if (operands[2] == 0 || operands[4] == 0) FAIL; @@ -503,11 +499,9 @@ (set (match_dup 6) (match_dup 7))] " { operands[3] = XEXP (operands[0], 0); - operands[4] = gen_rtx (MEM, SImode, operands[2]); + operands[4] = gen_rtx_MEM (SImode, operands[2]); operands[5] = operand_subword (operands[1], 0, 0, DImode); - operands[6] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, SImode, operands[2], - gen_rtx (CONST_INT, VOIDmode, 4))); + operands[6] = gen_rtx_MEM (SImode, plus_constant (operands[4], 4)); operands[7] = operand_subword (operands[1], 1, 0, DImode); if (operands[5] == 0 || operands[7] == 0) @@ -607,8 +601,8 @@ operands[7] = operands[8] = operands[6]; else { - operands[7] = gen_rtx (SCRATCH, SImode); - operands[8] = gen_rtx (SCRATCH, SImode); + operands[7] = gen_rtx_SCRATCH (SImode); + operands[8] = gen_rtx_SCRATCH (SImode); } }") @@ -631,7 +625,7 @@ if (op0 == op1) { - emit_insn (gen_rtx (SET, VOIDmode, op0, op1)); + emit_insn (gen_rtx_SET (VOIDmode, op0, op1)); DONE; } @@ -686,7 +680,7 @@ if (op0 == op1) { - emit_insn (gen_rtx (SET, VOIDmode, op0, op1)); + emit_insn (gen_rtx_SET (VOIDmode, op0, op1)); DONE; } @@ -706,7 +700,7 @@ last = emit_move_insn (operand_subword (op0, 0, 1, SFmode), operand_subword_force (op1, 0, SFmode)); - REG_NOTES (last) = gen_rtx (EXPR_LIST, REG_EQUAL, op1, REG_NOTES (last)); + REG_NOTES (last) = gen_rtx_EXPR_LIST (REG_EQUAL, op1, REG_NOTES (last)); DONE; } }") @@ -812,11 +806,10 @@ " { operands[2] = XEXP (operands[1], 0); operands[3] = operand_subword (operands[0], 0, 0, DFmode); - operands[4] = gen_rtx (MEM, SImode, gen_rtx (REG, SImode, 15)); + operands[4] = gen_rtx_MEM (SImode, gen_rtx (REG, SImode, 15)); operands[5] = operand_subword (operands[0], 1, 0, DFmode); - operands[6] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, SImode, gen_rtx (REG, SImode, 15), - gen_rtx (CONST_INT, VOIDmode, 4))); + operands[6] = gen_rtx_MEM (SImode, + plus_constant (gen_rtx (REG, SImode, 15), 4)); if (operands[3] == 0 || operands[5] == 0) FAIL; @@ -833,11 +826,10 @@ (set (match_dup 5) (match_dup 6))] " { operands[2] = XEXP (operands[0], 0); - operands[3] = gen_rtx (MEM, SImode, gen_rtx (REG, SImode, 15)); + operands[3] = gen_rtx_MEM (SImode, gen_rtx (REG, SImode, 15)); operands[4] = operand_subword (operands[1], 0, 0, DFmode); - operands[5] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, SImode, gen_rtx (REG, SImode, 15), - gen_rtx (CONST_INT, VOIDmode, 4))); + operands[5] = gen_rtx_MEM (SImode, + plus_constant (gen_rtx_REG (SImode, 15), 4)); operands[6] = operand_subword (operands[1], 1, 0, DFmode); if (operands[4] == 0 || operands[6] == 0) @@ -870,11 +862,11 @@ FAIL; if (reload_completed) - operands[6] = operands[7] = gen_rtx (REG, SImode, 15); + operands[6] = operands[7] = gen_rtx_REG (SImode, 15); else { - operands[6] = gen_rtx (SCRATCH, SImode); - operands[7] = gen_rtx (SCRATCH, SImode); + operands[6] = gen_rtx_SCRATCH (SImode); + operands[7] = gen_rtx_SCRATCH (SImode); } }") @@ -1208,10 +1200,9 @@ if (low & 0x8000) high++, low |= 0xffff0000; - emit_insn (gen_addsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, high << 16))); + emit_insn (gen_addsi3 (operands[0], operands[1], GEN_INT (high << 16))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, low); + operands[2] = GEN_INT (low); } }") @@ -1259,8 +1250,7 @@ if (GET_CODE (operands [2]) == CONST_INT) { emit_insn (gen_addsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, - VOIDmode, - INTVAL (operands[2])))); + GEN_INT (- INTVAL (operands[2])))); DONE; } else @@ -1367,16 +1357,16 @@ rtx insn; emit_insn (gen_divmodsi4_doit (operands[1], operands[2])); - insn = emit_move_insn (operands[0], gen_rtx (REG, SImode, 2)); - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, - gen_rtx (DIV, SImode, operands[1], - operands[2]), - REG_NOTES (insn)); - insn = emit_move_insn (operands[3], gen_rtx (REG, SImode, 3)); - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, - gen_rtx (MOD, SImode, operands[1], - operands[2]), - REG_NOTES (insn)); + insn = emit_move_insn (operands[0], gen_rtx_REG (SImode, 2)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, + gen_rtx_DIV (SImode, operands[1], + operands[2]), + REG_NOTES (insn)); + insn = emit_move_insn (operands[3], gen_rtx_REG (SImode, 3)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, + gen_rtx_MOD (SImode, operands[1], + operands[2]), + REG_NOTES (insn)); DONE; }") @@ -1417,16 +1407,16 @@ rtx insn; emit_insn (gen_udivmodsi4_doit (operands[1], operands[2])); - insn = emit_move_insn (operands[0], gen_rtx (REG, SImode, 2)); - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, - gen_rtx (UDIV, SImode, operands[1], - operands[2]), - REG_NOTES (insn)); - insn = emit_move_insn (operands[3], gen_rtx (REG, SImode, 3)); - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, - gen_rtx (UMOD, SImode, operands[1], - operands[2]), - REG_NOTES (insn)); + insn = emit_move_insn (operands[0], gen_rtx_REG (SImode, 2)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, + gen_rtx_UDIV (SImode, operands[1], + operands[2]), + REG_NOTES (insn)); + insn = emit_move_insn (operands[3], gen_rtx_REG (SImode, 3)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, + gen_rtx_UMOD (SImode, operands[1], + operands[2]), + REG_NOTES (insn)); DONE; }") @@ -1516,10 +1506,9 @@ if (top != 0 && top != 0xffff && bottom != 0 && bottom != 0xffff) { emit_insn (gen_andsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, - (top << 16) | 0xffff))); + GEN_INT ((top << 16) | 0xffff))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, 0xffff0000 | bottom); + operands[2] = GEN_INT (0xffff0000 | bottom); } } }"); @@ -1552,9 +1541,9 @@ if (top != 0 && bottom != 0) { emit_insn (gen_iorsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, (top << 16)))); + GEN_INT (top << 16)))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, bottom); + operands[2] = GEN_INT (bottom); } } }"); @@ -1592,9 +1581,9 @@ else if (top != 0 && bottom != 0) { emit_insn (gen_xorsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, (top << 16)))); + GEN_INT (top << 16))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, bottom); + operands[2] = GEN_INT (bottom); } } }"); @@ -1666,7 +1655,7 @@ "" " { - rtx reg0 = gen_rtx (REG, SImode, 0); + rtx reg0 = gen_rtx_REG (SImode, 0); rtx call_insn; if (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != CONST_INT) @@ -1676,8 +1665,8 @@ if (GET_CODE (operands[0]) == SYMBOL_REF) { extern rtx get_symref (); - char *real_fcnname = - (char *) alloca (strlen (XSTR (operands[0], 0)) + 2); + char *real_fcnname + = (char *) alloca (strlen (XSTR (operands[0], 0)) + 2); /* Copy the data area address to r0. */ emit_move_insn (reg0, force_reg (SImode, operands[0])); @@ -1690,7 +1679,7 @@ rtx data_access; emit_move_insn (reg0, force_reg (SImode, operands[0])); - data_access = gen_rtx (MEM, SImode, operands[0]); + data_access = gen_rtx_MEM (SImode, operands[0]); RTX_UNCHANGING_P (data_access) = 1; operands[0] = copy_to_reg (data_access); } @@ -1725,7 +1714,7 @@ "" " { - rtx reg0 = gen_rtx (REG, SImode, 0); + rtx reg0 = gen_rtx_REG (SImode, 0); rtx call_insn; if (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != CONST_INT) @@ -1749,7 +1738,7 @@ rtx data_access; emit_move_insn (reg0,force_reg (SImode, operands[1])); - data_access = gen_rtx (MEM, SImode, operands[1]); + data_access = gen_rtx_MEM (SImode, operands[1]); RTX_UNCHANGING_P (data_access) = 1; operands[1] = copy_to_reg (data_access); } @@ -1979,8 +1968,7 @@ result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, SFmode), - gen_rtx (CONST_INT, VOIDmode, 0x80000000), - target, 0, OPTAB_WIDEN); + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -2013,8 +2001,7 @@ start_sequence (); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, DFmode), - gen_rtx (CONST_INT, VOIDmode, 0x80000000), - target, 0, OPTAB_WIDEN); + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 144c001eeed..cff05e91832 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -20,8 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> -#include <ctype.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -39,10 +38,6 @@ Boston, MA 02111-1307, USA. */ #include "except.h" #include "function.h" -#if HAVE_STDLIB_H -# include <stdlib.h> -#endif - #ifndef TARGET_NO_PROTOTYPE #define TARGET_NO_PROTOTYPE 0 #endif @@ -1444,28 +1439,29 @@ function_arg (cum, mode, type, named) && (DEFAULT_ABI != ABI_AIX || ! TARGET_XL_CALL || (align_words < GP_ARG_NUM_REG)))) - return gen_rtx (REG, mode, cum->fregno); - - return gen_rtx (PARALLEL, mode, - gen_rtvec - (2, - gen_rtx (EXPR_LIST, VOIDmode, - ((align_words >= GP_ARG_NUM_REG) - ? NULL_RTX - : (align_words - + RS6000_ARG_SIZE (mode, type, named) - > GP_ARG_NUM_REG - /* If this is partially on the stack, then - we only include the portion actually - in registers here. */ - ? gen_rtx (REG, SImode, - GP_ARG_MIN_REG + align_words) - : gen_rtx (REG, mode, - GP_ARG_MIN_REG + align_words))), - const0_rtx), - gen_rtx (EXPR_LIST, VOIDmode, - gen_rtx (REG, mode, cum->fregno), - const0_rtx))); + return gen_rtx_REG (mode, cum->fregno); + + return gen_rtx_PARALLEL + (mode, + gen_rtvec + (2, + gen_rtx_EXPR_LIST (VOIDmode, + ((align_words >= GP_ARG_NUM_REG) + ? NULL_RTX + : (align_words + + RS6000_ARG_SIZE (mode, type, named) + > GP_ARG_NUM_REG + /* If this is partially on the stack, then + we only include the portion actually + in registers here. */ + ? gen_rtx_REG (SImode, + GP_ARG_MIN_REG + align_words) + : gen_rtx_REG (mode, + GP_ARG_MIN_REG + align_words))), + const0_rtx), + gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_REG (mode, cum->fregno), + const0_rtx))); } /* Long longs won't be split between register and stack; @@ -1478,7 +1474,7 @@ function_arg (cum, mode, type, named) } else if (align_words < GP_ARG_NUM_REG) - return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words); + return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); return NULL_RTX; } @@ -1600,8 +1596,9 @@ setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG) move_block_from_reg (GP_ARG_MIN_REG + first_reg_offset, - gen_rtx (MEM, BLKmode, - plus_constant (save_area, first_reg_offset * reg_size)), + gen_rtx_MEM (BLKmode, + plus_constant (save_area, + first_reg_offset * reg_size)), GP_ARG_NUM_REG - first_reg_offset, (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); @@ -1616,21 +1613,24 @@ setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) if (num_fp_reg >= 0) { - rtx cr1 = gen_rtx (REG, CCmode, 69); + rtx cr1 = gen_rtx_REG (CCmode, 69); rtx lab = gen_label_rtx (); int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); - emit_jump_insn (gen_rtx (SET, VOIDmode, - pc_rtx, - gen_rtx (IF_THEN_ELSE, VOIDmode, - gen_rtx (NE, VOIDmode, cr1, const0_rtx), - gen_rtx (LABEL_REF, VOIDmode, lab), - pc_rtx))); + emit_jump_insn (gen_rtx_SET + (VOIDmode, + pc_rtx, + gen_rtx_IF_THEN_ELSE + (VOIDmode, + gen_rtx_NE (VOIDmode, cr1, const0_rtx), + gen_rtx_LABEL_REF (VOIDmode, lab), + pc_rtx))); while ( num_fp_reg-- >= 0) { - emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)), - gen_rtx (REG, DFmode, fregno++)); + emit_move_insn (gen_rtx_MEM (DFmode, + plus_constant (save_area, off)), + gen_rtx_REG (DFmode, fregno++)); off += 8; } @@ -1672,7 +1672,7 @@ expand_block_move_mem (mode, addr, orig_mem) rtx addr; rtx orig_mem; { - rtx mem = gen_rtx (MEM, mode, addr); + rtx mem = gen_rtx_MEM (mode, addr); RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem); @@ -1848,8 +1848,8 @@ expand_block_move (operands) } else { - src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset)); - dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset)); + src_addr = plus_constant (src_reg, offset); + dest_addr = plus_constant (dest_reg, offset); } /* Generate the appropriate load and store, saving the stores for later */ @@ -2255,7 +2255,7 @@ rs6000_got_register (value) fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value); current_function_uses_pic_offset_table = 1; - pic_offset_table_rtx = gen_rtx (REG, Pmode, GOT_TOC_REGNUM); + pic_offset_table_rtx = gen_rtx_REG (Pmode, GOT_TOC_REGNUM); } return pic_offset_table_rtx; @@ -2376,7 +2376,7 @@ rs6000_finalize_pic () rtx init = gen_init_v4_pic (reg); emit_insn_before (init, first_insn); if (!optimize && last_insn) - emit_insn_after (gen_rtx (USE, VOIDmode, reg), last_insn); + emit_insn_after (gen_rtx_USE (VOIDmode, reg), last_insn); } } } @@ -2391,7 +2391,7 @@ rs6000_reorg (insn) { if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) { - rtx got_reg = gen_rtx (REG, Pmode, GOT_TOC_REGNUM); + rtx got_reg = gen_rtx_REG (Pmode, GOT_TOC_REGNUM); for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' && reg_mentioned_p (got_reg, PATTERN (insn))) @@ -2838,7 +2838,7 @@ print_operand (file, x, code) { val = (GET_CODE (x) == CONST_INT ? INTVAL (x) : CONST_DOUBLE_HIGH (x)); - if (val == (-1 << (HOST_BITS_PER_WIDE_INT-1))) + if (val == ((HOST_WIDE_INT)-1 << (HOST_BITS_PER_WIDE_INT-1))) i = 0; else for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) @@ -2852,7 +2852,7 @@ print_operand (file, x, code) if (val == 0) --i; - else if (val == (-1 << (HOST_BITS_PER_WIDE_INT-1))) + else if (val == ((HOST_WIDE_INT)-1 << (HOST_BITS_PER_WIDE_INT-1))) ; else for (i = 33; i < 64; i++) @@ -3305,7 +3305,7 @@ rs6000_stack_info () #endif { if (0 == strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), - "main")) + "main") && DECL_CONTEXT (current_function_decl) == NULL_TREE) { info_ptr->main_p = 1; @@ -4897,8 +4897,9 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt) abort (); /* Macros to shorten the code expansions below. */ -#define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr)) -#define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset))) +#define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr)) +#define MEM_PLUS(addr,offset) \ + gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset))) /* Under AIX, just build the 3 word function descriptor */ case ABI_AIX: @@ -4917,7 +4918,7 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt) case ABI_V4: case ABI_SOLARIS: case ABI_AIX_NODESC: - emit_library_call (gen_rtx (SYMBOL_REF, SImode, "__trampoline_setup"), + emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"), FALSE, VOIDmode, 4, addr, pmode, GEN_INT (rs6000_trampoline_size ()), SImode, @@ -4934,7 +4935,7 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt) rtx fn_reg = gen_reg_rtx (pmode); rtx toc_reg = gen_reg_rtx (pmode); - emit_move_insn (tramp_reg, gen_rtx (SYMBOL_REF, pmode, "..LTRAMP1..0")); + emit_move_insn (tramp_reg, gen_rtx_SYMBOL_REF (pmode, "..LTRAMP1..0")); addr = force_reg (pmode, addr); emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); @@ -4942,7 +4943,7 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt) emit_move_insn (MEM_PLUS (addr, regsize), addr); emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); - emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx (REG, pmode, 2)); + emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx_REG (pmode, 2)); } break; } @@ -5079,8 +5080,8 @@ rs6000_dll_import_ref (call_ref) strcat (p, call_name); node = get_identifier (p); - reg1 = force_reg (Pmode, gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node))); - emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg1)); + reg1 = force_reg (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node))); + emit_move_insn (reg2, gen_rtx_MEM (Pmode, reg1)); return reg2; } @@ -5104,7 +5105,7 @@ rs6000_longcall_ref (call_ref) call_name++; node = get_identifier (call_name); - call_ref = gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node)); + call_ref = gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node)); } return force_reg (Pmode, call_ref); diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 054e12be9ea..5bf7caa717f 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -26,7 +26,7 @@ Boston, MA 02111-1307, USA. */ /* Names to predefine in the preprocessor for this target machine. */ -#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \ +#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 -D_LONG_LONG\ -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)" /* Print subsidiary information on the compiler version in use. */ @@ -1304,14 +1304,15 @@ extern int rs6000_sysv_varargs_p; fp1, unless -msoft-float. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), \ - TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 33 : 3) + gen_rtx_REG (TYPE_MODE (VALTYPE), \ + TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 33 : 3) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT ? 33 : 3) + gen_rtx_REG (MODE, (GET_MODE_CLASS (MODE) == MODE_FLOAT \ + && TARGET_HARD_FLOAT ? 33 : 3)) /* The definition of this macro implies that there are cases where a scalar value cannot be returned in registers. @@ -1624,12 +1625,15 @@ typedef struct rs6000_args frame pointer. */ #define RETURN_ADDR_RTX(count, frame) \ ((count == -1) \ - ? gen_rtx (REG, Pmode, 65) \ - : gen_rtx (MEM, Pmode, \ - memory_address (Pmode, \ - plus_constant (copy_to_reg (gen_rtx (MEM, Pmode, \ - memory_address (Pmode, frame))), \ - RETURN_ADDRESS_OFFSET)))) + ? gen_rtx_REG (Pmode, 65) \ + : gen_rtx_MEM (Pmode, \ + memory_address \ + (Pmode, \ + plus_constant (copy_to_reg \ + (gen_rtx_MEM (Pmode, \ + memory_address (Pmode, \ + frame))), \ + RETURN_ADDRESS_OFFSET)))) /* Definitions for register eliminations. @@ -1900,9 +1904,9 @@ typedef struct rs6000_args low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ if (low_int & 0x8000) \ high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16; \ - sum = force_operand (gen_rtx (PLUS, Pmode, XEXP (X, 0), \ - GEN_INT (high_int)), 0); \ - (X) = gen_rtx (PLUS, Pmode, sum, GEN_INT (low_int)); \ + sum = force_operand (gen_rtx_PLUS (Pmode, XEXP (X, 0), \ + GEN_INT (high_int)), 0); \ + (X) = gen_rtx_PLUS (Pmode, sum, GEN_INT (low_int)); \ goto WIN; \ } \ else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ @@ -1911,8 +1915,8 @@ typedef struct rs6000_args && (TARGET_64BIT || (MODE) != DImode) \ && (MODE) != TImode) \ { \ - (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \ - force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \ + (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ + force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \ goto WIN; \ } \ else if (TARGET_ELF && TARGET_32BIT && TARGET_NO_TOC \ @@ -1924,7 +1928,7 @@ typedef struct rs6000_args { \ rtx reg = gen_reg_rtx (Pmode); \ emit_insn (gen_elf_high (reg, (X))); \ - (X) = gen_rtx (LO_SUM, Pmode, reg, (X)); \ + (X) = gen_rtx_LO_SUM (Pmode, reg, (X)); \ } \ } @@ -2079,12 +2083,10 @@ typedef struct rs6000_args #define FASCIST_ASSEMBLER -#ifndef ASM_OUTPUT_CONSTRUCTOR -#define ASM_OUTPUT_CONSTRUCTOR(file, name) -#endif -#ifndef ASM_OUTPUT_DESTRUCTOR -#define ASM_OUTPUT_DESTRUCTOR(file, name) -#endif +/* AIX does not have any init/fini or ctor/dtor sections, so create + static constructors and destructors as normal functions. */ +/* #define ASM_OUTPUT_CONSTRUCTOR(file, name) */ +/* #define ASM_OUTPUT_DESTRUCTOR(file, name) */ /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ @@ -2971,7 +2973,7 @@ do { \ /* This is how to output an element of a case-vector that is relative. */ -#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)\ +#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ do { char buf[100]; \ fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", FILE); \ ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index e6be7d75608..0c095f95c2c 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -1370,11 +1370,11 @@ { if (! TARGET_POWER && ! TARGET_POWERPC) { - emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); - emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); + emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]); + emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]); emit_insn (gen_divss_call ()); - emit_move_insn (operands[0], gen_rtx (REG, SImode, 3)); - emit_move_insn (operands[3], gen_rtx (REG, SImode, 4)); + emit_move_insn (operands[0], gen_rtx_REG (SImode, 3)); + emit_move_insn (operands[3], gen_rtx_REG (SImode, 4)); DONE; } }") @@ -1398,10 +1398,10 @@ { if (! TARGET_POWER && ! TARGET_POWERPC) { - emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); - emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); + emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]); + emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]); emit_insn (gen_quous_call ()); - emit_move_insn (operands[0], gen_rtx (REG, SImode, 3)); + emit_move_insn (operands[0], gen_rtx_REG (SImode, 3)); DONE; } else if (TARGET_POWER) @@ -1455,10 +1455,10 @@ FAIL; else { - emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); - emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); + emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]); + emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]); emit_insn (gen_quoss_call ()); - emit_move_insn (operands[0], gen_rtx (REG, SImode, 3)); + emit_move_insn (operands[0], gen_rtx_REG (SImode, 3)); DONE; } }") @@ -1607,11 +1607,11 @@ { if (! TARGET_POWERPC) { - emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); - emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); + emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]); + emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]); emit_insn (gen_divus_call ()); - emit_move_insn (operands[0], gen_rtx (REG, SImode, 3)); - emit_move_insn (operands[3], gen_rtx (REG, SImode, 4)); + emit_move_insn (operands[0], gen_rtx_REG (SImode, 3)); + emit_move_insn (operands[3], gen_rtx_REG (SImode, 4)); DONE; } else @@ -3705,7 +3705,7 @@ " { operands[6] = GEN_INT (0x80000000); - operands[7] = gen_rtx (REG, DFmode, FPMEM_REGNUM); + operands[7] = gen_rtx_REG (DFmode, FPMEM_REGNUM); }") (define_expand "floatunssidf2" @@ -3759,7 +3759,7 @@ (set (match_dup 0) (minus:DF (match_dup 0) (match_dup 3)))] - "operands[5] = gen_rtx (REG, DFmode, FPMEM_REGNUM);") + "operands[5] = gen_rtx_REG (DFmode, FPMEM_REGNUM);") ;; Load up scratch register with base address + offset if needed (define_insn "*floatsidf2_loadaddr" @@ -3800,11 +3800,11 @@ indx = stack_pointer_rtx; operands[2] - = gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, indx, - GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - - 0x8000) - + ((WORDS_BIG_ENDIAN != 0) * 4)))); + = gen_rtx_MEM (SImode, + plus_constant (indx, + (((rs6000_fpmem_offset & 0xffff) ^ 0x8000) + - 0x8000) + + ((WORDS_BIG_ENDIAN != 0) * 4))); return \"{st|stw} %0,%2\"; }" @@ -3828,11 +3828,11 @@ indx = stack_pointer_rtx; operands[2] - = gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, indx, - GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - - 0x8000) - + ((WORDS_BIG_ENDIAN == 0) * 4)))); + = gen_rtx_MEM (SImode, + plus_constant (indx, + (((rs6000_fpmem_offset & 0xffff) ^ 0x8000) + - 0x8000) + + ((WORDS_BIG_ENDIAN == 0) * 4))); return \"{st|stw} %0,%2\"; }" @@ -3858,8 +3858,7 @@ else indx = stack_pointer_rtx; - operands[2] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, indx, GEN_INT (offset))); + operands[2] = gen_rtx_MEM (SImode, plus_constant (indx, offset)); return \"lfd %0,%2\"; }" @@ -3877,13 +3876,13 @@ if (!TARGET_POWER2 && !TARGET_POWERPC) { emit_insn (gen_trunc_call (operands[0], operands[1], - gen_rtx (SYMBOL_REF, Pmode, RS6000_ITRUNC))); + gen_rtx_SYMBOL_REF (Pmode, RS6000_ITRUNC))); DONE; } operands[2] = gen_reg_rtx (DImode); operands[3] = gen_reg_rtx (Pmode); - operands[4] = gen_rtx (REG, DImode, FPMEM_REGNUM); + operands[4] = gen_rtx_REG (DImode, FPMEM_REGNUM); }") (define_insn "*fix_truncdfsi2_internal" @@ -3913,7 +3912,7 @@ (set (match_operand:SI 0 "gpc_reg_operand" "") (unspec [(match_dup 4) (match_dup 3)] 16))] - "operands[4] = gen_rtx (REG, DImode, FPMEM_REGNUM);") + "operands[4] = gen_rtx_REG (DImode, FPMEM_REGNUM);") (define_insn "*fix_truncdfsi2_store" [(set (reg:DI 76) @@ -3931,11 +3930,10 @@ else indx = stack_pointer_rtx; - operands[2] = gen_rtx (MEM, DFmode, - gen_rtx (PLUS, Pmode, - indx, - GEN_INT ((((rs6000_fpmem_offset & 0xffff) - ^ 0x8000) - 0x8000)))); + operands[2] = gen_rtx_MEM (DFmode, + plus_constant (indx, + (((rs6000_fpmem_offset & 0xffff) + ^ 0x8000) - 0x8000))); return \"stfd %0,%w2\"; }" @@ -3958,11 +3956,11 @@ indx = stack_pointer_rtx; operands[2] - = gen_rtx (MEM, DFmode, - gen_rtx (PLUS, Pmode, indx, - GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - - 0x8000) - + ((WORDS_BIG_ENDIAN) ? 4 : 0)))); + = gen_rtx_MEM (DFmode, + plus_constant (indx, + (((rs6000_fpmem_offset & 0xffff) ^ 0x8000) + - 0x8000) + + ((WORDS_BIG_ENDIAN) ? 4 : 0))); return \"{l|lwz} %0,%2\"; }" @@ -3975,7 +3973,7 @@ " { emit_insn (gen_trunc_call (operands[0], operands[1], - gen_rtx (SYMBOL_REF, Pmode, RS6000_UITRUNC))); + gen_rtx_SYMBOL_REF (Pmode, RS6000_UITRUNC))); DONE; }") @@ -3990,9 +3988,9 @@ rtx first = XVECEXP (insns, 0, 0); rtx last = XVECEXP (insns, 0, XVECLEN (insns, 0) - 1); - REG_NOTES (first) = gen_rtx (INSN_LIST, REG_LIBCALL, last, - REG_NOTES (first)); - REG_NOTES (last) = gen_rtx (INSN_LIST, REG_RETVAL, first, REG_NOTES (last)); + REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last, + REG_NOTES (first)); + REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, REG_NOTES (last)); emit_insn (insns); DONE; @@ -4097,17 +4095,17 @@ { if (! TARGET_POWER && ! TARGET_POWERPC) { - emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); - emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); + emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]); + emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]); emit_insn (gen_mull_call ()); if (WORDS_BIG_ENDIAN) - emit_move_insn (operands[0], gen_rtx (REG, DImode, 3)); + emit_move_insn (operands[0], gen_rtx_REG (DImode, 3)); else { emit_move_insn (operand_subword (operands[0], 0, 0, DImode), - gen_rtx (REG, SImode, 3)); + gen_rtx_REG (SImode, 3)); emit_move_insn (operand_subword (operands[0], 1, 0, DImode), - gen_rtx (REG, SImode, 4)); + gen_rtx_REG (SImode, 4)); } DONE; } @@ -4238,10 +4236,10 @@ { if (! TARGET_POWER && ! TARGET_POWERPC) { - emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); - emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); + emit_move_insn (gen_rtx_REG (SImode, 3), operands[1]); + emit_move_insn (gen_rtx_REG (SImode, 4), operands[2]); emit_insn (gen_mulh_call ()); - emit_move_insn (operands[0], gen_rtx (REG, SImode, 3)); + emit_move_insn (operands[0], gen_rtx_REG (SImode, 3)); DONE; } else if (TARGET_POWER) @@ -5467,7 +5465,7 @@ || GET_CODE (operands[1]) == CONST) && small_data_operand (operands[1], SImode)) { - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; } @@ -5497,7 +5495,7 @@ rtx new_ref; while (*name == '.') name++; - new_ref = gen_rtx (SYMBOL_REF, Pmode, name); + new_ref = gen_rtx_SYMBOL_REF (Pmode, name); CONSTANT_POOL_ADDRESS_P (new_ref) = CONSTANT_POOL_ADDRESS_P (operands[1]); SYMBOL_REF_FLAG (new_ref) = SYMBOL_REF_FLAG (operands[1]); @@ -5548,7 +5546,7 @@ This should not be done for operands that contain LABEL_REFs. For now, we just handle the obvious case. */ if (GET_CODE (operands[1]) != LABEL_REF) - emit_insn (gen_rtx (USE, VOIDmode, operands[1])); + emit_insn (gen_rtx_USE (VOIDmode, operands[1])); /* If we are to limit the number of things we put in the TOC and this is a symbol plus a constant we can add in one insn, @@ -6172,7 +6170,7 @@ This should not be done for operands that contain LABEL_REFs. For now, we just handle the obvious case. */ if (GET_CODE (operands[1]) != LABEL_REF) - emit_insn (gen_rtx (USE, VOIDmode, operands[1])); + emit_insn (gen_rtx_USE (VOIDmode, operands[1])); /* If we are to limit the number of things we put in the TOC and this is a symbol plus a constant we can add in one insn, @@ -6258,8 +6256,8 @@ (set (match_dup 3) (match_dup 1))] " { - operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); - operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); + operands[2] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN == 0); + operands[3] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN != 0); operands[4] = ((INTVAL (operands[1]) & 0x80000000) ? constm1_rtx : const0_rtx); }") @@ -6272,8 +6270,8 @@ (set (match_dup 3) (match_dup 5))] " { - operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); - operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); + operands[2] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN == 0); + operands[3] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN != 0); operands[4] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); operands[5] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); }") @@ -6636,14 +6634,14 @@ count = INTVAL (operands[2]); regno = REGNO (operands[0]); - operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count)); + operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count)); from = force_reg (SImode, XEXP (operands[1], 0)); for (i = 0; i < count; i++) XVECEXP (operands[3], 0, i) - = gen_rtx (SET, VOIDmode, gen_rtx (REG, SImode, regno + i), - change_address (operands[1], SImode, - plus_constant (from, i * 4))); + = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno + i), + change_address (operands[1], SImode, + plus_constant (from, i * 4))); }") (define_insn "" @@ -6678,7 +6676,7 @@ else if (i == 0) { xop[0] = operands[1]; - xop[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xop[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); xop[2] = GEN_INT (4 * (words-1)); output_asm_insn (\"{cal %0,4(%0)|addi %0,%0,4}\;{lsi|lswi} %1,%0,%2\;{l|lwz} %0,-4(%0)\", xop); return \"\"; @@ -6688,7 +6686,7 @@ for (j = 0; j < words; j++) if (j != i) { - xop[0] = gen_rtx (REG, SImode, REGNO (operands[1]) + j); + xop[0] = gen_rtx_REG (SImode, REGNO (operands[1]) + j); xop[1] = operands[2]; xop[2] = GEN_INT (j * 4); output_asm_insn (\"{l|lwz} %0,%2(%1)\", xop); @@ -6733,21 +6731,21 @@ count = INTVAL (operands[2]); regno = REGNO (operands[1]); - operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 1)); + operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 1)); to = force_reg (SImode, XEXP (operands[0], 0)); XVECEXP (operands[3], 0, 0) - = gen_rtx (SET, VOIDmode, change_address (operands[0], SImode, to), - operands[1]); - XVECEXP (operands[3], 0, 1) = gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, SImode)); + = gen_rtx_SET (VOIDmode, change_address (operands[0], SImode, to), + operands[1]); + XVECEXP (operands[3], 0, 1) = gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (SImode)); for (i = 1; i < count; i++) XVECEXP (operands[3], 0, i + 1) - = gen_rtx (SET, VOIDmode, - change_address (operands[0], SImode, - plus_constant (to, i * 4)), - gen_rtx (REG, SImode, regno + i)); + = gen_rtx_SET (VOIDmode, + change_address (operands[0], SImode, + plus_constant (to, i * 4)), + gen_rtx_REG (SImode, regno + i)); }") (define_insn "" @@ -7309,7 +7307,7 @@ "" " { rtx chain = gen_reg_rtx (Pmode); - rtx stack_bot = gen_rtx (MEM, Pmode, stack_pointer_rtx); + rtx stack_bot = gen_rtx_MEM (Pmode, stack_pointer_rtx); rtx neg_op0; emit_move_insn (chain, stack_bot); @@ -7321,7 +7319,7 @@ && (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) > 4096)) { rtx tmp = gen_reg_rtx (Pmode); - emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, + emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__allocate_stack\"), tmp, 0, Pmode, 1, operands[1], Pmode); emit_insn (gen_set_sp (tmp)); @@ -7350,7 +7348,7 @@ { emit_insn ((* ((TARGET_32BIT) ? gen_addsi3 : gen_adddi3)) (stack_pointer_rtx, stack_pointer_rtx, neg_op0)); - emit_move_insn (gen_rtx (MEM, Pmode, stack_pointer_rtx), chain); + emit_move_insn (gen_rtx_MEM (Pmode, stack_pointer_rtx), chain); } emit_move_insn (operands[0], virtual_stack_dynamic_rtx); @@ -7395,7 +7393,7 @@ " { operands[2] = gen_reg_rtx (Pmode); - operands[3] = gen_rtx (MEM, Pmode, operands[0]); + operands[3] = gen_rtx_MEM (Pmode, operands[0]); }") (define_expand "save_stack_nonlocal" @@ -7407,7 +7405,7 @@ rtx temp = gen_reg_rtx (Pmode); /* Copy the backchain to the first word, sp to the second. */ - emit_move_insn (temp, gen_rtx (MEM, Pmode, operands[1])); + emit_move_insn (temp, gen_rtx_MEM (Pmode, operands[1])); emit_move_insn (operand_subword (operands[0], 0, 0, (TARGET_32BIT ? DImode : TImode)), temp); @@ -7432,7 +7430,7 @@ emit_move_insn (operands[0], operand_subword (operands[1], 1, 0, (TARGET_32BIT ? DImode : TImode))); - emit_move_insn (gen_rtx (MEM, Pmode, operands[0]), temp); + emit_move_insn (gen_rtx_MEM (Pmode, operands[0]), temp); DONE; }") @@ -7660,14 +7658,14 @@ operands[1], operands[2])); else { - rtx toc_reg = gen_rtx (REG, Pmode, 2); + rtx toc_reg = gen_rtx_REG (Pmode, 2); rtx toc_addr = RS6000_SAVE_TOC; if (DEFAULT_ABI == ABI_AIX) { /* AIX function pointers are really pointers to a three word area. */ - rtx static_chain = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM); + rtx static_chain = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); emit_call_insn (TARGET_32BIT ? gen_call_indirect_aix32 (force_reg (Pmode, operands[0]), @@ -7728,14 +7726,14 @@ operands[3])); else { - rtx toc_reg = gen_rtx (REG, Pmode, 2); + rtx toc_reg = gen_rtx_REG (Pmode, 2); rtx toc_addr = RS6000_SAVE_TOC; if (DEFAULT_ABI == ABI_AIX) { /* AIX function pointers are really pointers to a three word area. */ - rtx static_chain = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM); + rtx static_chain = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); emit_call_insn (TARGET_32BIT ? gen_call_value_indirect_aix32 (operands[0], @@ -8131,8 +8129,8 @@ "" " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8146,8 +8144,8 @@ "" " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8161,8 +8159,8 @@ "" " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8176,8 +8174,8 @@ "" " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8191,8 +8189,8 @@ "" " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8206,8 +8204,8 @@ "" " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8220,8 +8218,8 @@ (pc)))] "" " -{ operands[1] = gen_rtx (COMPARE, CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); +{ operands[1] = gen_rtx_COMPARE (CCUNSmode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8234,8 +8232,8 @@ (pc)))] "" " -{ operands[1] = gen_rtx (COMPARE, CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); +{ operands[1] = gen_rtx_COMPARE (CCUNSmode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8248,8 +8246,8 @@ (pc)))] "" " -{ operands[1] = gen_rtx (COMPARE, CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); +{ operands[1] = gen_rtx_COMPARE (CCUNSmode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8262,8 +8260,8 @@ (pc)))] "" " -{ operands[1] = gen_rtx (COMPARE, CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); +{ operands[1] = gen_rtx_COMPARE (CCUNSmode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8279,8 +8277,8 @@ "" " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8293,8 +8291,8 @@ { if (! rs6000_compare_fp_p) FAIL; - operands[1] = gen_rtx (COMPARE, CCFPmode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (CCFPmode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCFPmode); }") @@ -8310,8 +8308,8 @@ if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx) FAIL; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8327,8 +8325,8 @@ if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx) FAIL; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8339,8 +8337,8 @@ "" " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8356,8 +8354,8 @@ if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx) FAIL; - operands[1] = gen_rtx (COMPARE, mode, - rs6000_compare_op0, rs6000_compare_op1); + operands[1] = gen_rtx_COMPARE (mode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8367,8 +8365,8 @@ (gtu:SI (match_dup 2) (const_int 0)))] "" " -{ operands[1] = gen_rtx (COMPARE, CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); +{ operands[1] = gen_rtx_COMPARE (CCUNSmode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8378,8 +8376,8 @@ (ltu:SI (match_dup 2) (const_int 0)))] "" " -{ operands[1] = gen_rtx (COMPARE, CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); +{ operands[1] = gen_rtx_COMPARE (CCUNSmode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8389,8 +8387,8 @@ (geu:SI (match_dup 2) (const_int 0)))] "" " -{ operands[1] = gen_rtx (COMPARE, CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); +{ operands[1] = gen_rtx_COMPARE (CCUNSmode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8400,8 +8398,8 @@ (leu:SI (match_dup 2) (const_int 0)))] "" " -{ operands[1] = gen_rtx (COMPARE, CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); +{ operands[1] = gen_rtx_COMPARE (CCUNSmode, + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -9848,7 +9846,7 @@ "" " { operands[0] = force_reg (SImode, operands[0]); - operands[2] = force_reg (SImode, gen_rtx (LABEL_REF, VOIDmode, operands[1])); + operands[2] = force_reg (SImode, gen_rtx_LABEL_REF (SImode, operands[1])); operands[3] = gen_reg_rtx (SImode); }") @@ -9861,7 +9859,7 @@ "" " { operands[0] = force_reg (DImode, operands[0]); - operands[2] = force_reg (DImode, gen_rtx (LABEL_REF, VOIDmode, operands[1])); + operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (SImode, operands[1])); operands[3] = gen_reg_rtx (DImode); }") diff --git a/gcc/config/rs6000/xm-sysv4.h b/gcc/config/rs6000/xm-sysv4.h index 2a09788ae9d..dc1f5031430 100644 --- a/gcc/config/rs6000/xm-sysv4.h +++ b/gcc/config/rs6000/xm-sysv4.h @@ -1,6 +1,5 @@ /* Configuration for GNU C-compiler for PowerPC running System V.4. Copyright (C) 1995, 1998 Free Software Foundation, Inc. - Cloned from sparc/xm-sysv4.h by Michael Meissner (meissner@cygnus.com). This file is part of GNU CC. @@ -57,12 +56,3 @@ extern char *alloca (); #undef ONLY_INT_FIELDS #define ONLY_INT_FIELDS #endif - -#ifdef __PPC__ -#ifndef __STDC__ -extern char *malloc (), *realloc (), *calloc (); -#else -extern void *malloc (), *realloc (), *calloc (); -#endif -extern void free (); -#endif diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index b4be01e76ec..b05b2b18727 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -1,5 +1,7 @@ /* Output routines for GCC for Hitachi Super-H. - Copyright (C) 1993, 1994, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1993, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. + Contributed by Steve Chamberlain (sac@cygnus.com). + Improved by Jim Wilson (wilson@cygnus.com). This file is part of GNU CC. @@ -18,13 +20,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* Contributed by Steve Chamberlain (sac@cygnus.com). - Improved by Jim Wilson (wilson@cygnus.com). */ - #include "config.h" - -#include <stdio.h> - +#include "system.h" #include "rtl.h" #include "tree.h" #include "flags.h" @@ -280,16 +277,17 @@ expand_block_move (operands) char entry[30]; tree entry_name; rtx func_addr_rtx; - rtx r4 = gen_rtx (REG, SImode, 4); - rtx r5 = gen_rtx (REG, SImode, 5); + rtx r4 = gen_rtx_REG (SImode, 4); + rtx r5 = gen_rtx_REG (SImode, 5); sprintf (entry, "__movstrSI%d", bytes); entry_name = get_identifier (entry); func_addr_rtx = copy_to_mode_reg (Pmode, - gen_rtx (SYMBOL_REF, Pmode, - IDENTIFIER_POINTER (entry_name))); + gen_rtx_SYMBOL_REF + (Pmode, IDENTIFIER_POINTER (entry_name))); + emit_insn (gen_move_insn (r4, XEXP (operands[0], 0))); emit_insn (gen_move_insn (r5, XEXP (operands[1], 0))); emit_insn (gen_block_move_real (func_addr_rtx)); @@ -303,15 +301,16 @@ expand_block_move (operands) tree entry_name; rtx func_addr_rtx; int final_switch, while_loop; - rtx r4 = gen_rtx (REG, SImode, 4); - rtx r5 = gen_rtx (REG, SImode, 5); - rtx r6 = gen_rtx (REG, SImode, 6); + rtx r4 = gen_rtx_REG (SImode, 4); + rtx r5 = gen_rtx_REG (SImode, 5); + rtx r6 = gen_rtx_REG (SImode, 6); entry_name = get_identifier ("__movstr"); func_addr_rtx = copy_to_mode_reg (Pmode, - gen_rtx (SYMBOL_REF, Pmode, - IDENTIFIER_POINTER (entry_name))); + gen_rtx_SYMBOL_REF + (Pmode, IDENTIFIER_POINTER (entry_name))); + emit_insn (gen_move_insn (r4, XEXP (operands[0], 0))); emit_insn (gen_move_insn (r5, XEXP (operands[1], 0))); @@ -366,7 +365,7 @@ rtx prepare_scc_operands (code) enum rtx_code code; { - rtx t_reg = gen_rtx (REG, SImode, T_REG); + rtx t_reg = gen_rtx_REG (SImode, T_REG); enum rtx_code oldcode = code; enum machine_mode mode; @@ -407,10 +406,10 @@ prepare_scc_operands (code) || TARGET_SH3E && GET_MODE_CLASS (mode) == MODE_FLOAT) sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_insn (gen_rtx (SET, VOIDmode, t_reg, - gen_rtx (code, SImode, sh_compare_op0, - sh_compare_op1))); - + emit_insn (gen_rtx_SET (VOIDmode, t_reg, + gen_rtx (code, SImode, sh_compare_op0, + sh_compare_op1))); + return t_reg; } @@ -442,9 +441,10 @@ from_compare (operands, code) insn = gen_ieee_ccmpeqsf_t (sh_compare_op0, sh_compare_op1); } else - insn = gen_rtx (SET, VOIDmode, - gen_rtx (REG, SImode, 18), - gen_rtx (code, SImode, sh_compare_op0, sh_compare_op1)); + insn = gen_rtx_SET (VOIDmode, + gen_rtx_REG (SImode, 18), + gen_rtx (code, SImode, sh_compare_op0, + sh_compare_op1)); emit_insn (insn); } @@ -580,7 +580,7 @@ output_far_jump (insn, op) if (dbr_sequence_length ()) print_slot (final_sequence); - this.reg = gen_rtx (REG, SImode, 13); + this.reg = gen_rtx_REG (SImode, 13); output_asm_insn ("mov.l r13,@-r15", 0); output_asm_insn (jump, &this.lab); output_asm_insn ("mov.l @r15+,r13", 0); @@ -1083,13 +1083,13 @@ expand_ashiftrt (operands) wrk = gen_reg_rtx (Pmode); /* Load the value into an arg reg and call a helper. */ - emit_move_insn (gen_rtx (REG, SImode, 4), operands[1]); + emit_move_insn (gen_rtx_REG (SImode, 4), operands[1]); sprintf (func, "__ashiftrt_r4_%d", value); func_name = get_identifier (func); - emit_move_insn (wrk, gen_rtx (SYMBOL_REF, Pmode, - IDENTIFIER_POINTER (func_name))); + emit_move_insn (wrk, gen_rtx_SYMBOL_REF (Pmode, + IDENTIFIER_POINTER (func_name))); emit_insn (gen_ashrsi3_n (GEN_INT (value), wrk)); - emit_move_insn (operands[0], gen_rtx (REG, SImode, 4)); + emit_move_insn (operands[0], gen_rtx_REG (SImode, 4)); return 1; } @@ -2403,7 +2403,7 @@ gen_block_redirect (jump, addr, need_block) if (dead) { - rtx reg = gen_rtx (REG, SImode, exact_log2 (dead & -dead)); + rtx reg = gen_rtx_REG (SImode, exact_log2 (dead & -dead)); /* It would be nice if we could convert the jump into an indirect jump / far branch right now, and thus exposing all constituent @@ -2704,8 +2704,8 @@ machine_dependent_reorg (first) { rtx insn, mova; int num_mova; - rtx r0_rtx = gen_rtx (REG, Pmode, 0); - rtx r0_inc_rtx = gen_rtx (POST_INC, Pmode, r0_rtx); + rtx r0_rtx = gen_rtx_REG (Pmode, 0); + rtx r0_inc_rtx = gen_rtx_POST_INC (Pmode, r0_rtx); /* If relaxing, generate pseudo-ops to associate function calls with the symbols they call. It does no harm to not generate these @@ -2910,10 +2910,10 @@ machine_dependent_reorg (first) or pseudo-op. */ label = gen_label_rtx (); - REG_NOTES (link) = gen_rtx (EXPR_LIST, REG_LABEL, label, - REG_NOTES (link)); - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_LABEL, label, - REG_NOTES (insn)); + REG_NOTES (link) = gen_rtx_EXPR_LIST (REG_LABEL, label, + REG_NOTES (link)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label, + REG_NOTES (insn)); if (rescan) { scan = link; @@ -2927,8 +2927,8 @@ machine_dependent_reorg (first) && reg_mentioned_p (reg, scan)) || ((reg2 = sfunc_uses_reg (scan)) && REGNO (reg2) == REGNO (reg)))) - REG_NOTES (scan) = gen_rtx (EXPR_LIST, REG_LABEL, - label, REG_NOTES (scan)); + REG_NOTES (scan) + = gen_rtx_EXPR_LIST (REG_LABEL, label, REG_NOTES (scan)); } while (scan != dies); } @@ -3132,7 +3132,7 @@ machine_dependent_reorg (first) offset += SUBREG_WORD (dst); dst = SUBREG_REG (dst); } - dst = gen_rtx (REG, HImode, REGNO (dst) + offset); + dst = gen_rtx_REG (HImode, REGNO (dst) + offset); } if (GET_CODE (dst) == REG @@ -3150,20 +3150,19 @@ machine_dependent_reorg (first) *last_float_addr = r0_inc_rtx; last_float_move = scan; last_float = src; - newsrc = gen_rtx (MEM, mode, - (REGNO (dst) == FPUL_REG - ? r0_inc_rtx - : r0_rtx)); + newsrc = gen_rtx_MEM (mode, + (REGNO (dst) == FPUL_REG + ? r0_inc_rtx : r0_rtx)); last_float_addr = &XEXP (newsrc, 0); } else { lab = add_constant (src, mode, 0); - newsrc = gen_rtx (MEM, mode, - gen_rtx (LABEL_REF, VOIDmode, lab)); + newsrc = gen_rtx_MEM (mode, + gen_rtx_LABEL_REF (VOIDmode, lab)); } RTX_UNCHANGING_P (newsrc) = 1; - *patp = gen_rtx (SET, VOIDmode, dst, newsrc); + *patp = gen_rtx_SET (VOIDmode, dst, newsrc); INSN_CODE (scan) = -1; } } @@ -3568,7 +3567,7 @@ output_stack_adjust (size, reg, temp) to handle this case, so just abort when we see it. */ if (temp < 0) abort (); - const_reg = gen_rtx (REG, SImode, temp); + const_reg = gen_rtx_REG (SImode, temp); /* If SIZE is negative, subtract the positive value. This sometimes allows a constant pool entry to be shared @@ -3596,13 +3595,14 @@ push (rn) rtx x; if ((rn >= FIRST_FP_REG && rn <= LAST_FP_REG) || rn == FPUL_REG) - x = gen_push_e (gen_rtx (REG, SFmode, rn)); + x = gen_push_e (gen_rtx_REG (SFmode, rn)); else - x = gen_push (gen_rtx (REG, SImode, rn)); + x = gen_push (gen_rtx_REG (SImode, rn)); x = emit_insn (x); - REG_NOTES (x) = gen_rtx (EXPR_LIST, REG_INC, - gen_rtx(REG, SImode, STACK_POINTER_REGNUM), 0); + REG_NOTES (x) + = gen_rtx_EXPR_LIST (REG_INC, + gen_rtx_REG (SImode, STACK_POINTER_REGNUM), 0); } /* Output RTL to pop register RN from the stack. */ @@ -3614,13 +3614,14 @@ pop (rn) rtx x; if ((rn >= FIRST_FP_REG && rn <= LAST_FP_REG) || rn == FPUL_REG) - x = gen_pop_e (gen_rtx (REG, SFmode, rn)); + x = gen_pop_e (gen_rtx_REG (SFmode, rn)); else - x = gen_pop (gen_rtx (REG, SImode, rn)); + x = gen_pop (gen_rtx_REG (SImode, rn)); x = emit_insn (x); - REG_NOTES (x) = gen_rtx (EXPR_LIST, REG_INC, - gen_rtx(REG, SImode, STACK_POINTER_REGNUM), 0); + REG_NOTES (x) + = gen_rtx_EXPR_LIST (REG_INC, + gen_rtx_REG (SImode, STACK_POINTER_REGNUM), 0); } /* Generate code to push the regs specified in the mask. */ @@ -3831,9 +3832,10 @@ sh_builtin_saveregs (arglist) named args need not be saved. */ if (n_intregs > 0) move_block_from_reg (BASE_ARG_REG (SImode) + first_intreg, - gen_rtx (MEM, BLKmode, - plus_constant (XEXP (regbuf, 0), - n_floatregs * UNITS_PER_WORD)), + gen_rtx_MEM (BLKmode, + plus_constant (XEXP (regbuf, 0), + (n_floatregs + * UNITS_PER_WORD))), n_intregs, n_intregs * UNITS_PER_WORD); /* Save float args. @@ -3851,8 +3853,8 @@ sh_builtin_saveregs (arglist) for (regno = NPARM_REGS (SFmode) - 1; regno >= first_floatreg; regno--) { emit_insn (gen_addsi3 (fpregs, fpregs, GEN_INT (- UNITS_PER_WORD))); - emit_move_insn (gen_rtx (MEM, SFmode, fpregs), - gen_rtx (REG, SFmode, BASE_ARG_REG (SFmode) + regno)); + emit_move_insn (gen_rtx_MEM (SFmode, fpregs), + gen_rtx_REG (SFmode, BASE_ARG_REG (SFmode) + regno)); } /* Return the address of the regbuf. */ @@ -3971,8 +3973,8 @@ sh_valid_machine_decl_attribute (decl, attributes, attr, args) if (TREE_CODE (TREE_VALUE (args)) != STRING_CST) return 0; - sp_switch = gen_rtx (SYMBOL_REF, VOIDmode, - TREE_STRING_POINTER (TREE_VALUE (args))); + sp_switch = gen_rtx_SYMBOL_REF (VOIDmode, + TREE_STRING_POINTER (TREE_VALUE (args))); return 1; } diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index a3aa90253e6..e63279e02fc 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler for Hitachi Super-H. - Copyright (C) 1993, 1994, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1993, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Steve Chamberlain (sac@cygnus.com). Improved by Jim Wilson (wilson@cygnus.com). @@ -726,7 +726,7 @@ extern enum reg_class reg_class_from_letter[]; /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), BASE_RETURN_VALUE_REG (MODE)); + gen_rtx_REG ((MODE), BASE_RETURN_VALUE_REG (MODE)); /* 1 if N is a possible register number for a function value. */ #define FUNCTION_VALUE_REGNO_P(REGNO) \ @@ -836,8 +836,8 @@ struct sh_args { #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ((PASS_IN_REG_P ((CUM), (MODE), (TYPE)) \ && ((NAMED) || TARGET_SH3E)) \ - ? gen_rtx (REG, (MODE), \ - (BASE_ARG_REG (MODE) + ROUND_REG ((CUM), (MODE)))) \ + ? gen_rtx_REG ((MODE), \ + (BASE_ARG_REG (MODE) + ROUND_REG ((CUM), (MODE)))) \ : 0) /* For an arg passed partly in registers and partly in memory, @@ -918,13 +918,13 @@ extern int current_function_anonymous_args; #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, (TRAMP)), \ + emit_move_insn (gen_rtx_MEM (SImode, (TRAMP)), \ GEN_INT (TARGET_LITTLE_ENDIAN ? 0xd301dd02 : 0xdd02d301));\ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 4)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 4)), \ GEN_INT (TARGET_LITTLE_ENDIAN ? 0x00094d2b : 0x4d2b0009));\ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \ (CXT)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \ (FNADDR)); \ } @@ -935,7 +935,7 @@ extern int current_function_anonymous_args; #define RETURN_ADDR_RTX(COUNT, FRAME) \ (((COUNT) == 0) \ - ? gen_rtx (MEM, Pmode, gen_rtx (REG, Pmode, RETURN_ADDRESS_POINTER_REGNUM)) \ + ? gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM)) \ : (rtx) 0) /* Generate necessary RTL for __builtin_saveregs(). @@ -1164,7 +1164,7 @@ extern struct rtx_def *sh_builtin_saveregs (); GEN_INT (offset_base), NULL_RTX, 0, \ OPTAB_LIB_WIDEN); \ \ - (X) = gen_rtx (PLUS, Pmode, sum, GEN_INT (offset - offset_base)); \ + (X) = gen_rtx_PLUS (Pmode, sum, GEN_INT (offset - offset_base)); \ goto WIN; \ } \ } \ diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 35432aa665d..eacc18127c6 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -1,5 +1,5 @@ ;;- Machine description for the Hitachi SH. -;; Copyright (C) 1993, 1994, 1995, 1996, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1993, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. ;; Contributed by Steve Chamberlain (sac@cygnus.com). ;; Improved by Jim Wilson (wilson@cygnus.com). @@ -432,10 +432,12 @@ " { rtx high0, high2, low0 = gen_lowpart (SImode, operands[0]); - high0 = gen_rtx (REG, SImode, - true_regnum (operands[0]) + (TARGET_LITTLE_ENDIAN ? 1 : 0)); - high2 = gen_rtx (REG, SImode, - true_regnum (operands[2]) + (TARGET_LITTLE_ENDIAN ? 1 : 0)); + high0 = gen_rtx_REG (SImode, + true_regnum (operands[0]) + + (TARGET_LITTLE_ENDIAN ? 1 : 0)); + high2 = gen_rtx_REG (SImode, + true_regnum (operands[2]) + + (TARGET_LITTLE_ENDIAN ? 1 : 0)); emit_insn (gen_clrt ()); emit_insn (gen_addc (low0, low0, gen_lowpart (SImode, operands[2]))); emit_insn (gen_addc1 (high0, high0, high2)); @@ -496,10 +498,12 @@ " { rtx high0, high2, low0 = gen_lowpart (SImode, operands[0]); - high0 = gen_rtx (REG, SImode, - true_regnum (operands[0]) + (TARGET_LITTLE_ENDIAN ? 1 : 0)); - high2 = gen_rtx (REG, SImode, - true_regnum (operands[2]) + (TARGET_LITTLE_ENDIAN ? 1 : 0)); + high0 = gen_rtx_REG (SImode, + true_regnum (operands[0]) + + (TARGET_LITTLE_ENDIAN ? 1 : 0)); + high2 = gen_rtx_REG (SImode, + true_regnum (operands[2]) + + (TARGET_LITTLE_ENDIAN ? 1 : 0)); emit_insn (gen_clrt ()); emit_insn (gen_subc (low0, low0, gen_lowpart (SImode, operands[2]))); emit_insn (gen_subc1 (high0, high0, high2)); @@ -768,9 +772,9 @@ emit_insn (gen_mulsidi3_i (operands[1], operands[2])); - emit_insn (gen_rtx (CLOBBER, VOIDmode, operands[0])); - emit_move_insn (low_dst, gen_rtx (REG, SImode, 21)); - emit_move_insn (high_dst, gen_rtx (REG, SImode, 20)); + emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); + emit_move_insn (low_dst, gen_rtx_REG (SImode, 21)); + emit_move_insn (high_dst, gen_rtx_REG (SImode, 20)); DONE; } }") @@ -801,9 +805,9 @@ emit_insn (gen_umulsidi3_i (operands[1], operands[2])); - emit_insn (gen_rtx (CLOBBER, VOIDmode, operands[0])); - emit_move_insn (low_dst, gen_rtx (REG, SImode, 21)); - emit_move_insn (high_dst, gen_rtx (REG, SImode, 20)); + emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); + emit_move_insn (low_dst, gen_rtx_REG (SImode, 21)); + emit_move_insn (high_dst, gen_rtx_REG (SImode, 20)); DONE; } }") @@ -2062,7 +2066,7 @@ emit_move_insn (operands[2], const_int); emit_move_insn (operands[0], change_address (operands[1], VOIDmode, - gen_rtx (PLUS, SImode, reg, operands[2]))); + gen_rtx_PLUS (SImode, reg, operands[2]))); DONE; }") @@ -2087,7 +2091,7 @@ FAIL; emit_move_insn (operands[2], const_int); emit_move_insn (change_address (operands[1], VOIDmode, - gen_rtx (PLUS, SImode, reg, operands[2])), + gen_rtx_PLUS (SImode, reg, operands[2])), operands[0]); DONE; }") @@ -2524,7 +2528,7 @@ { rtx lab = gen_label_rtx (); emit_jump_insn (gen_casesi_jump_2 (reg2, - gen_rtx (LABEL_REF, VOIDmode, lab), + gen_rtx_LABEL_REF (VOIDmode, lab), operands[3])); emit_label (lab); /* Put a fake jump after the label, lest some optimization might @@ -2728,15 +2732,15 @@ { if (TARGET_IEEE) { - rtx t_reg = gen_rtx (REG, SImode, T_REG); + rtx t_reg = gen_rtx_REG (SImode, T_REG); rtx lab = gen_label_rtx (); - emit_insn (gen_rtx (SET, VOIDmode, t_reg, - gen_rtx (EQ, SImode, sh_compare_op0, - sh_compare_op1))); + emit_insn (gen_rtx_SET (VOIDmode, t_reg, + gen_rtx_EQ (SImode, sh_compare_op0, + sh_compare_op1))); emit_jump_insn (gen_branch_true (lab)); - emit_insn (gen_rtx (SET, VOIDmode, t_reg, - gen_rtx (GT, SImode, sh_compare_op0, - sh_compare_op1))); + emit_insn (gen_rtx_SET (VOIDmode, t_reg, + gen_rtx_GT (SImode, sh_compare_op0, + sh_compare_op1))); emit_label (lab); emit_insn (gen_movt (operands[0])); } @@ -3154,14 +3158,14 @@ emit_insn (gen_addsi3 (addr_target, orig_address, GEN_INT (size - 1))); operands[0] = change_address (operands[0], QImode, addr_target); - emit_insn (gen_movqi (operands[0], gen_rtx (SUBREG, QImode, shift_reg, 0))); + emit_insn (gen_movqi (operands[0], gen_rtx_SUBREG (QImode, shift_reg, 0))); while (size -= 1) { emit_insn (gen_lshrsi3_k (shift_reg, shift_reg, GEN_INT (8))); emit_insn (gen_addsi3 (addr_target, addr_target, GEN_INT (-1))); emit_insn (gen_movqi (operands[0], - gen_rtx (SUBREG, QImode, shift_reg, 0))); + gen_rtx_SUBREG (QImode, shift_reg, 0))); } DONE; diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 8641d61728f..d4dd9d12e5f 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -22,7 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "tree.h" #include "rtl.h" #include "regs.h" @@ -1038,18 +1038,18 @@ gen_compare_reg (code, x, y) prev_args[reg][1] = y; next_fcc_reg = (next_fcc_reg + 1) & 3; } - cc_reg = gen_rtx (REG, mode, reg + SPARC_FIRST_V9_FCC_REG); + cc_reg = gen_rtx_REG (mode, reg + SPARC_FIRST_V9_FCC_REG); } #else cc_reg = gen_reg_rtx (mode); #endif /* ! experiment */ else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) - cc_reg = gen_rtx (REG, mode, SPARC_FCC_REG); + cc_reg = gen_rtx_REG (mode, SPARC_FCC_REG); else - cc_reg = gen_rtx (REG, mode, SPARC_ICC_REG); + cc_reg = gen_rtx_REG (mode, SPARC_ICC_REG); - emit_insn (gen_rtx (SET, VOIDmode, cc_reg, - gen_rtx (COMPARE, mode, x, y))); + emit_insn (gen_rtx_SET (VOIDmode, cc_reg, + gen_rtx_COMPARE (mode, x, y))); return cc_reg; } @@ -1115,17 +1115,16 @@ gen_v9_scc (compare_code, operands) && GET_MODE (operands[0]) == DImode && GET_MODE (op0) == DImode) { - emit_insn (gen_rtx (SET, VOIDmode, operands[0], op0)); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (IF_THEN_ELSE, DImode, - gen_rtx (compare_code, DImode, - op0, const0_rtx), - const1_rtx, - operands[0]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], op0)); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_IF_THEN_ELSE + (DImode, gen_rtx (compare_code, DImode, + op0, const0_rtx), + const1_rtx, operands[0]))); return 1; } - emit_insn (gen_rtx (SET, VOIDmode, operands[0], const0_rtx)); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], const0_rtx)); if (GET_MODE (op0) != DImode) { temp = gen_reg_rtx (DImode); @@ -1133,12 +1132,12 @@ gen_v9_scc (compare_code, operands) } else temp = op0; - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (IF_THEN_ELSE, GET_MODE (operands[0]), - gen_rtx (compare_code, DImode, - temp, const0_rtx), - const1_rtx, - operands[0]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_IF_THEN_ELSE + (GET_MODE (operands[0]), + gen_rtx (compare_code, DImode, + temp, const0_rtx), + const1_rtx, operands[0]))); return 1; } else @@ -1155,13 +1154,13 @@ gen_v9_scc (compare_code, operands) default : abort (); } - emit_insn (gen_rtx (SET, VOIDmode, operands[0], const0_rtx)); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (IF_THEN_ELSE, GET_MODE (operands[0]), - gen_rtx (compare_code, - GET_MODE (operands[1]), - operands[1], const0_rtx), - const1_rtx, operands[0]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], const0_rtx)); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_IF_THEN_ELSE + (GET_MODE (operands[0]), + gen_rtx (compare_code, GET_MODE (operands[1]), + operands[1], const0_rtx), + const1_rtx, operands[0]))); return 1; } } @@ -1175,13 +1174,13 @@ emit_v9_brxx_insn (code, op0, label) enum rtx_code code; rtx op0, label; { - emit_jump_insn (gen_rtx (SET, VOIDmode, - pc_rtx, - gen_rtx (IF_THEN_ELSE, VOIDmode, - gen_rtx (code, GET_MODE (op0), - op0, const0_rtx), - gen_rtx (LABEL_REF, VOIDmode, label), - pc_rtx))); + emit_jump_insn (gen_rtx_SET (VOIDmode, + pc_rtx, + gen_rtx_IF_THEN_ELSE + (VOIDmode, + gen_rtx (code, GET_MODE (op0), + op0, const0_rtx), + gen_rtx_LABEL_REF (VOIDmode, label), pc_rtx))); } /* Return nonzero if a return peephole merging return with @@ -1419,16 +1418,17 @@ legitimize_pic_address (orig, mode, reg) else address = orig; - pic_ref = gen_rtx (MEM, Pmode, - gen_rtx (PLUS, Pmode, - pic_offset_table_rtx, address)); + pic_ref = gen_rtx_MEM (Pmode, + gen_rtx_PLUS (Pmode, + pic_offset_table_rtx, address)); + current_function_uses_pic_offset_table = 1; RTX_UNCHANGING_P (pic_ref) = 1; insn = emit_move_insn (reg, pic_ref); /* Put a REG_EQUAL note on this insn, so that it can be optimized by loop. */ - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, orig, - REG_NOTES (insn)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig, + REG_NOTES (insn)); return reg; } else if (GET_CODE (orig) == CONST) @@ -1466,7 +1466,7 @@ legitimize_pic_address (orig, mode, reg) /* If we reach here, then something is seriously wrong. */ abort (); } - return gen_rtx (PLUS, Pmode, base, offset); + return gen_rtx_PLUS (Pmode, base, offset); } else if (GET_CODE (orig) == LABEL_REF) /* ??? Why do we do this? */ @@ -1496,18 +1496,18 @@ pic_setup_code () /* If -O0, show the PIC register remains live before this. */ if (obey_regdecls) - emit_insn (gen_rtx (USE, VOIDmode, pic_offset_table_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx)); l1 = gen_label_rtx (); - pic_pc_rtx = gen_rtx (CONST, Pmode, - gen_rtx (MINUS, Pmode, - global_offset_table, - gen_rtx (CONST, Pmode, - gen_rtx (MINUS, Pmode, - gen_rtx (LABEL_REF, - VOIDmode, l1), - pc_rtx)))); + pic_pc_rtx + = gen_rtx_CONST (Pmode, + gen_rtx_MINUS + (Pmode, global_offset_table, + gen_rtx_CONST (Pmode, + gen_rtx_MINUS + (Pmode, gen_rtx_LABEL_REF (VOIDmode, l1), + pc_rtx)))); /* sparc64: the RDPC instruction doesn't pair, and puts 4 bubbles in the pipe to boot. So don't use it here, especially when we're @@ -1519,29 +1519,29 @@ pic_setup_code () /* Iff we are doing delay branch optimization, slot the sethi up here so that it will fill the delay slot of the call. */ if (flag_delayed_branch) - emit_insn (gen_rtx (SET, VOIDmode, pic_offset_table_rtx, - gen_rtx (HIGH, Pmode, pic_pc_rtx))); - + emit_insn (gen_rtx_SET (VOIDmode, pic_offset_table_rtx, + gen_rtx_HIGH (Pmode, pic_pc_rtx))); + /* Note that we pun calls and jumps here! */ emit_jump_insn (gen_get_pc_via_call (l2, l1)); emit_label (l2); if (!flag_delayed_branch) - emit_insn (gen_rtx (SET, VOIDmode, pic_offset_table_rtx, - gen_rtx (HIGH, Pmode, pic_pc_rtx))); - - emit_insn (gen_rtx (SET, VOIDmode, - pic_offset_table_rtx, - gen_rtx (LO_SUM, Pmode, - pic_offset_table_rtx, pic_pc_rtx))); - emit_insn (gen_rtx (SET, VOIDmode, - pic_offset_table_rtx, - gen_rtx (PLUS, Pmode, - pic_offset_table_rtx, - gen_rtx (REG, Pmode, 15)))); - - /* emit_insn (gen_rtx (ASM_INPUT, VOIDmode, "!#PROLOGUE# 1")); */ + emit_insn (gen_rtx_SET (VOIDmode, pic_offset_table_rtx, + gen_rtx_HIGH (Pmode, pic_pc_rtx))); + + emit_insn (gen_rtx_SET (VOIDmode, + pic_offset_table_rtx, + gen_rtx_LO_SUM (Pmode, + pic_offset_table_rtx, pic_pc_rtx))); + emit_insn (gen_rtx_SET (VOIDmode, + pic_offset_table_rtx, + gen_rtx_PLUS (Pmode, + pic_offset_table_rtx, + gen_rtx_REG (Pmode, 15)))); + + /* emit_insn (gen_rtx_ASM_INPUT (VOIDmode, "!#PROLOGUE# 1")); */ LABEL_PRESERVE_P (l1) = 1; LABEL_PRESERVE_P (l2) = 1; @@ -1568,7 +1568,7 @@ finalize_pic () /* Initialize every time through, since we can't easily know this to be permanent. */ - global_offset_table = gen_rtx (SYMBOL_REF, Pmode, "_GLOBAL_OFFSET_TABLE_"); + global_offset_table = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_"); flag_pic = 0; emit_insn_after (pic_setup_code (), get_insns ()); @@ -1585,7 +1585,7 @@ finalize_pic () since setjmp/longjmp can cause life info to screw up. ??? In the case where we don't obey regdecls, this is not sufficient since we may not fall out the bottom. */ - emit_insn (gen_rtx (USE, VOIDmode, pic_offset_table_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx)); } /* Emit insns to move operands[1] into operands[0]. @@ -1618,7 +1618,7 @@ emit_move_sequence (operands, mode) || GET_CODE (operand1) == MEM) { /* Run this case quickly. */ - emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1)); + emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); return 1; } } @@ -1628,7 +1628,7 @@ emit_move_sequence (operands, mode) || (operand1 == const0_rtx && ! TARGET_LIVE_G0)) { /* Run this case quickly. */ - emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1)); + emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); return 1; } if (! reload_in_progress) @@ -1698,14 +1698,14 @@ emit_move_sequence (operands, mode) if (TARGET_ARCH64 && mode == DImode) emit_insn (gen_sethi_di_sp64 (temp, operand1)); else - emit_insn (gen_rtx (SET, VOIDmode, temp, - gen_rtx (HIGH, mode, operand1))); + emit_insn (gen_rtx_SET (VOIDmode, temp, + gen_rtx_HIGH (mode, operand1))); if (GET_CODE (operand1) == CONST_INT) operand1 = GEN_INT (INTVAL (operand1) & 0xffffffff); else if (GET_CODE (operand1) == CONST_DOUBLE) operand1 = GEN_INT (CONST_DOUBLE_LOW (operand1) & 0xffffffff); - operands[1] = gen_rtx (LO_SUM, mode, temp, operand1); + operands[1] = gen_rtx_LO_SUM (mode, temp, operand1); } } @@ -1952,14 +1952,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (op0) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (op0) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (op0, 4); else latehalf[0] = op0; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (op1) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (op1) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (op1, 4); else if (optype1 == CNSTOP) @@ -1968,8 +1968,7 @@ output_move_double (operands) { if (arith_double_operand (op1, DImode)) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (op1)); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (op1)); return "mov %1,%0"; } else @@ -2057,7 +2056,7 @@ output_move_double (operands) xops[0] = latehalf[0]; xops[1] = op0; output_asm_insn ("add %1,%0,%1", xops); - operands[1] = gen_rtx (MEM, DImode, op0); + operands[1] = gen_rtx_MEM (DImode, op0); latehalf[1] = adj_offsettable_operand (operands[1], 4); addreg1 = 0; highest_first = 1; @@ -2163,12 +2162,12 @@ output_move_quad (operands) if (optype0 == REGOP) { - wordpart[0][0] = gen_rtx (REG, word_mode, REGNO (op0) + 0); - wordpart[1][0] = gen_rtx (REG, word_mode, REGNO (op0) + 1); + wordpart[0][0] = gen_rtx_REG (word_mode, REGNO (op0) + 0); + wordpart[1][0] = gen_rtx_REG (word_mode, REGNO (op0) + 1); if (TARGET_ARCH32) { - wordpart[2][0] = gen_rtx (REG, word_mode, REGNO (op0) + 2); - wordpart[3][0] = gen_rtx (REG, word_mode, REGNO (op0) + 3); + wordpart[2][0] = gen_rtx_REG (word_mode, REGNO (op0) + 2); + wordpart[3][0] = gen_rtx_REG (word_mode, REGNO (op0) + 3); } } else if (optype0 == OFFSOP) @@ -2193,12 +2192,12 @@ output_move_quad (operands) if (optype1 == REGOP) { - wordpart[0][1] = gen_rtx (REG, word_mode, REGNO (op1) + 0); - wordpart[1][1] = gen_rtx (REG, word_mode, REGNO (op1) + 1); + wordpart[0][1] = gen_rtx_REG (word_mode, REGNO (op1) + 0); + wordpart[1][1] = gen_rtx_REG (word_mode, REGNO (op1) + 1); if (TARGET_ARCH32) { - wordpart[2][1] = gen_rtx (REG, word_mode, REGNO (op1) + 2); - wordpart[3][1] = gen_rtx (REG, word_mode, REGNO (op1) + 3); + wordpart[2][1] = gen_rtx_REG (word_mode, REGNO (op1) + 2); + wordpart[3][1] = gen_rtx_REG (word_mode, REGNO (op1) + 3); } } else if (optype1 == OFFSOP) @@ -2628,8 +2627,7 @@ output_size_for_block_move (size, reg, align) output_asm_insn ("sub %1,%2,%0", xoperands); else { - xoperands[1] - = gen_rtx (CONST_INT, VOIDmode, INTVAL (size) - INTVAL (align)); + xoperands[1] = GEN_INT (INTVAL (size) - INTVAL (align)); output_asm_insn ("set %1,%0", xoperands); } } @@ -2667,7 +2665,7 @@ output_block_move (operands) if (align > UNITS_PER_WORD) { align = UNITS_PER_WORD; - alignrtx = gen_rtx (CONST_INT, VOIDmode, UNITS_PER_WORD); + alignrtx = GEN_INT (UNITS_PER_WORD); } /* We consider 8 ld/st pairs, for a total of 16 inline insns to be @@ -2763,11 +2761,11 @@ output_block_move (operands) } if (align != INTVAL (alignrtx)) - alignrtx = gen_rtx (CONST_INT, VOIDmode, align); + alignrtx = GEN_INT (align); - xoperands[3] = gen_rtx (CONST_INT, VOIDmode, movstrsi_label++); - xoperands[4] = gen_rtx (CONST_INT, VOIDmode, align); - xoperands[5] = gen_rtx (CONST_INT, VOIDmode, movstrsi_label++); + xoperands[3] = GEN_INT (movstrsi_label++); + xoperands[4] = GEN_INT (align); + xoperands[5] = GEN_INT (movstrsi_label++); ASM_GENERATE_INTERNAL_LABEL (label3, "Lm", INTVAL (xoperands[3])); ASM_GENERATE_INTERNAL_LABEL (label5, "Lm", INTVAL (xoperands[5])); @@ -3540,12 +3538,16 @@ output_function_epilogue (file, size, leaf_function) /* If we wound up with things in our delay slot, flush them here. */ if (current_function_epilogue_delay_list) { - rtx insn = emit_jump_insn_after (gen_rtx (RETURN, VOIDmode), + rtx insn = emit_jump_insn_after (gen_rtx_RETURN (VOIDmode), get_last_insn ()); - PATTERN (insn) = gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, - PATTERN (XEXP (current_function_epilogue_delay_list, 0)), - PATTERN (insn))); + PATTERN (insn) + = gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + PATTERN + (XEXP (current_function_epilogue_delay_list, 0)), + PATTERN (insn))); + final_scan_insn (insn, file, 1, 0, 1); } else @@ -3844,7 +3846,7 @@ function_arg (cum, mode, type, named, incoming_p) if (TARGET_ARCH32) { - reg = gen_rtx (REG, mode, regno); + reg = gen_rtx_REG (mode, regno); return reg; } @@ -3856,7 +3858,7 @@ function_arg (cum, mode, type, named, incoming_p) || GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT) && SPARC_FP_REG_P (regno)) { - reg = gen_rtx (REG, mode, regno); + reg = gen_rtx_REG (mode, regno); if (cum->prototype_p || cum->libcall_p) { /* "* 2" because fp reg numbers are recorded in 4 byte @@ -3866,12 +3868,11 @@ function_arg (cum, mode, type, named, incoming_p) value in the reg but reserve space on the stack. That's an optimization, and is deferred [for a bit]. */ if ((regno - SPARC_FP_ARG_FIRST) >= SPARC_INT_ARG_MAX * 2) - return gen_rtx (PARALLEL, mode, - gen_rtvec (2, - gen_rtx (EXPR_LIST, VOIDmode, - NULL_RTX, const0_rtx), - gen_rtx (EXPR_LIST, VOIDmode, - reg, const0_rtx))); + return gen_rtx_PARALLEL + (mode, + gen_rtvec (2, + gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx), + gen_rtx_EXPR_LIST (VOIDmode, reg, const0_rtx))); else return reg; } @@ -3883,21 +3884,21 @@ function_arg (cum, mode, type, named, incoming_p) ? SPARC_INCOMING_INT_ARG_FIRST : SPARC_OUTGOING_INT_ARG_FIRST); int intreg = regbase + (regno - SPARC_FP_ARG_FIRST) / 2; - return gen_rtx (PARALLEL, mode, - gen_rtvec (2, - gen_rtx (EXPR_LIST, VOIDmode, - gen_rtx (REG, mode, intreg), - const0_rtx), - gen_rtx (EXPR_LIST, VOIDmode, - reg, const0_rtx))); + + return gen_rtx_PARALLEL + (mode, + gen_rtvec (2, + gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_REG (mode, intreg), + const0_rtx), + gen_rtx_EXPR_LIST (VOIDmode, reg, const0_rtx))); } else - return gen_rtx (PARALLEL, mode, - gen_rtvec (2, - gen_rtx (EXPR_LIST, VOIDmode, - NULL_RTX, const0_rtx), - gen_rtx (EXPR_LIST, VOIDmode, - reg, const0_rtx))); + return gen_rtx_PARALLEL + (mode, + gen_rtvec (2, + gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx), + gen_rtx_EXPR_LIST (VOIDmode, reg, const0_rtx))); } } else if (type && TREE_CODE (type) == RECORD_TYPE) @@ -3974,12 +3975,11 @@ function_arg (cum, mode, type, named, incoming_p) if (nregs == 0) abort (); - ret = gen_rtx (PARALLEL, BLKmode, rtvec_alloc (nregs + 1)); + ret = gen_rtx_PARALLEL (BLKmode, rtvec_alloc (nregs + 1)); /* ??? This causes the entire struct to be passed in memory. This isn't necessary, but is left for later. */ - XVECEXP (ret, 0, 0) = gen_rtx (EXPR_LIST, VOIDmode, NULL_RTX, - const0_rtx); + XVECEXP (ret, 0, 0) = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx); /* Fill in the entries. */ start_int_bitpos = -1; @@ -3996,12 +3996,13 @@ function_arg (cum, mode, type, named, incoming_p) && ! packed_p && named) { - reg = gen_rtx (REG, DECL_MODE (field), - (SPARC_FP_ARG_FIRST + this_slotno * 2 - + (DECL_MODE (field) == SFmode - && (bitpos & 32) != 0))); - XVECEXP (ret, 0, i) = gen_rtx (EXPR_LIST, VOIDmode, reg, - GEN_INT (bitpos / BITS_PER_UNIT)); + reg = gen_rtx_REG (DECL_MODE (field), + (SPARC_FP_ARG_FIRST + this_slotno * 2 + + (DECL_MODE (field) == SFmode + && (bitpos & 32) != 0))); + XVECEXP (ret, 0, i) + = gen_rtx_EXPR_LIST (VOIDmode, reg, + GEN_INT (bitpos / BITS_PER_UNIT)); i++; start_int_bitpos = -1; } @@ -4025,9 +4026,10 @@ function_arg (cum, mode, type, named, incoming_p) mode = word_mode; regno = regbase + this_slotno; - reg = gen_rtx (REG, mode, regno); - XVECEXP (ret, 0, i) = gen_rtx (EXPR_LIST, VOIDmode, reg, - GEN_INT (bitpos / BITS_PER_UNIT)); + reg = gen_rtx_REG (mode, regno); + XVECEXP (ret, 0, i) + = gen_rtx_EXPR_LIST (VOIDmode, reg, + GEN_INT (bitpos / BITS_PER_UNIT)); i++; if (start_int_bitpos == -1) start_int_bitpos = bitpos; @@ -4049,12 +4051,12 @@ function_arg (cum, mode, type, named, incoming_p) abort (); mode = mode_for_size (bytes * BITS_PER_UNIT, MODE_INT, 0); - reg = gen_rtx (REG, mode, regno); + reg = gen_rtx_REG (mode, regno); } else { /* Scalar or complex int. */ - reg = gen_rtx (REG, mode, regno); + reg = gen_rtx_REG (mode, regno); } return reg; @@ -4261,20 +4263,17 @@ sparc_builtin_saveregs (arglist) int regno; for (regno = first_reg; regno < NPARM_REGS (word_mode); regno++) - emit_move_insn (gen_rtx (MEM, word_mode, - gen_rtx (PLUS, Pmode, - frame_pointer_rtx, - GEN_INT (STACK_POINTER_OFFSET - + UNITS_PER_WORD * regno))), - gen_rtx (REG, word_mode, - BASE_INCOMING_ARG_REG (word_mode) + regno)); - - address = gen_rtx (PLUS, Pmode, - frame_pointer_rtx, - GEN_INT (STACK_POINTER_OFFSET - + UNITS_PER_WORD * first_reg)); - - if (flag_check_memory_usage + emit_move_insn (gen_rtx_MEM (word_mode, + plus_constant (frame_pointer_rtx, + (STACK_POINTER_OFFSET + + UNITS_PER_WORD * regno))), + gen_rtx_REG (word_mode, + BASE_INCOMING_ARG_REG (word_mode) + regno)); + + address = plus_constant (frame_pointer_rtx, + STACK_POINTER_OFFSET + UNITS_PER_WORD * first_reg); + + if (current_function_check_memory_usage && first_reg < NPARM_REGS (word_mode)) emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, address, ptr_mode, @@ -4549,7 +4548,7 @@ output_return (operands) the stack pointer might have been adjusted. Output code to restore it now. */ - operands[0] = gen_rtx (CONST_INT, VOIDmode, actual_fsize); + operands[0] = GEN_INT (actual_fsize); /* Use sub of negated value in first two cases instead of add to allow actual_fsize == 4096. */ @@ -4563,7 +4562,7 @@ output_return (operands) } else if (actual_fsize <= 8192) { - operands[0] = gen_rtx (CONST_INT, VOIDmode, actual_fsize - 4096); + operands[0] = GEN_INT (actual_fsize - 4096); if (SKIP_CALLERS_UNIMP_P) return "sub %%sp,-4096,%%sp\n\tjmp %%o7+12\n\tsub %%sp,-%0,%%sp"; else @@ -5002,8 +5001,8 @@ output_double_int (file, value) high = (xword >> 32) & 0xffffffff; low = xword & 0xffffffff; - ASM_OUTPUT_INT (file, gen_rtx (CONST_INT, VOIDmode, high)); - ASM_OUTPUT_INT (file, gen_rtx (CONST_INT, VOIDmode, low)); + ASM_OUTPUT_INT (file, GEN_INT (high)); + ASM_OUTPUT_INT (file, GEN_INT (low)); #else if (INTVAL (value) < 0) ASM_OUTPUT_INT (file, constm1_rtx); @@ -5014,10 +5013,8 @@ output_double_int (file, value) } else if (GET_CODE (value) == CONST_DOUBLE) { - ASM_OUTPUT_INT (file, gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (value))); - ASM_OUTPUT_INT (file, gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (value))); + ASM_OUTPUT_INT (file, GEN_INT (CONST_DOUBLE_HIGH (value))); + ASM_OUTPUT_INT (file, GEN_INT (CONST_DOUBLE_LOW (value))); } else if (GET_CODE (value) == SYMBOL_REF || GET_CODE (value) == CONST @@ -5212,34 +5209,30 @@ sparc_initialize_trampoline (tramp, fnaddr, cxt) size_int (10), 0, 1); rtx high_fn = expand_shift (RSHIFT_EXPR, SImode, fnaddr, size_int (10), 0, 1); - rtx low_cxt = expand_and (cxt, gen_rtx (CONST_INT, VOIDmode, 0x3ff), 0); - rtx low_fn = expand_and (fnaddr, gen_rtx (CONST_INT, VOIDmode, 0x3ff), 0); - rtx g1_sethi = gen_rtx (HIGH, SImode, - gen_rtx (CONST_INT, VOIDmode, 0x03000000)); - rtx g2_sethi = gen_rtx (HIGH, SImode, - gen_rtx (CONST_INT, VOIDmode, 0x05000000)); - rtx g1_ori = gen_rtx (HIGH, SImode, - gen_rtx (CONST_INT, VOIDmode, 0x82106000)); - rtx g2_ori = gen_rtx (HIGH, SImode, - gen_rtx (CONST_INT, VOIDmode, 0x8410A000)); + rtx low_cxt = expand_and (cxt, GEN_INT (0x3ff), 0); + rtx low_fn = expand_and (fnaddr, GEN_INT (0x3ff), 0); + rtx g1_sethi = gen_rtx_HIGH (SImode, GEN_INT (0x03000000)); + rtx g2_sethi = gen_rtx_HIGH (SImode, GEN_INT (0x05000000)); + rtx g1_ori = gen_rtx_HIGH (SImode, GEN_INT (0x82106000)); + rtx g2_ori = gen_rtx_HIGH (SImode, GEN_INT (0x8410A000)); rtx tem = gen_reg_rtx (SImode); emit_move_insn (tem, g1_sethi); emit_insn (gen_iorsi3 (high_fn, high_fn, tem)); - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (tramp, 0)), high_fn); + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 0)), high_fn); emit_move_insn (tem, g1_ori); emit_insn (gen_iorsi3 (low_fn, low_fn, tem)); - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (tramp, 4)), low_fn); + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 4)), low_fn); emit_move_insn (tem, g2_sethi); emit_insn (gen_iorsi3 (high_cxt, high_cxt, tem)); - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (tramp, 8)), high_cxt); + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 8)), high_cxt); emit_move_insn (tem, g2_ori); emit_insn (gen_iorsi3 (low_cxt, low_cxt, tem)); - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (tramp, 16)), low_cxt); - emit_insn (gen_flush (validize_mem (gen_rtx (MEM, SImode, tramp)))); - emit_insn (gen_flush (validize_mem (gen_rtx (MEM, SImode, - plus_constant (tramp, 8))))); - emit_insn (gen_flush (validize_mem (gen_rtx (MEM, SImode, - plus_constant (tramp, 16))))); + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 16)), low_cxt); + emit_insn (gen_flush (validize_mem (gen_rtx_MEM (SImode, tramp)))); + emit_insn (gen_flush (validize_mem + (gen_rtx_MEM (SImode, plus_constant (tramp, 8))))); + emit_insn (gen_flush (validize_mem + (gen_rtx_MEM (SImode, plus_constant (tramp, 16))))); } /* The 64 bit version is simpler because it makes more sense to load the @@ -5250,17 +5243,17 @@ void sparc64_initialize_trampoline (tramp, fnaddr, cxt) rtx tramp, fnaddr, cxt; { - emit_move_insn (gen_rtx (MEM, DImode, plus_constant (tramp, 24)), cxt); - emit_move_insn (gen_rtx (MEM, DImode, plus_constant (tramp, 32)), fnaddr); - emit_insn (gen_flush (validize_mem (gen_rtx (MEM, DImode, tramp)))); - emit_insn (gen_flush (validize_mem (gen_rtx (MEM, DImode, - plus_constant (tramp, 8))))); - emit_insn (gen_flush (validize_mem (gen_rtx (MEM, DImode, - plus_constant (tramp, 16))))); - emit_insn (gen_flush (validize_mem (gen_rtx (MEM, DImode, - plus_constant (tramp, 24))))); - emit_insn (gen_flush (validize_mem (gen_rtx (MEM, DImode, - plus_constant (tramp, 32))))); + emit_move_insn (gen_rtx_MEM (DImode, plus_constant (tramp, 24)), cxt); + emit_move_insn (gen_rtx_MEM (DImode, plus_constant (tramp, 32)), fnaddr); + emit_insn (gen_flush (validize_mem (gen_rtx_MEM (DImode, tramp)))); + emit_insn (gen_flush (validize_mem + (gen_rtx_MEM (DImode, plus_constant (tramp, 8))))); + emit_insn (gen_flush (validize_mem + (gen_rtx_MEM (DImode, plus_constant (tramp, 16))))); + emit_insn (gen_flush (validize_mem + (gen_rtx_MEM (DImode, plus_constant (tramp, 24))))); + emit_insn (gen_flush (validize_mem + (gen_rtx_MEM (DImode, plus_constant (tramp, 32))))); } /* Subroutines to support a flat (single) register window calling diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 186cf8fca3b..5578a063d19 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -807,7 +807,7 @@ if (TARGET_ARCH64 \ /* Argument passing regs. */ #define SPARC_OUTGOING_INT_ARG_FIRST 8 -#define SPARC_INCOMING_INT_ARG_FIRST 24 +#define SPARC_INCOMING_INT_ARG_FIRST (TARGET_FLAT ? 8 : 24) #define SPARC_FP_ARG_FIRST 32 /* 1 for registers that have pervasive standard uses @@ -1070,15 +1070,14 @@ extern int sparc_mode_class[]; #define STRUCT_VALUE \ (TARGET_ARCH64 \ ? 0 \ - : gen_rtx (MEM, Pmode, \ - gen_rtx (PLUS, Pmode, stack_pointer_rtx, \ - gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))) + : gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \ + STRUCT_VALUE_OFFSET))) + #define STRUCT_VALUE_INCOMING \ - (TARGET_ARCH64 \ - ? 0 \ - : gen_rtx (MEM, Pmode, \ - gen_rtx (PLUS, Pmode, frame_pointer_rtx, \ - gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))) + (TARGET_ARCH64 \ + ? 0 \ + : gen_rtx_MEM (Pmode, plus_constant (frame_pointer_rtx, \ + STRUCT_VALUE_OFFSET))) /* Define the classes of registers for register constraints in the machine description. Also define ranges of constants. @@ -1340,8 +1339,8 @@ extern char leaf_reg_remap[]; #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \ (get_frame_size () == 0 \ ? assign_stack_local (MODE, GET_MODE_SIZE (MODE), 0) \ - : gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, frame_pointer_rtx, \ - GEN_INT (STARTING_FRAME_OFFSET)))) + : gen_rtx_MEM (MODE, plus_constant (frame_pointer_rtx, \ + STARTING_FRAME_OFFSET))) /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on v9 because the movsi and movsf patterns don't handle r/f moves. @@ -1474,19 +1473,21 @@ extern char leaf_reg_remap[]; /* On SPARC the value is found in the first "output" register. */ -#define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG (TYPE_MODE (VALTYPE))) +#define FUNCTION_VALUE(VALTYPE, FUNC) \ + gen_rtx_REG (TYPE_MODE (VALTYPE), \ + BASE_RETURN_VALUE_REG (TYPE_MODE (VALTYPE))) /* But the called function leaves it in the first "input" register. */ #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_OUTGOING_VALUE_REG (TYPE_MODE (VALTYPE))) + gen_rtx_REG (TYPE_MODE (VALTYPE), \ + BASE_OUTGOING_VALUE_REG (TYPE_MODE (VALTYPE))) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG (MODE)) + gen_rtx_REG (MODE, BASE_RETURN_VALUE_REG (MODE)) /* 1 if N is a possible register number for a function value as seen by the caller. @@ -2094,11 +2095,11 @@ do { \ } \ else \ { \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x81C04000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x81C04000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ } \ } while (0) @@ -2148,8 +2149,7 @@ extern struct rtx_def *sparc_builtin_saveregs (); return an rtx for the address of the word in the frame that holds the dynamic chain--the previous frame's address. ??? -mflat support? */ -#define DYNAMIC_CHAIN_ADDRESS(frame) \ - gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 14 * UNITS_PER_WORD)) +#define DYNAMIC_CHAIN_ADDRESS(frame) plus_constant (frame, 14 * UNITS_PER_WORD) /* The return address isn't on the stack, it is in a register, so we can't access it from the current frame pointer. We can access it from the @@ -2168,16 +2168,17 @@ extern struct rtx_def *sparc_builtin_saveregs (); returns, and +12 for structure returns. */ #define RETURN_ADDR_RTX(count, frame) \ ((count == -1) \ - ? gen_rtx (REG, Pmode, 31) \ - : gen_rtx (MEM, Pmode, \ - memory_address (Pmode, plus_constant (frame, 15 * UNITS_PER_WORD)))) + ? gen_rtx_REG (Pmode, 31) \ + : gen_rtx_MEM (Pmode, \ + memory_address (Pmode, plus_constant (frame, \ + 15 * UNITS_PER_WORD)))) /* Before the prologue, the return address is %o7 + 8. OK, sometimes it's +12, but always using +8 is close enough for frame unwind purposes. Actually, just using %o7 is close enough for unwinding, but %o7+8 is something you can return to. */ #define INCOMING_RETURN_ADDR_RTX \ - gen_rtx (PLUS, word_mode, gen_rtx (REG, word_mode, 15), GEN_INT (8)) + plus_constant (gen_rtx_REG (word_mode, 15), 8) /* The offset from the incoming value of %sp to the top of the stack frame for the current function. On sparc64, we have to account for the stack @@ -2413,30 +2414,31 @@ extern struct rtx_def *legitimize_pic_address (); #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ { rtx sparc_x = (X); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ - (X) = gen_rtx (PLUS, Pmode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), NULL_RTX)); \ + (X) = gen_rtx_PLUS (Pmode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), NULL_RTX)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ - (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), NULL_RTX)); \ + (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), NULL_RTX)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \ - (X) = gen_rtx (PLUS, Pmode, force_operand (XEXP (X, 0), NULL_RTX),\ - XEXP (X, 1)); \ + (X) = gen_rtx_PLUS (Pmode, force_operand (XEXP (X, 0), NULL_RTX),\ + XEXP (X, 1)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \ - (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), NULL_RTX)); \ + (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), NULL_RTX)); \ if (sparc_x != (X) && memory_address_p (MODE, X)) \ goto WIN; \ if (flag_pic) (X) = legitimize_pic_address (X, MODE, 0); \ else if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ - (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \ - copy_to_mode_reg (Pmode, XEXP (X, 1))); \ + (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ + copy_to_mode_reg (Pmode, XEXP (X, 1))); \ else if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ - (X) = gen_rtx (PLUS, Pmode, XEXP (X, 1), \ - copy_to_mode_reg (Pmode, XEXP (X, 0))); \ + (X) = gen_rtx_PLUS (Pmode, XEXP (X, 1), \ + copy_to_mode_reg (Pmode, XEXP (X, 0))); \ else if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \ || GET_CODE (X) == LABEL_REF) \ - (X) = gen_rtx (LO_SUM, Pmode, \ - copy_to_mode_reg (Pmode, gen_rtx (HIGH, Pmode, X)), X); \ + (X) = gen_rtx_LO_SUM (Pmode, \ + copy_to_mode_reg (Pmode, \ + gen_rtx_HIGH (Pmode, X)), X); \ if (memory_address_p (MODE, X)) \ goto WIN; } @@ -2485,7 +2487,7 @@ extern struct rtx_def *legitimize_pic_address (); /* This is how to refer to the variable errno. */ #define GEN_ERRNO_RTX \ - gen_rtx (MEM, SImode, gen_rtx (SYMBOL_REF, Pmode, "errno")) + gen_rtx_MEM (SImode, gen_rtx_SYMBOL_REF (Pmode, "errno")) #endif /* 0 */ /* Define if operations between registers always perform the operation @@ -2618,32 +2620,32 @@ extern struct rtx_def *legitimize_pic_address (); #define INIT_TARGET_OPTABS \ do { \ add_optab->handlers[(int) TFmode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, ADDTF3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, ADDTF3_LIBCALL); \ sub_optab->handlers[(int) TFmode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, SUBTF3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, SUBTF3_LIBCALL); \ neg_optab->handlers[(int) TFmode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, NEGTF2_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, NEGTF2_LIBCALL); \ smul_optab->handlers[(int) TFmode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, MULTF3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, MULTF3_LIBCALL); \ flodiv_optab->handlers[(int) TFmode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, DIVTF3_LIBCALL); \ - eqtf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, EQTF2_LIBCALL); \ - netf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, NETF2_LIBCALL); \ - gttf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, GTTF2_LIBCALL); \ - getf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, GETF2_LIBCALL); \ - lttf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, LTTF2_LIBCALL); \ - letf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, LETF2_LIBCALL); \ - trunctfsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, TRUNCTFSF2_LIBCALL); \ - trunctfdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, TRUNCTFDF2_LIBCALL); \ - extendsftf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, EXTENDSFTF2_LIBCALL); \ - extenddftf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, EXTENDDFTF2_LIBCALL); \ - floatsitf_libfunc = gen_rtx (SYMBOL_REF, Pmode, FLOATSITF2_LIBCALL); \ - fixtfsi_libfunc = gen_rtx (SYMBOL_REF, Pmode, FIX_TRUNCTFSI2_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, DIVTF3_LIBCALL); \ + eqtf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, EQTF2_LIBCALL); \ + netf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, NETF2_LIBCALL); \ + gttf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, GTTF2_LIBCALL); \ + getf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, GETF2_LIBCALL); \ + lttf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, LTTF2_LIBCALL); \ + letf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, LETF2_LIBCALL); \ + trunctfsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, TRUNCTFSF2_LIBCALL); \ + trunctfdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, TRUNCTFDF2_LIBCALL); \ + extendsftf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, EXTENDSFTF2_LIBCALL); \ + extenddftf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, EXTENDDFTF2_LIBCALL); \ + floatsitf_libfunc = gen_rtx_SYMBOL_REF (Pmode, FLOATSITF2_LIBCALL); \ + fixtfsi_libfunc = gen_rtx_SYMBOL_REF (Pmode, FIX_TRUNCTFSI2_LIBCALL); \ fixunstfsi_libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, FIXUNS_TRUNCTFSI2_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, FIXUNS_TRUNCTFSI2_LIBCALL); \ if (TARGET_FPU) \ sqrt_optab->handlers[(int) TFmode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, "_Q_sqrt"); \ + = gen_rtx_SYMBOL_REF (Pmode, "_Q_sqrt"); \ INIT_SUBTARGET_OPTABS; \ } while (0) diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index d6bca782ade..ed137fc2ff3 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -1,5 +1,5 @@ ;;- Machine description for SPARC chip for GNU C compiler -;; Copyright (C) 1987, 88, 89, 92-96, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc. ;; Contributed by Michael Tiemann (tiemann@cygnus.com) ;; 64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans, ;; at Cygnus Support. @@ -1804,7 +1804,9 @@ (define_insn "*sethi_di_medium_pic" [(set (match_operand:DI 0 "register_operand" "=r") - (high:DI (match_operand 1 "sp64_medium_pic_operand" "")))] + (high:DI (match_operand 1 "sp64_medium_pic_operand" ""))) + ;; The clobber is here because emit_move_sequence assumes the worst case. + (clobber (reg:DI 1))] "(TARGET_CM_MEDLOW || TARGET_CM_EMBMEDANY) && check_pic (1)" "sethi %%hi(%a1),%0" [(set_attr "type" "move") @@ -2872,8 +2874,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_16)); emit_insn (gen_lshrsi3 (operand0, temp, shift_16)); DONE; @@ -2950,8 +2951,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashldi3 (temp, gen_rtx (SUBREG, DImode, operand1, - op1_subword), + emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, op1_subword), shift_48)); emit_insn (gen_lshrdi3 (operand0, temp, shift_48)); DONE; @@ -3044,8 +3044,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_16)); emit_insn (gen_ashrsi3 (operand0, temp, shift_16)); DONE; @@ -3079,11 +3078,10 @@ op0_subword = SUBREG_WORD (operand0); operand0 = XEXP (operand0, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_24)); if (GET_MODE (operand0) != SImode) - operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subword); + operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subword); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); DONE; }") @@ -3111,8 +3109,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); DONE; @@ -3141,8 +3138,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashldi3 (temp, gen_rtx (SUBREG, DImode, operand1, - op1_subword), + emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, op1_subword), shift_56)); emit_insn (gen_ashrdi3 (operand0, temp, shift_56)); DONE; @@ -3171,8 +3167,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashldi3 (temp, gen_rtx (SUBREG, DImode, operand1, - op1_subword), + emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, op1_subword), shift_48)); emit_insn (gen_ashrdi3 (operand0, temp, shift_48)); DONE; @@ -3579,12 +3574,15 @@ { if (! TARGET_ARCH64) { - emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (PLUS, DImode, operands[1], - operands[2])), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (REG, SImode, SPARC_ICC_REG))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_PLUS (DImode, operands[1], + operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_REG (SImode, + SPARC_ICC_REG))))); DONE; } }") @@ -3681,12 +3679,15 @@ { if (! TARGET_ARCH64) { - emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (MINUS, DImode, operands[1], - operands[2])), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (REG, SImode, SPARC_ICC_REG))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_MINUS (DImode, operands[1], + operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_REG (SImode, + SPARC_ICC_REG))))); DONE; } }") @@ -4517,11 +4518,14 @@ { if (! TARGET_ARCH64) { - emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operand0, - gen_rtx (NEG, DImode, operand1)), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (REG, SImode, SPARC_ICC_REG))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_SET (VOIDmode, operand0, + gen_rtx_NEG (DImode, operand1)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_REG (SImode, + SPARC_ICC_REG))))); DONE; } }") @@ -5118,21 +5122,19 @@ if (! TARGET_ARCH64 && INTVAL (operands[3]) != 0) emit_jump_insn - (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (3, - gen_rtx (SET, VOIDmode, pc_rtx, - XEXP (operands[0], 0)), - GEN_INT (INTVAL (operands[3]) & 0xfff), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (REG, Pmode, 15))))); + (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (3, + gen_rtx_SET (VOIDmode, pc_rtx, XEXP (operands[0], 0)), + GEN_INT (INTVAL (operands[3]) & 0xfff), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15))))); else emit_jump_insn - (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, - gen_rtx (SET, VOIDmode, pc_rtx, - XEXP (operands[0], 0)), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (REG, Pmode, 15))))); + (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_SET (VOIDmode, pc_rtx, XEXP (operands[0], 0)), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15))))); goto finish_call; } @@ -5152,17 +5154,17 @@ if (! TARGET_ARCH64 && INTVAL (operands[3]) != 0) emit_call_insn - (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (3, gen_rtx (CALL, VOIDmode, fn_rtx, nregs_rtx), - GEN_INT (INTVAL (operands[3]) & 0xfff), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (REG, Pmode, 15))))); + (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (3, gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx), + GEN_INT (INTVAL (operands[3]) & 0xfff), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15))))); else emit_call_insn - (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, gen_rtx (CALL, VOIDmode, fn_rtx, nregs_rtx), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (REG, Pmode, 15))))); + (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15))))); finish_call: #if 0 @@ -5285,19 +5287,19 @@ #if 0 if (operands[3]) - nregs_rtx = gen_rtx (CONST_INT, VOIDmode, REGNO (operands[3]) - 8); + nregs_rtx = GEN_INT (REGNO (operands[3]) - 8); else - nregs_rtx = gen_rtx (CONST_INT, VOIDmode, 6); + nregs_rtx = GEN_INT (6); #else nregs_rtx = const0_rtx; #endif vec = gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (CALL, VOIDmode, fn_rtx, nregs_rtx)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, Pmode, 15))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx)), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15))); - emit_call_insn (gen_rtx (PARALLEL, VOIDmode, vec)); + emit_call_insn (gen_rtx_PARALLEL (VOIDmode, vec)); DONE; }") @@ -5387,20 +5389,20 @@ "" " { - rtx valreg1 = gen_rtx (REG, DImode, 24); - rtx valreg2 = gen_rtx (REG, TARGET_ARCH64 ? TFmode : DFmode, 32); + rtx valreg1 = gen_rtx_REG (DImode, 24); + rtx valreg2 = gen_rtx_REG (TARGET_ARCH64 ? TFmode : DFmode, 32); rtx result = operands[0]; if (! TARGET_ARCH64) { - rtx rtnreg = gen_rtx (REG, SImode, (leaf_function ? 15 : 31)); + rtx rtnreg = gen_rtx_REG (SImode, (leaf_function ? 15 : 31)); rtx value = gen_reg_rtx (SImode); /* Fetch the instruction where we will return to and see if it's an unimp instruction (the most significant 10 bits will be zero). If so, update the return address to skip the unimp instruction. */ emit_move_insn (value, - gen_rtx (MEM, SImode, plus_constant (rtnreg, 8))); + gen_rtx_MEM (SImode, plus_constant (rtnreg, 8))); emit_insn (gen_lshrsi3 (value, value, GEN_INT (22))); emit_insn (gen_update_return (rtnreg, value)); } @@ -5412,8 +5414,8 @@ plus_constant (XEXP (result, 0), 8))); /* Put USE insns before the return. */ - emit_insn (gen_rtx (USE, VOIDmode, valreg1)); - emit_insn (gen_rtx (USE, VOIDmode, valreg2)); + emit_insn (gen_rtx_USE (VOIDmode, valreg1)); + emit_insn (gen_rtx_USE (VOIDmode, valreg2)); /* Construct the return. */ expand_null_return (); @@ -5481,7 +5483,7 @@ emit_move_insn (virtual_stack_vars_rtx, operands[0]); /* Find the containing function's current nonlocal goto handler, which will do any cleanups and then jump to the label. */ - emit_move_insn (gen_rtx (REG, Pmode, 8), operands[1]); + emit_move_insn (gen_rtx_REG (Pmode, 8), operands[1]); /* Restore %fp from stack pointer value for containing function. The restore insn that follows will move this to %sp, and reload the appropriate value into %fp. */ @@ -5490,9 +5492,9 @@ emit_move_insn (static_chain_rtx, operands[3]); /* USE of frame_pointer_rtx added for consistency; not clear if really needed. */ - emit_insn (gen_rtx (USE, VOIDmode, frame_pointer_rtx)); - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); - emit_insn (gen_rtx (USE, VOIDmode, static_chain_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, frame_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, static_chain_rtx)); /* Return, restoring reg window and jumping to goto handler. */ emit_insn (gen_goto_handler_and_restore ()); emit_barrier (); @@ -5601,8 +5603,9 @@ " { operands[3] = XEXP (operands[0], 0); - operands[4] = gen_rtx (MEM, GET_MODE (operands[0]), - gen_rtx (LO_SUM, SImode, operands[2], operands[3])); + operands[4] = gen_rtx_MEM (GET_MODE (operands[0]), + gen_rtx_LO_SUM (SImode, operands[2], + operands[3])); MEM_IN_STRUCT_P (operands[4]) = MEM_IN_STRUCT_P (operands[0]); MEM_VOLATILE_P (operands[4]) = MEM_VOLATILE_P (operands[0]); RTX_UNCHANGING_P (operands[4]) = RTX_UNCHANGING_P (operands[0]); @@ -5619,7 +5622,7 @@ rtx addr = legitimize_pic_address (XEXP (operands[0], 0), GET_MODE (operands[0]), operands[2]); - operands[3] = gen_rtx (MEM, GET_MODE (operands[0]), addr); + operands[3] = gen_rtx_MEM (GET_MODE (operands[0]), addr); MEM_IN_STRUCT_P (operands[3]) = MEM_IN_STRUCT_P (operands[0]); MEM_VOLATILE_P (operands[3]) = MEM_VOLATILE_P (operands[0]); RTX_UNCHANGING_P (operands[3]) = RTX_UNCHANGING_P (operands[0]); @@ -5635,7 +5638,7 @@ rtx addr = legitimize_pic_address (XEXP (operands[1], 0), GET_MODE (operands[1]), operands[0]); - operands[2] = gen_rtx (MEM, GET_MODE (operands[1]), addr); + operands[2] = gen_rtx_MEM (GET_MODE (operands[1]), addr); MEM_IN_STRUCT_P (operands[2]) = MEM_IN_STRUCT_P (operands[1]); MEM_VOLATILE_P (operands[2]) = MEM_VOLATILE_P (operands[1]); RTX_UNCHANGING_P (operands[2]) = RTX_UNCHANGING_P (operands[1]); @@ -5653,7 +5656,7 @@ rtx addr = legitimize_pic_address (XEXP (operands[2], 0), GET_MODE (operands[2]), operands[0]); - operands[3] = gen_rtx (MEM, GET_MODE (operands[2]), addr); + operands[3] = gen_rtx_MEM (GET_MODE (operands[2]), addr); MEM_IN_STRUCT_P (operands[3]) = MEM_IN_STRUCT_P (operands[2]); MEM_VOLATILE_P (operands[3]) = MEM_VOLATILE_P (operands[2]); RTX_UNCHANGING_P (operands[3]) = RTX_UNCHANGING_P (operands[2]); @@ -5968,8 +5971,9 @@ { /* Go by way of output_move_double in case the register in operand 2 is not properly aligned for ldd. */ - operands[1] = gen_rtx (MEM, DFmode, - gen_rtx (LO_SUM, SImode, operands[0], operands[1])); + operands[1] = gen_rtx_MEM (DFmode, + gen_rtx_LO_SUM (SImode, operands[0], + operands[1])); operands[0] = operands[2]; return output_move_double (operands); }") diff --git a/gcc/config/spur/spur.c b/gcc/config/spur/spur.c index 4145af261de..c2683244ffa 100644 --- a/gcc/config/spur/spur.c +++ b/gcc/config/spur/spur.c @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -139,24 +139,22 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) { if (GET_CODE (operands[1]) == CONST_DOUBLE) { - latehalf[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[1])); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); + latehalf[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); } else if (CONSTANT_P (operands[1])) latehalf[1] = const0_rtx; @@ -225,11 +223,11 @@ output_fp_move_double (operands) { rtx xoperands[2]; int offset = - get_frame_size () - 8; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset + 4); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); + xoperands[0] = GEN_INT (offset + 4); output_asm_insn ("st_32 %1,r25,%0", xoperands); xoperands[1] = operands[1]; - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset); + xoperands[0] = GEN_INT (offset); output_asm_insn ("st_32 %1,r25,%0", xoperands); xoperands[1] = operands[0]; output_asm_insn ("ld_dbl %1,r25,%0\n\tnop", xoperands); @@ -243,13 +241,13 @@ output_fp_move_double (operands) { rtx xoperands[2]; int offset = - get_frame_size () - 8; - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset); + xoperands[0] = GEN_INT (offset); xoperands[1] = operands[1]; output_asm_insn ("st_dbl %1,r25,%0", xoperands); xoperands[1] = operands[0]; output_asm_insn ("ld_32 %1,r25,%0\n\tnop", xoperands); - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset + 4); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + xoperands[0] = GEN_INT (offset + 4); output_asm_insn ("ld_32 %1,r25,%0\n\tnop", xoperands); return ""; } @@ -298,7 +296,7 @@ output_add_large_offset (target, reg, offset) (unsigned) (high + 0x2000) >= 0x4000; high >>= 1, n += 1) ; - operands[2] = gen_rtx (CONST_INT, VOIDmode, high); + operands[2] = GEN_INT (high); output_asm_insn ("add_nt r2,r0,%2", operands); i = n; while (i >= 3) @@ -310,7 +308,7 @@ output_add_large_offset (target, reg, offset) output_asm_insn ("add_nt %0,r2,%1", operands); if (offset - (high << n) != 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, offset - (high << n)); + operands[2] = GEN_INT (offset - (high << n)); output_asm_insn ("add_nt %0,%0,%2", operands); } return ""; diff --git a/gcc/config/spur/spur.h b/gcc/config/spur/spur.h index 51e1add1b27..fddc6f69051 100644 --- a/gcc/config/spur/spur.h +++ b/gcc/config/spur/spur.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for SPUR chip. - Copyright (C) 1988, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1988, 1995, 1996, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -355,17 +355,17 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES }; /* On SPUR the value is found in the second "output" register. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 27) + gen_rtx_REG (TYPE_MODE (VALTYPE), 27) /* But the called function leaves it in the second "input" register. */ #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 11) + gen_rtx_REG (TYPE_MODE (VALTYPE), 11) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 27) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 27) /* 1 if N is a possible register number for a function value as seen by the caller. @@ -449,7 +449,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES }; + ((MODE) == BLKmode \ ? (int_size_in_bytes (TYPE) + 3) / 4 \ : (GET_MODE_SIZE (MODE) + 3) / 4)) \ - ? gen_rtx (REG, (MODE), 27 + (CUM)) \ + ? gen_rtx_REG ((MODE), 27 + (CUM)) \ : 0) /* Define where a function finds its arguments. @@ -460,7 +460,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES }; + ((MODE) == BLKmode \ ? (int_size_in_bytes (TYPE) + 3) / 4 \ : (GET_MODE_SIZE (MODE) + 3) / 4)) \ - ? gen_rtx (REG, (MODE), 11 + (CUM)) \ + ? gen_rtx_REG ((MODE), 11 + (CUM)) \ : 0) /* For an arg passed partly in registers and partly in memory, @@ -714,17 +714,17 @@ extern int current_function_pretend_args_size; #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - copy_to_mode_reg (SImode, XEXP (X, 1))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + copy_to_mode_reg (SImode, XEXP (X, 1))); \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - copy_to_mode_reg (SImode, XEXP (X, 0))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + copy_to_mode_reg (SImode, XEXP (X, 0))); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), 0)); \ if (memory_address_p (MODE, X)) \ goto WIN; } diff --git a/gcc/config/spur/spur.md b/gcc/config/spur/spur.md index f95e8e04695..ccb9da7b5c1 100644 --- a/gcc/config/spur/spur.md +++ b/gcc/config/spur/spur.md @@ -1,5 +1,5 @@ ;;- Machine description for SPUR chip for GNU C compiler -;; Copyright (C) 1988 Free Software Foundation, Inc. +;; Copyright (C) 1988 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -288,17 +288,17 @@ rtx addr = force_reg (SImode, XEXP (operands[1], 0)); rtx subreg; - emit_move_insn (tem, gen_rtx (MEM, SImode, addr)); + emit_move_insn (tem, gen_rtx_MEM (SImode, addr)); if (GET_CODE (operands[0]) == SUBREG) - subreg = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[0]), - SUBREG_WORD (operands[0])); + subreg = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[0]), + SUBREG_WORD (operands[0])); else - subreg = gen_rtx (SUBREG, SImode, operands[0], 0); + subreg = gen_rtx_SUBREG (SImode, operands[0], 0); - emit_insn (gen_rtx (SET, VOIDmode, subreg, - gen_rtx (ZERO_EXTRACT, SImode, tem, - gen_rtx (CONST_INT, VOIDmode, 8), - addr))); + emit_insn (gen_rtx_SET (VOIDmode, subreg, + gen_rtx_ZERO_EXTRACT (SImode, tem, + GEN_INT (8), + addr))); } else if (GET_CODE (operands[0]) == MEM) { @@ -306,26 +306,26 @@ rtx addr = force_reg (SImode, XEXP (operands[0], 0)); rtx subreg; - emit_move_insn (tem, gen_rtx (MEM, SImode, addr)); + emit_move_insn (tem, gen_rtx_MEM (SImode, addr)); if (! CONSTANT_ADDRESS_P (operands[1])) { if (GET_CODE (operands[1]) == SUBREG) - subreg = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + subreg = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - subreg = gen_rtx (SUBREG, SImode, operands[1], 0); + subreg = gen_rtx_SUBREG (SImode, operands[1], 0); } - emit_insn (gen_rtx (SET, VOIDmode, - gen_rtx (ZERO_EXTRACT, SImode, tem, - gen_rtx (CONST_INT, VOIDmode, 8), - addr), - subreg)); - emit_move_insn (gen_rtx (MEM, SImode, addr), tem); + emit_insn (gen_rtx_SET (VOIDmode, + gen_rtx_ZERO_EXTRACT (SImode, tem, + GEN_INT (8), + addr), + subreg)); + emit_move_insn (gen_rtx_MEM (SImode, addr), tem); } else { - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); } DONE; }") @@ -376,7 +376,7 @@ ; && (unsigned) INTVAL (operands[1]) < 32" ; "* ;{ -; operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) / 8); +; operands[1] = GEN_INT (INTVAL (operands[1]) / 8); ; return \"wr_insert 0,0,%1\;insert %0,%0,%2\"; ;}") @@ -443,10 +443,10 @@ " { if (GET_CODE (operands[1]) == SUBREG) - operands[5] = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + operands[5] = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - operands[5] = gen_rtx (SUBREG, SImode, operands[1], 0); + operands[5] = gen_rtx_SUBREG (SImode, operands[1], 0); }") ;; Like storehi but operands[1] is a CONST_INT. @@ -467,9 +467,8 @@ (set (mem:SI (match_dup 0)) (match_dup 2))] "" - " operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 255); - operands[6] = gen_rtx (CONST_INT, VOIDmode, - (INTVAL (operands[1]) >> 8) & 255); + " operands[5] = GEN_INT (INTVAL (operands[1]) & 255); + operands[6] = GEN_INT (INTVAL (operands[1]) >> 8) & 255); ") ;; Main entry for generating insns to move halfwords. @@ -491,8 +490,8 @@ gen_reg_rtx (SImode), gen_reg_rtx (SImode), gen_reg_rtx (QImode))); /* Tell cse what value the loadhi produces, so it detect duplicates. */ - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, operands[1], - REG_NOTES (insn)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, operands[1], + REG_NOTES (insn)); } else if (GET_CODE (operands[0]) == MEM) { @@ -512,7 +511,7 @@ } } else - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -563,7 +562,7 @@ ; && (unsigned) INTVAL (operands[1]) < 32" ; "* ;{ -; operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) / 8); +; operands[1] = GEN_INT (INTVAL (operands[1]) / 8); ; return \"wr_insert 0,0,%1\;insert %0,%0,%2\"; ;}") @@ -580,7 +579,7 @@ return output_fp_move_double (operands); if (operands[1] == CONST0_RTX (DFmode) && GET_CODE (operands[0]) == REG) { - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"add_nt %0,r0,$0\;add_nt %1,r0,$0\"; } if (operands[1] == CONST0_RTX (DFmode) && GET_CODE (operands[0]) == MEM) @@ -631,7 +630,7 @@ rtx xoperands[2]; int offset = - get_frame_size () - 8; xoperands[1] = operands[1]; - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset); + xoperands[0] = GEN_INT (offset); output_asm_insn (\"st_32 %1,r25,%0\", xoperands); xoperands[1] = operands[0]; output_asm_insn (\"ld_sgl %1,r25,%0\;nop\", xoperands); @@ -645,7 +644,7 @@ { rtx xoperands[2]; int offset = - get_frame_size () - 8; - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset); + xoperands[0] = GEN_INT (offset); xoperands[1] = operands[1]; output_asm_insn (\"st_sgl %1,r25,%0\", xoperands); xoperands[1] = operands[0]; @@ -700,12 +699,12 @@ " { if (GET_CODE (operands[1]) == SUBREG) - operands[1] = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + operands[1] = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - operands[1] = gen_rtx (SUBREG, SImode, operands[1], 0); + operands[1] = gen_rtx_SUBREG (SImode, operands[1], 0); - operands[2] = force_reg (SImode, gen_rtx (CONST_INT, VOIDmode, 65535)); + operands[2] = force_reg (SImode, GEN_INT (65535)); }") (define_insn "zero_extendqihi2" @@ -737,15 +736,15 @@ " { if (GET_CODE (operands[1]) == SUBREG) - operands[1] = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + operands[1] = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - operands[1] = gen_rtx (SUBREG, SImode, operands[1], 0); + operands[1] = gen_rtx_SUBREG (SImode, operands[1], 0); operands[2] = gen_reg_rtx (SImode); operands[3] = gen_reg_rtx (SImode); - operands[4] = force_reg (SImode, gen_rtx (CONST_INT, VOIDmode, 65535)); - operands[5] = force_reg (SImode, gen_rtx (CONST_INT, VOIDmode, -32768)); + operands[4] = force_reg (SImode, GEN_INT (65535)); + operands[5] = force_reg (SImode, GEN_INT (-32768)); }") (define_expand "extendqihi2" @@ -760,10 +759,10 @@ " { if (GET_CODE (operands[1]) == SUBREG) - operands[1] = gen_rtx (SUBREG, HImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + operands[1] = gen_rtx_SUBREG (HImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - operands[1] = gen_rtx (SUBREG, HImode, operands[1], 0); + operands[1] = gen_rtx_SUBREG (HImode, operands[1], 0); operands[2] = gen_reg_rtx (HImode); operands[3] = gen_reg_rtx (HImode); @@ -780,10 +779,10 @@ " { if (GET_CODE (operands[1]) == SUBREG) - operands[1] = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + operands[1] = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - operands[1] = gen_rtx (SUBREG, SImode, operands[1], 0); + operands[1] = gen_rtx_SUBREG (SImode, operands[1], 0); operands[2] = gen_reg_rtx (SImode); operands[3] = gen_reg_rtx (SImode); diff --git a/gcc/config/tahoe/tahoe.c b/gcc/config/tahoe/tahoe.c index 9dd189bde2f..e0a19fb5fc8 100644 --- a/gcc/config/tahoe/tahoe.c +++ b/gcc/config/tahoe/tahoe.c @@ -1,5 +1,10 @@ /* Subroutines for insn-output.c for Tahoe. - Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 1991, 1997, 1998 Free Software Foundation, Inc. + Contributed by the University of Buffalo (Devon Bowen, Dale Wiles + and Kevin Zachmann. + Changes for HCX by Piet van Oostrum, University of Utrecht, + The Netherlands (piet@cs.ruu.nl) + Speed tweaks by Michael Tiemann (tiemann@lurch.stanford.edu). This file is part of GNU CC. @@ -18,9 +23,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -31,21 +35,6 @@ Boston, MA 02111-1307, USA. */ #include "output.h" #include "insn-attr.h" -/* - * File: output-tahoe.c - * - * Original port made at the University of Buffalo by Devon Bowen, - * Dale Wiles and Kevin Zachmann. - * - * Changes for HCX by Piet van Oostrum, - * University of Utrecht, The Netherlands (piet@cs.ruu.nl) - * - * Speed tweaks by Michael Tiemann (tiemann@lurch.stanford.edu). - * - * Mail bugs reports or fixes to: gcc@cs.buffalo.edu - */ - - /* On tahoe, you have to go to memory to convert a register from sub-word to word. */ @@ -60,13 +49,15 @@ extensible_operand (op, mode) || (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG)) && tahoe_reg_conversion_loc == 0) - tahoe_reg_conversion_loc = assign_stack_local (SImode, GET_MODE_SIZE (SImode)); + tahoe_reg_conversion_loc + = assign_stack_local (SImode, GET_MODE_SIZE (SImode)); + return general_operand (op, mode); } -/* most of the print_operand_address function was taken from the vax */ -/* since the modes are basically the same. I had to add a special case, */ -/* though, for symbol references with offsets. */ +/* Most of the print_operand_address function was taken from the VAX since + the modes are basically the same. I had to add a special case, though, for + symbol references with offsets. */ print_operand_address (file, addr) FILE *file; @@ -97,8 +88,8 @@ print_operand_address (file, addr) break; case PLUS: - reg1 = 0; reg2 = 0; - ireg = 0; breg = 0; + reg1 = 0, reg2 = 0; + ireg = 0, breg = 0; offset = 0; if (CONSTANT_ADDRESS_P (XEXP (addr, 0)) @@ -111,38 +102,22 @@ print_operand_address (file, addr) if (CONSTANT_ADDRESS_P (XEXP (addr, 0)) || GET_CODE (XEXP (addr, 0)) == MEM) - { - offset = XEXP (addr, 0); - addr = XEXP (addr, 1); - } + offset = XEXP (addr, 0), addr = XEXP (addr, 1); else if (CONSTANT_ADDRESS_P (XEXP (addr, 1)) || GET_CODE (XEXP (addr, 1)) == MEM) - { - offset = XEXP (addr, 1); - addr = XEXP (addr, 0); - } + offset = XEXP (addr, 1), addr = XEXP (addr, 0); + if (GET_CODE (addr) != PLUS) ; else if (GET_CODE (XEXP (addr, 0)) == MULT) - { - reg1 = XEXP (addr, 0); - addr = XEXP (addr, 1); - } + reg1 = XEXP (addr, 0), addr = XEXP (addr, 1); else if (GET_CODE (XEXP (addr, 1)) == MULT) - { - reg1 = XEXP (addr, 1); - addr = XEXP (addr, 0); - } + reg1 = XEXP (addr, 1), addr = XEXP (addr, 0); else if (GET_CODE (XEXP (addr, 0)) == REG) - { - reg1 = XEXP (addr, 0); - addr = XEXP (addr, 1); - } + reg1 = XEXP (addr, 0), addr = XEXP (addr, 1); else if (GET_CODE (XEXP (addr, 1)) == REG) - { - reg1 = XEXP (addr, 1); - addr = XEXP (addr, 0); - } + reg1 = XEXP (addr, 1), addr = XEXP (addr, 0); + if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT) { if (reg1 == 0) @@ -151,39 +126,34 @@ print_operand_address (file, addr) reg2 = addr; addr = 0; } + if (offset != 0) { - if (addr != 0) abort (); + if (addr != 0) + abort (); + addr = offset; } + if (reg1 != 0 && GET_CODE (reg1) == MULT) - { - breg = reg2; - ireg = reg1; - } + breg = reg2, ireg = reg1; else if (reg2 != 0 && GET_CODE (reg2) == MULT) - { - breg = reg1; - ireg = reg2; - } + breg = reg1, ireg = reg2; else if (reg2 != 0 || GET_CODE (addr) == MEM) - { - breg = reg2; - ireg = reg1; - } + breg = reg2, ireg = reg1; else - { - breg = reg1; - ireg = reg2; - } + breg = reg1, ireg = reg2; + if (addr != 0) output_address (offset); + if (breg != 0) { if (GET_CODE (breg) != REG) abort (); fprintf (file, "(%s)", reg_name[REGNO (breg)]); } + if (ireg != 0) { if (GET_CODE (ireg) == MULT) @@ -199,8 +169,8 @@ print_operand_address (file, addr) } } -/* Do a quick check and find out what the best way to do the */ -/* mini-move is. Could be a push or a move..... */ +/* Do a quick check and find out what the best way to do the mini-move is. + Could be a push or a move..... */ static char * singlemove_string (operands) @@ -208,65 +178,69 @@ singlemove_string (operands) { if (operands[1] == const0_rtx) return "clrl %0"; + if (push_operand (operands[0], SImode)) return "pushl %1"; + return "movl %1,%0"; } -/* given the rtx for an address, return true if the given */ -/* register number is used in the address somewhere. */ +/* Given the rtx for an address, return true if the given register number is + used in the address somewhere. */ -regisused(addr,regnum) -rtx addr; -int regnum; +int +regisused (addr, regnum) + rtx addr; + int regnum; { - if (GET_CODE(addr) == REG) - if (REGNO(addr) == regnum) - return (1); - else - return (0); + if (GET_CODE (addr) == REG) + return REGNO (addr) == regnum; - if (GET_CODE(addr) == MEM) - return regisused(XEXP(addr,0),regnum); + else if (GET_CODE (addr) == MEM) + return regisused (XEXP (addr, 0), regnum); - if ((GET_CODE(addr) == MULT) || (GET_CODE(addr) == PLUS)) - return ((regisused(XEXP(addr,0),regnum)) || - (regisused(XEXP(addr,1),regnum))); + else if (GET_CODE (addr) == MULT || GET_CODE (addr) == PLUS) + return (regisused (XEXP (addr, 0), regnum) + || regisused (XEXP (addr, 1), regnum)); - return 0; + return 0; } -/* Given some rtx, traverse it and return the register used in a */ -/* index. If no index is found, return 0. */ +/* Given some rtx, traverse it and return the register used in a index. If no + index is found, return 0. */ rtx -index_reg(addr) -rtx addr; +index_reg (addr) + rtx addr; { - rtx temp; + rtx temp; - if (GET_CODE(addr) == MEM) - return index_reg(XEXP(addr,0)); + if (GET_CODE (addr) == MEM) + return index_reg (XEXP (addr, 0)); - if (GET_CODE(addr) == MULT) - if (GET_CODE(XEXP(addr,0)) == REG) - return XEXP(addr,0); - else - return XEXP(addr,1); + else if (GET_CODE (addr) == MULT) + { + if (GET_CODE (XEXP (addr, 0)) == REG) + return XEXP (addr, 0); + else + return XEXP (addr, 1); + } - if (GET_CODE(addr) == PLUS) - if (temp = index_reg(XEXP(addr,0))) - return temp; - else - return index_reg(XEXP(addr,1)); + else if (GET_CODE (addr) == PLUS) + { + if ((temp = index_reg (XEXP (addr, 0))) != 0) + return temp; + else + return index_reg (XEXP (addr, 1)); + } - return 0; + return 0; } -/* simulate the move double by generating two movl's. You have */ -/* to be careful about mixing modes here. */ +/* Simulate the move double by generating two movl's. We need to be careful + about mixing modes here. */ char * output_move_double (operands) @@ -284,21 +258,25 @@ output_move_double (operands) if (REG_P (operands[0])) optype0 = REGOP; - else if ((GET_CODE(operands[0])==MEM) && (shftreg0=index_reg(operands[0]))) + else if (GET_CODE (operands[0]) == MEM + && (shftreg0 = index_reg (operands[0])) != 0) optype0 = INDOP; else if (offsettable_memref_p (operands[0])) optype0 = OFFSOP; - else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) { - optype0 = PUSHOP; - dohighfirst++; - } else if (GET_CODE (operands[0]) == MEM) + else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) + { + optype0 = PUSHOP; + dohighfirst++; + } + else if (GET_CODE (operands[0]) == MEM) optype0 = MEMOP; else optype0 = RNDOP; if (REG_P (operands[1])) optype1 = REGOP; - else if ((GET_CODE(operands[1])==MEM) && (shftreg1=index_reg(operands[1]))) + else if (GET_CODE (operands[1]) == MEM + && (shftreg1 = index_reg (operands[1])) !+ 0) optype1 = INDOP; else if (offsettable_memref_p (operands[1])) optype1 = OFFSOP; @@ -311,214 +289,233 @@ output_move_double (operands) else optype1 = RNDOP; - /* set up for the high byte move for operand zero */ + /* Set up for the high byte move for operand zero */ - switch (optype0) { - - /* if it's a register, just use the next highest in the */ - /* high address move. */ - - case REGOP : latehalf[0] = gen_rtx (REG,SImode,REGNO(operands[0])+1); - break; - - /* for an offsettable address, use the gcc function to */ - /* modify the operand to get an offset of 4 higher for */ - /* the second move. */ - - case OFFSOP : latehalf[0] = adj_offsettable_operand (operands[0], 4); - break; - - /* if the operand is MEMOP type, it must be a pointer */ - /* to a pointer. So just remember to increase the mem */ - /* location and use the same operand. */ - - case MEMOP : latehalf[0] = operands[0]; - addreg0 = XEXP(operands[0],0); - break; + switch (optype0) + { + /* If it's a register, just use the next highest in the high address + move. */ + case REGOP: + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + break; - /* if we're dealing with a push instruction, just leave */ - /* the operand alone since it auto-increments. */ + /* For an offsettable address, use the GCC function to modify the + operand to get an offset of 4 higher for the second move. */ + case OFFSOP: + latehalf[0] = adj_offsettable_operand (operands[0], 4); + break; - case PUSHOP : latehalf[0] = operands[0]; - break; + /* If the operand is MEMOP type, it must be a pointer to a pointer. + So just remember to increase the mem location and use the same + operand. */ + case MEMOP: + latehalf[0] = operands[0]; + addreg0 = XEXP(operands[0],0); + break; - /* YUCK! Indexed addressing!! If the address is considered */ - /* offsettable, go use the offset in the high part. Otherwise */ - /* find what exactly is being added to the multiplication. If */ - /* it's a mem reference, increment that with the high part */ - /* being unchanged to cause the shift. If it's a reg, do the */ - /* same. If you can't identify it, abort. Remember that the */ - /* shift register was already set during identification. */ + /* If we're dealing with a push instruction, just leave the operand + alone since it auto-increments. */ + case PUSHOP: + latehalf[0] = operands[0]; + break; - case INDOP : if (offsettable_memref_p(operands[0])) { - latehalf[0] = adj_offsettable_operand(operands[0],4); - break; - } + /* Indexed addressing. If the address is considered offsettable, use + the offset in the high part. Otherwise find what exactly is being + added to the multiplication. If it's a mem reference, increment that + with the high part being unchanged to cause the shift. If it's a + reg, do the same. If we can't identify it, abort. Remember that the + shift register was already set during identification. */ - latehalf[0] = operands[0]; + case INDOP: + if (offsettable_memref_p (operands[0])) + { + latehalf[0] = adj_offsettable_operand (operands[0], 4); + break; + } - temp0 = XEXP(XEXP(operands[0],0),0); - if (GET_CODE(temp0) == MULT) { - temp1 = temp0; - temp0 = XEXP(XEXP(operands[0],0),1); - } else { - temp1 = XEXP(XEXP(operands[0],0),1); - if (GET_CODE(temp1) != MULT) - abort(); - } + latehalf[0] = operands[0]; - if (GET_CODE(temp0) == MEM) - addreg0 = temp0; - else if (GET_CODE(temp0) == REG) - addreg0 = temp0; - else - abort(); + temp0 = XEXP (XEXP (operands[0], 0), 0); + if (GET_CODE(temp0) == MULT) + { + temp1 = temp0; + temp0 = XEXP (XEXP (operands[0], 0), 1); + } + else + { + temp1 = XEXP (XEXP (operands[0], 0), 1); + if (GET_CODE (temp1) != MULT) + abort(); + } - break; + if (GET_CODE (temp0) == MEM) + addreg0 = temp0; + else if (GET_CODE (temp0) == REG) + addreg0 = temp0; + else + abort(); - /* if we don't know the operand type, print a friendly */ - /* little error message... 8-) */ + break; - case RNDOP : - default : abort(); + case RNDOP: + default: + abort(); } - /* do the same setup for operand one */ + /* Do the same setup for operand one. */ - switch (optype1) { + switch (optype1) + { + case REGOP: + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); + break; - case REGOP : latehalf[1] = gen_rtx(REG,SImode,REGNO(operands[1])+1); - break; + case OFFSOP: + latehalf[1] = adj_offsettable_operand (operands[1], 4); + break; - case OFFSOP : latehalf[1] = adj_offsettable_operand (operands[1], 4); - break; + case MEMOP: + latehalf[1] = operands[1]; + addreg1 = XEXP (operands[1], 0); + break; - case MEMOP : latehalf[1] = operands[1]; - addreg1 = XEXP(operands[1],0); - break; + case POPOP: + latehalf[1] = operands[1]; + break; - case POPOP : latehalf[1] = operands[1]; - break; + case INDOP: + if (offsettable_memref_p (operands[1])) + { + latehalf[1] = adj_offsettable_operand (operands[1], 4); + break; + } - case INDOP : if (offsettable_memref_p(operands[1])) { - latehalf[1] = adj_offsettable_operand(operands[1],4); - break; - } + latehalf[1] = operands[1]; - latehalf[1] = operands[1]; + temp0 = XEXP (XEXP (operands[1], 0), 0); + if (GET_CODE (temp0) == MULT) + { + temp1 = temp0; + temp0 = XEXP (XEXP (operands[1], 0), 1); + } + else + { + temp1 = XEXP (XEXP (operands[1], 0), 1); + if (GET_CODE (temp1) != MULT) + abort(); + } - temp0 = XEXP(XEXP(operands[1],0),0); - if (GET_CODE(temp0) == MULT) { - temp1 = temp0; - temp0 = XEXP(XEXP(operands[1],0),1); - } else { - temp1 = XEXP(XEXP(operands[1],0),1); - if (GET_CODE(temp1) != MULT) - abort(); - } + if (GET_CODE (temp0) == MEM) + addreg1 = temp0; + else if (GET_CODE (temp0) == REG) + addreg1 = temp0; + else + abort(); + break; - if (GET_CODE(temp0) == MEM) - addreg1 = temp0; - else if (GET_CODE(temp0) == REG) - addreg1 = temp0; - else - abort(); + case CNSTOP: + if (GET_CODE (operands[1]) == CONST_DOUBLE) + split_double (operands[1], &operands[1], &latehalf[1]); + else if (CONSTANT_P (operands[1])) + latehalf[1] = const0_rtx; + else + abort (); + break; - break; + case RNDOP: + default: + abort (); + } - case CNSTOP : - if (GET_CODE (operands[1]) == CONST_DOUBLE) - split_double (operands[1], &operands[1], &latehalf[1]); - else if (CONSTANT_P (operands[1])) - latehalf[1] = const0_rtx; - else abort (); - break; - case RNDOP : - default : abort(); - } + /* Double the register used for shifting in both of the operands but make + sure the same register isn't doubled twice! */ + if (shftreg0 != 0 && shftreg1 != 0 && rtx_equal_p (shftreg0, shftreg1)) + output_asm_insn ("addl2 %0,%0", &shftreg0); + else + { + if (shftreg0 != 0) + output_asm_insn ("addl2 %0,%0", &shftreg0); + if (shftreg1!= 0) + output_asm_insn ("addl2 %0,%0", &shftreg1); + } - /* double the register used for shifting in both of the operands */ - /* but make sure the same register isn't doubled twice! */ + /* If the destination is a register and that register is needed in the + source addressing mode, swap the order of the moves since we don't want + this destroyed til last. If both regs are used, not much we can do, so + abort. If these becomes a problem, maybe we can do it on the stack? */ - if (shftreg0 && shftreg1 && (rtx_equal_p(shftreg0,shftreg1))) - output_asm_insn("addl2 %0,%0", &shftreg0); - else { - if (shftreg0) - output_asm_insn("addl2 %0,%0", &shftreg0); - if (shftreg1) - output_asm_insn("addl2 %0,%0", &shftreg1); - } + if (GET_CODE (operands[0]) == REG + && regisused (operands[1], REGNO (operands[0]))) + { + if (regisused (latehalf[1], REGNO(latehalf[0]))) + ; + else + dohighfirst++; + } + + /* If we're pushing, do the high address part first. */ - /* if the destination is a register and that register is needed in */ - /* the source addressing mode, swap the order of the moves since we */ - /* don't want this destroyed til last. If both regs are used, not */ - /* much we can do, so abort. If these becomes a problem, maybe we */ - /* can do it on the stack? */ - - if (GET_CODE(operands[0])==REG && regisused(operands[1],REGNO(operands[0]))) - if (regisused(latehalf[1],REGNO(latehalf[0]))) - 8; - else - dohighfirst++; - - /* if we're pushing, do the high address part first. */ - - if (dohighfirst) { - - if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1))) - output_asm_insn("addl2 $4,%0", &addreg0); - else { - if (addreg0) - output_asm_insn("addl2 $4,%0", &addreg0); - if (addreg1) - output_asm_insn("addl2 $4,%0", &addreg1); + if (dohighfirst) + { + if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p (addreg0, addreg1)) + output_asm_insn ("addl2 $4,%0", &addreg0); + else + { + if (addreg0 != 0) + output_asm_insn ("addl2 $4,%0", &addreg0); + if (addreg1 != 0) + output_asm_insn ("addl2 $4,%0", &addreg1); } - output_asm_insn(singlemove_string(latehalf), latehalf); + output_asm_insn (singlemove_string (latehalf), latehalf); - if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1))) - output_asm_insn("subl2 $4,%0", &addreg0); - else { - if (addreg0) - output_asm_insn("subl2 $4,%0", &addreg0); - if (addreg1) - output_asm_insn("subl2 $4,%0", &addreg1); + if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p (addreg0, addreg1)) + output_asm_insn ("subl2 $4,%0", &addreg0); + else + { + if (addreg0 != 0) + output_asm_insn ("subl2 $4,%0", &addreg0); + if (addreg1 != 0) + output_asm_insn ("subl2 $4,%0", &addreg1); } - return singlemove_string(operands); - } + return singlemove_string (operands); + } - output_asm_insn(singlemove_string(operands), operands); + output_asm_insn (singlemove_string(operands), operands); - if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1))) - output_asm_insn("addl2 $4,%0", &addreg0); - else { - if (addreg0) - output_asm_insn("addl2 $4,%0", &addreg0); - if (addreg1) - output_asm_insn("addl2 $4,%0", &addreg1); - } + if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p (addreg0, addreg1)) + output_asm_insn ("addl2 $4,%0", &addreg0); + else + { + if (addreg0 != 0) + output_asm_insn ("addl2 $4,%0", &addreg0); + if (addreg1 != 0) + output_asm_insn ("addl2 $4,%0", &addreg1); + } - output_asm_insn(singlemove_string(latehalf), latehalf); + output_asm_insn (singlemove_string (latehalf), latehalf); - if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1))) - output_asm_insn("subl2 $4,%0", &addreg0); - else { - if (addreg0) - output_asm_insn("subl2 $4,%0", &addreg0); - if (addreg1) - output_asm_insn("subl2 $4,%0", &addreg1); - } + if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p(addreg0, addreg1)) + output_asm_insn ("subl2 $4,%0", &addreg0); + else + { + if (addreg0 != 0) + output_asm_insn ("subl2 $4,%0", &addreg0); + if (addreg1 != 0) + output_asm_insn ("subl2 $4,%0", &addreg1); + } - if (shftreg0 && shftreg1 && (rtx_equal_p(shftreg0,shftreg1))) - output_asm_insn("shar $1,%0,%0", &shftreg0); - else { - if (shftreg0) - output_asm_insn("shar $1,%0,%0", &shftreg0); - if (shftreg1) - output_asm_insn("shar $1,%0,%0", &shftreg1); + if (shftreg0 != 0 && shftreg1 != 0 && rtx_equal_p (shftreg0, shftreg1)) + output_asm_insn ("shar $1,%0,%0", &shftreg0); + else + { + if (shftreg0 != 0) + output_asm_insn ("shar $1,%0,%0", &shftreg0); + if (shftreg1 != 0) + output_asm_insn ("shar $1,%0,%0", &shftreg1); } return ""; @@ -532,33 +529,32 @@ output_move_double (operands) int tahoe_cmp_check (insn, op, max) -rtx insn, op; int max; + rtx insn, op; + int max; { + register rtx next = NEXT_INSN (insn); + if (GET_CODE (op) == CONST_INT - && ( INTVAL (op) < 0 || INTVAL (op) > max )) - return 0; + && (INTVAL (op) < 0 || INTVAL (op) > max)) + return 0; + + if (GET_RTX_CLASS (GET_CODE (next)) == 'i') { - register rtx next = NEXT_INSN (insn); - - if ((GET_CODE (next) == JUMP_INSN - || GET_CODE (next) == INSN - || GET_CODE (next) == CALL_INSN)) - { - next = PATTERN (next); - if (GET_CODE (next) == SET - && SET_DEST (next) == pc_rtx - && GET_CODE (SET_SRC (next)) == IF_THEN_ELSE) - switch (GET_CODE (XEXP (SET_SRC (next), 0))) - { - case EQ: - case NE: - case LTU: - case GTU: - case LEU: - case GEU: - return 1; - } - } + next = PATTERN (next); + if (GET_CODE (next) == SET + && SET_DEST (next) == pc_rtx + && GET_CODE (SET_SRC (next)) == IF_THEN_ELSE) + switch (GET_CODE (XEXP (SET_SRC (next), 0))) + { + case EQ: + case NE: + case LTU: + case GTU: + case LEU: + case GEU: + return 1; + } } - return 0; + + return 0; } diff --git a/gcc/config/tahoe/tahoe.h b/gcc/config/tahoe/tahoe.h index b4076ce53b3..1591d7928e9 100644 --- a/gcc/config/tahoe/tahoe.h +++ b/gcc/config/tahoe/tahoe.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Tahoe version. - Copyright (C) 1989, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1989, 93, 94, 95, 96, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -331,11 +331,11 @@ enum reg_class {NO_REGS,GENERAL_REGS,FPP_REG,ALL_REGS,LIM_REG_CLASSES}; /* function values for all types are returned in register 0 */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* library routines also return things in reg 0 */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* Tahoe doesn't return structures in a reentrant way */ diff --git a/gcc/config/tahoe/tahoe.md b/gcc/config/tahoe/tahoe.md index 0fdbb0cb775..ee6de24a6cb 100644 --- a/gcc/config/tahoe/tahoe.md +++ b/gcc/config/tahoe/tahoe.md @@ -1,5 +1,5 @@ ;; Machine description for GNU compiler, Tahoe version -;; Copyright (C) 1989, 1994, 1996, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1989, 1994, 1996, 1997, 1998 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1015,7 +1015,7 @@ "* { if (INTVAL (operands[1]) > 32767) - operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) + 0xffff0000); + operands[1] = GEN_INT (INTVAL (operands[1]) + 0xffff0000); return \"cmpw %0,%1\"; }") @@ -1062,7 +1062,7 @@ "* { if (INTVAL (operands[1]) > 127) - operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) + 0xffffff00); + operands[1] = GEN_INT (INTVAL (operands[1]) + 0xffffff00); return \"cmpb %0,%1\"; }") @@ -1591,7 +1591,7 @@ "" "* { - operands[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) + 4)); + operands[1] = GEN_INT (INTVAL (operands[1]) + 4); if (GET_CODE(operands[0]) == MEM && CONSTANT_ADDRESS_P (XEXP(operands[0], 0)) && INTVAL (operands[1]) < 64) @@ -1609,7 +1609,7 @@ "" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) + 4)); + operands[2] = GEN_INT (INTVAL (operands[2]) + 4)); if (GET_CODE(operands[1]) == MEM && CONSTANT_ADDRESS_P (XEXP(operands[1], 0)) && INTVAL (operands[2]) < 64) @@ -2056,8 +2056,7 @@ ; && exact_log2 (INTVAL (operands[1])) >= 0" ; "* ;{ -; operands[1] -; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1]))); +; operands[1] = GEN_INT (exact_log2 (INTVAL (operands[1]))); ; return \"bbs %1,%0,%l2\"; ;}") ; @@ -2073,8 +2072,7 @@ ; && exact_log2 (INTVAL (operands[1])) >= 0" ; "* ;{ -; operands[1] -; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1]))); +; operands[1] = GEN_INT (exact_log2 (INTVAL (operands[1]))); ; return \"bbc %1,%0,%l2\"; ;}") ; @@ -2090,8 +2088,7 @@ ; && exact_log2 (INTVAL (operands[1])) >= 0" ; "* ;{ -; operands[1] -; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1]))); +; operands[1] = GEN_INT (exact_log2 (INTVAL (operands[1]))); ; return \"bbc %1,%0,%l2\"; ;}") ; diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c index 88d3a411a8e..9e374599805 100644 --- a/gcc/config/v850/v850.c +++ b/gcc/config/v850/v850.c @@ -20,8 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> -#include <ctype.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -142,16 +141,16 @@ function_arg (cum, mode, type, named) switch (cum->nbytes / UNITS_PER_WORD) { case 0: - result = gen_rtx (REG, mode, 6); + result = gen_rtx_REG (mode, 6); break; case 1: - result = gen_rtx (REG, mode, 7); + result = gen_rtx_REG (mode, 7); break; case 2: - result = gen_rtx (REG, mode, 8); + result = gen_rtx_REG (mode, 8); break; case 3: - result = gen_rtx (REG, mode, 9); + result = gen_rtx_REG (mode, 9); break; default: result = 0; @@ -490,9 +489,8 @@ print_operand (file, x, code) { case MEM: if (GET_CODE (XEXP (x, 0)) == CONST_INT) - output_address (gen_rtx (PLUS, SImode, - gen_rtx (REG, SImode, 0), - XEXP (x, 0))); + output_address (gen_rtx_PLUS (SImode, gen_rtx (REG, SImode, 0), + XEXP (x, 0))); else output_address (XEXP (x, 0)); break; @@ -719,7 +717,7 @@ output_move_single (operands) return "%S0st%W0 %.,%0"; } - fatal_insn ("output_move_single:", gen_rtx (SET, VOIDmode, dst, src)); + fatal_insn ("output_move_single:", gen_rtx_SET (VOIDmode, dst, src)); return ""; } @@ -765,7 +763,7 @@ output_move_double (operands) for (i = 0; i < 2; i++) { - xop[0] = gen_rtx (REG, SImode, REGNO (dst)+i); + xop[0] = gen_rtx_REG (SImode, REGNO (dst)+i); xop[1] = GEN_INT (high_low[i]); output_asm_insn (output_move_single (xop), xop); } @@ -1014,15 +1012,15 @@ substitute_ep_register (first_insn, last_insn, uses, regno, p_r1, p_ep) rtx *p_r1; rtx *p_ep; { - rtx reg = gen_rtx (REG, Pmode, regno); + rtx reg = gen_rtx_REG (Pmode, regno); rtx insn; int i; if (!*p_r1) { regs_ever_live[1] = 1; - *p_r1 = gen_rtx (REG, Pmode, 1); - *p_ep = gen_rtx (REG, Pmode, 30); + *p_r1 = gen_rtx_REG (Pmode, 1); + *p_ep = gen_rtx_REG (Pmode, 30); } if (TARGET_DEBUG) @@ -1076,8 +1074,9 @@ substitute_ep_register (first_insn, last_insn, uses, regno, p_r1, p_ep) < ep_memory_offset (GET_MODE (*p_mem), unsignedp))) *p_mem = change_address (*p_mem, VOIDmode, - gen_rtx (PLUS, Pmode, - *p_ep, XEXP (addr, 1))); + gen_rtx_PLUS (Pmode, + *p_ep, + XEXP (addr, 1))); } } } @@ -1091,10 +1090,10 @@ substitute_ep_register (first_insn, last_insn, uses, regno, p_r1, p_ep) && SET_SRC (PATTERN (insn)) == *p_r1) delete_insn (insn); else - emit_insn_before (gen_rtx (SET, Pmode, *p_r1, *p_ep), first_insn); + emit_insn_before (gen_rtx_SET (Pmode, *p_r1, *p_ep), first_insn); - emit_insn_before (gen_rtx (SET, Pmode, *p_ep, reg), first_insn); - emit_insn_before (gen_rtx (SET, Pmode, *p_ep, *p_r1), last_insn); + emit_insn_before (gen_rtx_SET (Pmode, *p_ep, reg), first_insn); + emit_insn_before (gen_rtx_SET (Pmode, *p_ep, *p_r1), last_insn); } @@ -1423,10 +1422,10 @@ expand_prologue () offset = 0; for (i = 6; i < 10; i++) { - emit_move_insn (gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, - offset)), - gen_rtx (REG, SImode, i)); + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, + offset)), + gen_rtx_REG (SImode, i)); offset += 4; } } @@ -1438,14 +1437,14 @@ expand_prologue () for (i = 1; i < 31; i++) { if (((1L << i) & reg_saved) != 0) - save_regs[num_save++] = gen_rtx (REG, Pmode, i); + save_regs[num_save++] = gen_rtx_REG (Pmode, i); } /* If the return pointer is saved, the helper functions also allocate 16 bytes of stack for arguments to be saved in. */ if (((1L << 31) & reg_saved) != 0) { - save_regs[num_save++] = gen_rtx (REG, Pmode, 31); + save_regs[num_save++] = gen_rtx_REG (Pmode, 31); default_stack = 16; } @@ -1475,27 +1474,30 @@ expand_prologue () stack space is allocated. */ if (save_func_len < save_normal_len) { - save_all = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (num_save + (TARGET_V850 ? 2 : 1))); - XVECEXP (save_all, 0, 0) = gen_rtx (SET, VOIDmode, - stack_pointer_rtx, - gen_rtx (PLUS, Pmode, - stack_pointer_rtx, - GEN_INT (-alloc_stack))); + save_all = gen_rtx_PARALLEL + (VOIDmode, + rtvec_alloc (num_save + (TARGET_V850 ? 2 : 1))); + + XVECEXP (save_all, 0, 0) + = gen_rtx_SET (VOIDmode, + stack_pointer_rtx, + plus_constant (stack_pointer_rtx, -alloc_stack)); if (TARGET_V850) { XVECEXP (save_all, 0, num_save+1) - = gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, Pmode, 10)); + = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 10)); } offset = - default_stack; for (i = 0; i < num_save; i++) { XVECEXP (save_all, 0, i+1) - = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, Pmode, - plus_constant (stack_pointer_rtx, offset)), - save_regs[i]); + = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (Pmode, + plus_constant (stack_pointer_rtx, + offset)), + save_regs[i]); offset -= 4; } @@ -1546,18 +1548,18 @@ expand_prologue () /* Save the return pointer first. */ if (num_save > 0 && REGNO (save_regs[num_save-1]) == 31) { - emit_move_insn (gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, - offset)), + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, + offset)), save_regs[--num_save]); offset -= 4; } for (i = 0; i < num_save; i++) { - emit_move_insn (gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, - offset)), + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, + offset)), save_regs[i]); offset -= 4; } @@ -1576,7 +1578,7 @@ expand_prologue () GEN_INT (-diff))); else { - rtx reg = gen_rtx (REG, Pmode, 12); + rtx reg = gen_rtx_REG (Pmode, 12); emit_move_insn (reg, GEN_INT (-diff)); emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, reg)); } @@ -1622,14 +1624,14 @@ expand_epilogue () for (i = 1; i < 31; i++) { if (((1L << i) & reg_saved) != 0) - restore_regs[num_restore++] = gen_rtx (REG, Pmode, i); + restore_regs[num_restore++] = gen_rtx_REG (Pmode, i); } /* If the return pointer is saved, the helper functions also allocate 16 bytes of stack for arguments to be saved in. */ if (((1L << 31) & reg_saved) != 0) { - restore_regs[num_restore++] = gen_rtx (REG, Pmode, 31); + restore_regs[num_restore++] = gen_rtx_REG (Pmode, 31); default_stack = 16; } @@ -1658,23 +1660,24 @@ expand_epilogue () /* Don't bother checking if we don't actually save any space. */ if (restore_func_len < restore_normal_len) { - restore_all = gen_rtx (PARALLEL, VOIDmode, - rtvec_alloc (num_restore + 2)); - XVECEXP (restore_all, 0, 0) = gen_rtx (RETURN, VOIDmode); + restore_all = gen_rtx_PARALLEL (VOIDmode, + rtvec_alloc (num_restore + 2)); + XVECEXP (restore_all, 0, 0) = gen_rtx_RETURN (VOIDmode); XVECEXP (restore_all, 0, 1) - = gen_rtx (SET, VOIDmode, stack_pointer_rtx, - gen_rtx (PLUS, Pmode, - stack_pointer_rtx, - GEN_INT (alloc_stack))); + = gen_rtx_SET (VOIDmode, stack_pointer_rtx, + gen_rtx_PLUS (Pmode, + stack_pointer_rtx, + GEN_INT (alloc_stack))); offset = alloc_stack - 4; for (i = 0; i < num_restore; i++) { XVECEXP (restore_all, 0, i+2) - = gen_rtx (SET, VOIDmode, - restore_regs[i], - gen_rtx (MEM, Pmode, - plus_constant (stack_pointer_rtx, offset))); + = gen_rtx_SET (VOIDmode, + restore_regs[i], + gen_rtx_MEM (Pmode, + plus_constant (stack_pointer_rtx, + offset))); offset -= 4; } @@ -1692,7 +1695,7 @@ expand_epilogue () GEN_INT (actual_fsize))); else { - rtx reg = gen_rtx (REG, Pmode, 12); + rtx reg = gen_rtx_REG (Pmode, 12); emit_move_insn (reg, GEN_INT (actual_fsize)); emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, @@ -1735,7 +1738,7 @@ expand_epilogue () GEN_INT (diff))); else { - rtx reg = gen_rtx (REG, Pmode, 12); + rtx reg = gen_rtx_REG (Pmode, 12); emit_move_insn (reg, GEN_INT (diff)); emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, @@ -1756,18 +1759,18 @@ expand_epilogue () if (num_restore > 0 && REGNO (restore_regs[num_restore-1]) == 31) { emit_move_insn (restore_regs[--num_restore], - gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, - offset))); + gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, + offset))); offset -= 4; } for (i = 0; i < num_restore; i++) { emit_move_insn (restore_regs[i], - gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, - offset))); + gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, + offset))); offset -= 4; } diff --git a/gcc/config/v850/v850.h b/gcc/config/v850/v850.h index 19eab5fdaf8..661d1cd941a 100644 --- a/gcc/config/v850/v850.h +++ b/gcc/config/v850/v850.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. NEC V850 series - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GNU CC. @@ -740,13 +740,13 @@ extern int current_function_anonymous_args; otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 10) + gen_rtx_REG (TYPE_MODE (VALTYPE), 10) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, 10) + gen_rtx_REG (MODE, 10) /* 1 if N is a possible register number for a function value. */ @@ -796,9 +796,9 @@ extern int current_function_anonymous_args; #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 16)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 16)), \ (CXT)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 20)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 20)), \ (FNADDR)); \ } diff --git a/gcc/config/v850/v850.md b/gcc/config/v850/v850.md index 0ba10ca0cc0..7ca67bfd96e 100644 --- a/gcc/config/v850/v850.md +++ b/gcc/config/v850/v850.md @@ -1,7 +1,6 @@ ;; GCC machine description for NEC V850 -;; Copyright (C) 1996, 1997 Free Software Foundation, Inc. - -;; Contributed by Jeff Law (law@cygnus.com). +;; Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. +;; Contributed by Jeff Law (law@cygnus.com). ;; This file is part of GNU CC. @@ -163,10 +162,10 @@ else temp = gen_reg_rtx (SImode); - emit_insn (gen_rtx (SET, SImode, temp, - gen_rtx (HIGH, SImode, operand1))); - emit_insn (gen_rtx (SET, SImode, operand0, - gen_rtx (LO_SUM, SImode, temp, operand1))); + emit_insn (gen_rtx_SET (SImode, temp, + gen_rtx_HIGH (SImode, operand1))); + emit_insn (gen_rtx_SET (SImode, operand0, + gen_rtx_LO_SUM (SImode, temp, operand1))); DONE; } }") @@ -407,8 +406,8 @@ int log2 = exact_log2 (~INTVAL (operands[1]) & 0xffff); rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"clr1 %1,%0\", xoperands); return \"\"; @@ -426,8 +425,8 @@ int log2 = exact_log2 (~INTVAL (operands[1]) & 0xffffffff); rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"clr1 %1,%0\", xoperands); return \"\"; @@ -474,8 +473,9 @@ else { rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), + log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"set1 %1,%0\", xoperands); } @@ -498,8 +498,9 @@ else { rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), + log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"set1 %1,%0\", xoperands); } @@ -547,8 +548,9 @@ else { rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), + log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"not1 %1,%0\", xoperands); } @@ -571,8 +573,9 @@ else { rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), + log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"not1 %1,%0\", xoperands); } @@ -937,11 +940,11 @@ emit_insn (gen_ashlsi3 (reg, reg, GEN_INT (TARGET_BIG_SWITCH ? 2 : 1))); /* Load the table address into a pseudo. */ emit_insn (gen_movsi (tableaddress, - gen_rtx (LABEL_REF, VOIDmode, operands[3]))); + gen_rtx_LABEL_REF (VOIDmode, operands[3]))); /* Add the table address to the index. */ emit_insn (gen_addsi3 (reg, reg, tableaddress)); /* Load the table entry. */ - mem = gen_rtx (MEM, CASE_VECTOR_MODE, reg); + mem = gen_rtx_MEM (CASE_VECTOR_MODE, reg); RTX_UNCHANGING_P (mem); if (! TARGET_BIG_SWITCH) { diff --git a/gcc/config/v850/xm-v850.h b/gcc/config/v850/xm-v850.h index 1e43d033f6f..ee07cf5ec0d 100644 --- a/gcc/config/v850/xm-v850.h +++ b/gcc/config/v850/xm-v850.h @@ -1,5 +1,5 @@ /* Configuration for NEC V850. - Copyright (C) 1996 Free Software Foundation, Inc. + Copyright (C) 1996, 1998 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -34,15 +34,6 @@ Boston, MA 02111-1307, USA. */ #define SUCCESS_EXIT_CODE 0 #define FATAL_EXIT_CODE 33 -#ifdef __v850 -#ifndef __STDC__ -extern char *malloc (), *realloc (), *calloc (); -#else -extern void *malloc (), *realloc (), *calloc (); -#endif -extern void free (); -#endif - /* target machine dependencies. tm.h is a symbolic link to the actual target specific file. */ diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c index bac442a467d..e65563ed73b 100644 --- a/gcc/config/vax/vax.c +++ b/gcc/config/vax/vax.c @@ -19,7 +19,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -52,11 +52,11 @@ split_quadword_operands (operands, low, n) && (GET_CODE (XEXP (operands[i], 0)) == POST_INC)) { rtx addr = XEXP (operands[i], 0); - operands[i] = low[i] = gen_rtx (MEM, SImode, addr); + operands[i] = low[i] = gen_rtx_MEM (SImode, addr); if (which_alternative == 0 && i == 0) { addr = XEXP (operands[i], 0); - operands[i+1] = low[i+1] = gen_rtx (MEM, SImode, addr); + operands[i+1] = low[i+1] = gen_rtx_MEM (SImode, addr); } } else diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h index c0fe4699077..81eef130072 100644 --- a/gcc/config/vax/vax.h +++ b/gcc/config/vax/vax.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Vax version. - Copyright (C) 1987, 88, 91, 93-96, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 91, 93-97, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -343,8 +343,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; /* Given an rtx for the address of a frame, return an rtx for the address of the word in the frame that holds the dynamic chain--the previous frame's address. */ -#define DYNAMIC_CHAIN_ADDRESS(frame) \ -gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12)) +#define DYNAMIC_CHAIN_ADDRESS(FRAME) plus_constant ((FRAME), 12) /* If we generate an insn to push BYTES bytes, this says how many the stack pointer really advances by. @@ -373,14 +372,14 @@ gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12)) /* On the Vax the return value is in R0 regardless. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* On the Vax the return value is in R0 regardless. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* Define this if PCC uses the nonreentrant convention for returning structure and union values. */ @@ -526,14 +525,14 @@ gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12)) movl $STATIC,r0 (store the functions static chain) jmp *$FUNCTION (jump to function code at address FUNCTION) */ -#define TRAMPOLINE_TEMPLATE(FILE) \ -{ \ - ASM_OUTPUT_SHORT (FILE, const0_rtx); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x8fd0)); \ - ASM_OUTPUT_INT (FILE, const0_rtx); \ - ASM_OUTPUT_BYTE (FILE, 0x50+STATIC_CHAIN_REGNUM); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x9f17)); \ - ASM_OUTPUT_INT (FILE, const0_rtx); \ +#define TRAMPOLINE_TEMPLATE(FILE) \ +{ \ + ASM_OUTPUT_SHORT (FILE, const0_rtx); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x8fd0)); \ + ASM_OUTPUT_INT (FILE, const0_rtx); \ + ASM_OUTPUT_BYTE (FILE, 0x50 + STATIC_CHAIN_REGNUM); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x9f17)); \ + ASM_OUTPUT_INT (FILE, const0_rtx); \ } /* Length in units of the trampoline for entering a nested function. */ @@ -548,12 +547,12 @@ gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12)) to the start of the trampoline. */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_insn (gen_rtx (ASM_INPUT, VOIDmode, \ - "movpsl -(sp)\n\tpushal 1(pc)\n\trei")); \ - emit_move_insn (gen_rtx (MEM, HImode, TRAMP), \ - gen_rtx (MEM, HImode, FNADDR)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), CXT);\ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 11)), \ + emit_insn (gen_rtx_ASM_INPUT (VOIDmode, \ + "movpsl -(sp)\n\tpushal 1(pc)\n\trei")); \ + emit_move_insn (gen_rtx_MEM (HImode, TRAMP), \ + gen_rtx_MEM (HImode, FNADDR)); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT);\ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 11)), \ plus_constant (FNADDR, 2)); \ } @@ -569,7 +568,7 @@ gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12)) #define RETURN_ADDR_RTX(COUNT, FRAME) \ ((COUNT == 0) \ - ? gen_rtx (MEM, Pmode, plus_constant (FRAME, RETURN_ADDRESS_OFFSET)) \ + ? gen_rtx_MEM (Pmode, plus_constant (FRAME, RETURN_ADDRESS_OFFSET)) \ : (rtx) 0) diff --git a/gcc/config/vax/vax.md b/gcc/config/vax/vax.md index 18f916bfc28..d7db0a7c41b 100644 --- a/gcc/config/vax/vax.md +++ b/gcc/config/vax/vax.md @@ -1,5 +1,5 @@ -;;- Machine description for GNU compiler, Vax Version -;; Copyright (C) 1987, 88, 91, 94-96, 1998 Free Software Foundation, Inc. +;; Machine description for GNU compiler, Vax Version +;; Copyright (C) 1987, 88, 91, 94-96, 1998 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -874,7 +874,7 @@ "* { if (CONST_DOUBLE_HIGH (operands[3])) - operands[3] = gen_rtx (CONST_INT, VOIDmode, CONST_DOUBLE_LOW (operands[3])); + operands[3] = GEN_INT (CONST_DOUBLE_LOW (operands[3])); return \"emul %1,%2,%3,%0\"; }") @@ -956,7 +956,7 @@ } if (GET_CODE (op1) == CONST_INT) - operands[1] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (op1)); + operands[1] = GEN_INT (~INTVAL (op1)); else operands[1] = expand_unop (SImode, one_cmpl_optab, op1, 0, 1); }") @@ -978,7 +978,7 @@ } if (GET_CODE (op1) == CONST_INT) - operands[1] = gen_rtx (CONST_INT, VOIDmode, 65535 & ~INTVAL (op1)); + operands[1] = GEN_INT (65535 & ~INTVAL (op1)); else operands[1] = expand_unop (HImode, one_cmpl_optab, op1, 0, 1); }") @@ -1000,7 +1000,7 @@ } if (GET_CODE (op1) == CONST_INT) - operands[1] = gen_rtx (CONST_INT, VOIDmode, 255 & ~INTVAL (op1)); + operands[1] = GEN_INT (255 & ~INTVAL (op1)); else operands[1] = expand_unop (QImode, one_cmpl_optab, op1, 0, 1); }") @@ -1189,7 +1189,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -1237,7 +1237,7 @@ "" " { - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "ashldi3" @@ -1283,7 +1283,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "rotlsi3" @@ -1850,7 +1850,7 @@ if (INTVAL (operands[1]) > 255 * 4) /* Vax `calls' really uses only one byte of #args, so pop explicitly. */ return \"calls $0,%0\;addl2 %1,sp\"; - operands[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) + 3)/ 4); + operands[1] = GEN_INT ((INTVAL (operands[1]) + 3)/ 4); return \"calls %1,%0\"; ") @@ -1865,7 +1865,7 @@ if (INTVAL (operands[2]) > 255 * 4) /* Vax `calls' really uses only one byte of #args, so pop explicitly. */ return \"calls $0,%1\;addl2 %2,sp\"; - operands[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) + 3)/ 4); + operands[2] = GEN_INT ((INTVAL (operands[2]) + 3)/ 4); return \"calls %2,%1\"; ") @@ -1880,7 +1880,7 @@ if (INTVAL (operands[1]) > 255 * 4) /* Vax `calls' really uses only one byte of #args, so pop explicitly. */ return \"calls $0,%0\;addl2 %1,sp\"; - operands[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) + 3)/ 4); + operands[1] = GEN_INT ((INTVAL (operands[1]) + 3)/ 4); return \"calls %1,%0\"; ") @@ -1894,7 +1894,7 @@ if (INTVAL (operands[2]) > 255 * 4) /* Vax `calls' really uses only one byte of #args, so pop explicitly. */ return \"calls $0,%1\;addl2 %2,sp\"; - operands[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) + 3)/ 4); + operands[2] = GEN_INT ((INTVAL (operands[2]) + 3)/ 4); return \"calls %2,%1\"; ") @@ -2113,7 +2113,7 @@ unsigned long mask2 = (1 << (32 - INTVAL (operands[2]))) - 1; if ((mask1 & mask2) != mask1) - operands[3] = gen_rtx (CONST_INT, VOIDmode, mask1 & mask2); + operands[3] = GEN_INT (mask1 & mask2); return \"rotl %R2,%1,%0\;bicl2 %N3,%0\"; }") @@ -2131,7 +2131,7 @@ "" "* { - operands[3] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[3]) & ~((1 << INTVAL (operands[2])) - 1)); + operands[3] + = GEN_INT (INTVAL (operands[3]) & ~((1 << INTVAL (operands[2])) - 1)); return \"rotl %2,%1,%0\;bicl2 %N3,%0\"; }") diff --git a/gcc/config/we32k/we32k.c b/gcc/config/we32k/we32k.c index 091f3c6680b..7bb23f296ee 100644 --- a/gcc/config/we32k/we32k.c +++ b/gcc/config/we32k/we32k.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for AT&T we32000 Family. + Copyright (C) 1991, 1992, 1997, 1998 Free Software Foundation, Inc. Contributed by John Wehle (john@feith1.uucp) - Copyright (C) 1991, 1992, 1997 Free Software Foundation, Inc. This file is part of GNU CC. @@ -21,11 +21,10 @@ Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "real.h" - void output_move_double (operands) rtx *operands; @@ -36,7 +35,7 @@ output_move_double (operands) if (GET_CODE (operands[0]) == REG) { - lsw_operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); msw_dreg = operands[0]; } else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) @@ -46,7 +45,7 @@ output_move_double (operands) if (GET_CODE (operands[1]) == REG) { - lsw_operands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + lsw_operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); lsw_sreg = lsw_operands[1]; } else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1])) @@ -85,10 +84,8 @@ output_move_double (operands) } else if (GET_CODE (operands[1]) == CONST_DOUBLE) { - lsw_operands[1] = gen_rtx (CONST_INT, SImode, - CONST_DOUBLE_HIGH (operands[1])); - operands[1] = gen_rtx (CONST_INT, SImode, - CONST_DOUBLE_LOW (operands[1])); + lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); } else if (GET_CODE (operands[1]) == CONST_INT) { @@ -117,15 +114,13 @@ output_push_double (operands) rtx lsw_operands[1]; if (GET_CODE (operands[0]) == REG) - lsw_operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) lsw_operands[0] = adj_offsettable_operand (operands[0], 4); else if (GET_CODE (operands[0]) == CONST_DOUBLE) { - lsw_operands[0] = gen_rtx (CONST_INT, SImode, - CONST_DOUBLE_HIGH (operands[0])); - operands[0] = gen_rtx (CONST_INT, SImode, - CONST_DOUBLE_LOW (operands[0])); + lsw_operands[0] = GEN_INT CONST_DOUBLE_HIGH (operands[0])); + operands[0] = GEN_INT (CONST_DOUBLE_LOW (operands[0])); } else if (GET_CODE (operands[0]) == CONST_INT) { diff --git a/gcc/config/we32k/we32k.h b/gcc/config/we32k/we32k.h index 460fc3d2820..fef0db2dd81 100644 --- a/gcc/config/we32k/we32k.h +++ b/gcc/config/we32k/we32k.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. AT&T we32000 version. - Copyright (C) 1991, 92, 93, 94, 95, 1996 Free Software Foundation, Inc. + Copyright (C) 1991, 92, 93, 94, 95, 96, 1998 Free Software Foundation, Inc. Contributed by John Wehle (john@feith1.uucp) This file is part of GNU CC. @@ -319,14 +319,14 @@ enum reg_class { NO_REGS, GENERAL_REGS, /* On the we32000 the return value is in r0 regardless. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* On the we32000 the return value is in r0 regardless. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value. On the we32000, r0 is the only register thus used. */ @@ -478,15 +478,15 @@ enum reg_class { NO_REGS, GENERAL_REGS, mov #STATIC,%r8 jmp #FUNCTION */ -#define TRAMPOLINE_TEMPLATE(FILE) \ -{ \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x844f)); \ - ASM_OUTPUT_SHORT (FILE, const0_rtx); \ - ASM_OUTPUT_SHORT (FILE, const0_rtx); \ - ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0x48)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x247f)); \ - ASM_OUTPUT_SHORT (FILE, const0_rtx); \ - ASM_OUTPUT_SHORT (FILE, const0_rtx); \ +#define TRAMPOLINE_TEMPLATE(FILE) \ +{ \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x844f)); \ + ASM_OUTPUT_SHORT (FILE, const0_rtx); \ + ASM_OUTPUT_SHORT (FILE, const0_rtx); \ + ASM_OUTPUT_CHAR (FILE, GEN_INT (0x48)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x247f)); \ + ASM_OUTPUT_SHORT (FILE, const0_rtx); \ + ASM_OUTPUT_SHORT (FILE, const0_rtx); \ } /* Length in units of the trampoline for entering a nested function. */ @@ -499,8 +499,8 @@ enum reg_class { NO_REGS, GENERAL_REGS, #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 9)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 2)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 9)), FNADDR); \ } /* Generate calls to memcpy() and memset() rather diff --git a/gcc/config/we32k/we32k.md b/gcc/config/we32k/we32k.md index 216b1ff04e2..a8b6565c4c7 100644 --- a/gcc/config/we32k/we32k.md +++ b/gcc/config/we32k/we32k.md @@ -1,5 +1,5 @@ ;; Machine description for GNU compiler, AT&T we32000 Version -;; Copyright (C) 1991, 1992, 1994 Free Software Foundation, Inc. +;; Copyright (C) 1991, 1992, 1994, 1998 Free Software Foundation, Inc. ;; Contributed by John Wehle (john@feith1.uucp) ;; This file is part of GNU CC. @@ -125,7 +125,7 @@ rtx lsw_operands[3]; if (GET_CODE (operands[0]) == REG) - lsw_operands[0] = gen_rtx(REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) lsw_operands[0] = adj_offsettable_operand(operands[0], 4); @@ -133,17 +133,15 @@ abort(); if (GET_CODE (operands[2]) == REG) - lsw_operands[2] = gen_rtx(REG, SImode, REGNO (operands[2]) + 1); + lsw_operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2])) lsw_operands[2] = adj_offsettable_operand(operands[2], 4); else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - lsw_operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[2])); - operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[2])); + lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2])); } else if (GET_CODE (operands[2]) == CONST_INT) @@ -177,7 +175,7 @@ rtx lsw_operands[3]; if (GET_CODE (operands[0]) == REG) - lsw_operands[0] = gen_rtx(REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) lsw_operands[0] = adj_offsettable_operand(operands[0], 4); @@ -185,17 +183,15 @@ abort(); if (GET_CODE (operands[1]) == REG) - lsw_operands[1] = gen_rtx(REG, SImode, REGNO (operands[1]) + 1); + lsw_operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1])) lsw_operands[1] = adj_offsettable_operand(operands[1], 4); else if (GET_CODE (operands[1]) == CONST_DOUBLE) { - lsw_operands[1] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[1])); - operands[1] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[1])); + lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH(operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW(operands[1])); } else if (GET_CODE (operands[1]) == CONST_INT) @@ -207,17 +203,15 @@ abort(); if (GET_CODE (operands[2]) == REG) - lsw_operands[2] = gen_rtx(REG, SImode, REGNO (operands[2]) + 1); + lsw_operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2])) lsw_operands[2] = adj_offsettable_operand(operands[2], 4); else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - lsw_operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[2])); - operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[2])); + lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2])); } else if (GET_CODE (operands[2]) == CONST_INT) @@ -295,7 +289,7 @@ rtx lsw_operands[3]; if (GET_CODE (operands[0]) == REG) - lsw_operands[0] = gen_rtx(REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) lsw_operands[0] = adj_offsettable_operand(operands[0], 4); @@ -303,17 +297,15 @@ abort(); if (GET_CODE (operands[2]) == REG) - lsw_operands[2] = gen_rtx(REG, SImode, REGNO (operands[2]) + 1); + lsw_operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2])) lsw_operands[2] = adj_offsettable_operand(operands[2], 4); else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - lsw_operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[2])); - operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[2])); + lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2])); } else if (GET_CODE (operands[2]) == CONST_INT) @@ -347,7 +339,7 @@ rtx lsw_operands[3]; if (GET_CODE (operands[0]) == REG) - lsw_operands[0] = gen_rtx(REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) lsw_operands[0] = adj_offsettable_operand(operands[0], 4); @@ -355,17 +347,15 @@ abort(); if (GET_CODE (operands[1]) == REG) - lsw_operands[1] = gen_rtx(REG, SImode, REGNO (operands[1]) + 1); + lsw_operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1])) lsw_operands[1] = adj_offsettable_operand(operands[1], 4); else if (GET_CODE (operands[1]) == CONST_DOUBLE) { - lsw_operands[1] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[1])); - operands[1] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[1])); + lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH(operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW(operands[1])); } else if (GET_CODE (operands[1]) == CONST_INT) @@ -377,17 +367,15 @@ abort(); if (GET_CODE (operands[2]) == REG) - lsw_operands[2] = gen_rtx(REG, SImode, REGNO (operands[2]) + 1); + lsw_operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2])) lsw_operands[2] = adj_offsettable_operand(operands[2], 4); else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - lsw_operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[2])); - operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[2])); + lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2])); } else if (GET_CODE (operands[2]) == CONST_INT) @@ -770,7 +758,7 @@ if (GET_CODE (operands[1]) == CONST_INT && ((unsigned long)INTVAL (operands[1]) & 0x8000L)) - operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) | 0xffff0000L); + operands[1] = GEN_INT (INTVAL (operands[1]) | 0xffff0000L); output_asm_insn(\"CMPH %1, %0\",operands); @@ -786,7 +774,7 @@ if (GET_CODE (operands[1]) == CONST_INT && ((unsigned long)INTVAL (operands[1]) & 0x80L)) - operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) | 0xffffff00L); + operands[1] = GEN_INT (INTVAL(operands[1]) | 0xffffff00L); output_asm_insn(\"CMPB {sbyte}%1, {sbyte}%0\",operands); @@ -910,7 +898,7 @@ "* { - operands[2] = gen_rtx(CONST_INT, SImode, INTVAL(operands[2]) - 1); + operands[2] = GEN_INT (INTVAL(operands[2]) - 1); output_asm_insn(\"EXTFW %2, %3, %1, %0\",operands); return \"\"; @@ -925,7 +913,7 @@ "* { - operands[2] = gen_rtx(CONST_INT, SImode, INTVAL(operands[2]) - 1); + operands[2] = GEN_INT (INTVAL (operands[2]) - 1); output_asm_insn(\"EXTFH %2, %3, {uhalf}%1, {uword}%0\",operands); return \"\"; @@ -940,7 +928,7 @@ "* { - operands[2] = gen_rtx(CONST_INT, SImode, INTVAL(operands[2]) - 1); + operands[2] = GEN_INT (INTVAL (operands[2]) - 1); output_asm_insn(\"EXTFB %2, %3, {ubyte}%1, {uword}%0\",operands); return \"\"; @@ -955,7 +943,7 @@ "* { - operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) - 1); + operands[1] = GEN_INT (INTVAL (operands[1]) - 1); output_asm_insn(\"INSFW %1, %2, %3, %0\",operands); return \"\"; @@ -970,7 +958,7 @@ "* { - operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) - 1); + operands[1] = GEN_INT (INTVAL(operands[1]) - 1); output_asm_insn(\"INSFH %1, %2, {uword}%3, {uhalf}%0\",operands); return \"\"; @@ -985,7 +973,7 @@ "* { - operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) - 1); + operands[1] = GEN_INT (INTVAL(operands[1]) - 1); output_asm_insn(\"INSFB %1, %2, {uword}%3, {ubyte}%0\",operands); return \"\"; |