diff options
Diffstat (limited to 'gcc/config')
115 files changed, 2231 insertions, 823 deletions
diff --git a/gcc/config/alpha/alpha-protos.h b/gcc/config/alpha/alpha-protos.h index 20f1d152390..df2ae6814d2 100644 --- a/gcc/config/alpha/alpha-protos.h +++ b/gcc/config/alpha/alpha-protos.h @@ -78,7 +78,7 @@ extern void alpha_initialize_trampoline (rtx, rtx, rtx, int, int, int); extern void alpha_va_start (tree, rtx); extern rtx alpha_va_arg (tree, tree); extern rtx function_arg (CUMULATIVE_ARGS, enum machine_mode, tree, int); -extern rtx function_value (tree, tree, enum machine_mode); +extern rtx function_value (const_tree, const_tree, enum machine_mode); extern void alpha_start_function (FILE *, const char *, tree); extern void alpha_end_function (FILE *, const char *, tree); diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index de58de2bec9..48696b5ddbd 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -240,7 +240,7 @@ alpha_handle_option (size_t code, const char *arg, int value) /* Implement TARGET_MANGLE_TYPE. */ static const char * -alpha_mangle_type (tree type) +alpha_mangle_type (const_tree type) { if (TYPE_MAIN_VARIANT (type) == long_double_type_node && TARGET_LONG_DOUBLE_128) @@ -717,7 +717,7 @@ tls_symbolic_operand_type (rtx symbol) function in the current unit of translation. */ static bool -decl_has_samegp (tree decl) +decl_has_samegp (const_tree decl) { /* Functions that are not local can be overridden, and thus may not share the same gp. */ @@ -740,7 +740,7 @@ decl_has_samegp (tree decl) /* Return true if EXP should be placed in the small data section. */ static bool -alpha_in_small_data_p (tree exp) +alpha_in_small_data_p (const_tree exp) { /* We want to merge strings, so we never consider them small data. */ if (TREE_CODE (exp) == STRING_CST) @@ -5646,7 +5646,7 @@ alpha_arg_partial_bytes (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, /* Return true if TYPE must be returned in memory, instead of in registers. */ static bool -alpha_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED) +alpha_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) { enum machine_mode mode = VOIDmode; int size; @@ -5696,7 +5696,7 @@ alpha_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED) static bool alpha_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED, enum machine_mode mode, - tree type ATTRIBUTE_UNUSED, + const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { return mode == TFmode || mode == TCmode; @@ -5711,7 +5711,7 @@ alpha_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED, $f0 for floating-point functions. */ rtx -function_value (tree valtype, tree func ATTRIBUTE_UNUSED, +function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, enum machine_mode mode) { unsigned int regnum, dummy; @@ -5762,7 +5762,7 @@ function_value (tree valtype, tree func ATTRIBUTE_UNUSED, should not split these values. */ static bool -alpha_split_complex_arg (tree type) +alpha_split_complex_arg (const_tree type) { return TYPE_MODE (type) != TCmode; } @@ -5864,7 +5864,7 @@ va_list_skip_additions (tree lhs) current statement. */ static bool -alpha_stdarg_optimize_hook (struct stdarg_info *si, tree lhs, tree rhs) +alpha_stdarg_optimize_hook (struct stdarg_info *si, const_tree lhs, const_tree rhs) { tree base, offset, arg1, arg2; int offset_arg = 1; @@ -9751,7 +9751,7 @@ alpha_use_linkage (rtx linkage ATTRIBUTE_UNUSED, registers. */ static bool -unicosmk_must_pass_in_stack (enum machine_mode mode, tree type) +unicosmk_must_pass_in_stack (enum machine_mode mode, const_tree type) { if (type == NULL) return false; @@ -10650,7 +10650,7 @@ alpha_init_libfuncs (void) #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK alpha_output_mi_thunk_osf #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true #undef TARGET_STDARG_OPTIMIZE_HOOK #define TARGET_STDARG_OPTIMIZE_HOOK alpha_stdarg_optimize_hook #endif @@ -10664,11 +10664,11 @@ alpha_init_libfuncs (void) #define TARGET_MACHINE_DEPENDENT_REORG alpha_reorg #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_false +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_false #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY alpha_return_in_memory #undef TARGET_PASS_BY_REFERENCE diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index c743e7103b5..f381dded9cc 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -88,12 +88,12 @@ ;; On non-BWX targets, CQImode must be handled the similarly to HImode ;; when generating reloads. -(define_mode_macro RELOAD12 [QI HI CQI]) +(define_mode_iterator RELOAD12 [QI HI CQI]) (define_mode_attr reloadmode [(QI "qi") (HI "hi") (CQI "hi")]) -;; Other mode macros -(define_mode_macro I12MODE [QI HI]) -(define_mode_macro I48MODE [SI DI]) +;; Other mode iterators +(define_mode_iterator I12MODE [QI HI]) +(define_mode_iterator I48MODE [SI DI]) (define_mode_attr modesuffix [(SI "l") (DI "q")]) ;; Where necessary, the suffixes _le and _be are used to distinguish between @@ -6253,7 +6253,7 @@ ;; Vector operations -(define_mode_macro VEC [V8QI V4HI V2SI]) +(define_mode_iterator VEC [V8QI V4HI V2SI]) (define_expand "mov<mode>" [(set (match_operand:VEC 0 "nonimmediate_operand" "") diff --git a/gcc/config/alpha/sync.md b/gcc/config/alpha/sync.md index b9ed6a0fc6b..5c0d2840334 100644 --- a/gcc/config/alpha/sync.md +++ b/gcc/config/alpha/sync.md @@ -17,7 +17,7 @@ ;; along with GCC; see the file COPYING3. If not see ;; <http://www.gnu.org/licenses/>. -(define_code_macro FETCHOP [plus minus ior xor and]) +(define_code_iterator FETCHOP [plus minus ior xor and]) (define_code_attr fetchop_name [(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")]) (define_code_attr fetchop_pred diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h index b7f4f61610d..9eadf354b21 100644 --- a/gcc/config/arc/arc-protos.h +++ b/gcc/config/arc/arc-protos.h @@ -19,10 +19,12 @@ along with GCC; see the file COPYING3. If not see extern void arc_va_start (tree, rtx); +#ifdef RTX_CODE extern enum machine_mode arc_select_cc_mode (enum rtx_code, rtx, rtx); /* Define the function that build the compare insn for scc and bcc. */ extern struct rtx_def *gen_compare_reg (enum rtx_code, rtx, rtx); +#endif /* Declarations for various fns used in the .md file. */ extern const char *output_shift (rtx *); diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 827cc1e6f0b..a1e04af8c8f 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -94,9 +94,9 @@ static void arc_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, static bool arc_rtx_costs (rtx, int, int, int *); static int arc_address_cost (rtx); static void arc_external_libcall (rtx); -static bool arc_return_in_memory (tree, tree); +static bool arc_return_in_memory (const_tree, const_tree); static bool arc_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); + const_tree, bool); /* Initialize the GCC target structure. */ #undef TARGET_ASM_ALIGNED_HI_OP @@ -128,11 +128,11 @@ static bool arc_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, #define TARGET_ADDRESS_COST arc_address_cost #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY arc_return_in_memory @@ -2316,7 +2316,7 @@ arc_external_libcall (rtx fun ATTRIBUTE_UNUSED) /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -arc_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +arc_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { if (AGGREGATE_TYPE_P (type)) return true; @@ -2332,7 +2332,7 @@ arc_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) static bool arc_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { unsigned HOST_WIDE_INT size; diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 4e601a9e1f3..fd81903eae1 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -43,7 +43,7 @@ extern void arm_output_fn_unwind (FILE *, bool); #ifdef TREE_CODE -extern int arm_return_in_memory (tree); +extern int arm_return_in_memory (const_tree); #endif #ifdef RTX_CODE extern bool arm_vector_mode_supported_p (enum machine_mode); @@ -156,10 +156,10 @@ extern bool arm_output_addr_const_extra (FILE *, rtx); #if defined TREE_CODE extern rtx arm_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int); extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); -extern bool arm_pad_arg_upward (enum machine_mode, tree); +extern bool arm_pad_arg_upward (enum machine_mode, const_tree); extern bool arm_pad_reg_upward (enum machine_mode, tree, int); extern bool arm_needs_doubleword_align (enum machine_mode, tree); -extern rtx arm_function_value(tree, tree); +extern rtx arm_function_value(const_tree, const_tree); #endif extern int arm_apply_result_size (void); @@ -214,6 +214,6 @@ extern void arm_pr_long_calls (struct cpp_reader *); extern void arm_pr_no_long_calls (struct cpp_reader *); extern void arm_pr_long_calls_off (struct cpp_reader *); -extern const char *arm_mangle_type (tree); +extern const char *arm_mangle_type (const_tree); #endif /* ! GCC_ARM_PROTOS_H */ diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 6ec0f8c648a..fca424aa577 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -116,7 +116,7 @@ static tree arm_handle_notshared_attribute (tree *, tree, tree, int, bool *); static void arm_output_function_epilogue (FILE *, HOST_WIDE_INT); static void arm_output_function_prologue (FILE *, HOST_WIDE_INT); static void thumb1_output_function_prologue (FILE *, HOST_WIDE_INT); -static int arm_comp_type_attributes (tree, tree); +static int arm_comp_type_attributes (const_tree, const_tree); static void arm_set_default_type_attributes (tree); static int arm_adjust_cost (rtx, rtx, rtx, int); static int count_insns_for_constant (HOST_WIDE_INT, int); @@ -169,12 +169,12 @@ static void aof_asm_init_sections (void); static void arm_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int); static bool arm_pass_by_reference (CUMULATIVE_ARGS *, - enum machine_mode, tree, bool); -static bool arm_promote_prototypes (tree); + enum machine_mode, const_tree, bool); +static bool arm_promote_prototypes (const_tree); static bool arm_default_short_enums (void); static bool arm_align_anon_bitfield (void); -static bool arm_return_in_msb (tree); -static bool arm_must_pass_in_stack (enum machine_mode, tree); +static bool arm_return_in_msb (const_tree); +static bool arm_must_pass_in_stack (enum machine_mode, const_tree); #ifdef TARGET_UNWIND_INFO static void arm_unwind_emit (FILE *, rtx); static bool arm_output_ttype (rtx); @@ -299,9 +299,9 @@ static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; #define TARGET_INIT_LIBFUNCS arm_init_libfuncs #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES #define TARGET_PROMOTE_PROTOTYPES arm_promote_prototypes #undef TARGET_PASS_BY_REFERENCE @@ -2702,7 +2702,7 @@ arm_canonicalize_comparison (enum rtx_code code, enum machine_mode mode, /* Define how to find the value returned by a function. */ rtx -arm_function_value(tree type, tree func ATTRIBUTE_UNUSED) +arm_function_value(const_tree type, const_tree func ATTRIBUTE_UNUSED) { enum machine_mode mode; int unsignedp ATTRIBUTE_UNUSED; @@ -2755,7 +2755,7 @@ arm_apply_result_size (void) or in a register (false). This is called by the macro RETURN_IN_MEMORY. */ int -arm_return_in_memory (tree type) +arm_return_in_memory (const_tree type) { HOST_WIDE_INT size; @@ -3010,7 +3010,7 @@ arm_arg_partial_bytes (CUMULATIVE_ARGS *pcum, enum machine_mode mode, static bool arm_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED, - tree type, bool named ATTRIBUTE_UNUSED) + const_tree type, bool named ATTRIBUTE_UNUSED) { return type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST; } @@ -3185,7 +3185,7 @@ arm_handle_notshared_attribute (tree *node, are compatible, and 2 if they are nearly compatible (which causes a warning to be generated). */ static int -arm_comp_type_attributes (tree type1, tree type2) +arm_comp_type_attributes (const_tree type1, const_tree type2) { int l1, l2, s1, s2; @@ -6523,7 +6523,7 @@ coproc_secondary_reload_class (enum machine_mode mode, rtx x, bool wb) register. */ static bool -arm_return_in_msb (tree valtype) +arm_return_in_msb (const_tree valtype) { return (TARGET_AAPCS_BASED && BYTES_BIG_ENDIAN @@ -8179,7 +8179,7 @@ arm_reload_out_hi (rtx *operands) (padded to the size of a word) should be passed in a register. */ static bool -arm_must_pass_in_stack (enum machine_mode mode, tree type) +arm_must_pass_in_stack (enum machine_mode mode, const_tree type) { if (TARGET_AAPCS_BASED) return must_pass_in_stack_var_size (mode, type); @@ -8195,7 +8195,7 @@ arm_must_pass_in_stack (enum machine_mode mode, tree type) aggregate types are placed in the lowest memory address. */ bool -arm_pad_arg_upward (enum machine_mode mode, tree type) +arm_pad_arg_upward (enum machine_mode mode, const_tree type) { if (!TARGET_AAPCS_BASED) return DEFAULT_FUNCTION_ARG_PADDING(mode, type) == upward; @@ -18177,7 +18177,7 @@ arm_no_early_mul_dep (rtx producer, rtx consumer) using APCS or ATPCS. */ static bool -arm_promote_prototypes (tree t ATTRIBUTE_UNUSED) +arm_promote_prototypes (const_tree t ATTRIBUTE_UNUSED) { return !TARGET_AAPCS_BASED; } @@ -18966,7 +18966,7 @@ static arm_mangle_map_entry arm_mangle_map[] = { }; const char * -arm_mangle_type (tree type) +arm_mangle_type (const_tree type) { arm_mangle_map_entry *pos = arm_mangle_map; diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 26ba33f83ce..ac97a1fabf5 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -2401,7 +2401,7 @@ extern int making_const_table; fprintf (STREAM, "\t.thumb\n\t.thumb_func\n") ; \ } \ if (TARGET_POKE_FUNCTION_NAME) \ - arm_poke_function_name (STREAM, (char *) NAME); \ + arm_poke_function_name (STREAM, (const char *) NAME); \ } \ while (0) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 88c3ac4261c..4a63cfead94 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -309,12 +309,12 @@ (define_attr "ce_count" "" (const_int 1)) ;;--------------------------------------------------------------------------- -;; Mode macros +;; Mode iterators ; A list of modes that are exactly 64 bits in size. We use this to expand ; some splits that are the same for all modes when operating on ARM ; registers. -(define_mode_macro ANY64 [DI DF V8QI V4HI V2SI V2SF]) +(define_mode_iterator ANY64 [DI DF V8QI V4HI V2SI V2SF]) ;;--------------------------------------------------------------------------- ;; Predicates diff --git a/gcc/config/arm/iwmmxt.md b/gcc/config/arm/iwmmxt.md index 31aaf0f5df3..11188732bc7 100644 --- a/gcc/config/arm/iwmmxt.md +++ b/gcc/config/arm/iwmmxt.md @@ -20,10 +20,10 @@ ;; <http://www.gnu.org/licenses/>. ;; Integer element sizes implemented by IWMMXT. -(define_mode_macro VMMX [V2SI V4HI V8QI]) +(define_mode_iterator VMMX [V2SI V4HI V8QI]) ;; Integer element sizes for shifts. -(define_mode_macro VSHFT [V4HI V2SI DI]) +(define_mode_iterator VSHFT [V4HI V2SI DI]) ;; Determine element size suffix from vector mode. (define_mode_attr MMX_char [(V8QI "b") (V4HI "h") (V2SI "w") (DI "d")]) diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index fa5b16f7744..167367c5239 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -162,97 +162,97 @@ (UNSPEC_VZIP2 204)]) ;; Double-width vector modes. -(define_mode_macro VD [V8QI V4HI V2SI V2SF]) +(define_mode_iterator VD [V8QI V4HI V2SI V2SF]) ;; Double-width vector modes plus 64-bit elements. -(define_mode_macro VDX [V8QI V4HI V2SI V2SF DI]) +(define_mode_iterator VDX [V8QI V4HI V2SI V2SF DI]) ;; Same, without floating-point elements. -(define_mode_macro VDI [V8QI V4HI V2SI]) +(define_mode_iterator VDI [V8QI V4HI V2SI]) ;; Quad-width vector modes. -(define_mode_macro VQ [V16QI V8HI V4SI V4SF]) +(define_mode_iterator VQ [V16QI V8HI V4SI V4SF]) ;; Quad-width vector modes plus 64-bit elements. -(define_mode_macro VQX [V16QI V8HI V4SI V4SF V2DI]) +(define_mode_iterator VQX [V16QI V8HI V4SI V4SF V2DI]) ;; Same, without floating-point elements. -(define_mode_macro VQI [V16QI V8HI V4SI]) +(define_mode_iterator VQI [V16QI V8HI V4SI]) ;; Same, with TImode added, for moves. -(define_mode_macro VQXMOV [V16QI V8HI V4SI V4SF V2DI TI]) +(define_mode_iterator VQXMOV [V16QI V8HI V4SI V4SF V2DI TI]) ;; Opaque structure types wider than TImode. -(define_mode_macro VSTRUCT [EI OI CI XI]) +(define_mode_iterator VSTRUCT [EI OI CI XI]) ;; Number of instructions needed to load/store struct elements. FIXME! (define_mode_attr V_slen [(EI "2") (OI "2") (CI "3") (XI "4")]) ;; Opaque structure types used in table lookups (except vtbl1/vtbx1). -(define_mode_macro VTAB [TI EI OI]) +(define_mode_iterator VTAB [TI EI OI]) ;; vtbl<n> suffix for above modes. (define_mode_attr VTAB_n [(TI "2") (EI "3") (OI "4")]) ;; Widenable modes. -(define_mode_macro VW [V8QI V4HI V2SI]) +(define_mode_iterator VW [V8QI V4HI V2SI]) ;; Narrowable modes. -(define_mode_macro VN [V8HI V4SI V2DI]) +(define_mode_iterator VN [V8HI V4SI V2DI]) ;; All supported vector modes (except singleton DImode). -(define_mode_macro VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF V2DI]) +(define_mode_iterator VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF V2DI]) ;; All supported vector modes (except those with 64-bit integer elements). -(define_mode_macro VDQW [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF]) +(define_mode_iterator VDQW [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF]) ;; Supported integer vector modes (not 64 bit elements). -(define_mode_macro VDQIW [V8QI V16QI V4HI V8HI V2SI V4SI]) +(define_mode_iterator VDQIW [V8QI V16QI V4HI V8HI V2SI V4SI]) ;; Supported integer vector modes (not singleton DI) -(define_mode_macro VDQI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI]) +(define_mode_iterator VDQI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI]) ;; Vector modes, including 64-bit integer elements. -(define_mode_macro VDQX [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF DI V2DI]) +(define_mode_iterator VDQX [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF DI V2DI]) ;; Vector modes including 64-bit integer elements, but no floats. -(define_mode_macro VDQIX [V8QI V16QI V4HI V8HI V2SI V4SI DI V2DI]) +(define_mode_iterator VDQIX [V8QI V16QI V4HI V8HI V2SI V4SI DI V2DI]) ;; Vector modes for float->int conversions. -(define_mode_macro VCVTF [V2SF V4SF]) +(define_mode_iterator VCVTF [V2SF V4SF]) ;; Vector modes form int->float conversions. -(define_mode_macro VCVTI [V2SI V4SI]) +(define_mode_iterator VCVTI [V2SI V4SI]) ;; Vector modes for doubleword multiply-accumulate, etc. insns. -(define_mode_macro VMD [V4HI V2SI V2SF]) +(define_mode_iterator VMD [V4HI V2SI V2SF]) ;; Vector modes for quadword multiply-accumulate, etc. insns. -(define_mode_macro VMQ [V8HI V4SI V4SF]) +(define_mode_iterator VMQ [V8HI V4SI V4SF]) ;; Above modes combined. -(define_mode_macro VMDQ [V4HI V2SI V2SF V8HI V4SI V4SF]) +(define_mode_iterator VMDQ [V4HI V2SI V2SF V8HI V4SI V4SF]) ;; As VMD, but integer modes only. -(define_mode_macro VMDI [V4HI V2SI]) +(define_mode_iterator VMDI [V4HI V2SI]) ;; As VMQ, but integer modes only. -(define_mode_macro VMQI [V8HI V4SI]) +(define_mode_iterator VMQI [V8HI V4SI]) ;; Above modes combined. -(define_mode_macro VMDQI [V4HI V2SI V8HI V4SI]) +(define_mode_iterator VMDQI [V4HI V2SI V8HI V4SI]) ;; Modes with 8-bit and 16-bit elements. -(define_mode_macro VX [V8QI V4HI V16QI V8HI]) +(define_mode_iterator VX [V8QI V4HI V16QI V8HI]) ;; Modes with 8-bit elements. -(define_mode_macro VE [V8QI V16QI]) +(define_mode_iterator VE [V8QI V16QI]) ;; Modes with 64-bit elements only. -(define_mode_macro V64 [DI V2DI]) +(define_mode_iterator V64 [DI V2DI]) ;; Modes with 32-bit elements only. -(define_mode_macro V32 [V2SI V2SF V4SI V4SF]) +(define_mode_iterator V32 [V2SI V2SF V4SI V4SF]) ;; (Opposite) mode to convert to/from for above conversions. (define_mode_attr V_CVTTO [(V2SI "V2SF") (V2SF "V2SI") @@ -394,10 +394,10 @@ (DI "ti") (V2DI "oi")]) ;; Operations on two halves of a quadword vector. -(define_code_macro vqh_ops [plus smin smax umin umax]) +(define_code_iterator vqh_ops [plus smin smax umin umax]) ;; Same, without unsigned variants (for use with *SFmode pattern). -(define_code_macro vqhs_ops [plus smin smax]) +(define_code_iterator vqhs_ops [plus smin smax]) ;; Assembler mnemonics for above codes. (define_code_attr VQH_mnem [(plus "vadd") (smin "vmin") (smax "vmax") diff --git a/gcc/config/arm/pe.c b/gcc/config/arm/pe.c index be4dbb0d3f4..90bc7299386 100644 --- a/gcc/config/arm/pe.c +++ b/gcc/config/arm/pe.c @@ -39,8 +39,7 @@ extern int current_function_anonymous_args; tree current_class_type; /* FIXME */ int -arm_dllexport_p (decl) - tree decl; +arm_dllexport_p (tree decl) { tree exp; @@ -57,8 +56,7 @@ arm_dllexport_p (decl) /* Return nonzero if DECL is a dllimport'd object. */ int -arm_dllimport_p (decl) - tree decl; +arm_dllimport_p (tree decl) { tree imp; @@ -79,8 +77,7 @@ arm_dllimport_p (decl) /* Return nonzero if SYMBOL is marked as being dllexport'd. */ int -arm_dllexport_name_p (symbol) - const char * symbol; +arm_dllexport_name_p (const char *symbol) { return symbol[0] == ARM_PE_FLAG_CHAR && symbol[1] == 'e' && symbol[2] == '.'; } @@ -88,8 +85,7 @@ arm_dllexport_name_p (symbol) /* Return nonzero if SYMBOL is marked as being dllimport'd. */ int -arm_dllimport_name_p (symbol) - const char * symbol; +arm_dllimport_name_p (const char *symbol) { return symbol[0] == ARM_PE_FLAG_CHAR && symbol[1] == 'i' && symbol[2] == '.'; } @@ -98,8 +94,7 @@ arm_dllimport_name_p (symbol) Note that we override the previous setting (e.g.: dllimport). */ void -arm_mark_dllexport (decl) - tree decl; +arm_mark_dllexport (tree decl) { const char * oldname; char * newname; @@ -134,8 +129,7 @@ arm_mark_dllexport (decl) /* Mark a DECL as being dllimport'd. */ void -arm_mark_dllimport (decl) - tree decl; +arm_mark_dllimport (tree decl) { const char * oldname; char * newname; @@ -201,10 +195,7 @@ arm_mark_dllimport (decl) } void -arm_pe_encode_section_info (decl, rtl, first) - tree decl; - rtx rtl; - int first ATTRIBUTE_UNUSED; +arm_pe_encode_section_info (tree decl, rtx rtl, int first ATTRIBUTE_UNUSED) { /* This bit is copied from arm_encode_section_info. */ if (optimize > 0 && TREE_CONSTANT (decl)) @@ -239,9 +230,7 @@ arm_pe_encode_section_info (decl, rtl, first) } void -arm_pe_unique_section (decl, reloc) - tree decl; - int reloc; +arm_pe_unique_section (tree decl, int reloc) { int len; const char * name; diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md index f963472a4b2..858d381eed0 100644 --- a/gcc/config/arm/vec-common.md +++ b/gcc/config/arm/vec-common.md @@ -21,16 +21,16 @@ ;; Vector Moves ;; All integer and float modes supported by Neon and IWMMXT. -(define_mode_macro VALL [V2DI V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF]) +(define_mode_iterator VALL [V2DI V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF]) ;; All integer and float modes supported by Neon and IWMMXT, except V2DI. -(define_mode_macro VALLW [V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF]) +(define_mode_iterator VALLW [V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF]) ;; All integer modes supported by Neon and IWMMXT -(define_mode_macro VINT [V2DI V2SI V4HI V8QI V4SI V8HI V16QI]) +(define_mode_iterator VINT [V2DI V2SI V4HI V8QI V4SI V8HI V16QI]) ;; All integer modes supported by Neon and IWMMXT, except V2DI -(define_mode_macro VINTW [V2SI V4HI V8QI V4SI V8HI V16QI]) +(define_mode_iterator VINTW [V2SI V4HI V8QI V4SI V8HI V16QI]) (define_expand "mov<mode>" [(set (match_operand:VALL 0 "nonimmediate_operand" "") diff --git a/gcc/config/avr/avr-protos.h b/gcc/config/avr/avr-protos.h index cc5b9401b9a..7d04b7aaa91 100644 --- a/gcc/config/avr/avr-protos.h +++ b/gcc/config/avr/avr-protos.h @@ -43,7 +43,7 @@ extern void asm_output_external (FILE *file, tree decl, char *name); extern int avr_progmem_p (tree decl, tree attributes); #ifdef RTX_CODE /* inside TREE_CODE */ -extern rtx avr_function_value (tree type, tree func); +extern rtx avr_function_value (const_tree type, const_tree func); extern void init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, rtx libname, tree fndecl); extern rtx function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index 019278d91ee..1382479369f 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -78,7 +78,7 @@ static void avr_asm_out_dtor (rtx, int); static int avr_operand_rtx_cost (rtx, enum machine_mode, enum rtx_code); static bool avr_rtx_costs (rtx, int, int, int *); static int avr_address_cost (rtx); -static bool avr_return_in_memory (tree, tree); +static bool avr_return_in_memory (const_tree, const_tree); static struct machine_function * avr_init_machine_status (void); /* Allocate registers from r25 to r8 for parameters for function calls. */ #define FIRST_CUM_REG 26 @@ -4475,7 +4475,7 @@ avr_assemble_integer (rtx x, unsigned int size, int aligned_p) void gas_output_limited_string(FILE *file, const char *str) { - const unsigned char *_limited_str = (unsigned char *) str; + const unsigned char *_limited_str = (const unsigned char *) str; unsigned ch; fprintf (file, "%s\"", STRING_ASM_OP); for (; (ch = *_limited_str); _limited_str++) @@ -4528,7 +4528,7 @@ gas_output_ascii(FILE *file, const char *str, size_t length) fprintf (file, "\"\n"); bytes_in_chunk = 0; } - gas_output_limited_string (file, (char*)_ascii_bytes); + gas_output_limited_string (file, (const char*)_ascii_bytes); _ascii_bytes = p; } else @@ -5615,7 +5615,7 @@ avr_libcall_value (enum machine_mode mode) function returns a value of data type VALTYPE. */ rtx -avr_function_value (tree type, tree func ATTRIBUTE_UNUSED) +avr_function_value (const_tree type, const_tree func ATTRIBUTE_UNUSED) { unsigned int offs; @@ -5935,7 +5935,7 @@ avr_asm_out_dtor (rtx symbol, int priority) /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -avr_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +avr_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { if (TYPE_MODE (type) == BLKmode) { diff --git a/gcc/config/bfin/bfin-protos.h b/gcc/config/bfin/bfin-protos.h index f99e0bcef8c..ad5e7b4b930 100644 --- a/gcc/config/bfin/bfin-protos.h +++ b/gcc/config/bfin/bfin-protos.h @@ -86,7 +86,7 @@ extern void asm_conditional_branch (rtx, rtx *, int, int); extern rtx bfin_gen_compare (rtx, Mmode); extern int bfin_local_alignment (tree, int); -extern int bfin_return_in_memory (tree); +extern int bfin_return_in_memory (const_tree); extern void initialize_trampoline (rtx, rtx, rtx); extern bool bfin_legitimate_address_p (Mmode, rtx, int); extern rtx bfin_va_arg (tree, tree); diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index a946ba66d48..7b2f9880641 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -140,7 +140,8 @@ conditional_register_usage (void) /* Examine machine-dependent attributes of function type FUNTYPE and return its type. See the definition of E_FUNKIND. */ -static e_funkind funkind (tree funtype) +static e_funkind +funkind (const_tree funtype) { tree attrs = TYPE_ATTRIBUTES (funtype); if (lookup_attribute ("interrupt_handler", attrs)) @@ -1310,26 +1311,31 @@ print_operand (FILE *file, rtx x, char code) case REG: if (code == 'h') { - gcc_assert (REGNO (x) < 32); - fprintf (file, "%s", short_reg_names[REGNO (x)]); - /*fprintf (file, "\n%d\n ", REGNO (x));*/ - break; + if (REGNO (x) < 32) + fprintf (file, "%s", short_reg_names[REGNO (x)]); + else + output_operand_lossage ("invalid operand for code '%c'", code); } else if (code == 'd') { - gcc_assert (REGNO (x) < 32); - fprintf (file, "%s", high_reg_names[REGNO (x)]); - break; + if (REGNO (x) < 32) + fprintf (file, "%s", high_reg_names[REGNO (x)]); + else + output_operand_lossage ("invalid operand for code '%c'", code); } else if (code == 'w') { - gcc_assert (REGNO (x) == REG_A0 || REGNO (x) == REG_A1); - fprintf (file, "%s.w", reg_names[REGNO (x)]); + if (REGNO (x) == REG_A0 || REGNO (x) == REG_A1) + fprintf (file, "%s.w", reg_names[REGNO (x)]); + else + output_operand_lossage ("invalid operand for code '%c'", code); } else if (code == 'x') { - gcc_assert (REGNO (x) == REG_A0 || REGNO (x) == REG_A1); - fprintf (file, "%s.x", reg_names[REGNO (x)]); + if (REGNO (x) == REG_A0 || REGNO (x) == REG_A1) + fprintf (file, "%s.x", reg_names[REGNO (x)]); + else + output_operand_lossage ("invalid operand for code '%c'", code); } else if (code == 'v') { @@ -1342,18 +1348,24 @@ print_operand (FILE *file, rtx x, char code) } else if (code == 'D') { - fprintf (file, "%s", dregs_pair_names[REGNO (x)]); + if (D_REGNO_P (REGNO (x))) + fprintf (file, "%s", dregs_pair_names[REGNO (x)]); + else + output_operand_lossage ("invalid operand for code '%c'", code); } else if (code == 'H') { - gcc_assert (mode == DImode || mode == DFmode); - gcc_assert (REG_P (x)); - fprintf (file, "%s", reg_names[REGNO (x) + 1]); + if ((mode == DImode || mode == DFmode) && REG_P (x)) + fprintf (file, "%s", reg_names[REGNO (x) + 1]); + else + output_operand_lossage ("invalid operand for code '%c'", code); } else if (code == 'T') { - gcc_assert (D_REGNO_P (REGNO (x))); - fprintf (file, "%s", byte_reg_names[REGNO (x)]); + if (D_REGNO_P (REGNO (x))) + fprintf (file, "%s", byte_reg_names[REGNO (x)]); + else + output_operand_lossage ("invalid operand for code '%c'", code); } else fprintf (file, "%s", reg_names[REGNO (x)]); @@ -1608,7 +1620,7 @@ bfin_arg_partial_bytes (CUMULATIVE_ARGS *cum, enum machine_mode mode, static bool bfin_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED, - tree type, bool named ATTRIBUTE_UNUSED) + const_tree type, bool named ATTRIBUTE_UNUSED) { return type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST; } @@ -1618,7 +1630,7 @@ bfin_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, RETURN_IN_MEMORY. */ int -bfin_return_in_memory (tree type) +bfin_return_in_memory (const_tree type) { int size = int_size_in_bytes (type); return size > 2 * UNITS_PER_WORD || size == -1; @@ -1867,8 +1879,30 @@ bfin_expand_call (rtx retval, rtx fnaddr, rtx callarg1, rtx cookie, int sibcall) if (TARGET_FDPIC) { + int caller_has_l1_text, callee_has_l1_text; + + caller_has_l1_text = callee_has_l1_text = 0; + + if (lookup_attribute ("l1_text", + DECL_ATTRIBUTES (cfun->decl)) != NULL_TREE) + caller_has_l1_text = 1; + + if (GET_CODE (callee) == SYMBOL_REF + && SYMBOL_REF_DECL (callee) && DECL_P (SYMBOL_REF_DECL (callee)) + && lookup_attribute + ("l1_text", + DECL_ATTRIBUTES (SYMBOL_REF_DECL (callee))) != NULL_TREE) + callee_has_l1_text = 1; + if (GET_CODE (callee) != SYMBOL_REF - || bfin_longcall_p (callee, INTVAL (cookie))) + || bfin_longcall_p (callee, INTVAL (cookie)) + || (GET_CODE (callee) == SYMBOL_REF + && !SYMBOL_REF_LOCAL_P (callee) + && TARGET_INLINE_PLT) + || caller_has_l1_text != callee_has_l1_text + || (caller_has_l1_text && callee_has_l1_text + && (GET_CODE (callee) != SYMBOL_REF + || !SYMBOL_REF_LOCAL_P (callee)))) { rtx addr = callee; if (! address_operand (addr, Pmode)) @@ -4567,7 +4601,7 @@ handle_int_attribute (tree *node, tree name, warning to be generated). */ static int -bfin_comp_type_attributes (tree type1, tree type2) +bfin_comp_type_attributes (const_tree type1, const_tree type2) { e_funkind kind1, kind2; @@ -4631,6 +4665,91 @@ bfin_handle_longcall_attribute (tree *node, tree name, return NULL_TREE; } +/* Handle a "l1_text" attribute; arguments as in + struct attribute_spec.handler. */ + +static tree +bfin_handle_l1_text_attribute (tree *node, tree name, tree ARG_UNUSED (args), + int ARG_UNUSED (flags), bool *no_add_attrs) +{ + tree decl = *node; + + if (TREE_CODE (decl) != FUNCTION_DECL) + { + error ("`%s' attribute only applies to functions", + IDENTIFIER_POINTER (name)); + *no_add_attrs = true; + } + + /* The decl may have already been given a section attribute + from a previous declaration. Ensure they match. */ + else if (DECL_SECTION_NAME (decl) != NULL_TREE + && strcmp (TREE_STRING_POINTER (DECL_SECTION_NAME (decl)), + ".l1.text") != 0) + { + error ("section of %q+D conflicts with previous declaration", + decl); + *no_add_attrs = true; + } + else + DECL_SECTION_NAME (decl) = build_string (9, ".l1.text"); + + return NULL_TREE; +} + +/* Handle a "l1_data", "l1_data_A" or "l1_data_B" attribute; + arguments as in struct attribute_spec.handler. */ + +static tree +bfin_handle_l1_data_attribute (tree *node, tree name, tree ARG_UNUSED (args), + int ARG_UNUSED (flags), bool *no_add_attrs) +{ + tree decl = *node; + + if (TREE_CODE (decl) != VAR_DECL) + { + error ("`%s' attribute only applies to variables", + IDENTIFIER_POINTER (name)); + *no_add_attrs = true; + } + else if (current_function_decl != NULL_TREE + && !TREE_STATIC (decl)) + { + error ("`%s' attribute cannot be specified for local variables", + IDENTIFIER_POINTER (name)); + *no_add_attrs = true; + } + else + { + const char *section_name; + + if (strcmp (IDENTIFIER_POINTER (name), "l1_data") == 0) + section_name = ".l1.data"; + else if (strcmp (IDENTIFIER_POINTER (name), "l1_data_A") == 0) + section_name = ".l1.data.A"; + else if (strcmp (IDENTIFIER_POINTER (name), "l1_data_B") == 0) + section_name = ".l1.data.B"; + else + gcc_unreachable (); + + /* The decl may have already been given a section attribute + from a previous declaration. Ensure they match. */ + if (DECL_SECTION_NAME (decl) != NULL_TREE + && strcmp (TREE_STRING_POINTER (DECL_SECTION_NAME (decl)), + section_name) != 0) + { + error ("section of %q+D conflicts with previous declaration", + decl); + *no_add_attrs = true; + } + else + DECL_SECTION_NAME (decl) + = build_string (strlen (section_name) + 1, section_name); + } + + return NULL_TREE; +} + /* Table of valid machine attributes. */ const struct attribute_spec bfin_attribute_table[] = { @@ -4643,6 +4762,10 @@ const struct attribute_spec bfin_attribute_table[] = { "saveall", 0, 0, false, true, true, NULL }, { "longcall", 0, 0, false, true, true, bfin_handle_longcall_attribute }, { "shortcall", 0, 0, false, true, true, bfin_handle_longcall_attribute }, + { "l1_text", 0, 0, true, false, false, bfin_handle_l1_text_attribute }, + { "l1_data", 0, 0, true, false, false, bfin_handle_l1_data_attribute }, + { "l1_data_A", 0, 0, true, false, false, bfin_handle_l1_data_attribute }, + { "l1_data_B", 0, 0, true, false, false, bfin_handle_l1_data_attribute }, { NULL, 0, 0, false, false, false, NULL } }; @@ -5288,25 +5411,25 @@ bfin_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, || GET_MODE (target) != V2HImode || ! (*insn_data[icode].operand[0].predicate) (target, V2HImode)) target = gen_reg_rtx (tmode); - if (! register_operand (op0, GET_MODE (op0))) - op0 = copy_to_mode_reg (GET_MODE (op0), op0); if (! register_operand (op1, GET_MODE (op1))) op1 = copy_to_mode_reg (GET_MODE (op1), op1); + if (! register_operand (op2, GET_MODE (op2))) + op2 = copy_to_mode_reg (GET_MODE (op2), op2); tmp1 = gen_reg_rtx (SImode); tmp2 = gen_reg_rtx (SImode); - emit_insn (gen_ashlsi3 (tmp1, gen_lowpart (SImode, op2), GEN_INT (16))); - emit_move_insn (tmp2, gen_lowpart (SImode, op2)); + emit_insn (gen_ashlsi3 (tmp1, gen_lowpart (SImode, op0), GEN_INT (16))); + emit_move_insn (tmp2, gen_lowpart (SImode, op0)); emit_insn (gen_movstricthi_1 (gen_lowpart (HImode, tmp2), const0_rtx)); emit_insn (gen_load_accumulator_pair (accvec, tmp1, tmp2)); - emit_insn (gen_flag_macv2hi_parts_acconly (accvec, op0, op1, const0_rtx, + emit_insn (gen_flag_macv2hi_parts_acconly (accvec, op1, op2, const0_rtx, const0_rtx, const0_rtx, const1_rtx, accvec, const0_rtx, const0_rtx, GEN_INT (MACFLAG_W32))); tmp1 = (fcode == BFIN_BUILTIN_CPLX_MAC_16 ? const1_rtx : const0_rtx); tmp2 = (fcode == BFIN_BUILTIN_CPLX_MAC_16 ? const0_rtx : const1_rtx); - emit_insn (gen_flag_macv2hi_parts (target, op0, op1, const1_rtx, + emit_insn (gen_flag_macv2hi_parts (target, op1, op2, const1_rtx, const1_rtx, const1_rtx, const0_rtx, accvec, tmp1, tmp2, GEN_INT (MACFLAG_NONE), accvec)); @@ -5365,7 +5488,7 @@ bfin_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK bfin_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true #undef TARGET_SCHED_ADJUST_COST #define TARGET_SCHED_ADJUST_COST bfin_adjust_cost @@ -5374,11 +5497,11 @@ bfin_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, #define TARGET_SCHED_ISSUE_RATE bfin_issue_rate #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_ARG_PARTIAL_BYTES #define TARGET_ARG_PARTIAL_BYTES bfin_arg_partial_bytes diff --git a/gcc/config/bfin/bfin.h b/gcc/config/bfin/bfin.h index 9cb017e0a20..fa6eed349c2 100644 --- a/gcc/config/bfin/bfin.h +++ b/gcc/config/bfin/bfin.h @@ -76,6 +76,8 @@ extern int target_flags; builtin_define ("__BFIN_FDPIC__"); \ if (TARGET_ID_SHARED_LIBRARY) \ builtin_define ("__ID_SHARED_LIB__"); \ + if (flag_no_builtin) \ + builtin_define ("__NO_BUILTIN"); \ } \ while (0) #endif @@ -89,9 +91,9 @@ extern int target_flags; # define SUBTARGET_DRIVER_SELF_SPECS #endif -#define LINK_GCC_C_SEQUENCE_SPEC \ - "%{mfdpic:%{!static: %L} %{static: %G %L %G}} \ - %{!mfdpic:%G %L %G}" +#define LINK_GCC_C_SEQUENCE_SPEC "\ + %{mfast-fp:-lbffastfp} %G %L %{mfast-fp:-lbffastfp} %G \ +" /* A C string constant that tells the GCC driver program options to pass to the assembler. It can also specify how to translate options you give to GNU diff --git a/gcc/config/bfin/bfin.md b/gcc/config/bfin/bfin.md index 44ee6831fd0..e465cd54e0b 100644 --- a/gcc/config/bfin/bfin.md +++ b/gcc/config/bfin/bfin.md @@ -875,7 +875,7 @@ ;; DImode logical operations -(define_code_macro any_logical [and ior xor]) +(define_code_iterator any_logical [and ior xor]) (define_code_attr optab [(and "and") (ior "ior") (xor "xor")]) @@ -3544,7 +3544,7 @@ [(set_attr "type" "dsp32")]) -(define_code_macro s_or_u [sign_extend zero_extend]) +(define_code_iterator s_or_u [sign_extend zero_extend]) (define_code_attr su_optab [(sign_extend "mul") (zero_extend "umul")]) (define_code_attr su_modifier [(sign_extend "IS") diff --git a/gcc/config/bfin/bfin.opt b/gcc/config/bfin/bfin.opt index 6836033a6e7..56d37b54a93 100644 --- a/gcc/config/bfin/bfin.opt +++ b/gcc/config/bfin/bfin.opt @@ -64,10 +64,18 @@ mlong-calls Target Report Mask(LONG_CALLS) Avoid generating pc-relative calls; use indirection +mfast-fp +Target Report Mask(FAST_FP) +Link with the fast floating-point library + mfdpic Target Report Mask(FDPIC) Enable Function Descriptor PIC mode +minline-plt +Target Report Mask(INLINE_PLT) +Enable inlining of PLT in function calls + mstack-check-l1 Target Report Mask(STACK_CHECK_L1) Do stack checking using bounds in L1 scratch memory diff --git a/gcc/config/bfin/linux.h b/gcc/config/bfin/linux.h index d391cd0a1fe..486bb776b39 100644 --- a/gcc/config/bfin/linux.h +++ b/gcc/config/bfin/linux.h @@ -35,7 +35,8 @@ asm (TEXT_SECTION_ASM_OP); #undef LINK_GCC_C_SEQUENCE_SPEC #define LINK_GCC_C_SEQUENCE_SPEC \ - "%{mfast-fp:-lbffastfp} %{static:--start-group} %G %L %{static:--end-group}%{!static:%G}" + "%{static:--start-group} %{mfast-fp:-lbffastfp} %G %L %{static:--end-group} \ + %{!static:%{mfast-fp:-lbffastfp} %G}" #undef LINK_SPEC #define LINK_SPEC "\ diff --git a/gcc/config/c4x/c4x-c.c b/gcc/config/c4x/c4x-c.c index 2bc5c9ac471..3e132b5d9fd 100644 --- a/gcc/config/c4x/c4x-c.c +++ b/gcc/config/c4x/c4x-c.c @@ -60,10 +60,7 @@ static int c4x_parse_pragma (const char *, tree *, tree *); do { warning (OPT_Wpragmas, gmsgid, arg); return -1; } while (0) static int -c4x_parse_pragma (name, func, sect) - const char *name; - tree *func; - tree *sect; +c4x_parse_pragma (const char *name, tree *func, tree *sect) { tree f, s, x; @@ -93,8 +90,7 @@ c4x_parse_pragma (name, func, sect) } void -c4x_pr_CODE_SECTION (pfile) - cpp_reader *pfile ATTRIBUTE_UNUSED; +c4x_pr_CODE_SECTION (cpp_reader *pfile ATTRIBUTE_UNUSED) { tree func, sect; @@ -106,8 +102,7 @@ c4x_pr_CODE_SECTION (pfile) } void -c4x_pr_DATA_SECTION (pfile) - cpp_reader *pfile ATTRIBUTE_UNUSED; +c4x_pr_DATA_SECTION (cpp_reader *pfile ATTRIBUTE_UNUSED) { tree func, sect; @@ -119,8 +114,7 @@ c4x_pr_DATA_SECTION (pfile) } void -c4x_pr_FUNC_IS_PURE (pfile) - cpp_reader *pfile ATTRIBUTE_UNUSED; +c4x_pr_FUNC_IS_PURE (cpp_reader *pfile ATTRIBUTE_UNUSED) { tree func; @@ -130,8 +124,7 @@ c4x_pr_FUNC_IS_PURE (pfile) } void -c4x_pr_FUNC_NEVER_RETURNS (pfile) - cpp_reader *pfile ATTRIBUTE_UNUSED; +c4x_pr_FUNC_NEVER_RETURNS (cpp_reader *pfile ATTRIBUTE_UNUSED) { tree func; @@ -141,8 +134,7 @@ c4x_pr_FUNC_NEVER_RETURNS (pfile) } void -c4x_pr_INTERRUPT (pfile) - cpp_reader *pfile ATTRIBUTE_UNUSED; +c4x_pr_INTERRUPT (cpp_reader *pfile ATTRIBUTE_UNUSED) { tree func; @@ -154,7 +146,6 @@ c4x_pr_INTERRUPT (pfile) /* Used for FUNC_CANNOT_INLINE, FUNC_EXT_CALLED, FUNC_IS_SYSTEM, FUNC_NO_GLOBAL_ASG, and FUNC_NO_IND_ASG. */ void -c4x_pr_ignored (pfile) - cpp_reader *pfile ATTRIBUTE_UNUSED; +c4x_pr_ignored (cpp_reader *pfile ATTRIBUTE_UNUSED) { } diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c index 4b3eddff5d2..02c52b02394 100644 --- a/gcc/config/cris/cris.c +++ b/gcc/config/cris/cris.c @@ -119,7 +119,7 @@ static void cris_init_libfuncs (void); static bool cris_rtx_costs (rtx, int, int, int *); static int cris_address_cost (rtx); static bool cris_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); + const_tree, bool); static int cris_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); static tree cris_md_asm_clobbers (tree, tree, tree); @@ -169,7 +169,7 @@ int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION; #define TARGET_ADDRESS_COST cris_address_cost #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_STRUCT_VALUE_RTX #define TARGET_STRUCT_VALUE_RTX cris_struct_value_rtx #undef TARGET_SETUP_INCOMING_VARARGS @@ -870,9 +870,8 @@ cris_print_operand (FILE *file, rtx x, int code) case 'e': /* Like 'E', but ignore state set by 'x'. FIXME: Use code - iterators ("code macros") and attributes in cris.md to avoid - the need for %x and %E (and %e) and state passed between - those modifiers. */ + iterators and attributes in cris.md to avoid the need for %x + and %E (and %e) and state passed between those modifiers. */ cris_output_insn_is_bound = 0; /* FALL THROUGH. */ case 'E': @@ -3403,7 +3402,7 @@ cris_setup_incoming_varargs (CUMULATIVE_ARGS *ca, static bool cris_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { return (targetm.calls.must_pass_in_stack (mode, type) diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md index 3f414d78dd6..f9b0e927af3 100644 --- a/gcc/config/cris/cris.md +++ b/gcc/config/cris/cris.md @@ -150,9 +150,9 @@ ;; Iterator definitions. ;; For the "usual" pattern size alternatives. -(define_mode_macro BWD [SI HI QI]) -(define_mode_macro WD [SI HI]) -(define_mode_macro BW [HI QI]) +(define_mode_iterator BWD [SI HI QI]) +(define_mode_iterator WD [SI HI]) +(define_mode_iterator BW [HI QI]) (define_mode_attr S [(SI "HI") (HI "QI")]) (define_mode_attr s [(SI "hi") (HI "qi")]) (define_mode_attr m [(SI ".d") (HI ".w") (QI ".b")]) @@ -160,19 +160,19 @@ (define_mode_attr nbitsm1 [(SI "31") (HI "15") (QI "7")]) ;; For the sign_extend+zero_extend variants. -(define_code_macro szext [sign_extend zero_extend]) +(define_code_iterator szext [sign_extend zero_extend]) (define_code_attr u [(sign_extend "") (zero_extend "u")]) (define_code_attr su [(sign_extend "s") (zero_extend "u")]) ;; For the shift variants. -(define_code_macro shift [ashiftrt lshiftrt ashift]) -(define_code_macro shiftrt [ashiftrt lshiftrt]) +(define_code_iterator shift [ashiftrt lshiftrt ashift]) +(define_code_iterator shiftrt [ashiftrt lshiftrt]) (define_code_attr shlr [(ashiftrt "ashr") (lshiftrt "lshr") (ashift "ashl")]) (define_code_attr slr [(ashiftrt "asr") (lshiftrt "lsr") (ashift "lsl")]) -(define_code_macro ncond [eq ne gtu ltu geu leu]) -(define_code_macro ocond [gt le]) -(define_code_macro rcond [lt ge]) +(define_code_iterator ncond [eq ne gtu ltu geu leu]) +(define_code_iterator ocond [gt le]) +(define_code_iterator rcond [lt ge]) (define_code_attr CC [(eq "eq") (ne "ne") (gt "gt") (gtu "hi") (lt "lt") (ltu "lo") (ge "ge") (geu "hs") (le "le") (leu "ls")]) (define_code_attr rCC [(eq "ne") (ne "eq") (gt "le") (gtu "ls") (lt "ge") diff --git a/gcc/config/crx/crx.c b/gcc/config/crx/crx.c index 44bf277570f..5be938bc06d 100644 --- a/gcc/config/crx/crx.c +++ b/gcc/config/crx/crx.c @@ -135,7 +135,7 @@ rtx crx_compare_op1 = NULL_RTX; static bool crx_fixed_condition_code_regs (unsigned int *, unsigned int *); static rtx crx_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, int incoming ATTRIBUTE_UNUSED); -static bool crx_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED); +static bool crx_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED); static int crx_address_cost (rtx); /*****************************************************************************/ @@ -204,7 +204,7 @@ crx_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, /* Implements hook TARGET_RETURN_IN_MEMORY. */ static bool -crx_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +crx_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { if (TYPE_MODE (type) == BLKmode) { diff --git a/gcc/config/crx/crx.md b/gcc/config/crx/crx.md index 89c344ef063..b9655544ffc 100644 --- a/gcc/config/crx/crx.md +++ b/gcc/config/crx/crx.md @@ -73,12 +73,12 @@ ;; Mode Macro Definitions -(define_mode_macro ALLMT [QI HI SI SF DI DF]) -(define_mode_macro CRXMM [QI HI SI SF]) -(define_mode_macro CRXIM [QI HI SI]) -(define_mode_macro DIDFM [DI DF]) -(define_mode_macro SISFM [SI SF]) -(define_mode_macro SHORT [QI HI]) +(define_mode_iterator ALLMT [QI HI SI SF DI DF]) +(define_mode_iterator CRXMM [QI HI SI SF]) +(define_mode_iterator CRXIM [QI HI SI]) +(define_mode_iterator DIDFM [DI DF]) +(define_mode_iterator SISFM [SI SF]) +(define_mode_iterator SHORT [QI HI]) (define_mode_attr tIsa [(QI "b") (HI "w") (SI "d") (SF "d")]) (define_mode_attr lImmArith [(QI "4") (HI "4") (SI "6")]) @@ -94,20 +94,20 @@ ;; Code Macro Definitions -(define_code_macro sz_xtnd [sign_extend zero_extend]) +(define_code_iterator sz_xtnd [sign_extend zero_extend]) (define_code_attr sIsa [(sign_extend "") (zero_extend "u")]) (define_code_attr sPat [(sign_extend "s") (zero_extend "u")]) (define_code_attr szPat [(sign_extend "") (zero_extend "zero_")]) (define_code_attr szIsa [(sign_extend "s") (zero_extend "z")]) -(define_code_macro sh_oprnd [ashift ashiftrt lshiftrt]) +(define_code_iterator sh_oprnd [ashift ashiftrt lshiftrt]) (define_code_attr shIsa [(ashift "ll") (ashiftrt "ra") (lshiftrt "rl")]) (define_code_attr shPat [(ashift "ashl") (ashiftrt "ashr") (lshiftrt "lshr")]) -(define_code_macro mima_oprnd [smax umax smin umin]) +(define_code_iterator mima_oprnd [smax umax smin umin]) (define_code_attr mimaIsa [(smax "maxs") (umax "maxu") (smin "mins") (umin "minu")]) -(define_code_macro any_cond [eq ne gt gtu lt ltu ge geu le leu]) +(define_code_iterator any_cond [eq ne gt gtu lt ltu ge geu le leu]) ;; Addition Instructions diff --git a/gcc/config/darwin-protos.h b/gcc/config/darwin-protos.h index 5a0a2c45712..a8ce17c0111 100644 --- a/gcc/config/darwin-protos.h +++ b/gcc/config/darwin-protos.h @@ -84,7 +84,7 @@ extern void darwin_asm_output_dwarf_delta (FILE *, int, const char *, const char *); extern void darwin_asm_output_dwarf_offset (FILE *, int, const char *, section *); -extern bool darwin_binds_local_p (tree); +extern bool darwin_binds_local_p (const_tree); extern void darwin_cpp_builtins (struct cpp_reader *); extern void darwin_asm_output_anchor (rtx symbol); extern bool darwin_kextabi_p (void); diff --git a/gcc/config/darwin.c b/gcc/config/darwin.c index c532e9dff0c..92ffb821cbb 100644 --- a/gcc/config/darwin.c +++ b/gcc/config/darwin.c @@ -267,7 +267,7 @@ machopic_define_symbol (rtx mem) SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_DEFINED; } -static GTY(()) char * function_base; +static GTY(()) const char * function_base; const char * machopic_function_base_name (void) @@ -276,8 +276,7 @@ machopic_function_base_name (void) gcc_assert (!MACHO_DYNAMIC_NO_PIC_P); if (function_base == NULL) - function_base = - (char *) ggc_alloc_string ("<pic base>", sizeof ("<pic base>")); + function_base = ggc_alloc_string ("<pic base>", sizeof ("<pic base>")); current_function_uses_pic_offset_table = 1; @@ -1672,7 +1671,7 @@ darwin_file_end (void) functions at dynamic-link time, except for vtables in kexts. */ bool -darwin_binds_local_p (tree decl) +darwin_binds_local_p (const_tree decl) { return default_binds_local_p_1 (decl, TARGET_KEXTABI && DARWIN_VTABLE_P (decl)); diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c index 6458ea14cdd..7856f879090 100644 --- a/gcc/config/fr30/fr30.c +++ b/gcc/config/fr30/fr30.c @@ -122,7 +122,7 @@ static struct fr30_frame_info zero_frame_info; static void fr30_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int); -static bool fr30_must_pass_in_stack (enum machine_mode, tree); +static bool fr30_must_pass_in_stack (enum machine_mode, const_tree); static int fr30_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); @@ -153,7 +153,7 @@ static int fr30_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, #define TARGET_ASM_ALIGNED_SI_OP "\t.word\t" #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_PASS_BY_REFERENCE #define TARGET_PASS_BY_REFERENCE hook_pass_by_reference_must_pass_in_stack #undef TARGET_ARG_PARTIAL_BYTES @@ -669,7 +669,7 @@ fr30_print_operand (FILE *file, rtx x, int code) in registers. */ static bool -fr30_must_pass_in_stack (enum machine_mode mode, tree type) +fr30_must_pass_in_stack (enum machine_mode mode, const_tree type) { if (mode == BLKmode) return true; diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c index 3498cfc689a..9c31b8bb500 100644 --- a/gcc/config/frv/frv.c +++ b/gcc/config/frv/frv.c @@ -270,7 +270,7 @@ frv_cpu_t frv_cpu_type = CPU_TYPE; /* value of -mcpu= */ static bool frv_handle_option (size_t, const char *, int); static int frv_default_flags_for_cpu (void); -static int frv_string_begins_with (tree, const char *); +static int frv_string_begins_with (const_tree, const char *); static FRV_INLINE bool frv_small_data_reloc_p (rtx, int); static void frv_print_operand_memory_reference_reg (FILE *, rtx); @@ -358,7 +358,7 @@ static bool frv_assemble_integer (rtx, unsigned, int); static void frv_init_builtins (void); static rtx frv_expand_builtin (tree, rtx, rtx, enum machine_mode, int); static void frv_init_libfuncs (void); -static bool frv_in_small_data_p (tree); +static bool frv_in_small_data_p (const_tree); static void frv_asm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static void frv_setup_incoming_varargs (CUMULATIVE_ARGS *, @@ -375,7 +375,7 @@ static void frv_output_const_unspec (FILE *, const struct frv_unspec *); static bool frv_function_ok_for_sibcall (tree, tree); static rtx frv_struct_value_rtx (tree, int); -static bool frv_must_pass_in_stack (enum machine_mode mode, tree type); +static bool frv_must_pass_in_stack (enum machine_mode mode, const_tree type); static int frv_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); static void frv_output_dwarf_dtprel (FILE *, int, rtx) @@ -833,9 +833,9 @@ frv_optimization_options (int level, int size ATTRIBUTE_UNUSED) /* Return true if NAME (a STRING_CST node) begins with PREFIX. */ static int -frv_string_begins_with (tree name, const char *prefix) +frv_string_begins_with (const_tree name, const char *prefix) { - int prefix_len = strlen (prefix); + const int prefix_len = strlen (prefix); /* Remember: NAME's length includes the null terminator. */ return (TREE_STRING_LENGTH (name) > prefix_len @@ -3114,7 +3114,7 @@ frv_init_cumulative_args (CUMULATIVE_ARGS *cum, in registers. */ static bool -frv_must_pass_in_stack (enum machine_mode mode, tree type) +frv_must_pass_in_stack (enum machine_mode mode, const_tree type) { if (mode == BLKmode) return true; @@ -9430,10 +9430,10 @@ frv_expand_builtin (tree exp, } static bool -frv_in_small_data_p (tree decl) +frv_in_small_data_p (const_tree decl) { HOST_WIDE_INT size; - tree section_name; + const_tree section_name; /* Don't apply the -G flag to internal compiler structures. We should leave such structures in the main data section, partly diff --git a/gcc/config/frv/frv.md b/gcc/config/frv/frv.md index 7c16293d8e4..f8451747b9a 100644 --- a/gcc/config/frv/frv.md +++ b/gcc/config/frv/frv.md @@ -86,7 +86,7 @@ (FDPIC_REG 15) ]) -(define_mode_macro IMODE [QI HI SI DI]) +(define_mode_iterator IMODE [QI HI SI DI]) (define_mode_attr IMODEsuffix [(QI "b") (HI "h") (SI "") (DI "d")]) (define_mode_attr BREADsuffix [(QI "ub") (HI "uh") (SI "") (DI "d")]) diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c index 4e3113a6303..96b6311ce7c 100644 --- a/gcc/config/h8300/h8300.c +++ b/gcc/config/h8300/h8300.c @@ -5706,7 +5706,7 @@ h8300_init_libfuncs (void) /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -h8300_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +h8300_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { return (TYPE_MODE (type) == BLKmode || GET_MODE_SIZE (TYPE_MODE (type)) > (TARGET_H8300 ? 4 : 8)); diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index 31cfc47c55a..a12a4f114f1 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -133,8 +133,8 @@ extern rtx ix86_libcall_value (enum machine_mode); extern bool ix86_function_value_regno_p (int); extern bool ix86_function_arg_regno_p (int); extern int ix86_function_arg_boundary (enum machine_mode, tree); -extern int ix86_return_in_memory (tree); -extern int ix86_sol10_return_in_memory (tree); +extern int ix86_return_in_memory (const_tree); +extern int ix86_sol10_return_in_memory (const_tree); extern void ix86_va_start (tree, rtx); extern rtx ix86_va_arg (tree, tree); @@ -211,9 +211,9 @@ extern void i386_pe_declare_function_type (FILE *, const char *, int); extern void i386_pe_record_external_function (tree, const char *); extern void i386_pe_maybe_record_exported_symbol (tree, const char *, int); extern void i386_pe_encode_section_info (tree, rtx, int); -extern bool i386_pe_binds_local_p (tree); +extern bool i386_pe_binds_local_p (const_tree); extern const char *i386_pe_strip_name_encoding_full (const char *); -extern bool i386_pe_valid_dllimport_attribute_p (tree); +extern bool i386_pe_valid_dllimport_attribute_p (const_tree); extern unsigned int i386_pe_section_type_flags (tree, const char *, int); extern void i386_pe_asm_named_section (const char *, unsigned int, tree); extern void i386_pe_asm_output_aligned_decl_common (FILE *, tree, diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index e094efe79d2..a98dcfb3cf6 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -1573,8 +1573,8 @@ static bool ext_80387_constants_init = 0; static struct machine_function * ix86_init_machine_status (void); -static rtx ix86_function_value (tree, tree, bool); -static int ix86_function_regparm (tree, tree); +static rtx ix86_function_value (const_tree, const_tree, bool); +static int ix86_function_regparm (const_tree, const_tree); static void ix86_compute_frame_layout (struct ix86_frame *); static bool ix86_expand_vector_init_one_nonzero (bool, enum machine_mode, rtx, rtx, int); @@ -1620,6 +1620,10 @@ static int ix86_isa_flags_explicit; #define OPTION_MASK_ISA_SSE4A_UNSET OPTION_MASK_ISA_SSE4 +/* Vectorization library interface and handlers. */ +tree (*ix86_veclib_handler)(enum built_in_function, tree, tree) = NULL; +static tree ix86_veclibabi_acml (enum built_in_function, tree, tree); + /* Implement TARGET_HANDLE_OPTION. */ static bool @@ -2409,6 +2413,16 @@ override_options (void) if (!TARGET_80387) target_flags &= ~MASK_FLOAT_RETURNS; + /* Use external vectorized library in vectorizing intrinsics. */ + if (ix86_veclibabi_string) + { + if (strcmp (ix86_veclibabi_string, "acml") == 0) + ix86_veclib_handler = ix86_veclibabi_acml; + else + error ("unknown vectorization library ABI type (%s) for " + "-mveclibabi= switch", ix86_veclibabi_string); + } + if ((x86_accumulate_outgoing_args & ix86_tune_mask) && !(target_flags_explicit & MASK_ACCUMULATE_OUTGOING_ARGS) && !optimize_size) @@ -2905,7 +2919,7 @@ ix86_handle_cconv_attribute (tree *node, tree name, warning to be generated). */ static int -ix86_comp_type_attributes (tree type1, tree type2) +ix86_comp_type_attributes (const_tree type1, const_tree type2) { /* Check for mismatch of non-default calling convention. */ const char *const rtdstr = TARGET_RTD ? "cdecl" : "stdcall"; @@ -2938,7 +2952,7 @@ ix86_comp_type_attributes (tree type1, tree type2) or considering a libcall. */ static int -ix86_function_regparm (tree type, tree decl) +ix86_function_regparm (const_tree type, const_tree decl) { tree attr; int regparm = ix86_regparm; @@ -2957,7 +2971,8 @@ ix86_function_regparm (tree type, tree decl) if (decl && TREE_CODE (decl) == FUNCTION_DECL && flag_unit_at_a_time && !profile_flag) { - struct cgraph_local_info *i = cgraph_local_info (decl); + /* FIXME: remove this CONST_CAST when cgraph.[ch] is constified. */ + struct cgraph_local_info *i = cgraph_local_info ((tree)CONST_CAST(decl)); if (i && i->local) { int local_regparm, globals = 0, regno; @@ -3011,7 +3026,7 @@ ix86_function_regparm (tree type, tree decl) indirectly or considering a libcall. Otherwise return 0. */ static int -ix86_function_sseregparm (tree type, tree decl) +ix86_function_sseregparm (const_tree type, const_tree decl) { gcc_assert (!TARGET_64BIT); @@ -3038,7 +3053,8 @@ ix86_function_sseregparm (tree type, tree decl) (and DFmode for SSE2) arguments in SSE registers. */ if (decl && TARGET_SSE_MATH && flag_unit_at_a_time && !profile_flag) { - struct cgraph_local_info *i = cgraph_local_info (decl); + /* FIXME: remove this CONST_CAST when cgraph.[ch] is constified. */ + struct cgraph_local_info *i = cgraph_local_info ((tree)CONST_CAST(decl)); if (i && i->local) return TARGET_SSE2 ? 2 : 1; } @@ -3182,7 +3198,7 @@ ix86_function_arg_regno_p (int regno) /* Return if we do not know how to pass TYPE solely in registers. */ static bool -ix86_must_pass_in_stack (enum machine_mode mode, tree type) +ix86_must_pass_in_stack (enum machine_mode mode, const_tree type) { if (must_pass_in_stack_var_size_or_pad (mode, type)) return true; @@ -3263,7 +3279,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, /* Argument info to initialize */ the middle-end decides to do with these vector types. */ static enum machine_mode -type_natural_mode (tree type) +type_natural_mode (const_tree type) { enum machine_mode mode = TYPE_MODE (type); @@ -3377,7 +3393,7 @@ merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2) */ static int -classify_argument (enum machine_mode mode, tree type, +classify_argument (enum machine_mode mode, const_tree type, enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset) { HOST_WIDE_INT bytes = @@ -3649,7 +3665,7 @@ classify_argument (enum machine_mode mode, tree type, /* Examine the argument and return set number of register required in each class. Return 0 iff parameter should be passed in memory. */ static int -examine_argument (enum machine_mode mode, tree type, int in_return, +examine_argument (enum machine_mode mode, const_tree type, int in_return, int *int_nregs, int *sse_nregs) { enum x86_64_reg_class regclass[MAX_CLASSES]; @@ -3692,7 +3708,7 @@ examine_argument (enum machine_mode mode, tree type, int in_return, static rtx construct_container (enum machine_mode mode, enum machine_mode orig_mode, - tree type, int in_return, int nintregs, int nsseregs, + const_tree type, int in_return, int nintregs, int nsseregs, const int *intreg, int sse_regno) { /* The following variables hold the static issued_error state. */ @@ -4191,7 +4207,7 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode omode, static bool ix86_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED, - tree type, bool named ATTRIBUTE_UNUSED) + const_tree type, bool named ATTRIBUTE_UNUSED) { if (TARGET_64BIT_MS_ABI) { @@ -4342,7 +4358,7 @@ ix86_function_value_regno_p (int regno) static rtx function_value_32 (enum machine_mode orig_mode, enum machine_mode mode, - tree fntype, tree fn) + const_tree fntype, const_tree fn) { unsigned int regno; @@ -4381,7 +4397,7 @@ function_value_32 (enum machine_mode orig_mode, enum machine_mode mode, static rtx function_value_64 (enum machine_mode orig_mode, enum machine_mode mode, - tree valtype) + const_tree valtype) { rtx ret; @@ -4438,10 +4454,10 @@ function_value_ms_64 (enum machine_mode orig_mode, enum machine_mode mode) } static rtx -ix86_function_value_1 (tree valtype, tree fntype_or_decl, +ix86_function_value_1 (const_tree valtype, const_tree fntype_or_decl, enum machine_mode orig_mode, enum machine_mode mode) { - tree fn, fntype; + const_tree fn, fntype; fn = NULL_TREE; if (fntype_or_decl && DECL_P (fntype_or_decl)) @@ -4457,7 +4473,7 @@ ix86_function_value_1 (tree valtype, tree fntype_or_decl, } static rtx -ix86_function_value (tree valtype, tree fntype_or_decl, +ix86_function_value (const_tree valtype, const_tree fntype_or_decl, bool outgoing ATTRIBUTE_UNUSED) { enum machine_mode mode, orig_mode; @@ -4476,7 +4492,7 @@ ix86_libcall_value (enum machine_mode mode) /* Return true iff type is returned in memory. */ static int -return_in_memory_32 (tree type, enum machine_mode mode) +return_in_memory_32 (const_tree type, enum machine_mode mode) { HOST_WIDE_INT size; @@ -4516,14 +4532,14 @@ return_in_memory_32 (tree type, enum machine_mode mode) } static int -return_in_memory_64 (tree type, enum machine_mode mode) +return_in_memory_64 (const_tree type, enum machine_mode mode) { int needed_intregs, needed_sseregs; return !examine_argument (mode, type, 1, &needed_intregs, &needed_sseregs); } static int -return_in_memory_ms_64 (tree type, enum machine_mode mode) +return_in_memory_ms_64 (const_tree type, enum machine_mode mode) { HOST_WIDE_INT size = int_size_in_bytes (type); @@ -4536,9 +4552,9 @@ return_in_memory_ms_64 (tree type, enum machine_mode mode) } int -ix86_return_in_memory (tree type) +ix86_return_in_memory (const_tree type) { - enum machine_mode mode = type_natural_mode (type); + const enum machine_mode mode = type_natural_mode (type); if (TARGET_64BIT_MS_ABI) return return_in_memory_ms_64 (type, mode); @@ -4554,7 +4570,7 @@ ix86_return_in_memory (tree type) are returned in memory, rather than in MMX registers. */ int -ix86_sol10_return_in_memory (tree type) +ix86_sol10_return_in_memory (const_tree type) { int size; enum machine_mode mode = type_natural_mode (type); @@ -8495,6 +8511,8 @@ get_some_local_dynamic_name (void) X -- don't print any sort of PIC '@' suffix for a symbol. & -- print some in-use local-dynamic symbol name. H -- print a memory address offset by 8; used for sse high-parts + + -- print a branch hint as 'cs' or 'ds' prefix + ; -- print a semicolon (after prefixes due to bug in older gas). */ void @@ -8776,6 +8794,15 @@ print_operand (FILE *file, rtx x, int code) } return; } + + case ';': +#if TARGET_MACHO + fputs (" ; ", file); +#else + fputc (' ', file); +#endif + return; + default: output_operand_lossage ("invalid operand code '%c'", code); } @@ -11460,26 +11487,24 @@ ix86_expand_fp_compare (enum rtx_code code, rtx op0, rtx op1, rtx scratch, ix86_fp_comparison_codes (code, &bypass_code, &first_code, &second_code); /* Do fcomi/sahf based test when profitable. */ - if ((TARGET_CMOVE || TARGET_SAHF) + if (ix86_fp_comparison_arithmetics_cost (code) > cost && (bypass_code == UNKNOWN || bypass_test) - && (second_code == UNKNOWN || second_test) - && ix86_fp_comparison_arithmetics_cost (code) > cost) + && (second_code == UNKNOWN || second_test)) { + tmp = gen_rtx_COMPARE (fpcmp_mode, op0, op1); + tmp = gen_rtx_SET (VOIDmode, gen_rtx_REG (fpcmp_mode, FLAGS_REG), + tmp); if (TARGET_CMOVE) - { - tmp = gen_rtx_COMPARE (fpcmp_mode, op0, op1); - tmp = gen_rtx_SET (VOIDmode, gen_rtx_REG (fpcmp_mode, FLAGS_REG), - tmp); - emit_insn (tmp); - } + emit_insn (tmp); else { - tmp = gen_rtx_COMPARE (fpcmp_mode, op0, op1); - tmp2 = gen_rtx_UNSPEC (HImode, gen_rtvec (1, tmp), UNSPEC_FNSTSW); + gcc_assert (TARGET_SAHF); + if (!scratch) scratch = gen_reg_rtx (HImode); - emit_insn (gen_rtx_SET (VOIDmode, scratch, tmp2)); - emit_insn (gen_x86_sahf_1 (scratch)); + tmp2 = gen_rtx_CLOBBER (VOIDmode, scratch); + + emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, tmp, tmp2))); } /* The FP codes work out to act like unsigned. */ @@ -11706,8 +11731,7 @@ ix86_expand_branch (enum rtx_code code, rtx label) /* Check whether we will use the natural sequence with one jump. If so, we can expand jump early. Otherwise delay expansion by creating compound insn to not confuse optimizers. */ - if (bypass_code == UNKNOWN && second_code == UNKNOWN - && TARGET_CMOVE) + if (bypass_code == UNKNOWN && second_code == UNKNOWN) { ix86_split_fp_branch (code, ix86_compare_op0, ix86_compare_op1, gen_rtx_LABEL_REF (VOIDmode, label), @@ -19924,33 +19948,122 @@ ix86_builtin_vectorized_function (unsigned int fn, tree type_out, if (out_mode == DFmode && out_n == 2 && in_mode == DFmode && in_n == 2) return ix86_builtins[IX86_BUILTIN_SQRTPD]; - return NULL_TREE; + break; case BUILT_IN_SQRTF: if (out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) return ix86_builtins[IX86_BUILTIN_SQRTPS]; - return NULL_TREE; + break; case BUILT_IN_LRINT: if (out_mode == SImode && out_n == 4 && in_mode == DFmode && in_n == 2) return ix86_builtins[IX86_BUILTIN_VEC_PACK_SFIX]; - return NULL_TREE; + break; case BUILT_IN_LRINTF: if (out_mode == SImode && out_n == 4 && in_mode == SFmode && in_n == 4) return ix86_builtins[IX86_BUILTIN_CVTPS2DQ]; - return NULL_TREE; + break; default: ; } + /* Dispatch to a handler for a vectorization library. */ + if (ix86_veclib_handler) + return (*ix86_veclib_handler)(fn, type_out, type_in); + return NULL_TREE; } +/* Handler for an ACML-style interface to a library with vectorized + intrinsics. */ + +static tree +ix86_veclibabi_acml (enum built_in_function fn, tree type_out, tree type_in) +{ + char name[20] = "__vr.._"; + tree fntype, new_fndecl, args; + unsigned arity; + const char *bname; + enum machine_mode el_mode, in_mode; + int n, in_n; + + /* The ACML is 64bits only and suitable for unsafe math only as + it does not correctly support parts of IEEE with the required + precision such as denormals. */ + if (!TARGET_64BIT + || !flag_unsafe_math_optimizations) + return NULL_TREE; + + el_mode = TYPE_MODE (TREE_TYPE (type_out)); + n = TYPE_VECTOR_SUBPARTS (type_out); + in_mode = TYPE_MODE (TREE_TYPE (type_in)); + in_n = TYPE_VECTOR_SUBPARTS (type_in); + if (el_mode != in_mode + || n != in_n) + return NULL_TREE; + + switch (fn) + { + case BUILT_IN_SIN: + case BUILT_IN_COS: + case BUILT_IN_EXP: + case BUILT_IN_LOG: + case BUILT_IN_LOG2: + case BUILT_IN_LOG10: + name[4] = 'd'; + name[5] = '2'; + if (el_mode != DFmode + || n != 2) + return NULL_TREE; + break; + + case BUILT_IN_SINF: + case BUILT_IN_COSF: + case BUILT_IN_EXPF: + case BUILT_IN_POWF: + case BUILT_IN_LOGF: + case BUILT_IN_LOG2F: + case BUILT_IN_LOG10F: + name[4] = 's'; + name[5] = '4'; + if (el_mode != SFmode + || n != 4) + return NULL_TREE; + break; + + default: + return NULL_TREE; + } + + bname = IDENTIFIER_POINTER (DECL_NAME (implicit_built_in_decls[fn])); + sprintf (name + 7, "%s", bname+10); + + arity = 0; + for (args = DECL_ARGUMENTS (implicit_built_in_decls[fn]); args; + args = TREE_CHAIN (args)) + arity++; + + if (arity == 1) + fntype = build_function_type_list (type_out, type_in, NULL); + else + fntype = build_function_type_list (type_out, type_in, type_in, NULL); + + /* Build a function declaration for the vectorized function. */ + new_fndecl = build_decl (FUNCTION_DECL, get_identifier (name), fntype); + TREE_PUBLIC (new_fndecl) = 1; + DECL_EXTERNAL (new_fndecl) = 1; + DECL_IS_NOVOPS (new_fndecl) = 1; + TREE_READONLY (new_fndecl) = 1; + + return new_fndecl; +} + + /* Returns a decl of a function that implements conversion of the input vector of type TYPE, or NULL_TREE if it is not available. */ @@ -20558,6 +20671,8 @@ ix86_hard_regno_mode_ok (int regno, enum machine_mode mode) return 1; else if (VALID_FP_MODE_P (mode)) return 1; + else if (VALID_DFP_MODE_P (mode)) + return 1; /* Lots of MMX code casts 8 byte vector modes to DImode. If we then go on to use that value in smaller contexts, this can easily force a pseudo to be allocated to GENERAL_REGS. Since this is no worse than @@ -21141,7 +21256,7 @@ ix86_handle_struct_attribute (tree *node, tree name, } static bool -ix86_ms_bitfield_layout_p (tree record_type) +ix86_ms_bitfield_layout_p (const_tree record_type) { return (TARGET_MS_BITFIELD_LAYOUT && !lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (record_type))) @@ -21183,9 +21298,9 @@ x86_this_parameter (tree function) /* Determine whether x86_output_mi_thunk can succeed. */ static bool -x86_can_output_mi_thunk (tree thunk ATTRIBUTE_UNUSED, +x86_can_output_mi_thunk (const_tree thunk ATTRIBUTE_UNUSED, HOST_WIDE_INT delta ATTRIBUTE_UNUSED, - HOST_WIDE_INT vcall_offset, tree function) + HOST_WIDE_INT vcall_offset, const_tree function) { /* 64-bit can handle anything. */ if (TARGET_64BIT) @@ -22825,7 +22940,7 @@ i386_solaris_elf_named_section (const char *name, unsigned int flags, /* Return the mangling of TYPE if it is an extended fundamental type. */ static const char * -ix86_mangle_type (tree type) +ix86_mangle_type (const_tree type) { type = TYPE_MAIN_VARIANT (type); @@ -23571,7 +23686,7 @@ static const struct attribute_spec ix86_attribute_table[] = #undef TARGET_CANNOT_FORCE_CONST_MEM #define TARGET_CANNOT_FORCE_CONST_MEM ix86_cannot_force_const_mem #undef TARGET_USE_BLOCKS_FOR_CONSTANT_P -#define TARGET_USE_BLOCKS_FOR_CONSTANT_P hook_bool_mode_rtx_true +#define TARGET_USE_BLOCKS_FOR_CONSTANT_P hook_bool_mode_const_rtx_true #undef TARGET_DELEGITIMIZE_ADDRESS #define TARGET_DELEGITIMIZE_ADDRESS ix86_delegitimize_address @@ -23625,7 +23740,7 @@ static const struct attribute_spec ix86_attribute_table[] = #define TARGET_MD_ASM_CLOBBERS ix86_md_asm_clobbers #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_STRUCT_VALUE_RTX #define TARGET_STRUCT_VALUE_RTX ix86_struct_value_rtx #undef TARGET_SETUP_INCOMING_VARARGS diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 4a41a6c76f8..93e24dd90fb 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1088,6 +1088,9 @@ do { \ place emms and femms instructions. */ #define UNITS_PER_SIMD_WORD (TARGET_SSE ? 16 : UNITS_PER_WORD) +#define VALID_DFP_MODE_P(MODE) \ + ((MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode) + #define VALID_FP_MODE_P(MODE) \ ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \ || (MODE) == SCmode || (MODE) == DCmode || (MODE) == XCmode) \ @@ -2229,7 +2232,7 @@ do { \ print_operand function. */ #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ - ((CODE) == '*' || (CODE) == '+' || (CODE) == '&') + ((CODE) == '*' || (CODE) == '+' || (CODE) == '&' || (CODE) == ';') #define PRINT_OPERAND(FILE, X, CODE) \ print_operand ((FILE), (X), (CODE)) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 751d46b9ac6..a518aaeaca9 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -488,7 +488,7 @@ [(set_attr "length" "128") (set_attr "type" "multi")]) -(define_code_macro plusminus [plus minus]) +(define_code_iterator plusminus [plus minus]) ;; Base name for define_insn and insn mnemonic. (define_code_attr addsub [(plus "add") (minus "sub")]) @@ -497,7 +497,7 @@ (define_code_attr comm [(plus "%") (minus "")]) ;; All single word integer modes. -(define_mode_macro SWI [QI HI SI (DI "TARGET_64BIT")]) +(define_mode_iterator SWI [QI HI SI (DI "TARGET_64BIT")]) ;; Instruction suffix for integer modes. (define_mode_attr imodesuffix [(QI "b") (HI "w") (SI "l") (DI "q")]) @@ -516,22 +516,22 @@ (DI "x86_64_general_operand")]) ;; All x87 floating point modes -(define_mode_macro X87MODEF [SF DF XF]) +(define_mode_iterator X87MODEF [SF DF XF]) ;; x87 SFmode and DFMode floating point modes -(define_mode_macro X87MODEF12 [SF DF]) +(define_mode_iterator X87MODEF12 [SF DF]) ;; All integer modes handled by x87 fisttp operator. -(define_mode_macro X87MODEI [HI SI DI]) +(define_mode_iterator X87MODEI [HI SI DI]) ;; All integer modes handled by integer x87 operators. -(define_mode_macro X87MODEI12 [HI SI]) +(define_mode_iterator X87MODEI12 [HI SI]) ;; All SSE floating point modes -(define_mode_macro SSEMODEF [SF DF]) +(define_mode_iterator SSEMODEF [SF DF]) ;; All integer modes handled by SSE cvtts?2si* operators. -(define_mode_macro SSEMODEI24 [SI DI]) +(define_mode_iterator SSEMODEI24 [SI DI]) ;; SSE asm suffix for floating point modes (define_mode_attr ssemodefsuffix [(SF "s") (DF "d")]) @@ -925,6 +925,34 @@ ] (const_string "XF")))]) +(define_insn_and_split "*cmpfp_0_cc" + [(set (reg:CCFP FLAGS_REG) + (compare:CCFP + (match_operand 1 "register_operand" "f") + (match_operand 2 "const0_operand" "X"))) + (clobber (match_operand:HI 0 "register_operand" "=a"))] + "X87_FLOAT_MODE_P (GET_MODE (operands[1])) + && TARGET_SAHF && !TARGET_CMOVE + && GET_MODE (operands[1]) == GET_MODE (operands[2])" + "#" + "&& reload_completed" + [(set (match_dup 0) + (unspec:HI + [(compare:CCFP (match_dup 1)(match_dup 2))] + UNSPEC_FNSTSW)) + (set (reg:CC FLAGS_REG) + (unspec:CC [(match_dup 0)] UNSPEC_SAHF))] + "" + [(set_attr "type" "multi") + (set_attr "unit" "i387") + (set (attr "mode") + (cond [(match_operand:SF 1 "" "") + (const_string "SF") + (match_operand:DF 1 "" "") + (const_string "DF") + ] + (const_string "XF")))]) + (define_insn "*cmpfp_xf" [(set (match_operand:HI 0 "register_operand" "=a") (unspec:HI @@ -938,6 +966,27 @@ (set_attr "unit" "i387") (set_attr "mode" "XF")]) +(define_insn_and_split "*cmpfp_xf_cc" + [(set (reg:CCFP FLAGS_REG) + (compare:CCFP + (match_operand:XF 1 "register_operand" "f") + (match_operand:XF 2 "register_operand" "f"))) + (clobber (match_operand:HI 0 "register_operand" "=a"))] + "TARGET_80387 + && TARGET_SAHF && !TARGET_CMOVE" + "#" + "&& reload_completed" + [(set (match_dup 0) + (unspec:HI + [(compare:CCFP (match_dup 1)(match_dup 2))] + UNSPEC_FNSTSW)) + (set (reg:CC FLAGS_REG) + (unspec:CC [(match_dup 0)] UNSPEC_SAHF))] + "" + [(set_attr "type" "multi") + (set_attr "unit" "i387") + (set_attr "mode" "XF")]) + (define_insn "*cmpfp_<mode>" [(set (match_operand:HI 0 "register_operand" "=a") (unspec:HI @@ -951,6 +1000,27 @@ (set_attr "unit" "i387") (set_attr "mode" "<MODE>")]) +(define_insn_and_split "*cmpfp_<mode>_cc" + [(set (reg:CCFP FLAGS_REG) + (compare:CCFP + (match_operand:X87MODEF12 1 "register_operand" "f") + (match_operand:X87MODEF12 2 "nonimmediate_operand" "fm"))) + (clobber (match_operand:HI 0 "register_operand" "=a"))] + "TARGET_80387 + && TARGET_SAHF && !TARGET_CMOVE" + "#" + "&& reload_completed" + [(set (match_dup 0) + (unspec:HI + [(compare:CCFP (match_dup 1)(match_dup 2))] + UNSPEC_FNSTSW)) + (set (reg:CC FLAGS_REG) + (unspec:CC [(match_dup 0)] UNSPEC_SAHF))] + "" + [(set_attr "type" "multi") + (set_attr "unit" "i387") + (set_attr "mode" "<MODE>")]) + (define_insn "*cmpfp_u" [(set (match_operand:HI 0 "register_operand" "=a") (unspec:HI @@ -971,6 +1041,34 @@ ] (const_string "XF")))]) +(define_insn_and_split "*cmpfp_u_cc" + [(set (reg:CCFPU FLAGS_REG) + (compare:CCFPU + (match_operand 1 "register_operand" "f") + (match_operand 2 "register_operand" "f"))) + (clobber (match_operand:HI 0 "register_operand" "=a"))] + "X87_FLOAT_MODE_P (GET_MODE (operands[1])) + && TARGET_SAHF && !TARGET_CMOVE + && GET_MODE (operands[1]) == GET_MODE (operands[2])" + "#" + "&& reload_completed" + [(set (match_dup 0) + (unspec:HI + [(compare:CCFPU (match_dup 1)(match_dup 2))] + UNSPEC_FNSTSW)) + (set (reg:CC FLAGS_REG) + (unspec:CC [(match_dup 0)] UNSPEC_SAHF))] + "" + [(set_attr "type" "multi") + (set_attr "unit" "i387") + (set (attr "mode") + (cond [(match_operand:SF 1 "" "") + (const_string "SF") + (match_operand:DF 1 "" "") + (const_string "DF") + ] + (const_string "XF")))]) + (define_insn "*cmpfp_<mode>" [(set (match_operand:HI 0 "register_operand" "=a") (unspec:HI @@ -988,6 +1086,33 @@ (set_attr "fp_int_src" "true") (set_attr "mode" "<MODE>")]) +(define_insn_and_split "*cmpfp_<mode>_cc" + [(set (reg:CCFP FLAGS_REG) + (compare:CCFP + (match_operand 1 "register_operand" "f") + (match_operator 3 "float_operator" + [(match_operand:X87MODEI12 2 "memory_operand" "m")]))) + (clobber (match_operand:HI 0 "register_operand" "=a"))] + "X87_FLOAT_MODE_P (GET_MODE (operands[1])) + && TARGET_SAHF && !TARGET_CMOVE + && TARGET_USE_<MODE>MODE_FIOP + && (GET_MODE (operands [3]) == GET_MODE (operands[1]))" + "#" + "&& reload_completed" + [(set (match_dup 0) + (unspec:HI + [(compare:CCFP + (match_dup 1) + (match_op_dup 3 [(match_dup 2)]))] + UNSPEC_FNSTSW)) + (set (reg:CC FLAGS_REG) + (unspec:CC [(match_dup 0)] UNSPEC_SAHF))] + "" + [(set_attr "type" "multi") + (set_attr "unit" "i387") + (set_attr "fp_int_src" "true") + (set_attr "mode" "<MODE>")]) + ;; FP compares, step 2 ;; Move the fpsw to ax. @@ -10085,7 +10210,7 @@ ;; Copysign instructions -(define_mode_macro CSGNMODE [SF DF TF]) +(define_mode_iterator CSGNMODE [SF DF TF]) (define_mode_attr CSGNVMODE [(SF "V4SF") (DF "V2DF") (TF "TF")]) (define_expand "copysign<mode>3" @@ -21009,7 +21134,7 @@ } [(set_attr "type" "multi")]) -(define_mode_macro CRC32MODE [QI HI SI]) +(define_mode_iterator CRC32MODE [QI HI SI]) (define_mode_attr crc32modesuffix [(QI "b") (HI "w") (SI "l")]) (define_mode_attr crc32modeconstraint [(QI "qm") (HI "rm") (SI "rm")]) diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index a8e6da62fe0..f32193d26b1 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -182,6 +182,10 @@ mtune= Target RejectNegative Joined Var(ix86_tune_string) Schedule code for given CPU +mveclibabi= +Target RejectNegative Joined Var(ix86_veclibabi_string) +Vector library ABI to use + ;; ISA support m32 diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 6268d8fa16c..70073de9278 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -31,14 +31,14 @@ ;; direction of the user via a builtin. ;; 8 byte integral modes handled by MMX (and by extension, SSE) -(define_mode_macro MMXMODEI [V8QI V4HI V2SI]) +(define_mode_iterator MMXMODEI [V8QI V4HI V2SI]) ;; All 8-byte vector modes handled by MMX -(define_mode_macro MMXMODE [V8QI V4HI V2SI V2SF]) +(define_mode_iterator MMXMODE [V8QI V4HI V2SI V2SF]) ;; Mix-n-match -(define_mode_macro MMXMODE12 [V8QI V4HI]) -(define_mode_macro MMXMODE24 [V4HI V2SI]) +(define_mode_iterator MMXMODE12 [V8QI V4HI]) +(define_mode_iterator MMXMODE24 [V4HI V2SI]) ;; Mapping from integer vector mode to mnemonic suffix (define_mode_attr mmxvecsize [(V8QI "b") (V4HI "w") (V2SI "d") (DI "q")]) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 72048ad6653..6779e9a805a 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -21,17 +21,17 @@ ;; 16 byte integral modes handled by SSE, minus TImode, which gets ;; special-cased for TARGET_64BIT. -(define_mode_macro SSEMODEI [V16QI V8HI V4SI V2DI]) +(define_mode_iterator SSEMODEI [V16QI V8HI V4SI V2DI]) ;; All 16-byte vector modes handled by SSE -(define_mode_macro SSEMODE [V16QI V8HI V4SI V2DI V4SF V2DF]) +(define_mode_iterator SSEMODE [V16QI V8HI V4SI V2DI V4SF V2DF]) ;; Mix-n-match -(define_mode_macro SSEMODE12 [V16QI V8HI]) -(define_mode_macro SSEMODE24 [V8HI V4SI]) -(define_mode_macro SSEMODE14 [V16QI V4SI]) -(define_mode_macro SSEMODE124 [V16QI V8HI V4SI]) -(define_mode_macro SSEMODE248 [V8HI V4SI V2DI]) +(define_mode_iterator SSEMODE12 [V16QI V8HI]) +(define_mode_iterator SSEMODE24 [V8HI V4SI]) +(define_mode_iterator SSEMODE14 [V16QI V4SI]) +(define_mode_iterator SSEMODE124 [V16QI V8HI V4SI]) +(define_mode_iterator SSEMODE248 [V8HI V4SI V2DI]) ;; Mapping from integer vector mode to mnemonic suffix (define_mode_attr ssevecsize [(V16QI "b") (V8HI "w") (V4SI "d") (V2DI "q")]) @@ -1542,6 +1542,22 @@ (set_attr "prefix_extra" "1") (set_attr "mode" "V4SF")]) +(define_insn_and_split "*vec_extract_v4sf_mem" + [(set (match_operand:SF 0 "register_operand" "=x*rf") + (vec_select:SF + (match_operand:V4SF 1 "memory_operand" "o") + (parallel [(match_operand 2 "const_0_to_3_operand" "n")])))] + "" + "#" + "reload_completed" + [(const_int 0)] +{ + int i = INTVAL (operands[2]); + + emit_move_insn (operands[0], adjust_address (operands[1], SFmode, i*4)); + DONE; +}) + (define_expand "vec_extractv4sf" [(match_operand:SF 0 "register_operand" "") (match_operand:V4SF 1 "register_operand" "") @@ -3773,10 +3789,21 @@ [(set (match_operand:SSEMODEI 0 "register_operand" "") (and:SSEMODEI (match_operand:SSEMODEI 1 "nonimmediate_operand" "") (match_operand:SSEMODEI 2 "nonimmediate_operand" "")))] - "TARGET_SSE2" + "TARGET_SSE" "ix86_fixup_binary_operands_no_copy (AND, <MODE>mode, operands);") -(define_insn "*and<mode>3" +(define_insn "*sse_and<mode>3" + [(set (match_operand:SSEMODEI 0 "register_operand" "=x") + (and:SSEMODEI + (match_operand:SSEMODEI 1 "nonimmediate_operand" "%0") + (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] + "(TARGET_SSE && !TARGET_SSE2) + && ix86_binary_operator_ok (AND, <MODE>mode, operands)" + "andps\t{%2, %0|%0, %2}" + [(set_attr "type" "sselog") + (set_attr "mode" "V4SF")]) + +(define_insn "*sse2_and<mode>3" [(set (match_operand:SSEMODEI 0 "register_operand" "=x") (and:SSEMODEI (match_operand:SSEMODEI 1 "nonimmediate_operand" "%0") @@ -3787,6 +3814,16 @@ (set_attr "prefix_data16" "1") (set_attr "mode" "TI")]) +(define_insn "*sse_nand<mode>3" + [(set (match_operand:SSEMODEI 0 "register_operand" "=x") + (and:SSEMODEI + (not:SSEMODEI (match_operand:SSEMODEI 1 "register_operand" "0")) + (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] + "(TARGET_SSE && !TARGET_SSE2)" + "andnps\t{%2, %0|%0, %2}" + [(set_attr "type" "sselog") + (set_attr "mode" "V4SF")]) + (define_insn "sse2_nand<mode>3" [(set (match_operand:SSEMODEI 0 "register_operand" "=x") (and:SSEMODEI @@ -3831,10 +3868,21 @@ [(set (match_operand:SSEMODEI 0 "register_operand" "") (ior:SSEMODEI (match_operand:SSEMODEI 1 "nonimmediate_operand" "") (match_operand:SSEMODEI 2 "nonimmediate_operand" "")))] - "TARGET_SSE2" + "TARGET_SSE" "ix86_fixup_binary_operands_no_copy (IOR, <MODE>mode, operands);") -(define_insn "*ior<mode>3" +(define_insn "*sse_ior<mode>3" + [(set (match_operand:SSEMODEI 0 "register_operand" "=x") + (ior:SSEMODEI + (match_operand:SSEMODEI 1 "nonimmediate_operand" "%0") + (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] + "(TARGET_SSE && !TARGET_SSE2) + && ix86_binary_operator_ok (IOR, <MODE>mode, operands)" + "orps\t{%2, %0|%0, %2}" + [(set_attr "type" "sselog") + (set_attr "mode" "V4SF")]) + +(define_insn "*sse2_ior<mode>3" [(set (match_operand:SSEMODEI 0 "register_operand" "=x") (ior:SSEMODEI (match_operand:SSEMODEI 1 "nonimmediate_operand" "%0") @@ -3867,10 +3915,21 @@ [(set (match_operand:SSEMODEI 0 "register_operand" "") (xor:SSEMODEI (match_operand:SSEMODEI 1 "nonimmediate_operand" "") (match_operand:SSEMODEI 2 "nonimmediate_operand" "")))] - "TARGET_SSE2" + "TARGET_SSE" "ix86_fixup_binary_operands_no_copy (XOR, <MODE>mode, operands);") -(define_insn "*xor<mode>3" +(define_insn "*sse_xor<mode>3" + [(set (match_operand:SSEMODEI 0 "register_operand" "=x") + (xor:SSEMODEI + (match_operand:SSEMODEI 1 "nonimmediate_operand" "%0") + (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] + "(TARGET_SSE && !TARGET_SSE2) + && ix86_binary_operator_ok (XOR, <MODE>mode, operands)" + "xorps\t{%2, %0|%0, %2}" + [(set_attr "type" "sselog") + (set_attr "mode" "V4SF")]) + +(define_insn "*sse2_xor<mode>3" [(set (match_operand:SSEMODEI 0 "register_operand" "=x") (xor:SSEMODEI (match_operand:SSEMODEI 1 "nonimmediate_operand" "%0") @@ -4591,6 +4650,22 @@ operands[1] = gen_rtx_REG (SImode, REGNO (operands[1])); }) +(define_insn_and_split "*vec_ext_v4si_mem" + [(set (match_operand:SI 0 "register_operand" "=r") + (vec_select:SI + (match_operand:V4SI 1 "memory_operand" "o") + (parallel [(match_operand 2 "const_0_to_3_operand" "")])))] + "" + "#" + "reload_completed" + [(const_int 0)] +{ + int i = INTVAL (operands[2]); + + emit_move_insn (operands[0], adjust_address (operands[1], SImode, i*4)); + DONE; +}) + (define_expand "sse_storeq" [(set (match_operand:DI 0 "nonimmediate_operand" "") (vec_select:DI diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md index 7282381c040..19295bbaff1 100644 --- a/gcc/config/i386/sync.md +++ b/gcc/config/i386/sync.md @@ -18,14 +18,14 @@ ;; along with GCC; see the file COPYING3. If not see ;; <http://www.gnu.org/licenses/>. -(define_mode_macro IMODE [QI HI SI (DI "TARGET_64BIT")]) +(define_mode_iterator IMODE [QI HI SI (DI "TARGET_64BIT")]) (define_mode_attr modesuffix [(QI "b") (HI "w") (SI "l") (DI "q")]) (define_mode_attr modeconstraint [(QI "q") (HI "r") (SI "r") (DI "r")]) (define_mode_attr immconstraint [(QI "i") (HI "i") (SI "i") (DI "e")]) -(define_mode_macro CASMODE [QI HI SI (DI "TARGET_64BIT || TARGET_CMPXCHG8B") +(define_mode_iterator CASMODE [QI HI SI (DI "TARGET_64BIT || TARGET_CMPXCHG8B") (TI "TARGET_64BIT && TARGET_CMPXCHG16B")]) -(define_mode_macro DCASMODE +(define_mode_iterator DCASMODE [(DI "!TARGET_64BIT && TARGET_CMPXCHG8B && !flag_pic") (TI "TARGET_64BIT && TARGET_CMPXCHG16B")]) (define_mode_attr doublemodesuffix [(DI "8") (TI "16")]) @@ -81,7 +81,7 @@ UNSPECV_CMPXCHG_1)) (clobber (reg:CC FLAGS_REG))] "TARGET_CMPXCHG" - "lock cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}") + "lock{%;| } cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}") (define_insn "sync_double_compare_and_swap<mode>" [(set (match_operand:DCASMODE 0 "register_operand" "=A") @@ -95,7 +95,7 @@ UNSPECV_CMPXCHG_1)) (clobber (reg:CC FLAGS_REG))] "" - "lock cmpxchg<doublemodesuffix>b\t%1") + "lock{%;| }cmpxchg<doublemodesuffix>b\t%1") ;; Theoretically we'd like to use constraint "r" (any reg) for operand ;; 3, but that includes ecx. If operand 3 and 4 are the same (like when @@ -118,7 +118,7 @@ UNSPECV_CMPXCHG_1)) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic" - "xchg{l}\t%%ebx, %3\;lock cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3") + "xchg{l}\t%%ebx, %3\;lock{%;| }cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3") (define_expand "sync_compare_and_swap_cc<mode>" [(parallel @@ -176,7 +176,7 @@ [(match_dup 1) (match_dup 2) (match_dup 3)] UNSPECV_CMPXCHG_2) (match_dup 2)))] "TARGET_CMPXCHG" - "lock cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}") + "lock{%;| }cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}") (define_insn "sync_double_compare_and_swap_cc<mode>" [(set (match_operand:DCASMODE 0 "register_operand" "=A") @@ -195,7 +195,7 @@ UNSPECV_CMPXCHG_2) (match_dup 2)))] "" - "lock cmpxchg<doublemodesuffix>b\t%1") + "lock{%;| }cmpxchg<doublemodesuffix>b\t%1") ;; See above for the explanation of using the constraint "SD" for ;; operand 3. @@ -216,7 +216,7 @@ UNSPECV_CMPXCHG_2) (match_dup 2)))] "!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic" - "xchg{l}\t%%ebx, %3\;lock cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3") + "xchg{l}\t%%ebx, %3\;lock{%;| }cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3") (define_insn "sync_old_add<mode>" [(set (match_operand:IMODE 0 "register_operand" "=<modeconstraint>") @@ -227,7 +227,7 @@ (match_operand:IMODE 2 "register_operand" "0"))) (clobber (reg:CC FLAGS_REG))] "TARGET_XADD" - "lock xadd{<modesuffix>}\t{%0, %1|%1, %0}") + "lock{%;| }xadd{<modesuffix>}\t{%0, %1|%1, %0}") ;; Recall that xchg implicitly sets LOCK#, so adding it again wastes space. (define_insn "sync_lock_test_and_set<mode>" @@ -251,12 +251,12 @@ if (TARGET_USE_INCDEC) { if (operands[1] == const1_rtx) - return "lock inc{<modesuffix>}\t%0"; + return "lock{%;| }inc{<modesuffix>}\t%0"; if (operands[1] == constm1_rtx) - return "lock dec{<modesuffix>}\t%0"; + return "lock{%;| }dec{<modesuffix>}\t%0"; } - return "lock add{<modesuffix>}\t{%1, %0|%0, %1}"; + return "lock{%;| }add{<modesuffix>}\t{%1, %0|%0, %1}"; }) (define_insn "sync_sub<mode>" @@ -271,12 +271,12 @@ if (TARGET_USE_INCDEC) { if (operands[1] == const1_rtx) - return "lock dec{<modesuffix>}\t%0"; + return "lock{%;| }dec{<modesuffix>}\t%0"; if (operands[1] == constm1_rtx) - return "lock inc{<modesuffix>}\t%0"; + return "lock{%;| }inc{<modesuffix>}\t%0"; } - return "lock sub{<modesuffix>}\t{%1, %0|%0, %1}"; + return "lock{%;| }sub{<modesuffix>}\t{%1, %0|%0, %1}"; }) (define_insn "sync_ior<mode>" @@ -287,7 +287,7 @@ UNSPECV_LOCK)) (clobber (reg:CC FLAGS_REG))] "" - "lock or{<modesuffix>}\t{%1, %0|%0, %1}") + "lock{%;| }or{<modesuffix>}\t{%1, %0|%0, %1}") (define_insn "sync_and<mode>" [(set (match_operand:IMODE 0 "memory_operand" "+m") @@ -297,7 +297,7 @@ UNSPECV_LOCK)) (clobber (reg:CC FLAGS_REG))] "" - "lock and{<modesuffix>}\t{%1, %0|%0, %1}") + "lock{%;| }and{<modesuffix>}\t{%1, %0|%0, %1}") (define_insn "sync_xor<mode>" [(set (match_operand:IMODE 0 "memory_operand" "+m") @@ -307,4 +307,4 @@ UNSPECV_LOCK)) (clobber (reg:CC FLAGS_REG))] "" - "lock xor{<modesuffix>}\t{%1, %0|%0, %1}") + "lock{%;| }xor{<modesuffix>}\t{%1, %0|%0, %1}") diff --git a/gcc/config/i386/winnt.c b/gcc/config/i386/winnt.c index 8de14adbc4a..26fe33670b8 100644 --- a/gcc/config/i386/winnt.c +++ b/gcc/config/i386/winnt.c @@ -146,7 +146,7 @@ i386_pe_determine_dllimport_p (tree decl) /* Handle the -mno-fun-dllimport target switch. */ bool -i386_pe_valid_dllimport_attribute_p (tree decl) +i386_pe_valid_dllimport_attribute_p (const_tree decl) { if (TARGET_NOP_FUN_DLLIMPORT && TREE_CODE (decl) == FUNCTION_DECL) return false; @@ -328,7 +328,7 @@ i386_pe_encode_section_info (tree decl, rtx rtl, int first) } bool -i386_pe_binds_local_p (tree exp) +i386_pe_binds_local_p (const_tree exp) { /* PE does not do dynamic binding. Indeed, the only kind of non-local reference comes from a dllimport'd symbol. */ diff --git a/gcc/config/ia64/div.md b/gcc/config/ia64/div.md index d26954b9a1e..a6547a680ff 100644 --- a/gcc/config/ia64/div.md +++ b/gcc/config/ia64/div.md @@ -158,7 +158,7 @@ ;; to be written for RFmode only and to not have to handle multiple ;; modes or to have to handle a register in more than one mode. -(define_mode_macro SDX_F [SF DF XF]) +(define_mode_iterator SDX_F [SF DF XF]) (define_insn "extend<mode>rf2" [(set (match_operand:RF 0 "fr_register_operand" "=f") diff --git a/gcc/config/ia64/ia64-protos.h b/gcc/config/ia64/ia64-protos.h index eb230b65f36..e3b78641eb8 100644 --- a/gcc/config/ia64/ia64-protos.h +++ b/gcc/config/ia64/ia64-protos.h @@ -77,7 +77,7 @@ extern rtx ia64_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int, int); extern rtx ia64_expand_builtin (tree, rtx, rtx, enum machine_mode, int); extern rtx ia64_va_arg (tree, tree); -extern rtx ia64_function_value (tree, tree); +extern rtx ia64_function_value (const_tree, const_tree); #endif /* RTX_CODE */ extern void ia64_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, @@ -100,7 +100,7 @@ extern void ia64_split_return_addr_rtx (rtx); #ifdef ARGS_SIZE_RTX /* expr.h defines ARGS_SIZE_RTX and `enum direction'. */ -extern enum direction ia64_hpux_function_arg_padding (enum machine_mode, tree); +extern enum direction ia64_hpux_function_arg_padding (enum machine_mode, const_tree); #endif /* ARGS_SIZE_RTX */ extern void ia64_hpux_handle_builtin_pragma (struct cpp_reader *); diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index bb5515169a3..46f75c5a205 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -169,14 +169,14 @@ static void ia64_dependencies_evaluation_hook (rtx, rtx); static void ia64_init_dfa_pre_cycle_insn (void); static rtx ia64_dfa_pre_cycle_insn (void); static int ia64_first_cycle_multipass_dfa_lookahead_guard (rtx); -static bool ia64_first_cycle_multipass_dfa_lookahead_guard_spec (rtx); +static bool ia64_first_cycle_multipass_dfa_lookahead_guard_spec (const_rtx); static int ia64_dfa_new_cycle (FILE *, int, rtx, int, int, int *); static void ia64_h_i_d_extended (void); static int ia64_mode_to_int (enum machine_mode); static void ia64_set_sched_flags (spec_info_t); static int ia64_speculate_insn (rtx, ds_t, rtx *); static rtx ia64_gen_spec_insn (rtx, ds_t, int, bool, bool); -static bool ia64_needs_block_p (rtx); +static bool ia64_needs_block_p (const_rtx); static rtx ia64_gen_check (rtx, rtx, bool); static int ia64_spec_check_p (rtx); static int ia64_spec_check_src_p (rtx); @@ -195,13 +195,13 @@ static rtx gen_movdi_x (rtx, rtx, rtx); static rtx gen_fr_spill_x (rtx, rtx, rtx); static rtx gen_fr_restore_x (rtx, rtx, rtx); -static enum machine_mode hfa_element_mode (tree, bool); +static enum machine_mode hfa_element_mode (const_tree, bool); static void ia64_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int); static int ia64_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); static bool ia64_function_ok_for_sibcall (tree, tree); -static bool ia64_return_in_memory (tree, tree); +static bool ia64_return_in_memory (const_tree, const_tree); static bool ia64_rtx_costs (rtx, int, int, int *); static void fix_range (const char *); static bool ia64_handle_option (size_t, const char *, int); @@ -211,7 +211,7 @@ static void emit_all_insn_group_barriers (FILE *); static void final_emit_insn_group_barriers (FILE *); static void emit_predicate_relation_info (void); static void ia64_reorg (void); -static bool ia64_in_small_data_p (tree); +static bool ia64_in_small_data_p (const_tree); static void process_epilogue (FILE *, rtx, bool, bool); static int process_set (FILE *, rtx, rtx, bool, bool); @@ -278,10 +278,10 @@ static tree ia64_gimplify_va_arg (tree, tree, tree *, tree *); static bool ia64_scalar_mode_supported_p (enum machine_mode mode); static bool ia64_vector_mode_supported_p (enum machine_mode mode); static bool ia64_cannot_force_const_mem (rtx); -static const char *ia64_mangle_type (tree); -static const char *ia64_invalid_conversion (tree, tree); -static const char *ia64_invalid_unary_op (int, tree); -static const char *ia64_invalid_binary_op (int, tree, tree); +static const char *ia64_mangle_type (const_tree); +static const char *ia64_invalid_conversion (const_tree, const_tree); +static const char *ia64_invalid_unary_op (int, const_tree); +static const char *ia64_invalid_binary_op (int, const_tree, const_tree); static enum machine_mode ia64_c_mode_for_suffix (char); /* Table of valid machine attributes. */ @@ -396,7 +396,7 @@ static const struct attribute_spec ia64_attribute_table[] = #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK ia64_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true #undef TARGET_ASM_FILE_START #define TARGET_ASM_FILE_START ia64_file_start @@ -3870,7 +3870,7 @@ ia64_setup_incoming_varargs (CUMULATIVE_ARGS *cum, enum machine_mode mode, aggregates are excluded because our parallels crash the middle-end. */ static enum machine_mode -hfa_element_mode (tree type, bool nested) +hfa_element_mode (const_tree type, bool nested) { enum machine_mode element_mode = VOIDmode; enum machine_mode mode; @@ -4346,7 +4346,7 @@ ia64_gimplify_va_arg (tree valist, tree type, tree *pre_p, tree *post_p) in a register. */ static bool -ia64_return_in_memory (tree valtype, tree fntype ATTRIBUTE_UNUSED) +ia64_return_in_memory (const_tree valtype, const_tree fntype ATTRIBUTE_UNUSED) { enum machine_mode mode; enum machine_mode hfa_mode; @@ -4382,7 +4382,7 @@ ia64_return_in_memory (tree valtype, tree fntype ATTRIBUTE_UNUSED) /* Return rtx for register that holds the function return value. */ rtx -ia64_function_value (tree valtype, tree func ATTRIBUTE_UNUSED) +ia64_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) { enum machine_mode mode; enum machine_mode hfa_mode; @@ -6578,7 +6578,7 @@ ia64_first_cycle_multipass_dfa_lookahead_guard (rtx insn) can be chosen. */ static bool -ia64_first_cycle_multipass_dfa_lookahead_guard_spec (rtx insn) +ia64_first_cycle_multipass_dfa_lookahead_guard_spec (const_rtx insn) { gcc_assert (insn && INSN_P (insn)); /* Size of ALAT is 32. As far as we perform conservative data speculation, @@ -7039,7 +7039,7 @@ enum { SPEC_GEN_CHECK_MUTATION_OFFSET = 5 * SPEC_N }; /* Return nonzero, if INSN needs branchy recovery check. */ static bool -ia64_needs_block_p (rtx insn) +ia64_needs_block_p (const_rtx insn) { int check_no; @@ -7376,7 +7376,8 @@ static htab_t bundle_state_table; static unsigned bundle_state_hash (const void *bundle_state) { - const struct bundle_state *state = (struct bundle_state *) bundle_state; + const struct bundle_state *const state + = (const struct bundle_state *) bundle_state; unsigned result, i; for (result = i = 0; i < dfa_state_size; i++) @@ -7390,8 +7391,10 @@ bundle_state_hash (const void *bundle_state) static int bundle_state_eq_p (const void *bundle_state_1, const void *bundle_state_2) { - const struct bundle_state * state1 = (struct bundle_state *) bundle_state_1; - const struct bundle_state * state2 = (struct bundle_state *) bundle_state_2; + const struct bundle_state *const state1 + = (const struct bundle_state *) bundle_state_1; + const struct bundle_state *const state2 + = (const struct bundle_state *) bundle_state_2; return (state1->insn_num == state2->insn_num && memcmp (state1->dfa_state, state2->dfa_state, @@ -8711,7 +8714,7 @@ ia64_eh_uses (int regno) types which can't go in sdata/sbss. */ static bool -ia64_in_small_data_p (tree exp) +ia64_in_small_data_p (const_tree exp) { if (TARGET_NO_SDATA) return false; @@ -9235,7 +9238,7 @@ ia64_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, most significant bits of the stack slot. */ enum direction -ia64_hpux_function_arg_padding (enum machine_mode mode, tree type) +ia64_hpux_function_arg_padding (enum machine_mode mode, const_tree type) { /* Exception to normal case for structures/unions/etc. */ @@ -9765,7 +9768,7 @@ ia64_profile_hook (int labelno) /* Return the mangling of TYPE if it is an extended fundamental type. */ static const char * -ia64_mangle_type (tree type) +ia64_mangle_type (const_tree type) { type = TYPE_MAIN_VARIANT (type); @@ -9790,7 +9793,7 @@ ia64_mangle_type (tree type) /* Return the diagnostic message string if conversion from FROMTYPE to TOTYPE is not allowed, NULL otherwise. */ static const char * -ia64_invalid_conversion (tree fromtype, tree totype) +ia64_invalid_conversion (const_tree fromtype, const_tree totype) { /* Reject nontrivial conversion to or from __fpreg. */ if (TYPE_MODE (fromtype) == RFmode @@ -9806,7 +9809,7 @@ ia64_invalid_conversion (tree fromtype, tree totype) /* Return the diagnostic message string if the unary operation OP is not permitted on TYPE, NULL otherwise. */ static const char * -ia64_invalid_unary_op (int op, tree type) +ia64_invalid_unary_op (int op, const_tree type) { /* Reject operations on __fpreg other than unary + or &. */ if (TYPE_MODE (type) == RFmode @@ -9819,7 +9822,7 @@ ia64_invalid_unary_op (int op, tree type) /* Return the diagnostic message string if the binary operation OP is not permitted on TYPE1 and TYPE2, NULL otherwise. */ static const char * -ia64_invalid_binary_op (int op ATTRIBUTE_UNUSED, tree type1, tree type2) +ia64_invalid_binary_op (int op ATTRIBUTE_UNUSED, const_tree type1, const_tree type2) { /* Reject operations on __fpreg. */ if (TYPE_MODE (type1) == RFmode || TYPE_MODE (type2) == RFmode) diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index 2cbec722e03..52f26aa84ab 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -385,8 +385,8 @@ } [(set_attr "itanium_class" "ialu,ialu,long_i,ld,st,frfr,tofr,fmisc,fld,stf,frbr,tobr,frar_i,toar_i,frar_m,toar_m,frpr,topr")]) -(define_mode_macro MODE [BI QI HI SI DI SF DF XF TI]) -(define_mode_macro MODE_FOR_EXTEND [QI HI SI]) +(define_mode_iterator MODE [BI QI HI SI DI SF DF XF TI]) +(define_mode_iterator MODE_FOR_EXTEND [QI HI SI]) (define_mode_attr output_a [ (BI "ld1.a %0 = %1%P1") diff --git a/gcc/config/ia64/sync.md b/gcc/config/ia64/sync.md index 9d9957762a6..c467b0db097 100644 --- a/gcc/config/ia64/sync.md +++ b/gcc/config/ia64/sync.md @@ -18,12 +18,12 @@ ;; along with GCC; see the file COPYING3. If not see ;; <http://www.gnu.org/licenses/>. -(define_mode_macro IMODE [QI HI SI DI]) -(define_mode_macro I124MODE [QI HI SI]) -(define_mode_macro I48MODE [SI DI]) +(define_mode_iterator IMODE [QI HI SI DI]) +(define_mode_iterator I124MODE [QI HI SI]) +(define_mode_iterator I48MODE [SI DI]) (define_mode_attr modesuffix [(QI "1") (HI "2") (SI "4") (DI "8")]) -(define_code_macro FETCHOP [plus minus ior xor and]) +(define_code_iterator FETCHOP [plus minus ior xor and]) (define_code_attr fetchop_name [(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")]) diff --git a/gcc/config/ia64/vect.md b/gcc/config/ia64/vect.md index bca5d8c857d..994ec90b2eb 100644 --- a/gcc/config/ia64/vect.md +++ b/gcc/config/ia64/vect.md @@ -20,9 +20,9 @@ ;; Integer vector operations -(define_mode_macro VECINT [V8QI V4HI V2SI]) -(define_mode_macro VECINT12 [V8QI V4HI]) -(define_mode_macro VECINT24 [V4HI V2SI]) +(define_mode_iterator VECINT [V8QI V4HI V2SI]) +(define_mode_iterator VECINT12 [V8QI V4HI]) +(define_mode_iterator VECINT24 [V4HI V2SI]) (define_mode_attr vecsize [(V8QI "1") (V4HI "2") (V2SI "4")]) (define_expand "mov<mode>" diff --git a/gcc/config/iq2000/iq2000-protos.h b/gcc/config/iq2000/iq2000-protos.h index 3b2782ce739..9b6837ef975 100644 --- a/gcc/config/iq2000/iq2000-protos.h +++ b/gcc/config/iq2000/iq2000-protos.h @@ -47,9 +47,9 @@ extern void gen_conditional_branch (rtx *, enum rtx_code); #ifdef TREE_CODE extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx); extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int); -extern struct rtx_def * function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int); +extern struct rtx_def * function_arg (CUMULATIVE_ARGS *, enum machine_mode, const_tree, int); extern void iq2000_va_start (tree, rtx); -extern rtx iq2000_function_value (tree, tree); +extern rtx iq2000_function_value (const_tree, const_tree); #endif #endif /* ! GCC_IQ2000_PROTOS_H */ diff --git a/gcc/config/iq2000/iq2000.c b/gcc/config/iq2000/iq2000.c index ceb2d79546e..782aa72cbb1 100644 --- a/gcc/config/iq2000/iq2000.c +++ b/gcc/config/iq2000/iq2000.c @@ -157,16 +157,15 @@ static section *iq2000_select_rtx_section (enum machine_mode, rtx, unsigned HOST_WIDE_INT); static void iq2000_init_builtins (void); static rtx iq2000_expand_builtin (tree, rtx, rtx, enum machine_mode, int); -static bool iq2000_return_in_memory (tree, tree); +static bool iq2000_return_in_memory (const_tree, const_tree); static void iq2000_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int); static bool iq2000_rtx_costs (rtx, int, int, int *); static int iq2000_address_cost (rtx); static section *iq2000_select_section (tree, int, unsigned HOST_WIDE_INT); -static bool iq2000_return_in_memory (tree, tree); static bool iq2000_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); + const_tree, bool); static int iq2000_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); @@ -191,11 +190,11 @@ static int iq2000_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, #define TARGET_HAVE_SWITCHABLE_BSS_SECTIONS false #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY iq2000_return_in_memory @@ -1184,7 +1183,7 @@ function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type, and type TYPE in CUM, or 0 if the argument is to be passed on the stack. */ struct rtx_def * -function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type, +function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, const_tree type, int named) { rtx ret; @@ -1202,7 +1201,7 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type, "function_arg( {gp reg found = %d, arg # = %2d, words = %2d}, %4s, ", cum->gp_reg_found, cum->arg_number, cum->arg_words, GET_MODE_NAME (mode)); - fprintf (stderr, "%p", (void *) type); + fprintf (stderr, "%p", (const void *) type); fprintf (stderr, ", %d ) = ", named); } @@ -2199,7 +2198,7 @@ iq2000_select_section (tree decl, int reloc ATTRIBUTE_UNUSED, FUNC. */ rtx -iq2000_function_value (tree valtype, tree func ATTRIBUTE_UNUSED) +iq2000_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) { int reg = GP_RETURN; enum machine_mode mode = TYPE_MODE (valtype); @@ -2216,7 +2215,7 @@ iq2000_function_value (tree valtype, tree func ATTRIBUTE_UNUSED) static bool iq2000_pass_by_reference (CUMULATIVE_ARGS *cum, enum machine_mode mode, - tree type, bool named ATTRIBUTE_UNUSED) + const_tree type, bool named ATTRIBUTE_UNUSED) { int size; @@ -2825,7 +2824,7 @@ iq2000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -iq2000_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +iq2000_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { return ((int_size_in_bytes (type) > (2 * UNITS_PER_WORD)) || (int_size_in_bytes (type) == -1)); diff --git a/gcc/config/iq2000/iq2000.h b/gcc/config/iq2000/iq2000.h index 2f2a4f4baa9..dcf7ab62f06 100644 --- a/gcc/config/iq2000/iq2000.h +++ b/gcc/config/iq2000/iq2000.h @@ -756,7 +756,8 @@ while (0) #undef ASM_OUTPUT_SKIP #define ASM_OUTPUT_SKIP(STREAM,SIZE) \ - fprintf (STREAM, "\t.space\t%u\n", (SIZE)) + fprintf (STREAM, "\t.space\t" HOST_WIDE_INT_PRINT_UNSIGNED "\n", \ + (unsigned HOST_WIDE_INT)(SIZE)) #define ASM_OUTPUT_ALIGN(STREAM,LOG) \ if ((LOG) != 0) \ diff --git a/gcc/config/m32c/blkmov.md b/gcc/config/m32c/blkmov.md index 17076b2e8d5..a734f71789b 100644 --- a/gcc/config/m32c/blkmov.md +++ b/gcc/config/m32c/blkmov.md @@ -51,7 +51,7 @@ "if (m32c_expand_movmemhi(operands)) DONE; FAIL;" ) -;; We can't use mode macros for these because M16C uses r1h to extend +;; We can't use mode iterators for these because M16C uses r1h to extend ;; the source address, for copying data from ROM to RAM. We don't yet ;; support that, but we need to zero our r1h, so the patterns differ. diff --git a/gcc/config/m32c/m32c-protos.h b/gcc/config/m32c/m32c-protos.h index ecc77b443d9..a63191c21ab 100644 --- a/gcc/config/m32c/m32c-protos.h +++ b/gcc/config/m32c/m32c-protos.h @@ -50,7 +50,7 @@ void m32c_unpend_compare (void); #if defined(RTX_CODE) && defined(TREE_CODE) rtx m32c_function_arg (CUMULATIVE_ARGS *, MM, tree, int); -rtx m32c_function_value (tree, tree); +rtx m32c_function_value (const_tree, const_tree); #endif @@ -110,7 +110,7 @@ int m32c_split_psi_p (rtx *); void m32c_function_arg_advance (CUMULATIVE_ARGS *, MM, tree, int); tree m32c_gimplify_va_arg_expr (tree, tree, tree *, tree *); void m32c_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int); -bool m32c_promote_function_return (tree); +bool m32c_promote_function_return (const_tree); int m32c_special_page_vector_p (tree); #endif diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c index b2885b4db00..de983110272 100644 --- a/gcc/config/m32c/m32c.c +++ b/gcc/config/m32c/m32c.c @@ -64,13 +64,13 @@ static tree interrupt_handler (tree *, tree, tree, int, bool *); static tree function_vector_handler (tree *, tree, tree, int, bool *); static int interrupt_p (tree node); static bool m32c_asm_integer (rtx, unsigned int, int); -static int m32c_comp_type_attributes (tree, tree); +static int m32c_comp_type_attributes (const_tree, const_tree); static bool m32c_fixed_condition_code_regs (unsigned int *, unsigned int *); static struct machine_function *m32c_init_machine_status (void); static void m32c_insert_attributes (tree, tree *); static bool m32c_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); -static bool m32c_promote_prototypes (tree); + const_tree, bool); +static bool m32c_promote_prototypes (const_tree); static int m32c_pushm_popm (Push_Pop_Type); static bool m32c_strict_argument_naming (CUMULATIVE_ARGS *); static rtx m32c_struct_value_rtx (tree, int); @@ -445,7 +445,7 @@ m32c_init_expanders (void) #undef TARGET_PROMOTE_FUNCTION_RETURN #define TARGET_PROMOTE_FUNCTION_RETURN m32c_promote_function_return bool -m32c_promote_function_return (tree fntype ATTRIBUTE_UNUSED) +m32c_promote_function_return (const_tree fntype ATTRIBUTE_UNUSED) { return false; } @@ -1427,7 +1427,7 @@ m32c_initial_elimination_offset (int from, int to) #undef TARGET_PROMOTE_PROTOTYPES #define TARGET_PROMOTE_PROTOTYPES m32c_promote_prototypes static bool -m32c_promote_prototypes (tree fntype ATTRIBUTE_UNUSED) +m32c_promote_prototypes (const_tree fntype ATTRIBUTE_UNUSED) { return 0; } @@ -1514,7 +1514,7 @@ m32c_function_arg (CUMULATIVE_ARGS * ca, static bool m32c_pass_by_reference (CUMULATIVE_ARGS * ca ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED, - tree type ATTRIBUTE_UNUSED, + const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { return 0; @@ -1639,10 +1639,10 @@ m32c_libcall_value (enum machine_mode mode) /* Implements FUNCTION_VALUE. Functions and libcalls have the same conventions. */ rtx -m32c_function_value (tree valtype, tree func ATTRIBUTE_UNUSED) +m32c_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) { /* return reg or parallel */ - enum machine_mode mode = TYPE_MODE (valtype); + const enum machine_mode mode = TYPE_MODE (valtype); return m32c_libcall_value (mode); } @@ -2829,8 +2829,8 @@ static const struct attribute_spec m32c_attribute_table[] = { #undef TARGET_COMP_TYPE_ATTRIBUTES #define TARGET_COMP_TYPE_ATTRIBUTES m32c_comp_type_attributes static int -m32c_comp_type_attributes (tree type1 ATTRIBUTE_UNUSED, - tree type2 ATTRIBUTE_UNUSED) +m32c_comp_type_attributes (const_tree type1 ATTRIBUTE_UNUSED, + const_tree type2 ATTRIBUTE_UNUSED) { /* 0=incompatible 1=compatible 2=warning */ return 1; diff --git a/gcc/config/m32c/m32c.md b/gcc/config/m32c/m32c.md index 8110c0a7247..4bc4d05fbf1 100644 --- a/gcc/config/m32c/m32c.md +++ b/gcc/config/m32c/m32c.md @@ -54,15 +54,15 @@ (define_attr "flags" "x,c,z,zc,s,sc,sz,szc,o,oc,oz,ozc,os,osc,osz,oszc,n" (const_string "n")) (define_asm_attributes [(set_attr "flags" "x")]) -(define_mode_macro QHI [QI HI]) -(define_mode_macro HPSI [(HI "TARGET_A16") (PSI "TARGET_A24")]) -(define_mode_macro QHPSI [QI HI (PSI "TARGET_A24")]) -(define_mode_macro QHSI [QI HI (SI "TARGET_A24")]) +(define_mode_iterator QHI [QI HI]) +(define_mode_iterator HPSI [(HI "TARGET_A16") (PSI "TARGET_A24")]) +(define_mode_iterator QHPSI [QI HI (PSI "TARGET_A24")]) +(define_mode_iterator QHSI [QI HI (SI "TARGET_A24")]) (define_mode_attr bwl [(QI "b") (HI "w") (PSI "l") (SI "l")]) -(define_code_macro any_cond [eq ne gt ge lt le gtu geu ltu leu]) -(define_code_macro eqne_cond [eq ne]) -(define_code_macro gl_cond [gt ge lt le gtu geu ltu leu]) +(define_code_iterator any_cond [eq ne gt ge lt le gtu geu ltu leu]) +(define_code_iterator eqne_cond [eq ne]) +(define_code_iterator gl_cond [gt ge lt le gtu geu ltu leu]) diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index d4d54a0bf6f..1edd6597211 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -80,14 +80,14 @@ static int m32r_adjust_priority (rtx, int); static int m32r_issue_rate (void); static void m32r_encode_section_info (tree, rtx, int); -static bool m32r_in_small_data_p (tree); -static bool m32r_return_in_memory (tree, tree); +static bool m32r_in_small_data_p (const_tree); +static bool m32r_return_in_memory (const_tree, const_tree); static void m32r_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int); static void init_idents (void); static bool m32r_rtx_costs (rtx, int, int, int *); static bool m32r_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); + const_tree, bool); static int m32r_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); @@ -129,7 +129,7 @@ static int m32r_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, #define TARGET_ADDRESS_COST hook_int_rtx_0 #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY m32r_return_in_memory #undef TARGET_SETUP_INCOMING_VARARGS @@ -445,9 +445,9 @@ m32r_encode_section_info (tree decl, rtx rtl, int first) the object doesn't fit the linker will give an error. */ static bool -m32r_in_small_data_p (tree decl) +m32r_in_small_data_p (const_tree decl) { - tree section; + const_tree section; if (TREE_CODE (decl) != VAR_DECL) return false; @@ -458,7 +458,7 @@ m32r_in_small_data_p (tree decl) section = DECL_SECTION_NAME (decl); if (section) { - char *name = (char *) TREE_STRING_POINTER (section); + const char *const name = TREE_STRING_POINTER (section); if (strcmp (name, ".sdata") == 0 || strcmp (name, ".sbss") == 0) return true; } @@ -639,7 +639,7 @@ memreg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) static bool m32r_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { int size; @@ -1006,7 +1006,7 @@ m32r_arg_partial_bytes (CUMULATIVE_ARGS *cum, enum machine_mode mode, /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -m32r_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +m32r_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { return m32r_pass_by_reference (NULL, TYPE_MODE (type), type, false); } diff --git a/gcc/config/m68hc11/m68hc11-protos.h b/gcc/config/m68hc11/m68hc11-protos.h index 7fed9a88b59..1e9cf585904 100644 --- a/gcc/config/m68hc11/m68hc11-protos.h +++ b/gcc/config/m68hc11/m68hc11-protos.h @@ -111,7 +111,7 @@ extern void m68hc11_init_cumulative_args (CUMULATIVE_ARGS*, tree, rtx); extern rtx m68hc11_function_arg (const CUMULATIVE_ARGS* , enum machine_mode, tree, int); -extern int m68hc11_function_arg_padding (enum machine_mode, tree); +extern int m68hc11_function_arg_padding (enum machine_mode, const_tree); extern void m68hc11_function_epilogue (FILE*,int); diff --git a/gcc/config/m68hc11/m68hc11.c b/gcc/config/m68hc11/m68hc11.c index dd9b45b19c0..0232eda25d9 100644 --- a/gcc/config/m68hc11/m68hc11.c +++ b/gcc/config/m68hc11/m68hc11.c @@ -88,7 +88,7 @@ static int autoinc_mode (rtx); static int m68hc11_make_autoinc_notes (rtx *, void *); static void m68hc11_init_libfuncs (void); static rtx m68hc11_struct_value_rtx (tree, int); -static bool m68hc11_return_in_memory (tree, tree); +static bool m68hc11_return_in_memory (const_tree, const_tree); /* Must be set to 1 to produce debug messages. */ int debug_m6811 = 0; @@ -1479,7 +1479,7 @@ m68hc11_function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode, Structures are stored left shifted in their argument slot. */ int -m68hc11_function_arg_padding (enum machine_mode mode, tree type) +m68hc11_function_arg_padding (enum machine_mode mode, const_tree type) { if (type != 0 && AGGREGATE_TYPE_P (type)) return upward; @@ -5483,7 +5483,7 @@ m68hc11_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, in the register (D + X = 4). */ static bool -m68hc11_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +m68hc11_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { if (TYPE_MODE (type) == BLKmode) { diff --git a/gcc/config/m68hc11/m68hc11.h b/gcc/config/m68hc11/m68hc11.h index efe83f8948f..7034c93b30e 100644 --- a/gcc/config/m68hc11/m68hc11.h +++ b/gcc/config/m68hc11/m68hc11.h @@ -1407,6 +1407,7 @@ do { \ /* Output #ident as a .ident. */ /* output external reference */ +#undef ASM_OUTPUT_EXTERNAL #define ASM_OUTPUT_EXTERNAL(FILE,DECL,NAME) \ {fputs ("\t; extern\t", FILE); \ assemble_name (FILE, NAME); \ diff --git a/gcc/config/m68k/linux.h b/gcc/config/m68k/linux.h index f09a2c7e551..cdd510b2988 100644 --- a/gcc/config/m68k/linux.h +++ b/gcc/config/m68k/linux.h @@ -31,6 +31,8 @@ along with GCC; see the file COPYING3. If not see #undef STRICT_ALIGNMENT #define STRICT_ALIGNMENT 0 +#undef M68K_HONOR_TARGET_STRICT_ALIGNMENT +#define M68K_HONOR_TARGET_STRICT_ALIGNMENT 0 /* Here are four prefixes that are used by asm_fprintf to facilitate customization for alternate assembler syntaxes. diff --git a/gcc/config/m68k/m68k-protos.h b/gcc/config/m68k/m68k-protos.h index 5be0a3ef6d3..c6d6d33a3a8 100644 --- a/gcc/config/m68k/m68k-protos.h +++ b/gcc/config/m68k/m68k-protos.h @@ -60,7 +60,7 @@ extern bool m68k_matches_u_p (rtx); extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); extern int valid_dbcc_comparison_p_2 (rtx, enum machine_mode); extern rtx m68k_libcall_value (enum machine_mode); -extern rtx m68k_function_value (tree, tree); +extern rtx m68k_function_value (const_tree, const_tree); extern int emit_move_sequence (rtx *, enum machine_mode, rtx); extern bool m68k_movem_pattern_p (rtx, rtx, HOST_WIDE_INT, bool); extern const char *m68k_output_movem (rtx *, rtx, HOST_WIDE_INT, bool); diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c index 621035050fe..f1f09bc86c1 100644 --- a/gcc/config/m68k/m68k.c +++ b/gcc/config/m68k/m68k.c @@ -134,6 +134,9 @@ static void m68k_compute_frame_layout (void); static bool m68k_save_reg (unsigned int regno, bool interrupt_handler); static bool m68k_ok_for_sibcall_p (tree, tree); static bool m68k_rtx_costs (rtx, int, int, int *); +#if M68K_HONOR_TARGET_STRICT_ALIGNMENT +static bool m68k_return_in_memory (tree, tree); +#endif /* Specify the identification number of the library being built */ @@ -177,7 +180,7 @@ int m68k_last_compare_had_fp_operands; #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK m68k_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true #undef TARGET_ASM_FILE_START_APP_OFF #define TARGET_ASM_FILE_START_APP_OFF true @@ -194,7 +197,7 @@ int m68k_last_compare_had_fp_operands; #define TARGET_ATTRIBUTE_TABLE m68k_attribute_table #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_STRUCT_VALUE_RTX #define TARGET_STRUCT_VALUE_RTX m68k_struct_value_rtx @@ -205,6 +208,11 @@ int m68k_last_compare_had_fp_operands; #undef TARGET_FUNCTION_OK_FOR_SIBCALL #define TARGET_FUNCTION_OK_FOR_SIBCALL m68k_ok_for_sibcall_p +#if M68K_HONOR_TARGET_STRICT_ALIGNMENT +#undef TARGET_RETURN_IN_MEMORY +#define TARGET_RETURN_IN_MEMORY m68k_return_in_memory +#endif + static const struct attribute_spec m68k_attribute_table[] = { /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */ @@ -631,9 +639,8 @@ m68k_get_function_kind (tree func) { tree a; - if (TREE_CODE (func) != FUNCTION_DECL) - return false; - + gcc_assert (TREE_CODE (func) == FUNCTION_DECL); + a = lookup_attribute ("interrupt", DECL_ATTRIBUTES (func)); if (a != NULL_TREE) return m68k_fk_interrupt_handler; @@ -1250,14 +1257,30 @@ flags_in_68881 (void) return cc_status.flags & CC_IN_68881; } -/* Implement TARGET_FUNCTION_OK_FOR_SIBCALL_P. We cannot use sibcalls - for nested functions because we use the static chain register for - indirect calls. */ +/* Implement TARGET_FUNCTION_OK_FOR_SIBCALL_P. */ static bool -m68k_ok_for_sibcall_p (tree decl ATTRIBUTE_UNUSED, tree exp) +m68k_ok_for_sibcall_p (tree decl, tree exp) { - return TREE_OPERAND (exp, 2) == NULL; + enum m68k_function_kind kind; + + /* We cannot use sibcalls for nested functions because we use the + static chain register for indirect calls. */ + if (CALL_EXPR_STATIC_CHAIN (exp)) + return false; + + kind = m68k_get_function_kind (current_function_decl); + if (kind == m68k_fk_normal_function) + /* We can always sibcall from a normal function, because it's + undefined if it is calling an interrupt function. */ + return true; + + /* Otherwise we can only sibcall if the function kind is known to be + the same. */ + if (decl && m68k_get_function_kind (decl) == kind) + return true; + + return false; } /* Convert X to a legitimate function call memory reference and return the @@ -4347,7 +4370,7 @@ m68k_libcall_value (enum machine_mode mode) } rtx -m68k_function_value (tree valtype, tree func ATTRIBUTE_UNUSED) +m68k_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) { enum machine_mode mode; @@ -4386,3 +4409,25 @@ m68k_function_value (tree valtype, tree func ATTRIBUTE_UNUSED) else return gen_rtx_REG (mode, D0_REG); } + +/* Worker function for TARGET_RETURN_IN_MEMORY. */ +#if M68K_HONOR_TARGET_STRICT_ALIGNMENT +static bool +m68k_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +{ + enum machine_mode mode = TYPE_MODE (type); + + if (mode == BLKmode) + return true; + + /* If TYPE's known alignment is less than the alignment of MODE that + would contain the structure, then return in memory. We need to + do so to maintain the compatibility between code compiled with + -mstrict-align and that compiled with -mno-strict-align. */ + if (AGGREGATE_TYPE_P (type) + && TYPE_ALIGN (type) < GET_MODE_ALIGNMENT (mode)) + return true; + + return false; +} +#endif diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index 75d6d6a0e50..a5f6eedf070 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -310,6 +310,7 @@ along with GCC; see the file COPYING3. If not see #define BIGGEST_ALIGNMENT (TARGET_ALIGN_INT ? 32 : 16) #define STRICT_ALIGNMENT (TARGET_STRICT_ALIGNMENT) +#define M68K_HONOR_TARGET_STRICT_ALIGNMENT 1 #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32) diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 03f14fc860f..99ee142d6d1 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -138,7 +138,7 @@ ;; Mode macros for floating point operations. ;; Valid floating point modes -(define_mode_macro FP [SF DF (XF "TARGET_68881")]) +(define_mode_iterator FP [SF DF (XF "TARGET_68881")]) ;; Mnemonic infix to round result (define_mode_attr round [(SF "%$") (DF "%&") (XF "")]) ;; Mnemonic infix to round result for mul or div instruction diff --git a/gcc/config/mcore/mcore-protos.h b/gcc/config/mcore/mcore-protos.h index 301742fc9b6..93c7c11e766 100644 --- a/gcc/config/mcore/mcore-protos.h +++ b/gcc/config/mcore/mcore-protos.h @@ -36,11 +36,11 @@ extern int mcore_naked_function_p (void); #ifdef TREE_CODE #ifdef HAVE_MACHINE_MODES -extern int mcore_num_arg_regs (enum machine_mode, tree); +extern int mcore_num_arg_regs (enum machine_mode, const_tree); #endif /* HAVE_MACHINE_MODES */ #ifdef RTX_CODE -extern rtx mcore_function_value (tree, tree); +extern rtx mcore_function_value (const_tree, const_tree); #endif /* RTX_CODE */ #endif /* TREE_CODE */ diff --git a/gcc/config/mcore/mcore.c b/gcc/config/mcore/mcore.c index d419899c520..cb54ee5a4f3 100644 --- a/gcc/config/mcore/mcore.c +++ b/gcc/config/mcore/mcore.c @@ -126,7 +126,7 @@ static rtx emit_new_cond_insn (rtx, int); static rtx conditionalize_block (rtx); static void conditionalize_optimization (void); static void mcore_reorg (void); -static rtx handle_structs_in_regs (enum machine_mode, tree, int); +static rtx handle_structs_in_regs (enum machine_mode, const_tree, int); static void mcore_mark_dllexport (tree); static void mcore_mark_dllimport (tree); static int mcore_dllexport_p (tree); @@ -145,7 +145,7 @@ static int mcore_and_cost (rtx); static int mcore_ior_cost (rtx); static bool mcore_rtx_costs (rtx, int, int, int *); static void mcore_external_libcall (rtx); -static bool mcore_return_in_memory (tree, tree); +static bool mcore_return_in_memory (const_tree, const_tree); static int mcore_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); @@ -187,11 +187,11 @@ static int mcore_arg_partial_bytes (CUMULATIVE_ARGS *, #define TARGET_MACHINE_DEPENDENT_REORG mcore_reorg #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY mcore_return_in_memory @@ -2662,7 +2662,7 @@ mcore_override_options (void) hold a function argument of mode MODE and type TYPE. */ int -mcore_num_arg_regs (enum machine_mode mode, tree type) +mcore_num_arg_regs (enum machine_mode mode, const_tree type) { int size; @@ -2678,7 +2678,7 @@ mcore_num_arg_regs (enum machine_mode mode, tree type) } static rtx -handle_structs_in_regs (enum machine_mode mode, tree type, int reg) +handle_structs_in_regs (enum machine_mode mode, const_tree type, int reg) { int size; @@ -2722,7 +2722,7 @@ handle_structs_in_regs (enum machine_mode mode, tree type, int reg) } rtx -mcore_function_value (tree valtype, tree func ATTRIBUTE_UNUSED) +mcore_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) { enum machine_mode mode; int unsigned_p; @@ -3102,8 +3102,8 @@ mcore_external_libcall (rtx fun) /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -mcore_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +mcore_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { - HOST_WIDE_INT size = int_size_in_bytes (type); + const HOST_WIDE_INT size = int_size_in_bytes (type); return (size == -1 || size > 2 * UNITS_PER_WORD); } diff --git a/gcc/config/mips/mips-dsp.md b/gcc/config/mips/mips-dsp.md index 3fdcc593001..60b3a94ee6a 100644 --- a/gcc/config/mips/mips-dsp.md +++ b/gcc/config/mips/mips-dsp.md @@ -6,18 +6,18 @@ (CCDSP_CC_REGNUM 186) (CCDSP_EF_REGNUM 187)]) -;; This mode macro allows si, v2hi, v4qi for all possible modes in DSP ASE. -(define_mode_macro DSP [(SI "TARGET_DSP") - (V2HI "TARGET_DSP") - (V4QI "TARGET_DSP")]) - -;; This mode macro allows v2hi, v4qi for vector/SIMD data. -(define_mode_macro DSPV [(V2HI "TARGET_DSP") - (V4QI "TARGET_DSP")]) - -;; This mode macro allows si, v2hi for Q31 and V2Q15 fixed-point data. -(define_mode_macro DSPQ [(SI "TARGET_DSP") - (V2HI "TARGET_DSP")]) +;; This mode iterator allows si, v2hi, v4qi for all possible modes in DSP ASE. +(define_mode_iterator DSP [(SI "TARGET_DSP") + (V2HI "TARGET_DSP") + (V4QI "TARGET_DSP")]) + +;; This mode iterator allows v2hi, v4qi for vector/SIMD data. +(define_mode_iterator DSPV [(V2HI "TARGET_DSP") + (V4QI "TARGET_DSP")]) + +;; This mode iterator allows si, v2hi for Q31 and V2Q15 fixed-point data. +(define_mode_iterator DSPQ [(SI "TARGET_DSP") + (V2HI "TARGET_DSP")]) ;; DSP instructions use q for fixed-point data, and u for integer in the infix. (define_mode_attr dspfmt1 [(SI "q") (V2HI "q") (V4QI "u")]) diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index 0a42ce13c91..623774961e2 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -223,7 +223,7 @@ extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, extern struct rtx_def *function_arg (const CUMULATIVE_ARGS *, enum machine_mode, tree, int); extern int function_arg_boundary (enum machine_mode, tree); -extern bool mips_pad_arg_upward (enum machine_mode, tree); +extern bool mips_pad_arg_upward (enum machine_mode, const_tree); extern bool mips_pad_reg_upward (enum machine_mode, tree); extern void mips_va_start (tree, rtx); @@ -262,7 +262,7 @@ extern enum mips_loadgp_style mips_current_loadgp_style (void); extern void mips_expand_prologue (void); extern void mips_expand_epilogue (int); extern int mips_can_use_return_insn (void); -extern struct rtx_def *mips_function_value (tree, tree, enum machine_mode); +extern struct rtx_def *mips_function_value (const_tree, const_tree, enum machine_mode); extern bool mips_cannot_change_mode_class (enum machine_mode, enum machine_mode, enum reg_class); diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 6f7f2308a62..2c2f11eb66a 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -291,7 +291,7 @@ static bool mips_valid_base_register_p (rtx, enum machine_mode, int); static bool mips_classify_address (struct mips_address_info *, rtx, enum machine_mode, int); static bool mips_cannot_force_const_mem (rtx); -static bool mips_use_blocks_for_constant_p (enum machine_mode, rtx); +static bool mips_use_blocks_for_constant_p (enum machine_mode, const_rtx); static int mips_symbol_insns (enum mips_symbol_type, enum machine_mode); static bool mips16_unextended_reference_p (enum machine_mode mode, rtx, rtx); static rtx mips_force_temporary (rtx, rtx); @@ -344,10 +344,10 @@ static int symbolic_expression_p (rtx); static section *mips_select_rtx_section (enum machine_mode, rtx, unsigned HOST_WIDE_INT); static section *mips_function_rodata_section (tree); -static bool mips_in_small_data_p (tree); -static bool mips_use_anchors_for_symbol_p (rtx); -static int mips_fpr_return_fields (tree, tree *); -static bool mips_return_in_msb (tree); +static bool mips_in_small_data_p (const_tree); +static bool mips_use_anchors_for_symbol_p (const_rtx); +static int mips_fpr_return_fields (const_tree, tree *); +static bool mips_return_in_msb (const_tree); static rtx mips_return_fpr_pair (enum machine_mode mode, enum machine_mode mode1, HOST_WIDE_INT, enum machine_mode mode2, HOST_WIDE_INT); @@ -381,7 +381,7 @@ static bool mips_strict_matching_cpu_name_p (const char *, const char *); static bool mips_matching_cpu_name_p (const char *, const char *); static const struct mips_cpu_info *mips_parse_cpu (const char *); static const struct mips_cpu_info *mips_cpu_info_from_isa (int); -static bool mips_return_in_memory (tree, tree); +static bool mips_return_in_memory (const_tree, const_tree); static bool mips_strict_argument_naming (CUMULATIVE_ARGS *); static void mips_macc_chains_record (rtx); static void mips_macc_chains_reorder (rtx *, int); @@ -402,9 +402,9 @@ static void mips_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, static tree mips_build_builtin_va_list (void); static tree mips_gimplify_va_arg_expr (tree, tree, tree *, tree *); static bool mips_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode mode, - tree, bool); + const_tree, bool); static bool mips_callee_copies (CUMULATIVE_ARGS *, enum machine_mode mode, - tree, bool); + const_tree, bool); static int mips_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode mode, tree, bool); static bool mips_valid_pointer_mode (enum machine_mode); @@ -423,7 +423,7 @@ static rtx mips_expand_builtin_compare (enum mips_builtin_type, static rtx mips_expand_builtin_bposge (enum mips_builtin_type, rtx); static void mips_encode_section_info (tree, rtx, int); static void mips_extra_live_on_entry (bitmap); -static int mips_comp_type_attributes (tree, tree); +static int mips_comp_type_attributes (const_tree, const_tree); static int mips_mode_rep_extended (enum machine_mode, enum machine_mode); static bool mips_offset_within_alignment_p (rtx, HOST_WIDE_INT); static void mips_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; @@ -1278,11 +1278,11 @@ static const unsigned char mips16e_save_restore_regs[] = { #define TARGET_GIMPLIFY_VA_ARG_EXPR mips_gimplify_va_arg_expr #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY mips_return_in_memory @@ -1292,7 +1292,7 @@ static const unsigned char mips16e_save_restore_regs[] = { #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK mips_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true #undef TARGET_SETUP_INCOMING_VARARGS #define TARGET_SETUP_INCOMING_VARARGS mips_setup_incoming_varargs @@ -1357,13 +1357,13 @@ struct gcc_target targetm = TARGET_INITIALIZER; attributes on the given TYPE. */ static bool -mips_near_type_p (tree type) +mips_near_type_p (const_tree type) { return lookup_attribute ("near", TYPE_ATTRIBUTES (type)) != NULL; } static bool -mips_far_type_p (tree type) +mips_far_type_p (const_tree type) { return (lookup_attribute ("long_call", TYPE_ATTRIBUTES (type)) != NULL || lookup_attribute ("far", TYPE_ATTRIBUTES (type)) != NULL); @@ -1375,7 +1375,7 @@ mips_far_type_p (tree type) warning to be generated). */ static int -mips_comp_type_attributes (tree type1, tree type2) +mips_comp_type_attributes (const_tree type1, const_tree type2) { /* Check for mismatch of non-default calling convention. */ if (TREE_CODE (type1) != FUNCTION_TYPE) @@ -1412,11 +1412,10 @@ mips_split_plus (rtx x, rtx *base_ptr, HOST_WIDE_INT *offset_ptr) (in the STB_GLOBAL sense). */ static bool -mips_global_symbol_p (rtx x) +mips_global_symbol_p (const_rtx x) { - tree decl; + const_tree const decl = SYMBOL_REF_DECL (x); - decl = SYMBOL_REF_DECL (x); if (!decl) return !SYMBOL_REF_LOCAL_P (x); @@ -1429,7 +1428,7 @@ mips_global_symbol_p (rtx x) /* Return true if SYMBOL_REF X binds locally. */ static bool -mips_symbol_binds_local_p (rtx x) +mips_symbol_binds_local_p (const_rtx x) { return (SYMBOL_REF_DECL (x) ? targetm.binds_local_p (SYMBOL_REF_DECL (x)) @@ -1440,7 +1439,7 @@ mips_symbol_binds_local_p (rtx x) LABEL_REF X in context CONTEXT. */ static enum mips_symbol_type -mips_classify_symbol (rtx x, enum mips_symbol_context context) +mips_classify_symbol (const_rtx x, enum mips_symbol_context context) { if (TARGET_RTP_PIC) return SYMBOL_GOT_DISP; @@ -1789,7 +1788,7 @@ mips_cannot_force_const_mem (rtx x) static bool mips_use_blocks_for_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, - rtx x ATTRIBUTE_UNUSED) + const_rtx x ATTRIBUTE_UNUSED) { return !TARGET_MIPS16_PCREL_LOADS; } @@ -4376,7 +4375,7 @@ function_arg_boundary (enum machine_mode mode, tree type) byte does. */ bool -mips_pad_arg_upward (enum machine_mode mode, tree type) +mips_pad_arg_upward (enum machine_mode mode, const_tree type) { /* On little-endian targets, the first byte of every stack argument is passed in the first byte of the stack slot. */ @@ -5324,6 +5323,11 @@ override_options (void) flag_delayed_branch = 0; } + /* Prefer a call to memcpy over inline code when optimizing for size, + though see MOVE_RATIO in mips.h. */ + if (optimize_size && (target_flags_explicit & MASK_MEMCPY) == 0) + target_flags |= MASK_MEMCPY; + #ifdef MIPS_TFMODE_FORMAT REAL_MODE_FORMAT (TFmode) = &MIPS_TFMODE_FORMAT; #endif @@ -8367,7 +8371,7 @@ mips_function_rodata_section (tree decl) mips_classify_symbol decide when to use %gp_rel(...)($gp) accesses. */ static bool -mips_in_small_data_p (tree decl) +mips_in_small_data_p (const_tree decl) { HOST_WIDE_INT size; @@ -8416,7 +8420,7 @@ mips_in_small_data_p (tree decl) where the PC acts as an anchor. */ static bool -mips_use_anchors_for_symbol_p (rtx symbol) +mips_use_anchors_for_symbol_p (const_rtx symbol) { switch (mips_classify_symbol (symbol, SYMBOL_CONTEXT_MEM)) { @@ -8439,7 +8443,7 @@ mips_use_anchors_for_symbol_p (rtx symbol) type. */ static int -mips_fpr_return_fields (tree valtype, tree *fields) +mips_fpr_return_fields (const_tree valtype, tree *fields) { tree field; int i; @@ -8479,7 +8483,7 @@ mips_fpr_return_fields (tree valtype, tree *fields) - the structure is not returned in floating-point registers. */ static bool -mips_return_in_msb (tree valtype) +mips_return_in_msb (const_tree valtype) { tree fields[2]; @@ -8524,7 +8528,7 @@ mips_return_fpr_pair (enum machine_mode mode, VALTYPE is null and MODE is the mode of the return value. */ rtx -mips_function_value (tree valtype, tree func ATTRIBUTE_UNUSED, +mips_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, enum machine_mode mode) { if (valtype) @@ -8600,7 +8604,7 @@ mips_function_value (tree valtype, tree func ATTRIBUTE_UNUSED, static bool mips_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { if (mips_abi == ABI_EABI) @@ -8624,7 +8628,7 @@ mips_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, static bool mips_callee_copies (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED, - tree type ATTRIBUTE_UNUSED, bool named) + const_tree type ATTRIBUTE_UNUSED, bool named) { return mips_abi == ABI_EABI && named; } @@ -10808,7 +10812,7 @@ mips_hard_regno_nregs (int regno, enum machine_mode mode) course. */ static bool -mips_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED) +mips_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) { if (TARGET_OLDABI) return (TYPE_MODE (type) == BLKmode); diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 564f8bc0a2d..c3797e530dc 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2613,7 +2613,7 @@ while (0) #undef ASM_DECLARE_OBJECT_NAME #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \ - mips_declare_object (STREAM, NAME, "", ":\n", 0) + mips_declare_object (STREAM, NAME, "", ":\n") /* Globalizing directive for a label. */ #define GLOBAL_ASM_OP "\t.globl\t" @@ -2785,6 +2785,57 @@ while (0) #undef PTRDIFF_TYPE #define PTRDIFF_TYPE (POINTER_SIZE == 64 ? "long int" : "int") + +/* The base cost of a memcpy call, for MOVE_RATIO and friends. These + values were determined experimentally by benchmarking with CSiBE. + In theory, the call overhead is higher for TARGET_ABICALLS (especially + for o32 where we have to restore $gp afterwards as well as make an + indirect call), but in practice, bumping this up higher for + TARGET_ABICALLS doesn't make much difference to code size. */ + +#define MIPS_CALL_RATIO 8 + +/* Define MOVE_RATIO to encourage use of movmemsi when enabled, + since it should always generate code at least as good as + move_by_pieces(). But when inline movmemsi pattern is disabled + (i.e., with -mips16 or -mmemcpy), instead use a value approximating + the length of a memcpy call sequence, so that move_by_pieces will + generate inline code if it is shorter than a function call. + Since move_by_pieces_ninsns() counts memory-to-memory moves, but + we'll have to generate a load/store pair for each, halve the value of + MIPS_CALL_RATIO to take that into account. + The default value for MOVE_RATIO when HAVE_movmemsi is true is 2. + There is no point to setting it to less than this to try to disable + move_by_pieces entirely, because that also disables some desirable + tree-level optimizations, specifically related to optimizing a + one-byte string copy into a simple move byte operation. */ + +#define MOVE_RATIO \ + ((TARGET_MIPS16 || TARGET_MEMCPY) ? MIPS_CALL_RATIO / 2 : 2) + +/* For CLEAR_RATIO, when optimizing for size, give a better estimate + of the length of a memset call, but use the default otherwise. */ + +#define CLEAR_RATIO \ + (optimize_size ? MIPS_CALL_RATIO : 15) + +/* This is similar to CLEAR_RATIO, but for a non-zero constant, so when + optimizing for size adjust the ratio to account for the overhead of + loading the constant and replicating it across the word. */ + +#define SET_RATIO \ + (optimize_size ? MIPS_CALL_RATIO - 2 : 15) + +/* STORE_BY_PIECES_P can be used when copying a constant string, but + in that case each word takes 3 insns (lui, ori, sw), or more in + 64-bit mode, instead of 2 (lw, sw). For now we always fail this + and let the move_by_pieces code copy the string from read-only + memory. In the future, this could be tuned further for multi-issue + CPUs that can issue stores down one pipe and arithmetic instructions + down another; in that case, the lui/ori/sw combination would be a + win for long enough strings. */ + +#define STORE_BY_PIECES_P(SIZE, ALIGN) 0 #ifndef __mips16 /* Since the bits of the _init and _fini function is spread across diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index bac479f8dc5..44c3c9c135f 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -464,31 +464,31 @@ [(set_attr "type" "multi") (set_attr "can_delay" "no")]) -;; This mode macro allows 32-bit and 64-bit GPR patterns to be generated +;; This mode iterator allows 32-bit and 64-bit GPR patterns to be generated ;; from the same template. -(define_mode_macro GPR [SI (DI "TARGET_64BIT")]) +(define_mode_iterator GPR [SI (DI "TARGET_64BIT")]) -;; This mode macro allows :P to be used for patterns that operate on +;; This mode iterator allows :P to be used for patterns that operate on ;; pointer-sized quantities. Exactly one of the two alternatives will match. -(define_mode_macro P [(SI "Pmode == SImode") (DI "Pmode == DImode")]) +(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")]) -;; This mode macro allows :MOVECC to be used anywhere that a +;; This mode iterator allows :MOVECC to be used anywhere that a ;; conditional-move-type condition is needed. -(define_mode_macro MOVECC [SI (DI "TARGET_64BIT") (CC "TARGET_HARD_FLOAT")]) +(define_mode_iterator MOVECC [SI (DI "TARGET_64BIT") (CC "TARGET_HARD_FLOAT")]) -;; This mode macro allows the QI and HI extension patterns to be defined from +;; This mode iterator allows the QI and HI extension patterns to be defined from ;; the same template. -(define_mode_macro SHORT [QI HI]) +(define_mode_iterator SHORT [QI HI]) -;; This mode macro allows :ANYF to be used wherever a scalar or vector +;; This mode iterator allows :ANYF to be used wherever a scalar or vector ;; floating-point mode is allowed. -(define_mode_macro ANYF [(SF "TARGET_HARD_FLOAT") - (DF "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT") - (V2SF "TARGET_PAIRED_SINGLE_FLOAT")]) +(define_mode_iterator ANYF [(SF "TARGET_HARD_FLOAT") + (DF "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT") + (V2SF "TARGET_PAIRED_SINGLE_FLOAT")]) ;; Like ANYF, but only applies to scalar modes. -(define_mode_macro SCALARF [(SF "TARGET_HARD_FLOAT") - (DF "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT")]) +(define_mode_iterator SCALARF [(SF "TARGET_HARD_FLOAT") + (DF "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT")]) ;; In GPR templates, a string like "<d>subu" will expand to "subu" in the ;; 32-bit version and "dsubu" in the 64-bit version. @@ -545,26 +545,26 @@ (define_mode_attr recip_condition [(SF "ISA_HAS_FP4") (DF "ISA_HAS_FP4") (V2SF "TARGET_SB1")]) -;; This code macro allows all branch instructions to be generated from +;; This code iterator allows all branch instructions to be generated from ;; a single define_expand template. -(define_code_macro any_cond [unordered ordered unlt unge uneq ltgt unle ungt - eq ne gt ge lt le gtu geu ltu leu]) +(define_code_iterator any_cond [unordered ordered unlt unge uneq ltgt unle ungt + eq ne gt ge lt le gtu geu ltu leu]) -;; This code macro allows signed and unsigned widening multiplications +;; This code iterator allows signed and unsigned widening multiplications ;; to use the same template. -(define_code_macro any_extend [sign_extend zero_extend]) +(define_code_iterator any_extend [sign_extend zero_extend]) -;; This code macro allows the three shift instructions to be generated +;; This code iterator allows the three shift instructions to be generated ;; from the same template. -(define_code_macro any_shift [ashift ashiftrt lshiftrt]) +(define_code_iterator any_shift [ashift ashiftrt lshiftrt]) -;; This code macro allows all native floating-point comparisons to be +;; This code iterator allows all native floating-point comparisons to be ;; generated from the same template. -(define_code_macro fcond [unordered uneq unlt unle eq lt le]) +(define_code_iterator fcond [unordered uneq unlt unle eq lt le]) -;; This code macro is used for comparisons that can be implemented +;; This code iterator is used for comparisons that can be implemented ;; by swapping the operands. -(define_code_macro swapped_fcond [ge gt unge ungt]) +(define_code_iterator swapped_fcond [ge gt unge ungt]) ;; <u> expands to an empty string when doing a signed operation and ;; "u" when doing an unsigned operation. diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt index 4a752ec3987..6f6c109187c 100644 --- a/gcc/config/mips/mips.opt +++ b/gcc/config/mips/mips.opt @@ -173,7 +173,7 @@ Target Report RejectNegative Mask(LONG64) Use a 64-bit long type mmemcpy -Target Report Var(TARGET_MEMCPY) +Target Report Mask(MEMCPY) Don't optimize block moves mmips-tfile diff --git a/gcc/config/mmix/mmix-protos.h b/gcc/config/mmix/mmix-protos.h index f285e7bad3b..c963147717f 100644 --- a/gcc/config/mmix/mmix-protos.h +++ b/gcc/config/mmix/mmix-protos.h @@ -53,7 +53,7 @@ extern int mmix_local_regno (int); extern int mmix_dbx_register_number (int); extern int mmix_use_simple_return (void); extern void mmix_make_decl_one_only (tree); -extern rtx mmix_function_outgoing_value (tree, tree); +extern rtx mmix_function_outgoing_value (const_tree, const_tree); extern int mmix_function_value_regno_p (int); extern int mmix_data_alignment (tree, int); extern int mmix_constant_alignment (tree, int); diff --git a/gcc/config/mmix/mmix.c b/gcc/config/mmix/mmix.c index e8d3941ba6a..38fd0722d4e 100644 --- a/gcc/config/mmix/mmix.c +++ b/gcc/config/mmix/mmix.c @@ -134,8 +134,8 @@ static void mmix_file_start (void); static void mmix_file_end (void); static bool mmix_rtx_costs (rtx, int, int, int *); static rtx mmix_struct_value_rtx (tree, int); -static bool mmix_pass_by_reference (const CUMULATIVE_ARGS *, - enum machine_mode, tree, bool); +static bool mmix_pass_by_reference (CUMULATIVE_ARGS *, + enum machine_mode, const_tree, bool); /* Target structure macros. Listed by node. See `Using and Porting GCC' for a general description. */ @@ -187,7 +187,7 @@ static bool mmix_pass_by_reference (const CUMULATIVE_ARGS *, #define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #if 0 /* Apparently not doing TRT if int < register-size. FIXME: Perhaps FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */ @@ -592,8 +592,8 @@ mmix_function_arg (const CUMULATIVE_ARGS *argsp, everything that goes by value. */ static bool -mmix_pass_by_reference (const CUMULATIVE_ARGS *argsp, enum machine_mode mode, - tree type, bool named ATTRIBUTE_UNUSED) +mmix_pass_by_reference (CUMULATIVE_ARGS *argsp, enum machine_mode mode, + const_tree type, bool named ATTRIBUTE_UNUSED) { /* FIXME: Check: I'm not sure the must_pass_in_stack check is necessary. */ @@ -624,7 +624,7 @@ mmix_function_arg_regno_p (int regno, int incoming) /* FUNCTION_OUTGOING_VALUE. */ rtx -mmix_function_outgoing_value (tree valtype, tree func ATTRIBUTE_UNUSED) +mmix_function_outgoing_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) { enum machine_mode mode = TYPE_MODE (valtype); enum machine_mode cmode; @@ -1141,7 +1141,7 @@ mmix_encode_section_info (tree decl, rtx rtl, int first) char *newstr; /* Why is the return type of ggc_alloc_string const? */ - newstr = (char *) ggc_alloc_string ("", len + 1); + newstr = (char *) CONST_CAST (ggc_alloc_string ("", len + 1)); strcpy (newstr + 1, str); *newstr = '@'; diff --git a/gcc/config/mn10300/mn10300-protos.h b/gcc/config/mn10300/mn10300-protos.h index aec59985f84..633988b73d7 100644 --- a/gcc/config/mn10300/mn10300-protos.h +++ b/gcc/config/mn10300/mn10300-protos.h @@ -48,7 +48,7 @@ extern bool mn10300_wide_const_load_uses_clr (rtx operands[2]); #ifdef TREE_CODE extern struct rtx_def *function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int); -extern rtx mn10300_function_value (tree, tree, int); +extern rtx mn10300_function_value (const_tree, const_tree, int); #endif /* TREE_CODE */ extern void expand_prologue (void); diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c index 5e20edff352..0fb57cc1bd1 100644 --- a/gcc/config/mn10300/mn10300.c +++ b/gcc/config/mn10300/mn10300.c @@ -72,10 +72,10 @@ static int mn10300_address_cost_1 (rtx, int *); static int mn10300_address_cost (rtx); static bool mn10300_rtx_costs (rtx, int, int, int *); static void mn10300_file_start (void); -static bool mn10300_return_in_memory (tree, tree); +static bool mn10300_return_in_memory (const_tree, const_tree); static rtx mn10300_builtin_saveregs (void); static bool mn10300_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); + const_tree, bool); static int mn10300_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); @@ -102,7 +102,7 @@ static int mn10300_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, #define TARGET_ENCODE_SECTION_INFO mn10300_encode_section_info #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY mn10300_return_in_memory #undef TARGET_PASS_BY_REFERENCE @@ -1431,7 +1431,7 @@ initial_offset (int from, int to) /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -mn10300_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +mn10300_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { /* Return values > 8 bytes in length in memory. */ return (int_size_in_bytes (type) > 8 @@ -1482,7 +1482,7 @@ mn10300_va_start (tree valist, rtx nextarg) static bool mn10300_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { unsigned HOST_WIDE_INT size; @@ -1592,7 +1592,7 @@ mn10300_arg_partial_bytes (CUMULATIVE_ARGS *cum, enum machine_mode mode, callers relying on this extra copy. */ rtx -mn10300_function_value (tree valtype, tree func, int outgoing) +mn10300_function_value (const_tree valtype, const_tree func, int outgoing) { rtx rv; enum machine_mode mode = TYPE_MODE (valtype); diff --git a/gcc/config/mn10300/mn10300.h b/gcc/config/mn10300/mn10300.h index 949b0c5ebd2..9cb8244c1f6 100644 --- a/gcc/config/mn10300/mn10300.h +++ b/gcc/config/mn10300/mn10300.h @@ -734,7 +734,7 @@ while (0) switch (XINT ((X), 1)) \ { \ case UNSPEC_INT_LABEL: \ - asm_fprintf ((STREAM), ".%LLIL%d", \ + asm_fprintf ((STREAM), ".%LLIL" HOST_WIDE_INT_PRINT_DEC, \ INTVAL (XVECEXP ((X), 0, 0))); \ break; \ case UNSPEC_PIC: \ diff --git a/gcc/config/mt/mt-protos.h b/gcc/config/mt/mt-protos.h index c0c7671ca2c..5c959edd9ad 100644 --- a/gcc/config/mt/mt-protos.h +++ b/gcc/config/mt/mt-protos.h @@ -60,6 +60,6 @@ extern void mt_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, extern rtx mt_function_arg (const CUMULATIVE_ARGS *, enum machine_mode, tree, int, int); extern void mt_va_start (tree, rtx); extern enum reg_class mt_secondary_reload_class (enum reg_class, enum machine_mode, rtx); -extern rtx mt_function_value (tree, enum machine_mode, tree); +extern rtx mt_function_value (const_tree, enum machine_mode, const_tree); #endif #endif diff --git a/gcc/config/mt/mt.c b/gcc/config/mt/mt.c index 57864ad7c1e..9e281a154e1 100644 --- a/gcc/config/mt/mt.c +++ b/gcc/config/mt/mt.c @@ -631,9 +631,9 @@ mt_arg_partial_bytes (CUMULATIVE_ARGS * pcum, /* Implement TARGET_PASS_BY_REFERENCE hook. */ static bool mt_pass_by_reference (CUMULATIVE_ARGS * cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, - tree type, - bool named ATTRIBUTE_UNUSED) + enum machine_mode mode ATTRIBUTE_UNUSED, + const_tree type, + bool named ATTRIBUTE_UNUSED) { return (type && int_size_in_bytes (type) > 4 * UNITS_PER_WORD); } @@ -1464,7 +1464,7 @@ mt_secondary_reload_class (enum reg_class class ATTRIBUTE_UNUSED, /* Handle FUNCTION_VALUE, FUNCTION_OUTGOING_VALUE, and LIBCALL_VALUE macros. */ rtx -mt_function_value (tree valtype, enum machine_mode mode, tree func_decl ATTRIBUTE_UNUSED) +mt_function_value (const_tree valtype, enum machine_mode mode, const_tree func_decl ATTRIBUTE_UNUSED) { if ((mode) == DImode || (mode) == DFmode) return gen_rtx_MEM (mode, gen_rtx_REG (mode, RETURN_VALUE_REGNUM)); @@ -1631,7 +1631,7 @@ mt_split_words (enum machine_mode nmode, /* Implement TARGET_MUST_PASS_IN_STACK hook. */ static bool -mt_pass_in_stack (enum machine_mode mode ATTRIBUTE_UNUSED, tree type) +mt_pass_in_stack (enum machine_mode mode ATTRIBUTE_UNUSED, const_tree type) { return (((type) != 0 && (TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST @@ -2469,7 +2469,7 @@ const struct attribute_spec mt_attribute_table[]; #undef TARGET_STRUCT_VALUE_RTX #define TARGET_STRUCT_VALUE_RTX mt_struct_value_rtx #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_PASS_BY_REFERENCE #define TARGET_PASS_BY_REFERENCE mt_pass_by_reference #undef TARGET_MUST_PASS_IN_STACK diff --git a/gcc/config/pa/pa-protos.h b/gcc/config/pa/pa-protos.h index b2c1471de62..9d5c2b9e7f2 100644 --- a/gcc/config/pa/pa-protos.h +++ b/gcc/config/pa/pa-protos.h @@ -124,7 +124,7 @@ extern int pc_or_label_operand (rtx, enum machine_mode); #ifdef ARGS_SIZE_RTX /* expr.h defines ARGS_SIZE_RTX and `enum direction' */ #ifdef TREE_CODE -extern enum direction function_arg_padding (enum machine_mode, tree); +extern enum direction function_arg_padding (enum machine_mode, const_tree); #endif #endif /* ARGS_SIZE_RTX */ extern int non_hard_reg_operand (rtx, enum machine_mode); @@ -160,9 +160,9 @@ extern int reloc_needed (tree); #ifdef RTX_CODE extern rtx function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int); -extern rtx function_value (tree, tree); +extern rtx function_value (const_tree, const_tree); #endif -extern bool pa_return_in_memory (tree, tree); +extern bool pa_return_in_memory (const_tree, const_tree); #endif /* TREE_CODE */ extern void pa_asm_output_aligned_bss (FILE *, const char *, diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index bb856003e0e..24b798e1265 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -126,7 +126,7 @@ static void pa_init_builtins (void); static rtx hppa_builtin_saveregs (void); static tree hppa_gimplify_va_arg_expr (tree, tree, tree *, tree *); static bool pa_scalar_mode_supported_p (enum machine_mode); -static bool pa_commutative_p (rtx x, int outer_code); +static bool pa_commutative_p (const_rtx x, int outer_code); static void copy_fp_args (rtx) ATTRIBUTE_UNUSED; static int length_fp_args (rtx) ATTRIBUTE_UNUSED; static inline void pa_file_start_level (void) ATTRIBUTE_UNUSED; @@ -148,7 +148,7 @@ static void pa_hpux_init_libfuncs (void); #endif static rtx pa_struct_value_rtx (tree, int); static bool pa_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); + const_tree, bool); static int pa_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); static struct machine_function * pa_init_machine_status (void); @@ -285,9 +285,9 @@ static size_t n_deferred_plabels = 0; #endif #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_STRUCT_VALUE_RTX #define TARGET_STRUCT_VALUE_RTX pa_struct_value_rtx @@ -5789,7 +5789,7 @@ pa_eh_return_handler_rtx (void) static bool pa_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { HOST_WIDE_INT size; @@ -5806,7 +5806,7 @@ pa_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED, } enum direction -function_arg_padding (enum machine_mode mode, tree type) +function_arg_padding (enum machine_mode mode, const_tree type) { if (mode == BLKmode || (TARGET_64BIT && type && AGGREGATE_TYPE_P (type))) @@ -8135,7 +8135,7 @@ pa_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED) space register selection rules for memory addresses. Therefore, we don't consider a + b == b + a, as this might be inside a MEM. */ static bool -pa_commutative_p (rtx x, int outer_code) +pa_commutative_p (const_rtx x, int outer_code) { return (COMMUTATIVE_P (x) && (TARGET_NO_SPACE_REGS @@ -9032,7 +9032,7 @@ insn_refs_are_delayed (rtx insn) to match the HP Compiler ABI. */ rtx -function_value (tree valtype, tree func ATTRIBUTE_UNUSED) +function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) { enum machine_mode valmode; @@ -9492,7 +9492,7 @@ pa_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, /* Worker function for TARGET_RETURN_IN_MEMORY. */ bool -pa_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +pa_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { /* SOM ABI says that objects larger than 64 bits are returned in memory. PA64 ABI says that objects larger than 128 bits are returned in memory. diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c index 700616b386c..ba649eac60f 100644 --- a/gcc/config/pdp11/pdp11.c +++ b/gcc/config/pdp11/pdp11.c @@ -146,7 +146,7 @@ static bool pdp11_assemble_integer (rtx, unsigned int, int); static void pdp11_output_function_prologue (FILE *, HOST_WIDE_INT); static void pdp11_output_function_epilogue (FILE *, HOST_WIDE_INT); static bool pdp11_rtx_costs (rtx, int, int, int *); -static bool pdp11_return_in_memory (tree, tree); +static bool pdp11_return_in_memory (const_tree, const_tree); /* Initialize the GCC target structure. */ #undef TARGET_ASM_BYTE_OP @@ -384,7 +384,8 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size) /* change fp -> r5 due to the compile error on libgcc2.c */ for (i =7 ; i >= 0 ; i--) if (df_regs_ever_live_p (i) && ! call_used_regs[i]) - fprintf(stream, "\tmov %#o(r5), %s\n",(-fsize-2*j--)&0xffff, reg_names[i]); + fprintf(stream, "\tmov %#" HOST_WIDE_INT_PRINT "o(r5), %s\n", + (-fsize-2*j--)&0xffff, reg_names[i]); /* get ACs */ via_ac = FIRST_PSEUDO_REGISTER -1; @@ -402,7 +403,8 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size) && df_regs_ever_live_p (i) && ! call_used_regs[i]) { - fprintf(stream, "\tldd %#o(r5), %s\n", (-fsize-k)&0xffff, reg_names[i]); + fprintf(stream, "\tldd %#" HOST_WIDE_INT_PRINT "o(r5), %s\n", + (-fsize-k)&0xffff, reg_names[i]); k -= 8; } @@ -412,7 +414,8 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size) { gcc_assert (LOAD_FPU_REG_P(via_ac)); - fprintf(stream, "\tldd %#o(r5), %s\n", (-fsize-k)&0xffff, reg_names[via_ac]); + fprintf(stream, "\tldd %#" HOST_WIDE_INT_PRINT "o(r5), %s\n", + (-fsize-k)&0xffff, reg_names[via_ac]); fprintf(stream, "\tstd %s, %s\n", reg_names[via_ac], reg_names[i]); k -= 8; } @@ -453,7 +456,8 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size) fprintf(stream, "\tmov (sp)+, %s\n", reg_names[i]); if (fsize) - fprintf((stream), "\tadd $%#o, sp\n", (fsize)&0xffff); + fprintf((stream), "\tadd $%#" HOST_WIDE_INT_PRINT "o, sp\n", + (fsize)&0xffff); } fprintf (stream, "\trts pc\n"); @@ -1080,8 +1084,7 @@ static const int move_costs[N_REG_CLASSES][N_REG_CLASSES] = -- as we do here with 22 -- or not ? */ int -register_move_cost(c1, c2) - enum reg_class c1, c2; +register_move_cost(enum reg_class c1, enum reg_class c2) { return move_costs[(int)c1][(int)c2]; } @@ -1752,7 +1755,7 @@ output_addr_const_pdp11 (FILE *file, rtx x) /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -pdp11_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +pdp11_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { /* Should probably return DImode and DFmode in memory, lest we fill up all regs! diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h index 711474170d5..4b8c231376e 100644 --- a/gcc/config/pdp11/pdp11.h +++ b/gcc/config/pdp11/pdp11.h @@ -983,7 +983,7 @@ extern struct rtx_def *cc0_reg_rtx; long sval[2]; \ REAL_VALUE_FROM_CONST_DOUBLE (r, X); \ REAL_VALUE_TO_TARGET_DOUBLE (r, sval); \ - fprintf (FILE, "$%#o", sval[0] >> 16); } \ + fprintf (FILE, "$%#lo", sval[0] >> 16); } \ else { putc ('$', FILE); output_addr_const_pdp11 (FILE, X); }} /* Print a memory address as an operand to reference that memory location. */ diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 029874d57be..2261a9369f3 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -162,13 +162,13 @@ ]) ;; Vec int modes -(define_mode_macro VI [V4SI V8HI V16QI]) +(define_mode_iterator VI [V4SI V8HI V16QI]) ;; Short vec in modes -(define_mode_macro VIshort [V8HI V16QI]) +(define_mode_iterator VIshort [V8HI V16QI]) ;; Vec float modes -(define_mode_macro VF [V4SF]) -;; Vec modes, pity mode macros are not composable -(define_mode_macro V [V4SI V8HI V16QI V4SF]) +(define_mode_iterator VF [V4SF]) +;; Vec modes, pity mode iterators are not composable +(define_mode_iterator V [V4SI V8HI V16QI V4SF]) (define_mode_attr VI_char [(V4SI "w") (V8HI "h") (V16QI "b")]) diff --git a/gcc/config/rs6000/ppu_intrinsics.h b/gcc/config/rs6000/ppu_intrinsics.h new file mode 100644 index 00000000000..742c5da134a --- /dev/null +++ b/gcc/config/rs6000/ppu_intrinsics.h @@ -0,0 +1,729 @@ +/* PPU intrinsics as defined by the C/C++ Language extension for Cell BEA. + Copyright (C) 2007 Free Software Foundation, Inc. + + This file is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at your option) + any later version. + + This file is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + for more details. + + You should have received a copy of the GNU General Public License + along with this file; see the file COPYING. If not, write to the Free + Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA + 02110-1301, USA. */ + +/* As a special exception, if you include this header file into source files + compiled by GCC, this header file does not by itself cause the resulting + executable to be covered by the GNU General Public License. This exception + does not however invalidate any other reasons why the executable file might + be covered by the GNU General Public License. */ + +/* TODO: + misc ops (traps) + supervisor/hypervisor mode ops. */ + +#ifndef _PPU_INTRINSICS_H +#define _PPU_INTRINSICS_H + +#if !defined(__PPU__) && !defined(__ppc__) && !defined(__ppc64__) \ + && !defined(__GNUC__) + #error ppu_intrinsics.h included on wrong platform/compiler +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * unsigned int __cntlzw(unsigned int) + * unsigned int __cntlzd(unsigned long long) + * int __mulhw(int, int) + * unsigned int __mulhwu(unsigned int, unsigned int) + * long long __mulhd(long long, long long) + * unsigned long long __mulhdu(unsigned long long, unsigned long long) + * + * void __sync(void) + * void __isync(void) + * void __lwsync(void) + * void __eieio(void) + * + * void __nop(void) + * void __cctpl(void) + * void __cctpm(void) + * void __cctph(void) + * void __db8cyc(void) + * void __db10cyc(void) + * void __db12cyc(void) + * void __db16cyc(void) + * + * void __mtspr(unsigned int spr, unsigned long long value) + * unsigned long long __mfspr(unsigned int spr) + * unsigned long long __mftb(void) + * + * void __icbi(void *base) + * void __dcbi(void *base) + * + * void __dcbf(void *base) + * void __dcbz(void *base) + * void __dcbst(void *base) + * void __dcbtst(void *base) + * void __dcbt(void *base) + * void __dcbt_TH1000(void *EATRUNC, bool D, bool UG, int ID) + * void __dcbt_TH1010(bool GO, int S, int UNITCNT, bool T, bool U, int ID) + * + * unsigned __lwarx(void *base) + * unsigned long long __ldarx(void *base) + * bool __stwcx(void *base, unsigned value) + * bool __stdcx(void *base, unsigned long long value) + * + * unsigned short __lhbrx(void *base) + * unsigned int __lwbrx(void *base) + * unsigned long long __ldbrx(void *base) + * void __sthbrx(void *base, unsigned short value) + * void __stwbrx(void *base, unsigned int value) + * void __stdbrx(void *base, unsigned long long value) + * + * double __fabs(double x) + * float __fabsf(float x) + * double __fnabs(double x) + * float __fnabsf(float x) + * double __fmadd(double x, double y, double z) + * double __fmsub(double x, double y, double z) + * double __fnmadd(double x, double y, double z) + * double __fnmsub(double x, double y, double z) + * float __fmadds(float x, float y, float z) + * float __fmsubs(float x, float y, float z) + * float __fnmadds(float x, float y, float z) + * float __fnmsubs(float x, float y, float z) + * double __fsel(double x, double y, double z) + * float __fsels(float x, float y, float z) + * double __frsqrte(double x) + * float __fres(float x) + * double __fsqrt(double x) + * float __fsqrts(float x) + * long long __fctid(double x) + * long long __fctiw(double x) + * double __fcfid(long long x) + * double __mffs(void) + * void __mtfsf(int mask, double value) + * void __mtfsfi(int bits, int field) + * void __mtfsb0(int) + * void __mtfsb1(int) + * double __setflm(double) + * + * dcbt intrinsics + * void __protected_unlimited_stream_set (unsigned int direction, const void *add, unsigned int ID) + * void __protected_stream_set (unsigned int direction, const void *add, unsigned int ID) + * void __protected_stream_stop_all (void) + * void __protected_stream_stop (unsigned int ID) + * void __protected_stream_count (unsigned int unit_cnt, unsigned int ID) + * void __protected_stream_go (void) + */ + +typedef int __V4SI __attribute__((vector_size(16))); + +#define __cntlzw(v) __builtin_clz(v) +#define __cntlzd(v) __builtin_clzll(v) + +#define __mulhw(a,b) __extension__ \ + ({int result; \ + __asm__ ("mulhw %0,%1,%2" \ + : "=r" (result) \ + : "r" ((int) (a)), \ + "r" ((int) (b))); \ + result; }) + +#define __mulhwu(a,b) __extension__ \ + ({unsigned int result; \ + __asm__ ("mulhwu %0,%1,%2" \ + : "=r" (result) \ + : "r" ((unsigned int) (a)), \ + "r" ((unsigned int) (b))); \ + result; }) + +#ifdef __powerpc64__ +#define __mulhd(a,b) __extension__ \ + ({ long long result; \ + __asm__ ("mulhd %0,%1,%2" \ + : "=r" (result) \ + : "r" ((long long) (a)), \ + "r" ((long long) (b))); \ + result; }) + +#define __mulhdu(a,b) __extension__ \ + ({unsigned long long result; \ + __asm__ ("mulhdu %0,%1,%2" \ + : "=r" (result) \ + : "r" ((unsigned long long) (a)), \ + "r" ((unsigned long long) (b))); \ + result; }) +#endif /* __powerpc64__ */ + +#define __sync() __asm__ volatile ("sync" : : : "memory") +#define __isync() __asm__ volatile ("isync" : : : "memory") +#define __lwsync() __asm__ volatile ("lwsync" : : : "memory") +#define __eieio() __asm__ volatile ("eieio" : : : "memory") + +#define __nop() __asm__ volatile ("ori 0,0,0" : : : "memory") +#define __cctpl() __asm__ volatile ("or 1,1,1" : : : "memory") +#define __cctpm() __asm__ volatile ("or 2,2,2" : : : "memory") +#define __cctph() __asm__ volatile ("or 3,3,3" : : : "memory") +#define __db8cyc() __asm__ volatile ("or 28,28,28" : : : "memory") +#define __db10cyc() __asm__ volatile ("or 29,29,29" : : : "memory") +#define __db12cyc() __asm__ volatile ("or 30,30,30" : : : "memory") +#define __db16cyc() __asm__ volatile ("or 31,31,31" : : : "memory") + +#ifdef __powerpc64__ +#define __mtspr(spr, value) \ + __asm__ volatile ("mtspr %0,%1" : : "n" (spr), "r" (value)) + +#define __mfspr(spr) __extension__ \ + ({ unsigned long long result; \ + __asm__ volatile ("mfspr %0,%1" : "=r" (result) : "n" (spr)); \ + result; }) +#endif /* __powerpc64__ */ + +#ifdef __powerpc64__ +/* Work around the hadware bug in the current Cell implemention. */ +#define __mftb() __extension__ \ + ({ unsigned long long result; \ + __asm__ volatile ("1: mftb %[current_tb]\n" \ + "\tcmpwi 7, %[current_tb], 0\n" \ + "\tbeq- 7, 1b" \ + : [current_tb] "=r" (result): \ + :"cr7"); \ + result; }) +#else +#define __mftb() __extension__ \ + ({ unsigned long long result; \ + unsigned long t; \ + __asm__ volatile ("1:\n" \ + "\tmftbu %0\n" \ + "\tmftb %L0\n" \ + "\tmftbu %1\n" \ + "\tcmpw %0,%1\n" \ + "\tbne 1b" \ + : "=r" (result), "=r" (t)); \ + result; }) +#endif /* __powerpc64__ */ + +#define __dcbf(base) \ + __asm__ volatile ("dcbf %y0" : "=Z" (*(__V4SI*) (base)) : : "memory") + +#define __dcbz(base) \ + __asm__ volatile ("dcbz %y0" : "=Z" (*(__V4SI*) (base)) : : "memory") + +#define __dcbst(base) \ + __asm__ volatile ("dcbst %y0" : "=Z" (*(__V4SI*) (base)) : : "memory") + +#define __dcbtst(base) \ + __asm__ volatile ("dcbtst %y0" : "=Z" (*(__V4SI*) (base)) : : "memory") + +#define __dcbt(base) \ + __asm__ volatile ("dcbt %y0" : "=Z" (*(__V4SI*) (base)) : : "memory") + +#define __icbi(base) \ + __asm__ volatile ("icbi %y0" : "=Z" (*(__V4SI*) (base)) : : "memory") + +#define __dcbt_TH1000(EATRUNC, D, UG, ID) \ + __asm__ volatile ("dcbt %y0,8" \ + : "=Z" (*(__V4SI*) (__SIZE_TYPE__)((((__SIZE_TYPE__) (EATRUNC)) & ~0x7F) \ + | ((((D) & 1) << 6) \ + | (((UG) & 1) << 5) \ + | ((ID) & 0xF)))) : : "memory") + +#define __dcbt_TH1010(GO, S, UNITCNT, T, U, ID) \ + __asm__ volatile ("dcbt %y0,10" \ + : "=Z" (*(__V4SI*) (__SIZE_TYPE__)((((__SIZE_TYPE__) (GO) & 1) << 31) \ + | (((S) & 0x3) << 29) \ + | (((UNITCNT) & 0x3FF) << 7) \ + | (((T) & 1) << 6) \ + | (((U) & 1) << 5) \ + | ((ID) & 0xF))) : : "memory") + +#define __protected_unlimited_stream_set(DIRECTION, ADDR, ID) \ + __dcbt_TH1000 ((ADDR), (DIRECTION)>>1, 0, (ID)) + +#define __protected_stream_set(DIRECTION, ADDR, ID) \ + __dcbt_TH1000 ((ADDR), (DIRECTION)>>1, 1, (ID)) + +#define __protected_stream_stop_all() \ + __dcbt_TH1010 (0, 3, 0, 0, 0, 0) + +#define __protected_stream_stop(ID) \ + __dcbt_TH1010 (0, 2, 0, 0, 0, (ID)) + +#define __protected_stream_count(CNT, ID) \ + __dcbt_TH1010 (0, 0, (CNT), 0, 0, (ID)) + +#define __protected_stream_go() \ + __dcbt_TH1010 (1, 0, 0, 0, 0, 0) + +#define __lhbrx(base) __extension__ \ + ({unsigned short result; \ + typedef struct {char a[2];} halfwordsize; \ + halfwordsize *ptrp = (halfwordsize*)(void*)(base); \ + __asm__ ("lhbrx %0,%y1" \ + : "=r" (result) \ + : "Z" (*ptrp)); \ + result; }) + +#define __lwbrx(base) __extension__ \ + ({unsigned int result; \ + typedef struct {char a[4];} wordsize; \ + wordsize *ptrp = (wordsize*)(void*)(base); \ + __asm__ ("lwbrx %0,%y1" \ + : "=r" (result) \ + : "Z" (*ptrp)); \ + result; }) + + +#ifdef __powerpc64__ +#define __ldbrx(base) __extension__ \ + ({unsigned long long result; \ + typedef struct {char a[8];} doublewordsize; \ + doublewordsize *ptrp = (doublewordsize*)(void*)(base); \ + __asm__ ("ldbrx %0,%y1" \ + : "=r" (result) \ + : "Z" (*ptrp)); \ + result; }) +#else +#define __ldbrx(base) __extension__ \ + ({unsigned long long result; \ + typedef struct {char a[8];} doublewordsize; \ + doublewordsize *ptrp = (doublewordsize*)(void*)(base); \ + __asm__ ("lwbrx %L0,%y1\n" \ + "\tlwbrx %0,%y2" \ + : "=&r" (result) \ + : "Z" (*ptrp), "Z" (*((char *) ptrp + 4))); \ + result; }) +#endif /* __powerpc64__ */ + + +#define __sthbrx(base, value) do { \ + typedef struct {char a[2];} halfwordsize; \ + halfwordsize *ptrp = (halfwordsize*)(void*)(base); \ + __asm__ ("sthbrx %1,%y0" \ + : "=Z" (*ptrp) \ + : "r" (value)); \ + } while (0) + +#define __stwbrx(base, value) do { \ + typedef struct {char a[4];} wordsize; \ + wordsize *ptrp = (wordsize*)(void*)(base); \ + __asm__ ("stwbrx %1,%y0" \ + : "=Z" (*ptrp) \ + : "r" (value)); \ + } while (0) + +#ifdef __powerpc64__ +#define __stdbrx(base, value) do { \ + typedef struct {char a[8];} doublewordsize; \ + doublewordsize *ptrp = (doublewordsize*)(void*)(base); \ + __asm__ ("stdbrx %1,%y0" \ + : "=Z" (*ptrp) \ + : "r" (value)); \ + } while (0) +#else +#define __stdbrx(base, value) do { \ + typedef struct {char a[8];} doublewordsize; \ + doublewordsize *ptrp = (doublewordsize*)(void*)(base); \ + __asm__ ("stwbrx %L2,%y0\n" \ + "\tstwbrx %2,%y1" \ + : "=Z" (*ptrp), "=Z" (*((char *) ptrp + 4)) \ + : "r" (value)); \ + } while (0) +#endif /* __powerpc64__ */ + + +#define __lwarx(base) __extension__ \ + ({unsigned int result; \ + typedef struct {char a[4];} wordsize; \ + wordsize *ptrp = (wordsize*)(void*)(base); \ + __asm__ volatile ("lwarx %0,%y1" \ + : "=r" (result) \ + : "Z" (*ptrp)); \ + result; }) + +#ifdef __powerpc64__ +#define __ldarx(base) __extension__ \ + ({unsigned long long result; \ + typedef struct {char a[8];} doublewordsize; \ + doublewordsize *ptrp = (doublewordsize*)(void*)(base); \ + __asm__ volatile ("ldarx %0,%y1" \ + : "=r" (result) \ + : "m" (*ptrp)); \ + result; }) +#endif /* __powerpc64__ */ + +#define __stwcx(base, value) __extension__ \ + ({unsigned int result; \ + typedef struct {char a[4];} wordsize; \ + wordsize *ptrp = (wordsize*)(void*)(base); \ + __asm__ volatile ("stwcx. %2,%y1\n" \ + "\tmfocrf %0,0x80" \ + : "=r" (result), \ + "=Z" (*ptrp) \ + : "r" (value) : "cr0"); \ + (result & 0x20000000); }) + + +#ifdef __powerpc64__ +#define __stdcx(base, value) __extension__ \ + ({unsigned long long result; \ + typedef struct {char a[8];} doublewordsize; \ + doublewordsize *ptrp = (doublewordsize*)(void*)(base); \ + __asm__ ("stdcx. %2,%y1\n" \ + "\tmfocrf %0,0x80" \ + : "=r" (result), \ + "=Z" (*ptrp) \ + : "r" (value) : "cr0"); \ + (result & 0x20000000); }) +#endif /* __powerpc64__ */ + +#define __mffs() __extension__ \ + ({double result; \ + __asm__ volatile ("mffs %0" : "=f" (result)); \ + result; }) + +#define __mtfsf(mask,value) \ + __asm__ volatile ("mtfsf %0,%1" : : "n" (mask), "f" ((double) (value))) + +#define __mtfsfi(bits,field) \ + __asm__ volatile ("mtfsfi %0,%1" : : "n" (bits), "n" (field)) + +#define __mtfsb0(bit) __asm__ volatile ("mtfsb0 %0" : : "n" (bit)) +#define __mtfsb1(bit) __asm__ volatile ("mtfsb1 %0" : : "n" (bit)) + +#define __setflm(v) __extension__ \ + ({double result; \ + __asm__ volatile ("mffs %0\n\tmtfsf 255,%1" \ + : "=&f" (result) \ + : "f" ((double) (v))); \ + result; }) + +/* __builtin_fabs may perform unnecessary rounding. */ + +/* Rename __fabs and __fabsf to work around internal prototypes defined + in bits/mathcalls.h with some glibc versions. */ +#define __fabs __ppu_fabs +#define __fabsf __ppu_fabsf + +static __inline__ double __fabs(double x) __attribute__((always_inline)); +static __inline__ double +__fabs(double x) +{ + double r; + __asm__("fabs %0,%1" : "=f"(r) : "f"(x)); + return r; +} + +static __inline__ float __fabsf(float x) __attribute__((always_inline)); +static __inline__ float +__fabsf(float x) +{ + float r; + __asm__("fabs %0,%1" : "=f"(r) : "f"(x)); + return r; +} + +static __inline__ double __fnabs(double x) __attribute__((always_inline)); +static __inline__ double +__fnabs(double x) +{ + double r; + __asm__("fnabs %0,%1" : "=f"(r) : "f"(x)); + return r; +} + +static __inline__ float __fnabsf(float x) __attribute__((always_inline)); +static __inline__ float +__fnabsf(float x) +{ + float r; + __asm__("fnabs %0,%1" : "=f"(r) : "f"(x)); + return r; +} + +static __inline__ double __fmadd(double x, double y, double z) + __attribute__((always_inline)); +static __inline__ double +__fmadd(double x, double y, double z) +{ + double r; + __asm__("fmadd %0,%1,%2,%3" : "=f"(r) : "f"(x),"f"(y),"f"(z)); + return r; +} + +static __inline__ double __fmsub(double x, double y, double z) + __attribute__((always_inline)); +static __inline__ double +__fmsub(double x, double y, double z) +{ + double r; + __asm__("fmsub %0,%1,%2,%3" : "=f"(r) : "f"(x),"f"(y),"f"(z)); + return r; +} + +static __inline__ double __fnmadd(double x, double y, double z) + __attribute__((always_inline)); +static __inline__ double +__fnmadd(double x, double y, double z) +{ + double r; + __asm__("fnmadd %0,%1,%2,%3" : "=f"(r) : "f"(x),"f"(y),"f"(z)); + return r; +} + +static __inline__ double __fnmsub(double x, double y, double z) + __attribute__((always_inline)); +static __inline__ double +__fnmsub(double x, double y, double z) +{ + double r; + __asm__("fnmsub %0,%1,%2,%3" : "=f"(r) : "f"(x),"f"(y),"f"(z)); + return r; +} + +static __inline__ float __fmadds(float x, float y, float z) + __attribute__((always_inline)); +static __inline__ float +__fmadds(float x, float y, float z) +{ + float r; + __asm__("fmadds %0,%1,%2,%3" : "=f"(r) : "f"(x),"f"(y),"f"(z)); + return r; +} + +static __inline__ float __fmsubs(float x, float y, float z) + __attribute__((always_inline)); +static __inline__ float +__fmsubs(float x, float y, float z) +{ + float r; + __asm__("fmsubs %0,%1,%2,%3" : "=f"(r) : "f"(x),"f"(y),"f"(z)); + return r; +} + +static __inline__ float __fnmadds(float x, float y, float z) + __attribute__((always_inline)); +static __inline__ float +__fnmadds(float x, float y, float z) +{ + float r; + __asm__("fnmadds %0,%1,%2,%3" : "=f"(r) : "f"(x),"f"(y),"f"(z)); + return r; +} + +static __inline__ float __fnmsubs(float x, float y, float z) + __attribute__((always_inline)); +static __inline__ float +__fnmsubs(float x, float y, float z) +{ + float r; + __asm__("fnmsubs %0,%1,%2,%3" : "=f"(r) : "f"(x),"f"(y),"f"(z)); + return r; +} + +static __inline__ double __fsel(double x, double y, double z) + __attribute__((always_inline)); +static __inline__ double +__fsel(double x, double y, double z) +{ + double r; + __asm__("fsel %0,%1,%2,%3" : "=f"(r) : "f"(x),"f"(y),"f"(z)); + return r; +} + +static __inline__ float __fsels(float x, float y, float z) + __attribute__((always_inline)); +static __inline__ float +__fsels(float x, float y, float z) +{ + float r; + __asm__("fsel %0,%1,%2,%3" : "=f"(r) : "f"(x),"f"(y),"f"(z)); + return r; +} + +static __inline__ double __frsqrte(double x) __attribute__((always_inline)); +static __inline__ double +__frsqrte(double x) +{ + double r; + __asm__("frsqrte %0,%1" : "=f" (r) : "f" (x)); + return r; +} + +static __inline__ float __fres(float x) __attribute__((always_inline)); +static __inline__ float +__fres(float x) +{ + float r; + __asm__("fres %0,%1" : "=f"(r) : "f"(x)); + return r; +} + +static __inline__ double __fsqrt(double x) __attribute__((always_inline)); +static __inline__ double +__fsqrt(double x) +{ + double r; + __asm__("fsqrt %0,%1" : "=f"(r) : "f"(x)); + return r; +} + +static __inline__ float __fsqrts(float x) __attribute__((always_inline)); +static __inline__ float +__fsqrts(float x) +{ + float r; + __asm__("fsqrts %0,%1" : "=f"(r) : "f"(x)); + return r; +} + +static __inline__ double __fmul (double a, double b) __attribute__ ((always_inline)); +static __inline__ double +__fmul(double a, double b) +{ + double d; + __asm__ ("fmul %0,%1,%2" : "=f" (d) : "f" (a), "f" (b)); + return d; +} + +static __inline__ float __fmuls (float a, float b) __attribute__ ((always_inline)); +static __inline__ float +__fmuls (float a, float b) +{ + float d; + __asm__ ("fmuls %0,%1,%2" : "=f" (d) : "f" (a), "f" (b)); + return d; +} + +static __inline__ float __frsp (float a) __attribute__ ((always_inline)); +static __inline__ float +__frsp (float a) +{ + float d; + __asm__ ("frsp %0,%1" : "=f" (d) : "f" (a)); + return d; +} + +static __inline__ double __fcfid (long long a) __attribute__((always_inline)); +static __inline__ double +__fcfid (long long a) +{ + double d; + __asm__ ("fcfid %0,%1" : "=f" (d) : "f" (a)); + return d; +} + +static __inline__ long long __fctid (double a) __attribute__ ((always_inline)); +static __inline__ long long +__fctid (double a) +{ + long long d; + __asm__ ("fctid %0,%1" : "=f" (d) : "f" (a)); + return d; +} + +static __inline__ long long __fctidz (double a) __attribute__ ((always_inline)); +static __inline__ long long +__fctidz (double a) +{ + long long d; + __asm__ ("fctidz %0,%1" : "=f" (d) : "f" (a)); + return d; +} + +static __inline__ int __fctiw (double a) __attribute__ ((always_inline)); +static __inline__ int +__fctiw (double a) +{ + unsigned long long d; + __asm__ ("fctiw %0,%1" : "=f" (d) : "f" (a)); + return (int) d; +} + +static __inline__ int __fctiwz (double a) __attribute__ ((always_inline)); +static __inline__ int +__fctiwz (double a) +{ + long long d; + __asm__ ("fctiwz %0,%1" : "=f" (d) : "f" (a)); + return (int) d; +} + +#ifdef __powerpc64__ +#define __rldcl(a,b,mb) __extension__ \ + ({ \ + unsigned long long d; \ + __asm__ ("rldcl %0,%1,%2,%3" : "=r" (d) : "r" (a), "r" (b), "i" (mb)); \ + d; \ + }) + +#define __rldcr(a,b,me) __extension__ \ + ({ \ + unsigned long long d; \ + __asm__ ("rldcr %0,%1,%2,%3" : "=r" (d) : "r" (a), "r" (b), "i" (me)); \ + d; \ + }) + +#define __rldic(a,sh,mb) __extension__ \ + ({ \ + unsigned long long d; \ + __asm__ ("rldic %0,%1,%2,%3" : "=r" (d) : "r" (a), "i" (sh), "i" (mb)); \ + d; \ + }) + +#define __rldicl(a,sh,mb) __extension__ \ + ({ \ + unsigned long long d; \ + __asm__ ("rldicl %0,%1,%2,%3" : "=r" (d) : "r" (a), "i" (sh), "i" (mb)); \ + d; \ + }) + +#define __rldicr(a,sh,me) __extension__ \ + ({ \ + unsigned long long d; \ + __asm__ ("rldicr %0,%1,%2,%3" : "=r" (d) : "r" (a), "i" (sh), "i" (me)); \ + d; \ + }) + +#define __rldimi(a,b,sh,mb) __extension__ \ + ({ \ + unsigned long long d; \ + __asm__ ("rldimi %0,%1,%2,%3" : "=r" (d) : "r" (b), "i" (sh), "i" (mb), "0" (a)); \ + d; \ + }) +#endif /* __powerpc64__ */ + +#define __rlwimi(a,b,sh,mb,me) __extension__ \ + ({ \ + unsigned int d; \ + __asm__ ("rlwimi %0,%1,%2,%3,%4" : "=r" (d) : "r" (b), "i" (sh), "i" (mb), "i" (me), "0" (a)); \ + d; \ + }) + +#define __rlwinm(a,sh,mb,me) __extension__ \ + ({ \ + unsigned int d; \ + __asm__ ("rlwinm %0,%1,%2,%3,%4" : "=r" (d) : "r" (a), "i" (sh), "i" (mb), "i" (me)); \ + d; \ + }) + +#define __rlwnm(a,b,mb,me) __extension__ \ + ({ \ + unsigned int d; \ + __asm__ ("rlwnm %0,%1,%2,%3,%4" : "=r" (d) : "r" (a), "r" (b), "i" (mb), "i" (me)); \ + d; \ + }) + +#ifdef __cplusplus +} +#endif + +#endif /* _PPU_INTRINSICS_H */ diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 877aa16c9c1..f56c176b37c 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -349,10 +349,10 @@ ;; Return 1 if the operand is an offsettable memory operand. (define_predicate "offsettable_mem_operand" - (and (match_code "mem") - (match_test "offsettable_address_p (reload_completed - || reload_in_progress, - mode, XEXP (op, 0))"))) + (and (match_operand 0 "memory_operand") + (match_test "GET_CODE (XEXP (op, 0)) != PRE_INC + && GET_CODE (XEXP (op, 0)) != PRE_DEC + && GET_CODE (XEXP (op, 0)) != PRE_MODIFY"))) ;; Return 1 if the operand is a memory operand with an address divisible by 4 (define_predicate "word_offset_memref_operand" diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index d759c367c98..c73da36eb9a 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -123,15 +123,15 @@ extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, extern int function_arg_boundary (enum machine_mode, tree); extern rtx function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int); extern tree altivec_resolve_overloaded_builtin (tree, tree); -extern rtx rs6000_function_value (tree, tree); +extern rtx rs6000_function_value (const_tree, const_tree); extern rtx rs6000_libcall_value (enum machine_mode); extern rtx rs6000_va_arg (tree, tree); extern int function_ok_for_sibcall (tree); extern void rs6000_elf_declare_function_name (FILE *, const char *, tree); -extern bool rs6000_elf_in_small_data_p (tree); +extern bool rs6000_elf_in_small_data_p (const_tree); #ifdef ARGS_SIZE_RTX /* expr.h defines ARGS_SIZE_RTX and `enum direction' */ -extern enum direction function_arg_padding (enum machine_mode, tree); +extern enum direction function_arg_padding (enum machine_mode, const_tree); #endif /* ARGS_SIZE_RTX */ #endif /* TREE_CODE */ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 44e492854c5..010b532993e 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -702,7 +702,7 @@ struct processor_costs power6_cost = { static bool rs6000_function_ok_for_sibcall (tree, tree); -static const char *rs6000_invalid_within_doloop (rtx); +static const char *rs6000_invalid_within_doloop (const_rtx); static rtx rs6000_generate_compare (enum rtx_code); static void rs6000_emit_stack_tie (void); static void rs6000_frame_related (rtx, rtx, HOST_WIDE_INT, rtx, rtx); @@ -728,10 +728,10 @@ static void rs6000_assemble_visibility (tree, int); static int rs6000_ra_ever_killed (void); static tree rs6000_handle_longcall_attribute (tree *, tree, tree, int, bool *); static tree rs6000_handle_altivec_attribute (tree *, tree, tree, int, bool *); -static bool rs6000_ms_bitfield_layout_p (tree); +static bool rs6000_ms_bitfield_layout_p (const_tree); static tree rs6000_handle_struct_attribute (tree *, tree, tree, int, bool *); static void rs6000_eliminate_indexed_memrefs (rtx operands[2]); -static const char *rs6000_mangle_type (tree); +static const char *rs6000_mangle_type (const_tree); extern const struct attribute_spec rs6000_attribute_table[]; static void rs6000_set_default_type_attributes (tree); static bool rs6000_reg_live_or_pic_offset_p (int); @@ -740,7 +740,7 @@ static void rs6000_output_function_epilogue (FILE *, HOST_WIDE_INT); static void rs6000_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static rtx rs6000_emit_set_long_const (rtx, HOST_WIDE_INT, HOST_WIDE_INT); -static bool rs6000_return_in_memory (tree, tree); +static bool rs6000_return_in_memory (const_tree, const_tree); static void rs6000_file_start (void); #if TARGET_ELF static int rs6000_elf_reloc_rw_mask (void); @@ -753,7 +753,7 @@ static section *rs6000_elf_select_rtx_section (enum machine_mode, rtx, static void rs6000_elf_encode_section_info (tree, rtx, int) ATTRIBUTE_UNUSED; #endif -static bool rs6000_use_blocks_for_constant_p (enum machine_mode, rtx); +static bool rs6000_use_blocks_for_constant_p (enum machine_mode, const_rtx); #if TARGET_XCOFF static void rs6000_xcoff_asm_output_anchor (rtx); static void rs6000_xcoff_asm_globalize_label (FILE *, const char *); @@ -805,7 +805,7 @@ static tree rs6000_builtin_mul_widen_odd (tree); static tree rs6000_builtin_conversion (enum tree_code, tree); static void def_builtin (int, const char *, tree, int); -static bool rs6000_vector_alignment_reachable (tree, bool); +static bool rs6000_vector_alignment_reachable (const_tree, bool); static void rs6000_init_builtins (void); static rtx rs6000_expand_unop_builtin (enum insn_code, tree, rtx); static rtx rs6000_expand_binop_builtin (enum insn_code, tree, rtx); @@ -850,7 +850,7 @@ static void compute_save_world_info (rs6000_stack_t *info_ptr); static void is_altivec_return_reg (rtx, void *); static rtx generate_set_vrsave (rtx, rs6000_stack_t *, int); int easy_vector_constant (rtx, enum machine_mode); -static bool rs6000_is_opaque_type (tree); +static bool rs6000_is_opaque_type (const_tree); static rtx rs6000_dwarf_register_span (rtx); static void rs6000_init_dwarf_reg_sizes_extra (tree); static rtx rs6000_legitimize_tls_address (rtx, enum tls_model); @@ -871,19 +871,19 @@ static void rs6000_darwin64_record_arg_flush (CUMULATIVE_ARGS *, HOST_WIDE_INT, rtx[], int *); static void rs6000_darwin64_record_arg_recurse (CUMULATIVE_ARGS *, - tree, HOST_WIDE_INT, - rtx[], int *); -static rtx rs6000_darwin64_record_arg (CUMULATIVE_ARGS *, tree, int, bool); + const_tree, HOST_WIDE_INT, + rtx[], int *); +static rtx rs6000_darwin64_record_arg (CUMULATIVE_ARGS *, const_tree, int, bool); static rtx rs6000_mixed_function_arg (enum machine_mode, tree, int); static void rs6000_move_block_from_reg (int regno, rtx x, int nregs); static void setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int); static bool rs6000_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); + const_tree, bool); static int rs6000_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); -static const char *invalid_arg_for_unprototyped_fn (tree, tree, tree); +static const char *invalid_arg_for_unprototyped_fn (const_tree, const_tree, const_tree); #if TARGET_MACHO static void macho_branch_islands (void); static int no_previous_def (tree function_name); @@ -893,7 +893,7 @@ static void rs6000_darwin_file_start (void); static tree rs6000_build_builtin_va_list (void); static tree rs6000_gimplify_va_arg (tree, tree, tree *, tree *); -static bool rs6000_must_pass_in_stack (enum machine_mode, tree); +static bool rs6000_must_pass_in_stack (enum machine_mode, const_tree); static bool rs6000_scalar_mode_supported_p (enum machine_mode); static bool rs6000_vector_mode_supported_p (enum machine_mode); static int get_vec_cmp_insn (enum rtx_code, enum machine_mode, @@ -1100,7 +1100,7 @@ static const char alt_reg_names[][8] = #define TARGET_ASM_OUTPUT_MI_THUNK rs6000_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true #undef TARGET_FUNCTION_OK_FOR_SIBCALL #define TARGET_FUNCTION_OK_FOR_SIBCALL rs6000_function_ok_for_sibcall @@ -1125,9 +1125,9 @@ static const char alt_reg_names[][8] = /* On rs6000, function arguments are promoted, as are function return values. */ #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY rs6000_return_in_memory @@ -1141,7 +1141,7 @@ static const char alt_reg_names[][8] = #undef TARGET_PRETEND_OUTGOING_VARARGS_NAMED #define TARGET_PRETEND_OUTGOING_VARARGS_NAMED hook_bool_CUMULATIVE_ARGS_true #undef TARGET_SPLIT_COMPLEX_ARG -#define TARGET_SPLIT_COMPLEX_ARG hook_bool_tree_true +#define TARGET_SPLIT_COMPLEX_ARG hook_bool_const_tree_true #undef TARGET_MUST_PASS_IN_STACK #define TARGET_MUST_PASS_IN_STACK rs6000_must_pass_in_stack #undef TARGET_PASS_BY_REFERENCE @@ -1914,7 +1914,7 @@ rs6000_builtin_mul_widen_odd (tree type) how may iterations are required to reach desired alignment. */ static bool -rs6000_vector_alignment_reachable (tree type ATTRIBUTE_UNUSED, bool is_packed) +rs6000_vector_alignment_reachable (const_tree type ATTRIBUTE_UNUSED, bool is_packed) { if (is_packed) return false; @@ -4765,7 +4765,7 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode) memory always. The cast to unsigned makes -1 > 8. */ static bool -rs6000_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +rs6000_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { /* In the darwin64 abi, try to use registers for larger structs if possible. */ @@ -4887,7 +4887,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, /* Return true if TYPE must be passed on the stack and not in registers. */ static bool -rs6000_must_pass_in_stack (enum machine_mode mode, tree type) +rs6000_must_pass_in_stack (enum machine_mode mode, const_tree type) { if (DEFAULT_ABI == ABI_AIX || TARGET_64BIT) return must_pass_in_stack_var_size (mode, type); @@ -4905,7 +4905,7 @@ rs6000_must_pass_in_stack (enum machine_mode mode, tree type) argument slot. */ enum direction -function_arg_padding (enum machine_mode mode, tree type) +function_arg_padding (enum machine_mode mode, const_tree type) { #ifndef AGGREGATE_PADDING_FIXED #define AGGREGATE_PADDING_FIXED 0 @@ -5464,7 +5464,7 @@ rs6000_darwin64_record_arg_flush (CUMULATIVE_ARGS *cum, /* Recursive workhorse for the following. */ static void -rs6000_darwin64_record_arg_recurse (CUMULATIVE_ARGS *cum, tree type, +rs6000_darwin64_record_arg_recurse (CUMULATIVE_ARGS *cum, const_tree type, HOST_WIDE_INT startbitpos, rtx rvec[], int *k) { @@ -5534,7 +5534,7 @@ rs6000_darwin64_record_arg_recurse (CUMULATIVE_ARGS *cum, tree type, calling convention. */ static rtx -rs6000_darwin64_record_arg (CUMULATIVE_ARGS *orig_cum, tree type, +rs6000_darwin64_record_arg (CUMULATIVE_ARGS *orig_cum, const_tree type, int named, bool retval) { rtx rvec[FIRST_PSEUDO_REGISTER]; @@ -5992,7 +5992,7 @@ rs6000_arg_partial_bytes (CUMULATIVE_ARGS *cum, enum machine_mode mode, static bool rs6000_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { if (DEFAULT_ABI == ABI_V4 && TARGET_IEEEQUAD && mode == TFmode) @@ -7737,13 +7737,13 @@ altivec_expand_dst_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, tree arg0, arg1, arg2; enum machine_mode mode0, mode1, mode2; rtx pat, op0, op1, op2; - struct builtin_description *d; + const struct builtin_description *d; size_t i; *expandedp = false; /* Handle DST variants. */ - d = (struct builtin_description *) bdesc_dst; + d = bdesc_dst; for (i = 0; i < ARRAY_SIZE (bdesc_dst); i++, d++) if (d->code == fcode) { @@ -7896,8 +7896,8 @@ altivec_expand_vec_ext_builtin (tree exp, rtx target) static rtx altivec_expand_builtin (tree exp, rtx target, bool *expandedp) { - struct builtin_description *d; - struct builtin_description_predicates *dp; + const struct builtin_description *d; + const struct builtin_description_predicates *dp; size_t i; enum insn_code icode; tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -8026,13 +8026,13 @@ altivec_expand_builtin (tree exp, rtx target, bool *expandedp) } /* Expand abs* operations. */ - d = (struct builtin_description *) bdesc_abs; + d = bdesc_abs; for (i = 0; i < ARRAY_SIZE (bdesc_abs); i++, d++) if (d->code == fcode) return altivec_expand_abs_builtin (d->icode, exp, target); /* Expand the AltiVec predicates. */ - dp = (struct builtin_description_predicates *) bdesc_altivec_preds; + dp = bdesc_altivec_preds; for (i = 0; i < ARRAY_SIZE (bdesc_altivec_preds); i++, dp++) if (dp->code == fcode) return altivec_expand_predicate_builtin (dp->icode, dp->opcode, @@ -8407,7 +8407,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); unsigned int fcode = DECL_FUNCTION_CODE (fndecl); - struct builtin_description *d; + const struct builtin_description *d; size_t i; rtx ret; bool success; @@ -8492,7 +8492,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, return rs6000_expand_binop_builtin (d->icode, exp, target); /* Handle simple ternary operations. */ - d = (struct builtin_description *) bdesc_3arg; + d = bdesc_3arg; for (i = 0; i < ARRAY_SIZE (bdesc_3arg); i++, d++) if (d->code == fcode) return rs6000_expand_ternop_builtin (d->icode, exp, target); @@ -8867,8 +8867,8 @@ spe_init_builtins (void) static void altivec_init_builtins (void) { - struct builtin_description *d; - struct builtin_description_predicates *dp; + const struct builtin_description *d; + const struct builtin_description_predicates *dp; size_t i; tree ftype; @@ -9049,12 +9049,12 @@ altivec_init_builtins (void) def_builtin (MASK_ALTIVEC, "__builtin_vec_ctu", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_CTU); /* Add the DST variants. */ - d = (struct builtin_description *) bdesc_dst; + d = bdesc_dst; for (i = 0; i < ARRAY_SIZE (bdesc_dst); i++, d++) def_builtin (d->mask, d->name, void_ftype_pcvoid_int_int, d->code); /* Initialize the predicates. */ - dp = (struct builtin_description_predicates *) bdesc_altivec_preds; + dp = bdesc_altivec_preds; for (i = 0; i < ARRAY_SIZE (bdesc_altivec_preds); i++, dp++) { enum machine_mode mode1; @@ -9092,7 +9092,7 @@ altivec_init_builtins (void) } /* Initialize the abs* operators. */ - d = (struct builtin_description *) bdesc_abs; + d = bdesc_abs; for (i = 0; i < ARRAY_SIZE (bdesc_abs); i++, d++) { enum machine_mode mode0; @@ -9223,7 +9223,7 @@ altivec_init_builtins (void) static void rs6000_common_init_builtins (void) { - struct builtin_description *d; + const struct builtin_description *d; size_t i; tree v4sf_ftype_v4sf_v4sf_v16qi @@ -9420,7 +9420,7 @@ rs6000_common_init_builtins (void) V8HI_type_node, V8HI_type_node, NULL_TREE); /* Add the simple ternary operators. */ - d = (struct builtin_description *) bdesc_3arg; + d = bdesc_3arg; for (i = 0; i < ARRAY_SIZE (bdesc_3arg); i++, d++) { enum machine_mode mode0, mode1, mode2, mode3; @@ -12757,14 +12757,16 @@ rs6000_emit_sync (enum rtx_code code, enum machine_mode mode, ishift = GET_MODE_BITSIZE (SImode) - GET_MODE_BITSIZE (mode); shift = GEN_INT (ishift); + used_m = change_address (used_m, SImode, 0); } else { rtx addrSI, aligned_addr; int shift_mask = mode == QImode ? 0x18 : 0x10; - addrSI = force_reg (SImode, gen_lowpart_common (SImode, - XEXP (used_m, 0))); + addrSI = gen_lowpart_common (SImode, + force_reg (Pmode, XEXP (used_m, 0))); + addrSI = force_reg (SImode, addrSI); shift = gen_reg_rtx (SImode); emit_insn (gen_rlwinm (shift, addrSI, GEN_INT (3), @@ -12777,14 +12779,14 @@ rs6000_emit_sync (enum rtx_code code, enum machine_mode mode, 1, OPTAB_LIB_WIDEN); used_m = change_address (used_m, SImode, aligned_addr); set_mem_align (used_m, 32); - /* It's safe to keep the old alias set of USED_M, because - the operation is atomic and only affects the original - USED_M. */ - if (GET_CODE (m) == NOT) - m = gen_rtx_NOT (SImode, used_m); - else - m = used_m; } + /* It's safe to keep the old alias set of USED_M, because + the operation is atomic and only affects the original + USED_M. */ + if (GET_CODE (m) == NOT) + m = gen_rtx_NOT (SImode, used_m); + else + m = used_m; if (GET_CODE (op) == NOT) { @@ -14119,7 +14121,7 @@ rs6000_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED) PowerPC uses the COUNT register for branch on table instructions. */ static const char * -rs6000_invalid_within_doloop (rtx insn) +rs6000_invalid_within_doloop (const_rtx insn) { if (CALL_P (insn)) return "Function call in the loop."; @@ -19003,7 +19005,7 @@ rs6000_handle_altivec_attribute (tree *node, elements; we must teach the compiler how to mangle them. */ static const char * -rs6000_mangle_type (tree type) +rs6000_mangle_type (const_tree type) { type = TYPE_MAIN_VARIANT (type); @@ -19133,7 +19135,7 @@ rs6000_handle_struct_attribute (tree *node, tree name, } static bool -rs6000_ms_bitfield_layout_p (tree record_type) +rs6000_ms_bitfield_layout_p (const_tree record_type) { return (TARGET_USE_MS_BITFIELD_LAYOUT && !lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (record_type))) @@ -19234,8 +19236,18 @@ rs6000_elf_encode_section_info (tree decl, rtx rtl, int first) } } +static inline bool +compare_section_name (const char *section, const char *template) +{ + int len; + + len = strlen (template); + return (strncmp (section, template, len) == 0 + && (section[len] == 0 || section[len] == '.')); +} + bool -rs6000_elf_in_small_data_p (tree decl) +rs6000_elf_in_small_data_p (const_tree decl) { if (rs6000_sdata == SDATA_NONE) return false; @@ -19251,10 +19263,12 @@ rs6000_elf_in_small_data_p (tree decl) if (TREE_CODE (decl) == VAR_DECL && DECL_SECTION_NAME (decl)) { const char *section = TREE_STRING_POINTER (DECL_SECTION_NAME (decl)); - if (strcmp (section, ".sdata") == 0 - || strcmp (section, ".sdata2") == 0 - || strcmp (section, ".sbss") == 0 - || strcmp (section, ".sbss2") == 0 + if (compare_section_name (section, ".sdata") + || compare_section_name (section, ".sdata2") + || compare_section_name (section, ".gnu.linkonce.s") + || compare_section_name (section, ".sbss") + || compare_section_name (section, ".sbss2") + || compare_section_name (section, ".gnu.linkonce.sb") || strcmp (section, ".PPC.EMB.sdata0") == 0 || strcmp (section, ".PPC.EMB.sbss0") == 0) return true; @@ -19279,7 +19293,7 @@ rs6000_elf_in_small_data_p (tree decl) /* Implement TARGET_USE_BLOCKS_FOR_CONSTANT_P. */ static bool -rs6000_use_blocks_for_constant_p (enum machine_mode mode, rtx x) +rs6000_use_blocks_for_constant_p (enum machine_mode mode, const_rtx x) { return !ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x, mode); } @@ -20762,7 +20776,7 @@ rs6000_complex_function_value (enum machine_mode mode) fp1, unless -msoft-float. */ rtx -rs6000_function_value (tree valtype, tree func ATTRIBUTE_UNUSED) +rs6000_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) { enum machine_mode mode; unsigned int regno; @@ -20965,7 +20979,7 @@ rs6000_initial_elimination_offset (int from, int to) /* Return true if TYPE is a SPE or AltiVec opaque type. */ static bool -rs6000_is_opaque_type (tree type) +rs6000_is_opaque_type (const_tree type) { return (type == opaque_V2SI_type_node || type == opaque_V2SF_type_node @@ -21092,7 +21106,7 @@ rs6000_vector_mode_supported_p (enum machine_mode mode) /* Target hook for invalid_arg_for_unprototyped_fn. */ static const char * -invalid_arg_for_unprototyped_fn (tree typelist, tree funcdecl, tree val) +invalid_arg_for_unprototyped_fn (const_tree typelist, const_tree funcdecl, const_tree val) { return (!rs6000_darwin64_abi && typelist == 0 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index be682c61331..4bc71128278 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -176,30 +176,30 @@ (include "darwin.md") -;; Mode macros +;; Mode iterators -; This mode macro allows :GPR to be used to indicate the allowable size +; This mode iterator allows :GPR to be used to indicate the allowable size ; of whole values in GPRs. -(define_mode_macro GPR [SI (DI "TARGET_POWERPC64")]) +(define_mode_iterator GPR [SI (DI "TARGET_POWERPC64")]) ; Any supported integer mode. -(define_mode_macro INT [QI HI SI DI TI]) +(define_mode_iterator INT [QI HI SI DI TI]) ; Any supported integer mode that fits in one register. -(define_mode_macro INT1 [QI HI SI (DI "TARGET_POWERPC64")]) +(define_mode_iterator INT1 [QI HI SI (DI "TARGET_POWERPC64")]) ; extend modes for DImode -(define_mode_macro QHSI [QI HI SI]) +(define_mode_iterator QHSI [QI HI SI]) ; SImode or DImode, even if DImode doesn't fit in GPRs. -(define_mode_macro SDI [SI DI]) +(define_mode_iterator SDI [SI DI]) ; The size of a pointer. Also, the size of the value that a record-condition ; (one with a '.') will compare. -(define_mode_macro P [(SI "TARGET_32BIT") (DI "TARGET_64BIT")]) +(define_mode_iterator P [(SI "TARGET_32BIT") (DI "TARGET_64BIT")]) ; Any hardware-supported floating-point mode -(define_mode_macro FP [(SF "TARGET_HARD_FLOAT") +(define_mode_iterator FP [(SF "TARGET_HARD_FLOAT") (DF "TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)") (TF "!TARGET_IEEEQUAD && TARGET_HARD_FLOAT @@ -5821,7 +5821,7 @@ (float:DF (match_operand:SI 1 "gpc_reg_operand" "r"))) (use (match_operand:SI 2 "gpc_reg_operand" "r")) (use (match_operand:DF 3 "gpc_reg_operand" "f")) - (clobber (match_operand:DF 4 "memory_operand" "=o")) + (clobber (match_operand:DF 4 "offsettable_mem_operand" "=o")) (clobber (match_operand:DF 5 "gpc_reg_operand" "=&f")) (clobber (match_operand:SI 6 "gpc_reg_operand" "=&r"))] "! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS" @@ -5892,7 +5892,7 @@ (unsigned_float:DF (match_operand:SI 1 "gpc_reg_operand" "r"))) (use (match_operand:SI 2 "gpc_reg_operand" "r")) (use (match_operand:DF 3 "gpc_reg_operand" "f")) - (clobber (match_operand:DF 4 "memory_operand" "=o")) + (clobber (match_operand:DF 4 "offsettable_mem_operand" "=o")) (clobber (match_operand:DF 5 "gpc_reg_operand" "=&f"))] "! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS" "#" @@ -5959,7 +5959,7 @@ [(set (match_operand:SI 0 "gpc_reg_operand" "=r") (fix:SI (match_operand:DF 1 "gpc_reg_operand" "f"))) (clobber (match_operand:DI 2 "gpc_reg_operand" "=f")) - (clobber (match_operand:DI 3 "memory_operand" "=o"))] + (clobber (match_operand:DI 3 "offsettable_mem_operand" "=o"))] "(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT && TARGET_FPRS" "#" "&& (can_create_pseudo_p () || offsettable_nonstrict_memref_p (operands[3]))" @@ -6112,7 +6112,7 @@ (define_insn_and_split "floatsidf_ppc64" [(set (match_operand:DF 0 "gpc_reg_operand" "=f") (float:DF (match_operand:SI 1 "gpc_reg_operand" "r"))) - (clobber (match_operand:DI 2 "memory_operand" "=o")) + (clobber (match_operand:DI 2 "offsettable_mem_operand" "=o")) (clobber (match_operand:DI 3 "gpc_reg_operand" "=r")) (clobber (match_operand:DI 4 "gpc_reg_operand" "=f"))] "TARGET_POWERPC64 && !TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS" @@ -6127,7 +6127,7 @@ (define_insn_and_split "floatunssidf_ppc64" [(set (match_operand:DF 0 "gpc_reg_operand" "=f") (unsigned_float:DF (match_operand:SI 1 "gpc_reg_operand" "r"))) - (clobber (match_operand:DI 2 "memory_operand" "=o")) + (clobber (match_operand:DI 2 "offsettable_mem_operand" "=o")) (clobber (match_operand:DI 3 "gpc_reg_operand" "=r")) (clobber (match_operand:DI 4 "gpc_reg_operand" "=f"))] "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS" @@ -8800,7 +8800,7 @@ (clobber (match_operand:DF 2 "gpc_reg_operand" "=f")) (clobber (match_operand:DF 3 "gpc_reg_operand" "=&f")) (clobber (match_operand:DI 4 "gpc_reg_operand" "=f")) - (clobber (match_operand:DI 5 "memory_operand" "=o"))] + (clobber (match_operand:DI 5 "offsettable_mem_operand" "=o"))] "!TARGET_IEEEQUAD && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128" "#" diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md index d49c12661c8..b7b2fef8eab 100644 --- a/gcc/config/rs6000/spe.md +++ b/gcc/config/rs6000/spe.md @@ -36,13 +36,13 @@ ]) ;; Modes using a 64-bit register. -(define_mode_macro SPE64 [DF V4HI V2SF V1DI V2SI]) +(define_mode_iterator SPE64 [DF V4HI V2SF V1DI V2SI]) ;; Likewise, but allow TFmode (two registers) as well. -(define_mode_macro SPE64TF [DF V4HI V2SF V1DI V2SI TF]) +(define_mode_iterator SPE64TF [DF V4HI V2SF V1DI V2SI TF]) ;; DImode and TImode. -(define_mode_macro DITI [DI TI]) +(define_mode_iterator DITI [DI TI]) (define_insn "*negsf2_gpr" [(set (match_operand:SF 0 "gpc_reg_operand" "=r") diff --git a/gcc/config/rs6000/sync.md b/gcc/config/rs6000/sync.md index 4573509eaa7..58397154645 100644 --- a/gcc/config/rs6000/sync.md +++ b/gcc/config/rs6000/sync.md @@ -21,7 +21,7 @@ (define_mode_attr larx [(SI "lwarx") (DI "ldarx")]) (define_mode_attr stcx [(SI "stwcx.") (DI "stdcx.")]) -(define_code_macro FETCHOP [plus minus ior xor and]) +(define_code_iterator FETCHOP [plus minus ior xor and]) (define_code_attr fetchop_name [(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")]) (define_code_attr fetchop_pred diff --git a/gcc/config/s390/s390-protos.h b/gcc/config/s390/s390-protos.h index 3e72f5c00c2..bfefb0daa33 100644 --- a/gcc/config/s390/s390-protos.h +++ b/gcc/config/s390/s390-protos.h @@ -121,7 +121,7 @@ extern void s390_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int); #ifdef RTX_CODE extern rtx s390_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int); -extern rtx s390_function_value (tree, enum machine_mode); +extern rtx s390_function_value (const_tree, enum machine_mode); extern void s390_va_start (tree, rtx); #endif /* RTX_CODE */ #endif /* TREE_CODE */ diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index b37cbc0556d..aa6db1f3d26 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -3927,8 +3927,8 @@ s390_expand_addcc (enum rtx_code cmp_code, rtx cmp_op0, rtx cmp_op1, if (!register_operand (src, GET_MODE (dst))) src = force_reg (GET_MODE (dst), src); - src = gen_rtx_PLUS (GET_MODE (dst), src, const0_rtx); - op_res = gen_rtx_PLUS (GET_MODE (dst), src, op_res); + op_res = gen_rtx_PLUS (GET_MODE (dst), op_res, src); + op_res = gen_rtx_PLUS (GET_MODE (dst), op_res, const0_rtx); } p = rtvec_alloc (2); @@ -4370,7 +4370,7 @@ s390_output_dwarf_dtprel (FILE *file, int size, rtx x) /* Implement TARGET_MANGLE_TYPE. */ static const char * -s390_mangle_type (tree type) +s390_mangle_type (const_tree type) { if (TYPE_MAIN_VARIANT (type) == long_double_type_node && TARGET_LONG_DOUBLE_128) @@ -7644,7 +7644,7 @@ s390_emit_epilogue (bool sibcall) MODE must be specified. */ static int -s390_function_arg_size (enum machine_mode mode, tree type) +s390_function_arg_size (enum machine_mode mode, const_tree type) { if (type) return int_size_in_bytes (type); @@ -7742,7 +7742,7 @@ s390_function_arg_integer (enum machine_mode mode, tree type) static bool s390_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { int size = s390_function_arg_size (mode, type); @@ -7842,7 +7842,7 @@ s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type, hidden first argument. */ static bool -s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED) +s390_return_in_memory (const_tree type, const_tree fundecl ATTRIBUTE_UNUSED) { /* We accept small integral (and similar) types. */ if (INTEGRAL_TYPE_P (type) @@ -7869,7 +7869,7 @@ s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED) value of mode MODE from a libcall. */ rtx -s390_function_value (tree type, enum machine_mode mode) +s390_function_value (const_tree type, enum machine_mode mode) { if (type) { @@ -9290,7 +9290,7 @@ s390_reorg (void) #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true #undef TARGET_SCHED_ADJUST_PRIORITY #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority @@ -9318,9 +9318,9 @@ s390_reorg (void) #define TARGET_GIMPLIFY_VA_ARG_EXPR s390_gimplify_va_arg #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PASS_BY_REFERENCE #define TARGET_PASS_BY_REFERENCE s390_pass_by_reference @@ -9334,7 +9334,7 @@ s390_reorg (void) #define TARGET_CC_MODES_COMPATIBLE s390_cc_modes_compatible #undef TARGET_INVALID_WITHIN_DOLOOP -#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_rtx_null +#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_const_rtx_null #ifdef HAVE_AS_TLS #undef TARGET_ASM_OUTPUT_DWARF_DTPREL diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h index 4fb55050345..8cc8edfe070 100644 --- a/gcc/config/s390/s390.h +++ b/gcc/config/s390/s390.h @@ -803,10 +803,13 @@ extern struct rtx_def *s390_compare_op0, *s390_compare_op1, *s390_compare_emitte || (TARGET_64BIT && (SIZE) == 8) ) /* This macro is used to determine whether store_by_pieces should be - called to "memset" storage with byte values other than zero, or - to "memcpy" storage when the source is a constant string. */ + called to "memcpy" storage when the source is a constant string. */ #define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN) +/* Likewise to decide whether to "memset" storage with byte values + other than zero. */ +#define SET_BY_PIECES_P(SIZE, ALIGN) STORE_BY_PIECES_P (SIZE, ALIGN) + /* Don't perform CSE on function addresses. */ #define NO_FUNCTION_CSE diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 3e5610b6f6d..66cf5612da6 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -246,54 +246,54 @@ ;; Other includes (include "tpf.md") -;; Macros +;; Iterators -;; This mode macro allows floating point patterns to be generated from the +;; These mode iterators allow floating point patterns to be generated from the ;; same template. -(define_mode_macro FP [TF DF SF (TD "TARGET_HARD_DFP") (DD "TARGET_HARD_DFP")]) -(define_mode_macro BFP [TF DF SF]) -(define_mode_macro DFP [TD DD]) -(define_mode_macro DFP_ALL [TD DD SD]) -(define_mode_macro DSF [DF SF]) -(define_mode_macro SD_SF [SF SD]) -(define_mode_macro DD_DF [DF DD]) -(define_mode_macro TD_TF [TF TD]) - -;; These mode macros allow 31-bit and 64-bit TDSI patterns to be generated +(define_mode_iterator FP [TF DF SF (TD "TARGET_HARD_DFP") (DD "TARGET_HARD_DFP")]) +(define_mode_iterator BFP [TF DF SF]) +(define_mode_iterator DFP [TD DD]) +(define_mode_iterator DFP_ALL [TD DD SD]) +(define_mode_iterator DSF [DF SF]) +(define_mode_iterator SD_SF [SF SD]) +(define_mode_iterator DD_DF [DF DD]) +(define_mode_iterator TD_TF [TF TD]) + +;; This mode iterator allows 31-bit and 64-bit TDSI patterns to be generated ;; from the same template. -(define_mode_macro TDSI [(TI "TARGET_64BIT") DI SI]) +(define_mode_iterator TDSI [(TI "TARGET_64BIT") DI SI]) -;; These mode macros allow 31-bit and 64-bit GPR patterns to be generated +;; These mode iterators allow 31-bit and 64-bit GPR patterns to be generated ;; from the same template. -(define_mode_macro GPR [(DI "TARGET_64BIT") SI]) -(define_mode_macro DSI [DI SI]) +(define_mode_iterator GPR [(DI "TARGET_64BIT") SI]) +(define_mode_iterator DSI [DI SI]) -;; This mode macro allows :P to be used for patterns that operate on +;; These mode iterators allow :P to be used for patterns that operate on ;; pointer-sized quantities. Exactly one of the two alternatives will match. -(define_mode_macro DP [(TI "TARGET_64BIT") (DI "!TARGET_64BIT")]) -(define_mode_macro P [(DI "TARGET_64BIT") (SI "!TARGET_64BIT")]) +(define_mode_iterator DP [(TI "TARGET_64BIT") (DI "!TARGET_64BIT")]) +(define_mode_iterator P [(DI "TARGET_64BIT") (SI "!TARGET_64BIT")]) -;; This mode macro allows the QI and HI patterns to be defined from +;; This mode iterator allows the QI and HI patterns to be defined from ;; the same template. -(define_mode_macro HQI [HI QI]) +(define_mode_iterator HQI [HI QI]) -;; This mode macro allows the integer patterns to be defined from the +;; This mode iterator allows the integer patterns to be defined from the ;; same template. -(define_mode_macro INT [(DI "TARGET_64BIT") SI HI QI]) +(define_mode_iterator INT [(DI "TARGET_64BIT") SI HI QI]) -;; This macro allows to unify all 'bCOND' expander patterns. -(define_code_macro COMPARE [eq ne gt gtu lt ltu ge geu le leu unordered +;; This iterator allows to unify all 'bCOND' expander patterns. +(define_code_iterator COMPARE [eq ne gt gtu lt ltu ge geu le leu unordered ordered uneq unlt ungt unle unge ltgt]) -;; This macro allows to unify all 'sCOND' patterns. -(define_code_macro SCOND [ltu gtu leu geu]) +;; This iterator allows to unify all 'sCOND' patterns. +(define_code_iterator SCOND [ltu gtu leu geu]) -;; This macro allows some 'ashift' and 'lshiftrt' pattern to be defined from +;; This iterator allows some 'ashift' and 'lshiftrt' pattern to be defined from ;; the same template. -(define_code_macro SHIFT [ashift lshiftrt]) +(define_code_iterator SHIFT [ashift lshiftrt]) -;; These macros allow to combine most atomic operations. -(define_code_macro ATOMIC [and ior xor plus minus mult]) +;; This iterator and attribute allow to combine most atomic operations. +(define_code_iterator ATOMIC [and ior xor plus minus mult]) (define_code_attr atomic [(and "and") (ior "ior") (xor "xor") (plus "add") (minus "sub") (mult "nand")]) @@ -312,18 +312,18 @@ (define_mode_attr RXe [(TF "RXE") (DF "RX") (SF "RX")]) ;; The decimal floating point variants of add, sub, div and mul support 3 -;; fp register operands. The following macros allow to merge the bfp and +;; fp register operands. The following attributes allow to merge the bfp and ;; dfp variants in a single insn definition. -;; This macro is used to set op_type accordingly. +;; This attribute is used to set op_type accordingly. (define_mode_attr RRer [(TF "RRE") (DF "RRE") (SF "RRE") (TD "RRR") (DD "RRR") (SD "RRR")]) -;; This macro is used in the operand constraint list in order to have the +;; This attribute is used in the operand constraint list in order to have the ;; first and the second operand match for bfp modes. (define_mode_attr f0 [(TF "0") (DF "0") (SF "0") (TD "f") (DD "f") (DD "f")]) -;; This macro is used in the operand list of the instruction to have an +;; This attribute is used in the operand list of the instruction to have an ;; additional operand for the dfp instructions. (define_mode_attr op1 [(TF "") (DF "") (SF "") (TD "%1,") (DD "%1,") (SD "%1,")]) @@ -341,7 +341,7 @@ ;; This is used to disable the memory alternative in TFmode patterns. (define_mode_attr Rf [(TF "f") (DF "R") (SF "R") (TD "f") (DD "f") (SD "f")]) -;; This macro adds b for bfp instructions and t for dfp instructions and is used +;; This attribute adds b for bfp instructions and t for dfp instructions and is used ;; within instruction mnemonics. (define_mode_attr bt [(TF "b") (DF "b") (SF "b") (TD "t") (DD "t") (SD "t")]) @@ -3635,8 +3635,9 @@ (match_dup 7))) (set (match_dup 6) (plus:DI (match_dup 7) (match_dup 8)))]) (parallel - [(set (match_dup 3) (plus:DI (plus:DI (match_dup 4) (match_dup 5)) - (ltu:DI (reg:CCL1 CC_REGNUM) (const_int 0)))) + [(set (match_dup 3) (plus:DI + (plus:DI (ltu:DI (reg:CCL1 CC_REGNUM) (const_int 0)) + (match_dup 4)) (match_dup 5))) (clobber (reg:CC CC_REGNUM))])] "operands[3] = operand_subword (operands[0], 0, 0, TImode); operands[4] = operand_subword (operands[1], 0, 0, TImode); @@ -3719,8 +3720,9 @@ (match_dup 7))) (set (match_dup 6) (plus:SI (match_dup 7) (match_dup 8)))]) (parallel - [(set (match_dup 3) (plus:SI (plus:SI (match_dup 4) (match_dup 5)) - (ltu:SI (reg:CCL1 CC_REGNUM) (const_int 0)))) + [(set (match_dup 3) (plus:SI + (plus:SI (ltu:SI (reg:CCL1 CC_REGNUM) (const_int 0)) + (match_dup 4)) (match_dup 5))) (clobber (reg:CC CC_REGNUM))])] "operands[3] = operand_subword (operands[0], 0, 0, DImode); operands[4] = operand_subword (operands[1], 0, 0, DImode); @@ -4304,16 +4306,85 @@ ; add(di|si)cc instruction pattern(s). ; +; the following 4 patterns are used when the result of an add with +; carry is checked for an overflow condition + +; op1 + op2 + c < op1 + +; alcr, alc, alcgr, alcg +(define_insn "*add<mode>3_alc_carry1_cc" + [(set (reg CC_REGNUM) + (compare + (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "") + (match_operand:GPR 1 "nonimmediate_operand" "%0,0")) + (match_operand:GPR 2 "general_operand" "d,m")) + (match_dup 1))) + (set (match_operand:GPR 0 "register_operand" "=d,d") + (plus:GPR (plus:GPR (match_dup 3) (match_dup 1)) (match_dup 2)))] + "s390_match_ccmode (insn, CCL1mode) && TARGET_CPU_ZARCH" + "@ + alc<g>r\t%0,%2 + alc<g>\t%0,%2" + [(set_attr "op_type" "RRE,RXY")]) + +; alcr, alc, alcgr, alcg +(define_insn "*add<mode>3_alc_carry1_cconly" + [(set (reg CC_REGNUM) + (compare + (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "") + (match_operand:GPR 1 "nonimmediate_operand" "%0,0")) + (match_operand:GPR 2 "general_operand" "d,m")) + (match_dup 1))) + (clobber (match_scratch:GPR 0 "=d,d"))] + "s390_match_ccmode (insn, CCL1mode) && TARGET_CPU_ZARCH" + "@ + alc<g>r\t%0,%2 + alc<g>\t%0,%2" + [(set_attr "op_type" "RRE,RXY")]) + +; op1 + op2 + c < op2 + +; alcr, alc, alcgr, alcg +(define_insn "*add<mode>3_alc_carry2_cc" + [(set (reg CC_REGNUM) + (compare + (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "") + (match_operand:GPR 1 "nonimmediate_operand" "%0,0")) + (match_operand:GPR 2 "general_operand" "d,m")) + (match_dup 2))) + (set (match_operand:GPR 0 "register_operand" "=d,d") + (plus:GPR (plus:GPR (match_dup 3) (match_dup 1)) (match_dup 2)))] + "s390_match_ccmode (insn, CCL1mode) && TARGET_CPU_ZARCH" + "@ + alc<g>r\t%0,%2 + alc<g>\t%0,%2" + [(set_attr "op_type" "RRE,RXY")]) + +; alcr, alc, alcgr, alcg +(define_insn "*add<mode>3_alc_carry2_cconly" + [(set (reg CC_REGNUM) + (compare + (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "") + (match_operand:GPR 1 "nonimmediate_operand" "%0,0")) + (match_operand:GPR 2 "general_operand" "d,m")) + (match_dup 2))) + (clobber (match_scratch:GPR 0 "=d,d"))] + "s390_match_ccmode (insn, CCL1mode) && TARGET_CPU_ZARCH" + "@ + alc<g>r\t%0,%2 + alc<g>\t%0,%2" + [(set_attr "op_type" "RRE,RXY")]) + ; alcr, alc, alcgr, alcg (define_insn "*add<mode>3_alc_cc" [(set (reg CC_REGNUM) (compare - (plus:GPR (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0") - (match_operand:GPR 2 "general_operand" "d,m")) - (match_operand:GPR 3 "s390_alc_comparison" "")) + (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "") + (match_operand:GPR 1 "nonimmediate_operand" "%0,0")) + (match_operand:GPR 2 "general_operand" "d,m")) (const_int 0))) (set (match_operand:GPR 0 "register_operand" "=d,d") - (plus:GPR (plus:GPR (match_dup 1) (match_dup 2)) (match_dup 3)))] + (plus:GPR (plus:GPR (match_dup 3) (match_dup 1)) (match_dup 2)))] "s390_match_ccmode (insn, CCLmode) && TARGET_CPU_ZARCH" "@ alc<g>r\t%0,%2 @@ -4323,9 +4394,9 @@ ; alcr, alc, alcgr, alcg (define_insn "*add<mode>3_alc" [(set (match_operand:GPR 0 "register_operand" "=d,d") - (plus:GPR (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0") - (match_operand:GPR 2 "general_operand" "d,m")) - (match_operand:GPR 3 "s390_alc_comparison" ""))) + (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "") + (match_operand:GPR 1 "nonimmediate_operand" "%0,0")) + (match_operand:GPR 2 "general_operand" "d,m"))) (clobber (reg:CC CC_REGNUM))] "TARGET_CPU_ZARCH" "@ @@ -4386,8 +4457,8 @@ "&& reload_completed" [(set (match_dup 0) (const_int 0)) (parallel - [(set (match_dup 0) (plus:GPR (plus:GPR (match_dup 0) (match_dup 0)) - (match_dup 1))) + [(set (match_dup 0) (plus:GPR (plus:GPR (match_dup 1) (match_dup 0)) + (match_dup 0))) (clobber (reg:CC CC_REGNUM))])] "") diff --git a/gcc/config/score/score-protos.h b/gcc/config/score/score-protos.h index 56d3bcc9309..ea99eeafb29 100644 --- a/gcc/config/score/score-protos.h +++ b/gcc/config/score/score-protos.h @@ -55,7 +55,7 @@ void score_init_cumulative_args (CUMULATIVE_ARGS *cum, void score_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type, int named); -rtx score_function_value (tree valtype, tree func, enum machine_mode mode); +rtx score_function_value (const_tree valtype, const_tree func, enum machine_mode mode); rtx score_va_arg (tree va_list, tree type); @@ -71,7 +71,8 @@ int score_register_move_cost (enum machine_mode mode, enum reg_class to, enum reg_class from); void score_declare_object (FILE *stream, const char *name, - const char *directive, const char *fmt, ...); + const char *directive, const char *fmt, ...) + ATTRIBUTE_PRINTF_4; void score_declare_object_name (FILE *stream, const char *name, tree decl); diff --git a/gcc/config/score/score.c b/gcc/config/score/score.c index 1a3aee5412f..6dba9903b7e 100644 --- a/gcc/config/score/score.c +++ b/gcc/config/score/score.c @@ -59,8 +59,8 @@ #define CE_REG_CLASS_P(C) \ ((C) == HI_REG || (C) == LO_REG || (C) == CE_REGS) -static int score_arg_partial_bytes (const CUMULATIVE_ARGS *, - enum machine_mode, tree, int); +static int score_arg_partial_bytes (CUMULATIVE_ARGS *, + enum machine_mode, tree, bool); static int score_symbol_insns (enum score_symbol_type); @@ -101,16 +101,16 @@ static int score_address_cost (rtx); #define TARGET_ASM_OUTPUT_MI_THUNK th_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_MUST_PASS_IN_STACK #define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size @@ -137,7 +137,7 @@ static int score_address_cost (rtx); small structures are returned in a register. Objects with varying size must still be returned in memory. */ static bool -score_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED) +score_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) { return ((TYPE_MODE (type) == BLKmode) || (int_size_in_bytes (type) > 2 * UNITS_PER_WORD) @@ -147,7 +147,7 @@ score_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED) /* Return nonzero when an argument must be passed by reference. */ static bool score_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { /* If we have a variable-sized parameter, we have no choice. */ @@ -156,7 +156,7 @@ score_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, /* Return a legitimate address for REG + OFFSET. */ static rtx -score_add_offset (rtx temp, rtx reg, HOST_WIDE_INT offset) +score_add_offset (rtx temp ATTRIBUTE_UNUSED, rtx reg, HOST_WIDE_INT offset) { if (!IMM_IN_RANGE (offset, 15, 1)) { @@ -427,7 +427,7 @@ th_select_rtx_section (enum machine_mode mode, rtx x, /* Implement TARGET_IN_SMALL_DATA_P. */ static bool -th_in_small_data_p (tree decl) +th_in_small_data_p (const_tree decl) { HOST_WIDE_INT size; @@ -685,8 +685,8 @@ score_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode, /* Implement TARGET_ARG_PARTIAL_BYTES macro. */ static int -score_arg_partial_bytes (const CUMULATIVE_ARGS *cum, - enum machine_mode mode, tree type, int named) +score_arg_partial_bytes (CUMULATIVE_ARGS *cum, + enum machine_mode mode, tree type, bool named) { struct score_arg_info info; classify_arg (cum, mode, type, named, &info); @@ -730,7 +730,7 @@ score_function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode, VALTYPE is the return type and MODE is VOIDmode. For libcalls, VALTYPE is null and MODE is the mode of the return value. */ rtx -score_function_value (tree valtype, tree func ATTRIBUTE_UNUSED, +score_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, enum machine_mode mode) { if (valtype) diff --git a/gcc/config/score/score.h b/gcc/config/score/score.h index c0cc3040364..d2c78012c24 100644 --- a/gcc/config/score/score.h +++ b/gcc/config/score/score.h @@ -791,7 +791,7 @@ typedef struct score_args #undef ASM_DECLARE_OBJECT_NAME #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \ - score_declare_object (STREAM, NAME, "", ":\n", 0) + score_declare_object (STREAM, NAME, "", ":\n") /* This says how to output an external. It would be possible not to output anything and let undefined symbol become external. However diff --git a/gcc/config/sh/sh-protos.h b/gcc/config/sh/sh-protos.h index f8ee7ba15cd..e236a0ecd1a 100644 --- a/gcc/config/sh/sh-protos.h +++ b/gcc/config/sh/sh-protos.h @@ -137,7 +137,7 @@ extern int initial_elimination_offset (int, int); extern int fldi_ok (void); extern int sh_hard_regno_rename_ok (unsigned int, unsigned int); extern int sh_cfun_interrupt_handler_p (void); -extern int sh_attr_renesas_p (tree); +extern int sh_attr_renesas_p (const_tree); extern int sh_cfun_attr_renesas_p (void); extern void sh_initialize_trampoline (rtx, rtx, rtx); extern bool sh_cannot_change_mode_class @@ -161,7 +161,7 @@ extern rtx sh_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int); extern void sh_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int); extern int sh_pass_in_reg_p (CUMULATIVE_ARGS *, enum machine_mode, tree); extern void sh_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, signed int, enum machine_mode); -extern bool sh_promote_prototypes (tree); +extern bool sh_promote_prototypes (const_tree); extern rtx replace_n_hard_rtx (rtx, rtx *, int , int); extern int shmedia_cleanup_truncate (rtx *, void *); diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index f5e0f6a1c14..927355fb775 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -214,7 +214,7 @@ static bool sh_function_ok_for_sibcall (tree, tree); static bool sh_cannot_modify_jumps_p (void); static int sh_target_reg_class (void); static bool sh_optimize_target_register_callee_saved (bool); -static bool sh_ms_bitfield_layout_p (tree); +static bool sh_ms_bitfield_layout_p (const_tree); static void sh_init_builtins (void); static void sh_media_init_builtins (void); @@ -242,7 +242,7 @@ static struct save_entry_s *sh5_schedule_saves (HARD_REG_SET *, struct save_schedule_s *, int); static rtx sh_struct_value_rtx (tree, int); -static bool sh_return_in_memory (tree, tree); +static bool sh_return_in_memory (const_tree, const_tree); static rtx sh_builtin_saveregs (void); static void sh_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int); static bool sh_strict_argument_naming (CUMULATIVE_ARGS *); @@ -250,12 +250,12 @@ static bool sh_pretend_outgoing_varargs_named (CUMULATIVE_ARGS *); static tree sh_build_builtin_va_list (void); static tree sh_gimplify_va_arg_expr (tree, tree, tree *, tree *); static bool sh_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); + const_tree, bool); static bool sh_callee_copies (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); + const_tree, bool); static int sh_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); -static int sh_dwarf_calling_convention (tree); +static int sh_dwarf_calling_convention (const_tree); /* Initialize the GCC target structure. */ @@ -281,7 +281,7 @@ static int sh_dwarf_calling_convention (tree); #define TARGET_ASM_OUTPUT_MI_THUNK sh_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true #undef TARGET_ASM_FILE_START #define TARGET_ASM_FILE_START sh_file_start @@ -7201,7 +7201,7 @@ sh_gimplify_va_arg_expr (tree valist, tree type, tree *pre_p, } } - if (TARGET_SH4) + if (TARGET_SH4 || TARGET_SH2A_DOUBLE) { pass_as_float = ((TREE_CODE (eff_type) == REAL_TYPE && size <= 8) || (TREE_CODE (eff_type) == COMPLEX_TYPE @@ -7313,7 +7313,7 @@ sh_gimplify_va_arg_expr (tree valist, tree type, tree *pre_p, tmp = build1 (LABEL_EXPR, void_type_node, lab_false); gimplify_and_add (tmp, pre_p); - if (size > 4 && ! TARGET_SH4) + if (size > 4 && ! (TARGET_SH4 || TARGET_SH2A)) { tmp = build2 (GIMPLE_MODIFY_STMT, ptr_type_node, next_o, next_o_limit); @@ -7354,7 +7354,7 @@ sh_gimplify_va_arg_expr (tree valist, tree type, tree *pre_p, } bool -sh_promote_prototypes (tree type) +sh_promote_prototypes (const_tree type) { if (TARGET_HITACHI) return 0; @@ -7369,8 +7369,8 @@ sh_promote_prototypes (tree type) loads them into the full 64-bits registers. */ static int -shcompact_byref (CUMULATIVE_ARGS *cum, enum machine_mode mode, - tree type, bool named) +shcompact_byref (const CUMULATIVE_ARGS *cum, enum machine_mode mode, + const_tree type, bool named) { unsigned HOST_WIDE_INT size; @@ -7394,7 +7394,7 @@ shcompact_byref (CUMULATIVE_ARGS *cum, enum machine_mode mode, static bool sh_pass_by_reference (CUMULATIVE_ARGS *cum, enum machine_mode mode, - tree type, bool named) + const_tree type, bool named) { if (targetm.calls.must_pass_in_stack (mode, type)) return true; @@ -7416,7 +7416,7 @@ sh_pass_by_reference (CUMULATIVE_ARGS *cum, enum machine_mode mode, static bool sh_callee_copies (CUMULATIVE_ARGS *cum, enum machine_mode mode, - tree type, bool named ATTRIBUTE_UNUSED) + const_tree type, bool named ATTRIBUTE_UNUSED) { /* ??? How can it possibly be correct to return true only on the caller side of the equation? Is there someplace else in the @@ -7715,7 +7715,7 @@ sh_struct_value_rtx (tree fndecl, int incoming ATTRIBUTE_UNUSED) /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -sh_return_in_memory (tree type, tree fndecl) +sh_return_in_memory (const_tree type, const_tree fndecl) { if (TARGET_SH5) { @@ -8052,7 +8052,7 @@ sh_handle_renesas_attribute (tree *node ATTRIBUTE_UNUSED, /* True if __attribute__((renesas)) or -mrenesas. */ int -sh_attr_renesas_p (tree td) +sh_attr_renesas_p (const_tree td) { if (TARGET_HITACHI) return 1; @@ -9346,7 +9346,7 @@ sh_optimize_target_register_callee_saved (bool after_prologue_epilogue_gen) } static bool -sh_ms_bitfield_layout_p (tree record_type ATTRIBUTE_UNUSED) +sh_ms_bitfield_layout_p (const_tree record_type ATTRIBUTE_UNUSED) { return (TARGET_SH5 || TARGET_HITACHI || sh_attr_renesas_p (record_type)); } @@ -9774,7 +9774,7 @@ sh_vector_mode_supported_p (enum machine_mode mode) /* Implements target hook dwarf_calling_convention. Return an enum of dwarf_calling_convention. */ int -sh_dwarf_calling_convention (tree func) +sh_dwarf_calling_convention (const_tree func) { if (sh_attr_renesas_p (func)) return DW_CC_GNU_renesas_sh; diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index 71f5b6f3cd9..8f299b75afe 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -2184,6 +2184,8 @@ struct sh_args { (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \ < (TARGET_SMALLCODE ? 2 : ((ALIGN >= 32) ? 16 : 2))) +#define SET_BY_PIECES_P(SIZE, ALIGN) STORE_BY_PIECES_P(SIZE, ALIGN) + /* Macros to check register numbers against specific register classes. */ /* These assume that REGNO is a hard or pseudo reg number. diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h index 5881966be2a..217948af08d 100644 --- a/gcc/config/sparc/sparc-protos.h +++ b/gcc/config/sparc/sparc-protos.h @@ -24,7 +24,7 @@ along with GCC; see the file COPYING3. If not see #define __SPARC_PROTOS_H__ #ifdef TREE_CODE -extern struct rtx_def *function_value (tree, enum machine_mode, int); +extern struct rtx_def *function_value (const_tree, enum machine_mode, int); extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int); extern struct rtx_def *function_arg (const CUMULATIVE_ARGS *, @@ -36,7 +36,7 @@ extern void sparc_va_start (tree, rtx); extern unsigned long sparc_type_code (tree); #ifdef ARGS_SIZE_RTX /* expr.h defines ARGS_SIZE_RTX and `enum direction' */ -extern enum direction function_arg_padding (enum machine_mode, tree); +extern enum direction function_arg_padding (enum machine_mode, const_tree); #endif /* ARGS_SIZE_RTX */ #endif /* TREE_CODE */ diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 0b27b87a2e2..3ad1a7f3cdf 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -372,8 +372,8 @@ static int sparc_vis_mul8x16 (int, int); static tree sparc_handle_vis_mul8x16 (int, tree, tree, tree); static void sparc_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); -static bool sparc_can_output_mi_thunk (tree, HOST_WIDE_INT, - HOST_WIDE_INT, tree); +static bool sparc_can_output_mi_thunk (const_tree, HOST_WIDE_INT, + HOST_WIDE_INT, const_tree); static struct machine_function * sparc_init_machine_status (void); static bool sparc_cannot_force_const_mem (rtx); static rtx sparc_tls_get_addr (void); @@ -381,21 +381,21 @@ static rtx sparc_tls_got (void); static const char *get_some_local_dynamic_name (void); static int get_some_local_dynamic_name_1 (rtx *, void *); static bool sparc_rtx_costs (rtx, int, int, int *); -static bool sparc_promote_prototypes (tree); +static bool sparc_promote_prototypes (const_tree); static rtx sparc_struct_value_rtx (tree, int); -static bool sparc_return_in_memory (tree, tree); +static bool sparc_return_in_memory (const_tree, const_tree); static bool sparc_strict_argument_naming (CUMULATIVE_ARGS *); static tree sparc_gimplify_va_arg (tree, tree, tree *, tree *); static bool sparc_vector_mode_supported_p (enum machine_mode); static bool sparc_pass_by_reference (CUMULATIVE_ARGS *, - enum machine_mode, tree, bool); + enum machine_mode, const_tree, bool); static int sparc_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); static void sparc_dwarf_handle_frame_unspec (const char *, rtx, int); static void sparc_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; static void sparc_file_end (void); #ifdef TARGET_ALTERNATE_LONG_DOUBLE_MANGLING -static const char *sparc_mangle_type (tree); +static const char *sparc_mangle_type (const_tree); #endif #ifdef SUBTARGET_ATTRIBUTE_TABLE const struct attribute_spec sparc_attribute_table[]; @@ -494,13 +494,13 @@ static bool fpu_option_set = false; no-op for TARGET_ARCH32 this is ok. Otherwise we'd need to add a runtime test for this value. */ #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true /* This is only needed for TARGET_ARCH64, but since PROMOTE_FUNCTION_MODE is a no-op for TARGET_ARCH32 this is ok. Otherwise we'd need to add a runtime test for this value. */ #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES #define TARGET_PROMOTE_PROTOTYPES sparc_promote_prototypes @@ -4469,7 +4469,7 @@ init_cumulative_args (struct sparc_args *cum, tree fntype, When a prototype says `char' or `short', really pass an `int'. */ static bool -sparc_promote_prototypes (tree fntype ATTRIBUTE_UNUSED) +sparc_promote_prototypes (const_tree fntype ATTRIBUTE_UNUSED) { return TARGET_ARCH32 ? true : false; } @@ -4681,17 +4681,17 @@ struct function_arg_record_value_parms static void function_arg_record_value_3 (HOST_WIDE_INT, struct function_arg_record_value_parms *); static void function_arg_record_value_2 - (tree, HOST_WIDE_INT, struct function_arg_record_value_parms *, bool); + (const_tree, HOST_WIDE_INT, struct function_arg_record_value_parms *, bool); static void function_arg_record_value_1 - (tree, HOST_WIDE_INT, struct function_arg_record_value_parms *, bool); -static rtx function_arg_record_value (tree, enum machine_mode, int, int, int); + (const_tree, HOST_WIDE_INT, struct function_arg_record_value_parms *, bool); +static rtx function_arg_record_value (const_tree, enum machine_mode, int, int, int); static rtx function_arg_union_value (int, enum machine_mode, int, int); /* A subroutine of function_arg_record_value. Traverse the structure recursively and determine how many registers will be required. */ static void -function_arg_record_value_1 (tree type, HOST_WIDE_INT startbitpos, +function_arg_record_value_1 (const_tree type, HOST_WIDE_INT startbitpos, struct function_arg_record_value_parms *parms, bool packed_p) { @@ -4847,7 +4847,7 @@ function_arg_record_value_3 (HOST_WIDE_INT bitpos, to make that happen. */ static void -function_arg_record_value_2 (tree type, HOST_WIDE_INT startbitpos, +function_arg_record_value_2 (const_tree type, HOST_WIDE_INT startbitpos, struct function_arg_record_value_parms *parms, bool packed_p) { @@ -4954,7 +4954,7 @@ function_arg_record_value_2 (tree type, HOST_WIDE_INT startbitpos, REGBASE is the regno of the base register for the parameter array. */ static rtx -function_arg_record_value (tree type, enum machine_mode mode, +function_arg_record_value (const_tree type, enum machine_mode mode, int slotno, int named, int regbase) { HOST_WIDE_INT typesize = int_size_in_bytes (type); @@ -5327,7 +5327,7 @@ sparc_arg_partial_bytes (CUMULATIVE_ARGS *cum, enum machine_mode mode, static bool sparc_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { if (TARGET_ARCH32) @@ -5424,7 +5424,7 @@ function_arg_advance (struct sparc_args *cum, enum machine_mode mode, argument slot. */ enum direction -function_arg_padding (enum machine_mode mode, tree type) +function_arg_padding (enum machine_mode mode, const_tree type) { if (TARGET_ARCH64 && type != 0 && AGGREGATE_TYPE_P (type)) return upward; @@ -5437,7 +5437,7 @@ function_arg_padding (enum machine_mode mode, tree type) Specify whether to return the return value in memory. */ static bool -sparc_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +sparc_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { if (TARGET_ARCH32) /* Original SPARC 32-bit ABI says that structures and unions, @@ -5545,7 +5545,7 @@ sparc_struct_value_rtx (tree fndecl, int incoming) except that up to 32 bytes may be returned in registers. */ rtx -function_value (tree type, enum machine_mode mode, int incoming_p) +function_value (const_tree type, enum machine_mode mode, int incoming_p) { /* Beware that the two values are swapped here wrt function_arg. */ int regbase = (incoming_p @@ -8788,10 +8788,10 @@ sparc_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, assembler code for the thunk function specified by the arguments it is passed, and false otherwise. */ static bool -sparc_can_output_mi_thunk (tree thunk_fndecl ATTRIBUTE_UNUSED, +sparc_can_output_mi_thunk (const_tree thunk_fndecl ATTRIBUTE_UNUSED, HOST_WIDE_INT delta ATTRIBUTE_UNUSED, HOST_WIDE_INT vcall_offset, - tree function ATTRIBUTE_UNUSED) + const_tree function ATTRIBUTE_UNUSED) { /* Bound the loop used in the default method above. */ return (vcall_offset >= -32768 || ! fixed_regs[5]); @@ -8890,7 +8890,7 @@ sparc_file_end (void) /* Implement TARGET_MANGLE_TYPE. */ static const char * -sparc_mangle_type (tree type) +sparc_mangle_type (const_tree type) { if (!TARGET_64BIT && TYPE_MAIN_VARIANT (type) == long_double_type_node diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 05370fcfe14..329dd1a7ab1 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -1701,7 +1701,7 @@ (set_attr "branch_type" "reg")]) -(define_mode_macro P [(SI "Pmode == SImode") (DI "Pmode == DImode")]) +(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")]) ;; Load in operand 0 the (absolute) address of operand 1, which is a symbolic ;; value subject to a PC-relative relocation. Operand 2 is a helper function @@ -2340,7 +2340,7 @@ ;; Floating point and vector move instructions ;; We don't define V1SI because SI should work just fine. -(define_mode_macro V32 [SF V2HI V4QI]) +(define_mode_iterator V32 [SF V2HI V4QI]) ;; Yes, you guessed it right, the former movsf expander. (define_expand "mov<V32:mode>" @@ -2476,7 +2476,7 @@ [(set (match_dup 0) (high:SF (match_dup 1))) (set (match_dup 0) (lo_sum:SF (match_dup 0) (match_dup 1)))]) -(define_mode_macro V64 [DF V2SI V4HI V8QI]) +(define_mode_iterator V64 [DF V2SI V4HI V8QI]) ;; Yes, you again guessed it right, the former movdf expander. (define_expand "mov<V64:mode>" @@ -5276,8 +5276,8 @@ ;; We define DImode `and' so with DImode `not' we can get ;; DImode `andn'. Other combinations are possible. -(define_mode_macro V64I [DI V2SI V4HI V8QI]) -(define_mode_macro V32I [SI V2HI V4QI]) +(define_mode_iterator V64I [DI V2SI V4HI V8QI]) +(define_mode_iterator V32I [SI V2HI V4QI]) (define_expand "and<V64I:mode>3" [(set (match_operand:V64I 0 "register_operand" "") diff --git a/gcc/config/sparc/sync.md b/gcc/config/sparc/sync.md index 05c85d90597..17cf691d5b4 100644 --- a/gcc/config/sparc/sync.md +++ b/gcc/config/sparc/sync.md @@ -18,9 +18,9 @@ ;; along with GCC; see the file COPYING3. If not see ;; <http://www.gnu.org/licenses/>. -(define_mode_macro I12MODE [QI HI]) -(define_mode_macro I24MODE [HI SI]) -(define_mode_macro I48MODE [SI (DI "TARGET_ARCH64 || TARGET_V8PLUS")]) +(define_mode_iterator I12MODE [QI HI]) +(define_mode_iterator I24MODE [HI SI]) +(define_mode_iterator I48MODE [SI (DI "TARGET_ARCH64 || TARGET_V8PLUS")]) (define_mode_attr modesuffix [(SI "") (DI "x")]) (define_expand "memory_barrier" diff --git a/gcc/config/spu/spu-protos.h b/gcc/config/spu/spu-protos.h index 6369a6770ec..b00fc5d4efc 100644 --- a/gcc/config/spu/spu-protos.h +++ b/gcc/config/spu/spu-protos.h @@ -59,7 +59,7 @@ extern int spu_legitimate_address (enum machine_mode mode, rtx x, int reg_ok_strict); extern rtx spu_legitimize_address (rtx x, rtx oldx, enum machine_mode mode); extern int spu_initial_elimination_offset (int from, int to); -extern rtx spu_function_value (tree type, tree func); +extern rtx spu_function_value (const_tree type, const_tree func); extern rtx spu_function_arg (int cum, enum machine_mode mode, tree type, int named); extern void spu_va_start (tree valist, rtx nextarg); diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index 555beab5318..eda0de03813 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -113,8 +113,8 @@ static tree spu_handle_vector_attribute (tree * node, tree name, tree args, int flags, unsigned char *no_add_attrs); static int spu_naked_function_p (tree func); -static unsigned char spu_pass_by_reference (int *cum, enum machine_mode mode, - tree type, unsigned char named); +static unsigned char spu_pass_by_reference (CUMULATIVE_ARGS *cum, enum machine_mode mode, + const_tree type, unsigned char named); static tree spu_build_builtin_va_list (void); static tree spu_gimplify_va_arg_expr (tree valist, tree type, tree * pre_p, tree * post_p); @@ -128,14 +128,14 @@ static unsigned char spu_rtx_costs (rtx x, int code, int outer_code, int *total); static unsigned char spu_function_ok_for_sibcall (tree decl, tree exp); static void spu_init_libfuncs (void); -static bool spu_return_in_memory (tree type, tree fntype); +static bool spu_return_in_memory (const_tree type, const_tree fntype); static void fix_range (const char *); static void spu_encode_section_info (tree, rtx, int); static tree spu_builtin_mul_widen_even (tree); static tree spu_builtin_mul_widen_odd (tree); static tree spu_builtin_mask_for_load (void); static int spu_builtin_vectorization_cost (bool); -static bool spu_vector_alignment_reachable (tree, bool); +static bool spu_vector_alignment_reachable (const_tree, bool); extern const char *reg_names[]; rtx spu_compare_op0, spu_compare_op1; @@ -3020,7 +3020,7 @@ spu_initial_elimination_offset (int from, int to) } rtx -spu_function_value (tree type, tree func ATTRIBUTE_UNUSED) +spu_function_value (const_tree type, const_tree func ATTRIBUTE_UNUSED) { enum machine_mode mode = TYPE_MODE (type); int byte_size = ((mode == BLKmode) @@ -3102,7 +3102,7 @@ spu_function_arg (CUMULATIVE_ARGS cum, static bool spu_pass_by_reference (CUMULATIVE_ARGS * cum ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED, - tree type, bool named ATTRIBUTE_UNUSED) + const_tree type, bool named ATTRIBUTE_UNUSED) { return type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST; } @@ -4396,7 +4396,7 @@ spu_gen_subreg (enum machine_mode mode, rtx x) } static bool -spu_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +spu_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { return (TYPE_MODE (type) == BLKmode && ((type) == 0 @@ -5485,7 +5485,7 @@ spu_builtin_vectorization_cost (bool runtime_test) how may iterations are required to reach desired alignment. */ static bool -spu_vector_alignment_reachable (tree type ATTRIBUTE_UNUSED, bool is_packed) +spu_vector_alignment_reachable (const_tree type ATTRIBUTE_UNUSED, bool is_packed) { if (is_packed) return false; diff --git a/gcc/config/spu/spu.md b/gcc/config/spu/spu.md index 4f2c41a7ec1..1afdd11f130 100644 --- a/gcc/config/spu/spu.md +++ b/gcc/config/spu/spu.md @@ -159,9 +159,9 @@ (include "constraints.md") -;; Mode macros +;; Mode iterators -(define_mode_macro ALL [QI V16QI +(define_mode_iterator ALL [QI V16QI HI V8HI SI V4SI DI V2DI @@ -171,43 +171,43 @@ ; Everything except DI and TI which are handled separately because ; they need different constraints to correctly test VOIDmode constants -(define_mode_macro MOV [QI V16QI +(define_mode_iterator MOV [QI V16QI HI V8HI SI V4SI V2DI SF V4SF DF V2DF]) -(define_mode_macro DTI [DI TI]) +(define_mode_iterator DTI [DI TI]) -(define_mode_macro VINT [QI V16QI +(define_mode_iterator VINT [QI V16QI HI V8HI SI V4SI DI V2DI TI]) -(define_mode_macro VQHSI [QI V16QI +(define_mode_iterator VQHSI [QI V16QI HI V8HI SI V4SI]) -(define_mode_macro VHSI [HI V8HI +(define_mode_iterator VHSI [HI V8HI SI V4SI]) -(define_mode_macro VSDF [SF V4SF +(define_mode_iterator VSDF [SF V4SF DF V2DF]) -(define_mode_macro VSI [SI V4SI]) -(define_mode_macro VDI [DI V2DI]) -(define_mode_macro VSF [SF V4SF]) -(define_mode_macro VDF [DF V2DF]) +(define_mode_iterator VSI [SI V4SI]) +(define_mode_iterator VDI [DI V2DI]) +(define_mode_iterator VSF [SF V4SF]) +(define_mode_iterator VDF [DF V2DF]) -(define_mode_macro VCMP [V16QI +(define_mode_iterator VCMP [V16QI V8HI V4SI V4SF V2DF]) -(define_mode_macro VCMPU [V16QI +(define_mode_iterator VCMPU [V16QI V8HI V4SI]) @@ -233,10 +233,10 @@ (SI "G") (V4SI "G")]) ;; Used for carry and borrow instructions. -(define_mode_macro CBOP [SI DI V4SI V2DI]) +(define_mode_iterator CBOP [SI DI V4SI V2DI]) ;; Used in vec_set and vec_extract -(define_mode_macro V [V2DI V4SI V8HI V16QI V2DF V4SF]) +(define_mode_iterator V [V2DI V4SI V8HI V16QI V2DF V4SF]) (define_mode_attr inner [(V16QI "QI") (V8HI "HI") (V4SI "SI") @@ -3887,6 +3887,48 @@ selb\t%0,%4,%0,%3" [(set_attr "type" "br")]) + + ;; Define the subtract-one-and-jump insns so loop.c + ;; knows what to generate. + (define_expand "doloop_end" + [(use (match_operand 0 "" "")) ; loop pseudo + (use (match_operand 1 "" "")) ; iterations; zero if unknown + (use (match_operand 2 "" "")) ; max iterations + (use (match_operand 3 "" "")) ; loop level + (use (match_operand 4 "" ""))] ; label + "" + " + { + /* Currently SMS relies on the do-loop pattern to recognize loops + where (1) the control part comprises of all insns defining and/or + using a certain 'count' register and (2) the loop count can be + adjusted by modifying this register prior to the loop. +. ??? The possible introduction of a new block to initialize the + new IV can potentially effects branch optimizations. */ + if (optimize > 0 && flag_modulo_sched) + { + rtx s0; + rtx bcomp; + rtx loc_ref; + + /* Only use this on innermost loops. */ + if (INTVAL (operands[3]) > 1) + FAIL; + if (GET_MODE (operands[0]) != SImode) + FAIL; + + s0 = operands [0]; + emit_move_insn (s0, gen_rtx_PLUS (SImode, s0, GEN_INT (-1))); + bcomp = gen_rtx_NE(SImode, s0, const0_rtx); + loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands [4]); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_IF_THEN_ELSE (VOIDmode, bcomp, + loc_ref, pc_rtx))); + + DONE; + } + }") + ;; convert between any two modes, avoiding any GCC assumptions (define_expand "spu_convert" [(set (match_operand 0 "spu_reg_operand" "") diff --git a/gcc/config/stormy16/stormy16-protos.h b/gcc/config/stormy16/stormy16-protos.h index 50820a144dd..c3c1c7aeec5 100644 --- a/gcc/config/stormy16/stormy16-protos.h +++ b/gcc/config/stormy16/stormy16-protos.h @@ -44,7 +44,7 @@ extern rtx xstormy16_function_arg #if defined (TREE_CODE) && defined (RTX_CODE) extern void xstormy16_expand_builtin_va_start (tree, rtx); extern void xstormy16_initialize_trampoline (rtx, rtx, rtx); -extern rtx xstormy16_function_value (tree, tree); +extern rtx xstormy16_function_value (const_tree, const_tree); #endif #ifdef RTX_CODE diff --git a/gcc/config/stormy16/stormy16.c b/gcc/config/stormy16/stormy16.c index d8293c12f00..b41440e6d4e 100644 --- a/gcc/config/stormy16/stormy16.c +++ b/gcc/config/stormy16/stormy16.c @@ -58,7 +58,7 @@ static void xstormy16_init_builtins (void); static rtx xstormy16_expand_builtin (tree, rtx, rtx, enum machine_mode, int); static bool xstormy16_rtx_costs (rtx, int, int, int *); static int xstormy16_address_cost (rtx); -static bool xstormy16_return_in_memory (tree, tree); +static bool xstormy16_return_in_memory (const_tree, const_tree); /* Define the information needed to generate branch and scc insns. This is stored from the compare operation. */ @@ -1515,7 +1515,7 @@ xstormy16_initialize_trampoline (rtx addr, rtx fnaddr, rtx static_chain) /* Worker function for FUNCTION_VALUE. */ rtx -xstormy16_function_value (tree valtype, tree func ATTRIBUTE_UNUSED) +xstormy16_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) { enum machine_mode mode; mode = TYPE_MODE (valtype); @@ -2637,9 +2637,9 @@ xstormy16_reorg (void) /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -xstormy16_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +xstormy16_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { - HOST_WIDE_INT size = int_size_in_bytes (type); + const HOST_WIDE_INT size = int_size_in_bytes (type); return (size == -1 || size > UNITS_PER_WORD * NUM_ARGUMENT_REGISTERS); } @@ -2670,11 +2670,11 @@ xstormy16_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) #define TARGET_GIMPLIFY_VA_ARG_EXPR xstormy16_expand_builtin_va_arg #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY xstormy16_return_in_memory diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c index 494dbeb6341..85991db47e3 100644 --- a/gcc/config/v850/v850.c +++ b/gcc/config/v850/v850.c @@ -66,11 +66,11 @@ static void v850_asm_init_sections (void); static section *v850_select_section (tree, int, unsigned HOST_WIDE_INT); static void v850_encode_data_area (tree, rtx); static void v850_encode_section_info (tree, rtx, int); -static bool v850_return_in_memory (tree, tree); +static bool v850_return_in_memory (const_tree, const_tree); static void v850_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int); static bool v850_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, - tree, bool); + const_tree, bool); static int v850_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); @@ -143,7 +143,7 @@ static GTY(()) section *zbss_section; #define TARGET_MACHINE_DEPENDENT_REORG v850_reorg #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY v850_return_in_memory @@ -223,7 +223,7 @@ v850_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) static bool v850_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED, - enum machine_mode mode, tree type, + enum machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { unsigned HOST_WIDE_INT size; @@ -2929,7 +2929,7 @@ v850_select_section (tree exp, /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -v850_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +v850_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { /* Return values > 8 bytes in length in memory. */ return int_size_in_bytes (type) > 8 || TYPE_MODE (type) == BLKmode; diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c index 810dcbbfb5b..6cfd7e0d1dc 100644 --- a/gcc/config/vax/vax.c +++ b/gcc/config/vax/vax.c @@ -82,7 +82,7 @@ static rtx vax_struct_value_rtx (tree, int); #define TARGET_ADDRESS_COST vax_address_cost #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_STRUCT_VALUE_RTX #define TARGET_STRUCT_VALUE_RTX vax_struct_value_rtx diff --git a/gcc/config/vax/vax.md b/gcc/config/vax/vax.md index fd0597b72ae..0bc05b461dc 100644 --- a/gcc/config/vax/vax.md +++ b/gcc/config/vax/vax.md @@ -42,11 +42,11 @@ ;; Integer modes supported on VAX, with a mapping from machine mode ;; to mnemonic suffix. DImode is always a special case. -(define_mode_macro VAXint [QI HI SI]) +(define_mode_iterator VAXint [QI HI SI]) (define_mode_attr isfx [(QI "b") (HI "w") (SI "l")]) ;; Similar for float modes supported on VAX. -(define_mode_macro VAXfp [SF DF]) +(define_mode_iterator VAXfp [SF DF]) (define_mode_attr fsfx [(SF "f") (DF "%#")]) ;; Some output patterns want integer immediates with a prefix... @@ -1012,7 +1012,7 @@ "jbr %l0") ;; Conditional jumps -(define_code_macro any_cond [eq ne gt lt gtu ltu ge le geu leu]) +(define_code_iterator any_cond [eq ne gt lt gtu ltu ge le geu leu]) (define_insn "b<code>" [(set (pc) diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c index 63d65c249ae..2b307997c43 100644 --- a/gcc/config/xtensa/xtensa.c +++ b/gcc/config/xtensa/xtensa.c @@ -130,7 +130,7 @@ static rtx gen_float_relational (enum rtx_code, rtx, rtx); static rtx gen_conditional_move (rtx); static rtx fixup_subreg_mem (rtx); static struct machine_function * xtensa_init_machine_status (void); -static bool xtensa_return_in_msb (tree); +static bool xtensa_return_in_msb (const_tree); static void printx (FILE *, signed int); static void xtensa_function_epilogue (FILE *, HOST_WIDE_INT); static rtx xtensa_builtin_saveregs (void); @@ -140,7 +140,7 @@ static section *xtensa_select_rtx_section (enum machine_mode, rtx, unsigned HOST_WIDE_INT); static bool xtensa_rtx_costs (rtx, int, int, int *); static tree xtensa_build_builtin_va_list (void); -static bool xtensa_return_in_memory (tree, tree); +static bool xtensa_return_in_memory (const_tree, const_tree); static tree xtensa_gimplify_va_arg_expr (tree, tree, tree *, tree *); static void xtensa_init_builtins (void); static tree xtensa_fold_builtin (tree, tree, bool); @@ -179,16 +179,16 @@ static const int reg_nonleaf_alloc_order[FIRST_PSEUDO_REGISTER] = #define TARGET_BUILD_BUILTIN_VA_LIST xtensa_build_builtin_va_list #undef TARGET_PROMOTE_FUNCTION_ARGS -#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true #undef TARGET_PROMOTE_FUNCTION_RETURN -#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true #undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true +#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY xtensa_return_in_memory #undef TARGET_SPLIT_COMPLEX_ARG -#define TARGET_SPLIT_COMPLEX_ARG hook_bool_tree_true +#define TARGET_SPLIT_COMPLEX_ARG hook_bool_const_tree_true #undef TARGET_MUST_PASS_IN_STACK #define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size @@ -1842,7 +1842,7 @@ function_arg_boundary (enum machine_mode mode, tree type) static bool -xtensa_return_in_msb (tree valtype) +xtensa_return_in_msb (const_tree valtype) { return (TARGET_BIG_ENDIAN && AGGREGATE_TYPE_P (valtype) @@ -3100,7 +3100,7 @@ xtensa_rtx_costs (rtx x, int code, int outer_code, int *total) /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool -xtensa_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED) +xtensa_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { return ((unsigned HOST_WIDE_INT) int_size_in_bytes (type) > 4 * UNITS_PER_WORD); diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 2dd68431160..2f47540a766 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -37,9 +37,9 @@ (UNSPECV_S32C1I 5) ]) -;; This code macro allows signed and unsigned widening multiplications +;; This code iterator allows signed and unsigned widening multiplications ;; to use the same template. -(define_code_macro any_extend [sign_extend zero_extend]) +(define_code_iterator any_extend [sign_extend zero_extend]) ;; <u> expands to an empty string when doing a signed operation and ;; "u" when doing an unsigned operation. @@ -48,32 +48,32 @@ ;; <su> is like <u>, but the signed form expands to "s" rather than "". (define_code_attr su [(sign_extend "s") (zero_extend "u")]) -;; This code macro allows four integer min/max operations to be +;; This code iterator allows four integer min/max operations to be ;; generated from one template. -(define_code_macro any_minmax [smin umin smax umax]) +(define_code_iterator any_minmax [smin umin smax umax]) ;; <minmax> expands to the opcode name for any_minmax operations. (define_code_attr minmax [(smin "min") (umin "minu") (smax "max") (umax "maxu")]) -;; This code macro allows all branch instructions to be generated from +;; This code iterator allows all branch instructions to be generated from ;; a single define_expand template. -(define_code_macro any_cond [eq ne gt ge lt le gtu geu ltu leu]) +(define_code_iterator any_cond [eq ne gt ge lt le gtu geu ltu leu]) -;; This code macro is for setting a register from a comparison. -(define_code_macro any_scc [eq ne gt ge lt le]) +;; This code iterator is for setting a register from a comparison. +(define_code_iterator any_scc [eq ne gt ge lt le]) -;; This code macro is for floating-point comparisons. -(define_code_macro any_scc_sf [eq lt le]) +;; This code iterator is for floating-point comparisons. +(define_code_iterator any_scc_sf [eq lt le]) -;; These macros allow to combine most atomic operations. -(define_code_macro ATOMIC [and ior xor plus minus mult]) +;; This iterator and attribute allow to combine most atomic operations. +(define_code_iterator ATOMIC [and ior xor plus minus mult]) (define_code_attr atomic [(and "and") (ior "ior") (xor "xor") (plus "add") (minus "sub") (mult "nand")]) -;; These mode macros allow the HI and QI patterns to be defined from +;; This mode iterator allows the HI and QI patterns to be defined from ;; the same template. -(define_mode_macro HQI [HI QI]) +(define_mode_iterator HQI [HI QI]) ;; Attributes. |