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-rw-r--r--gcc/testsuite/gcc.misc-tests/arm-isr.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.misc-tests/arm-isr.c b/gcc/testsuite/gcc.misc-tests/arm-isr.c
index f79e241633d..737f9ffb643 100644
--- a/gcc/testsuite/gcc.misc-tests/arm-isr.c
+++ b/gcc/testsuite/gcc.misc-tests/arm-isr.c
@@ -1,3 +1,6 @@
+extern void abort ();
+extern void exit (int);
+
#ifndef __thumb__
/* There used to be a couple of bugs in the ARM's prologue and epilogue
generation for ISR routines. The wrong epilogue instruction would be